From patchwork Tue Mar 8 10:09:46 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chen-Yu Tsai X-Patchwork-Id: 549528 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 24590C433F5 for ; Tue, 8 Mar 2022 10:10:12 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S243358AbiCHKLF (ORCPT ); Tue, 8 Mar 2022 05:11:05 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:40640 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1345646AbiCHKLD (ORCPT ); Tue, 8 Mar 2022 05:11:03 -0500 Received: from mail-pl1-x631.google.com (mail-pl1-x631.google.com [IPv6:2607:f8b0:4864:20::631]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 7C9F122505 for ; Tue, 8 Mar 2022 02:10:07 -0800 (PST) Received: by mail-pl1-x631.google.com with SMTP id s18so3381836plp.1 for ; Tue, 08 Mar 2022 02:10:07 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=5/KGSiDUR6Oh1qS3ls1eTa+dOJRLWEHzu5UF9HK4Si4=; b=eDoPTw7FlfuMrMk7TZW4fd7c4dDPzW6nXHDmrXSbtsRK6vVG9dhIQ6WrXKOKLXV7aq pz9p+6TzCc1cAGkq3MxA4HyZXLYlRrprzCIS02q3HivJhzYBshHAXuBmUwnDRmScWVih 7AG4tW3YbthMaljSEsRgDx70cRXDSte2hvmI4= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=5/KGSiDUR6Oh1qS3ls1eTa+dOJRLWEHzu5UF9HK4Si4=; b=xpl4jzGlQ7yaABgZ1d3Ce35gD61NKA2xxlZcX2j7iqOuVsv/QL9CQe803/vQ8UViSN EUqSAHgVGaeg1M/WpSrKWZeExMheTf3JLDfgTHwEGLmfa3v3UtyXIrmBAcudftje4Nh9 EJu7+slr9RmnZ/aAe/60bAx4HP8fTqdv941XhYza/dCMpLVNQzph0ch2GNPCL+FDFWMJ tD9nMaFmiTxNrkuU/2ss6eMP08mUeFTRqFVfk03XVq8lf0JYpTK5GFcRrsLK3HwQrs1H ArSFqMvXcE856MxJnymzHP32v+O8Ymi+FqSbKOORLqR0mpj94MCYVEZM9raQMmjsUPAU AUJA== X-Gm-Message-State: AOAM533LuIuTvud5UrU9Xn3b6Zf36I6dh79bxVQZu0uCNyamrKCjZSIE qBLumjXNXO4laO3dtSE4L+M4Cw== X-Google-Smtp-Source: ABdhPJxDGvhKYqfJXVj5tcUF1DdM4k4BYagm/EBulkoRUtJ1T6TWbFFUrKL/Ekqds5KSkBCbsoWkLw== X-Received: by 2002:a17:90a:4289:b0:1bc:275b:8986 with SMTP id p9-20020a17090a428900b001bc275b8986mr3758766pjg.153.1646734207017; Tue, 08 Mar 2022 02:10:07 -0800 (PST) Received: from wenstp920.tpe.corp.google.com ([2401:fa00:1:10:73f8:5e3f:6894:8f44]) by smtp.gmail.com with ESMTPSA id k19-20020a056a00135300b004f734327960sm1707553pfu.106.2022.03.08.02.10.05 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 08 Mar 2022 02:10:06 -0800 (PST) From: Chen-Yu Tsai To: Sean Wang , Linus Walleij , Matthias Brugger Cc: Chen-Yu Tsai , linux-mediatek@lists.infradead.org, linux-gpio@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, AngeloGioacchino Del Regno Subject: [PATCH v2 01/11] pinctrl: pinconf-generic: Print arguments for bias-pull-* Date: Tue, 8 Mar 2022 18:09:46 +0800 Message-Id: <20220308100956.2750295-2-wenst@chromium.org> X-Mailer: git-send-email 2.35.1.616.g0bdcbb4464-goog In-Reply-To: <20220308100956.2750295-1-wenst@chromium.org> References: <20220308100956.2750295-1-wenst@chromium.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org The bias-pull-* properties, or PIN_CONFIG_BIAS_PULL_* pin config parameters, accept optional arguments in ohms denoting the strength of the pin bias. Print these values out in debugfs as well. Fixes: eec450713e5c ("pinctrl: pinconf-generic: Add flag to print arguments") Signed-off-by: Chen-Yu Tsai Reviewed-by: AngeloGioacchino Del Regno Tested-by: AngeloGioacchino Del Regno --- drivers/pinctrl/pinconf-generic.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/pinctrl/pinconf-generic.c b/drivers/pinctrl/pinconf-generic.c index f8edcc88ac01..415d1df8f46a 100644 --- a/drivers/pinctrl/pinconf-generic.c +++ b/drivers/pinctrl/pinconf-generic.c @@ -30,10 +30,10 @@ static const struct pin_config_item conf_items[] = { PCONFDUMP(PIN_CONFIG_BIAS_BUS_HOLD, "input bias bus hold", NULL, false), PCONFDUMP(PIN_CONFIG_BIAS_DISABLE, "input bias disabled", NULL, false), PCONFDUMP(PIN_CONFIG_BIAS_HIGH_IMPEDANCE, "input bias high impedance", NULL, false), - PCONFDUMP(PIN_CONFIG_BIAS_PULL_DOWN, "input bias pull down", NULL, false), + PCONFDUMP(PIN_CONFIG_BIAS_PULL_DOWN, "input bias pull down", "ohms", true), PCONFDUMP(PIN_CONFIG_BIAS_PULL_PIN_DEFAULT, - "input bias pull to pin specific state", NULL, false), - PCONFDUMP(PIN_CONFIG_BIAS_PULL_UP, "input bias pull up", NULL, false), + "input bias pull to pin specific state", "ohms", true), + PCONFDUMP(PIN_CONFIG_BIAS_PULL_UP, "input bias pull up", "ohms", true), PCONFDUMP(PIN_CONFIG_DRIVE_OPEN_DRAIN, "output drive open drain", NULL, false), PCONFDUMP(PIN_CONFIG_DRIVE_OPEN_SOURCE, "output drive open source", NULL, false), PCONFDUMP(PIN_CONFIG_DRIVE_PUSH_PULL, "output drive push pull", NULL, false), From patchwork Tue Mar 8 10:09:47 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chen-Yu Tsai X-Patchwork-Id: 549887 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5FCF4C433EF for ; Tue, 8 Mar 2022 10:10:13 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1345646AbiCHKLG (ORCPT ); Tue, 8 Mar 2022 05:11:06 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:40712 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1345665AbiCHKLF (ORCPT ); Tue, 8 Mar 2022 05:11:05 -0500 Received: from mail-pl1-x62a.google.com (mail-pl1-x62a.google.com [IPv6:2607:f8b0:4864:20::62a]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 8114D3298E for ; Tue, 8 Mar 2022 02:10:09 -0800 (PST) Received: by mail-pl1-x62a.google.com with SMTP id m2so10635569pll.0 for ; Tue, 08 Mar 2022 02:10:09 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=noEqkBf5xzBolmnhdQPfwHD82qaYeiB8/RXOxn1DB2I=; b=PsIwM301p+zkfVPLNMuBY2fgeZYi4j+IGcIxp8lP2wQofQwsTA/SANTTxjG0S8RTAK Zz2rcqgxCgmmwveXGiLhoaqoV9LC4rAO+jCp0lqq4wCXA5PSkdUzbpTufzwn7Ap3iPbQ jmIKa5JsZRMgNuNQeXZh1sXnjbhE/kmJF87vk= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=noEqkBf5xzBolmnhdQPfwHD82qaYeiB8/RXOxn1DB2I=; b=Ffg3gbugG+fhT6/GwSNWbelFgT+tpiySlq65ATfwUaO6+4zdoINaI7VettKSerepMW cFmBiFUvtEhs+1qhhsbKf83vLc0SfaGV15yWbtofw9XBnqyX+WnVY2hstbBrji2fe9SR gCUKDK+EITdmbbOpVsUYSQzyiMc71Yz1F9SW1ZC5J14pjDd+coMnuNp77NyY/Pjv6IsM U8XbYeXE4yd8N8eOnrca4XKaoBEP5i4QQVOaL7mE976f1Y4ZdVC92rSVE0uh6sNPDDaN ak2uPjWsu+lUFSX75Rrcy079lIhVGfLPQEJrjmBcNbbfkgLm1MykzAbt2DEPMO0KUshP 3plQ== X-Gm-Message-State: AOAM530ObqFAUZs9z6TuxbowzOEXBAK7eg0R2wUPrtcq/jnk23+TLQeU W8mXyHOKSaV95fzGgHrEZHU10A== X-Google-Smtp-Source: ABdhPJwMnsLSH0Ugh0kYJjqmbKgwtim8f6qXQsngF85UoO3kJmueeC/GVPnsmGoroD8ZfCxe30PFag== X-Received: by 2002:a17:903:2350:b0:151:e633:7479 with SMTP id c16-20020a170903235000b00151e6337479mr10346038plh.74.1646734208964; Tue, 08 Mar 2022 02:10:08 -0800 (PST) Received: from wenstp920.tpe.corp.google.com ([2401:fa00:1:10:73f8:5e3f:6894:8f44]) by smtp.gmail.com with ESMTPSA id k19-20020a056a00135300b004f734327960sm1707553pfu.106.2022.03.08.02.10.07 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 08 Mar 2022 02:10:08 -0800 (PST) From: Chen-Yu Tsai To: Sean Wang , Linus Walleij , Matthias Brugger Cc: Chen-Yu Tsai , linux-mediatek@lists.infradead.org, linux-gpio@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, AngeloGioacchino Del Regno Subject: [PATCH v2 02/11] pinctrl: mediatek: paris: Fix PIN_CONFIG_BIAS_* readback Date: Tue, 8 Mar 2022 18:09:47 +0800 Message-Id: <20220308100956.2750295-3-wenst@chromium.org> X-Mailer: git-send-email 2.35.1.616.g0bdcbb4464-goog In-Reply-To: <20220308100956.2750295-1-wenst@chromium.org> References: <20220308100956.2750295-1-wenst@chromium.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org When reading back pin bias settings, if the pin is not in the corresponding bias state, the function should return -EINVAL. Fix this in the mediatek-paris pinctrl library so that the read back state is not littered with bogus a "input bias disabled" combined with "pull up" or "pull down" states. Fixes: 805250982bb5 ("pinctrl: mediatek: add pinctrl-paris that implements the vendor dt-bindings") Signed-off-by: Chen-Yu Tsai --- drivers/pinctrl/mediatek/pinctrl-paris.c | 16 ++++++---------- 1 file changed, 6 insertions(+), 10 deletions(-) diff --git a/drivers/pinctrl/mediatek/pinctrl-paris.c b/drivers/pinctrl/mediatek/pinctrl-paris.c index f9f9110f2107..7037560ecda9 100644 --- a/drivers/pinctrl/mediatek/pinctrl-paris.c +++ b/drivers/pinctrl/mediatek/pinctrl-paris.c @@ -96,20 +96,16 @@ static int mtk_pinconf_get(struct pinctrl_dev *pctldev, err = hw->soc->bias_get_combo(hw, desc, &pullup, &ret); if (err) goto out; + if (ret == MTK_PUPD_SET_R1R0_00) + ret = MTK_DISABLE; if (param == PIN_CONFIG_BIAS_DISABLE) { - if (ret == MTK_PUPD_SET_R1R0_00) - ret = MTK_DISABLE; + if (ret != MTK_DISABLE) + err = -EINVAL; } else if (param == PIN_CONFIG_BIAS_PULL_UP) { - /* When desire to get pull-up value, return - * error if current setting is pull-down - */ - if (!pullup) + if (!pullup || ret == MTK_DISABLE) err = -EINVAL; } else if (param == PIN_CONFIG_BIAS_PULL_DOWN) { - /* When desire to get pull-down value, return - * error if current setting is pull-up - */ - if (pullup) + if (pullup || ret == MTK_DISABLE) err = -EINVAL; } } else { From patchwork Tue Mar 8 10:09:48 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chen-Yu Tsai X-Patchwork-Id: 549885 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 972FAC4332F for ; Tue, 8 Mar 2022 10:10:25 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1345677AbiCHKLO (ORCPT ); Tue, 8 Mar 2022 05:11:14 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:40738 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1345668AbiCHKLH (ORCPT ); Tue, 8 Mar 2022 05:11:07 -0500 Received: from mail-pl1-x631.google.com (mail-pl1-x631.google.com [IPv6:2607:f8b0:4864:20::631]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 62C7422BF7 for ; Tue, 8 Mar 2022 02:10:11 -0800 (PST) Received: by mail-pl1-x631.google.com with SMTP id p17so16603760plo.9 for ; Tue, 08 Mar 2022 02:10:11 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=0mkHtiSV2mMzHIze/I73DmsEuzqXgbxwstSY7Z96a90=; b=MqSUVQddC79+cfbGd7rJlWaOGFHsKsVv3nxuDEb0d5t14RJm8RgxTNucAJmbCr/HNO aUoOwngfmNE0aHCLm/b7tOtkxPjhGIov5/taNy/0m8E6Jkm4+4R7zGhk6AAp83OyYTXo oghpwvy5LQLRP29YCov4efQTYND6/zUAVpnhY= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=0mkHtiSV2mMzHIze/I73DmsEuzqXgbxwstSY7Z96a90=; b=7MGplp2bZvYv1z5TWmcjl93mfWClPcJCUlSy9UVBpB/teqNL2jh1DQvSWJX+wCg6sy 8RuPfrjctUQ4nZ8g+iNSsJ9SE79CVdxDbvYAbQLAj46SR5dGlaW+SZetw2Rxq7NyY4fg 96nJzkOmWzDBjkawwm7M9+U6jenh7SXv5OSXAq/D0wizQfSf/eC9s01GEwzIEDrSLgVS vCiGy6//q6aE9JOsZP8j+RtcAGk+BeefaZIawgkiGDwx5r7nFWBi/0xnc93ilOG8bR8x EVJ5p2qY9wT1JTflcZsrV7l9ZNbeGWWjmsFwHAwoZcoZFx4p54QwrpAUDtv4+LsGtgNI C03A== X-Gm-Message-State: AOAM5302uLf6MUAEq3TAdVvt4jh6sihkonS/JG4YkR2a+3/HqH/4TmoH F54ga1fH+3t4yOvUBQ9j7OFviA== X-Google-Smtp-Source: ABdhPJyFRJs7+lYwOkpKY/+oHApZBU4Bq8/m6MYCzudRdQ6PI/A8Wr1FevXk8zt3kT4tAZVslfcZzw== X-Received: by 2002:a17:902:db0d:b0:14f:b047:8d22 with SMTP id m13-20020a170902db0d00b0014fb0478d22mr16271484plx.90.1646734210921; Tue, 08 Mar 2022 02:10:10 -0800 (PST) Received: from wenstp920.tpe.corp.google.com ([2401:fa00:1:10:73f8:5e3f:6894:8f44]) by smtp.gmail.com with ESMTPSA id k19-20020a056a00135300b004f734327960sm1707553pfu.106.2022.03.08.02.10.09 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 08 Mar 2022 02:10:10 -0800 (PST) From: Chen-Yu Tsai To: Sean Wang , Linus Walleij , Matthias Brugger Cc: Chen-Yu Tsai , linux-mediatek@lists.infradead.org, linux-gpio@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, AngeloGioacchino Del Regno Subject: [PATCH v2 03/11] pinctrl: mediatek: paris: Fix "argument" argument type for mtk_pinconf_get() Date: Tue, 8 Mar 2022 18:09:48 +0800 Message-Id: <20220308100956.2750295-4-wenst@chromium.org> X-Mailer: git-send-email 2.35.1.616.g0bdcbb4464-goog In-Reply-To: <20220308100956.2750295-1-wenst@chromium.org> References: <20220308100956.2750295-1-wenst@chromium.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org For mtk_pinconf_get(), the "argument" argument is typically returned by pinconf_to_config_argument(), which holds the value for a given pinconf parameter. It certainly should not have the type of "enum pin_config_param", which describes the type of the pinconf parameter itself. Change the type to u32, which matches the return type of pinconf_to_config_argument(). Fixes: 805250982bb5 ("pinctrl: mediatek: add pinctrl-paris that implements the vendor dt-bindings") Signed-off-by: Chen-Yu Tsai Reviewed-by: AngeloGioacchino Del Regno --- drivers/pinctrl/mediatek/pinctrl-paris.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/drivers/pinctrl/mediatek/pinctrl-paris.c b/drivers/pinctrl/mediatek/pinctrl-paris.c index 7037560ecda9..c668191933a0 100644 --- a/drivers/pinctrl/mediatek/pinctrl-paris.c +++ b/drivers/pinctrl/mediatek/pinctrl-paris.c @@ -184,8 +184,7 @@ static int mtk_pinconf_get(struct pinctrl_dev *pctldev, } static int mtk_pinconf_set(struct pinctrl_dev *pctldev, unsigned int pin, - enum pin_config_param param, - enum pin_config_param arg) + enum pin_config_param param, u32 arg) { struct mtk_pinctrl *hw = pinctrl_dev_get_drvdata(pctldev); const struct mtk_pin_desc *desc; From patchwork Tue Mar 8 10:09:49 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chen-Yu Tsai X-Patchwork-Id: 549527 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 44949C433F5 for ; Tue, 8 Mar 2022 10:10:21 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1345670AbiCHKLP (ORCPT ); Tue, 8 Mar 2022 05:11:15 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:41024 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1345686AbiCHKLO (ORCPT ); Tue, 8 Mar 2022 05:11:14 -0500 Received: from mail-pj1-x102a.google.com (mail-pj1-x102a.google.com [IPv6:2607:f8b0:4864:20::102a]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 78F1939815 for ; Tue, 8 Mar 2022 02:10:13 -0800 (PST) Received: by mail-pj1-x102a.google.com with SMTP id v4so16704437pjh.2 for ; Tue, 08 Mar 2022 02:10:13 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=loBNgvfdq/vh+q5b0xP2M4wY6ZA7RodjlaGOVqoQIgQ=; b=FT0q3vmjV4Ofixirx3vGOE4K1bSUTlVNj1zkmWaEB3EX6y7v5tGukfnLjgf/JM4mYu 6HuQCZsYE/huFip+v5Ygfg+JBp7K5XS+cyFGhVfOCY4WJ09FItpUmUbz29q/U6oyX/LU VF3wg4h072C1MLIQjKushAzg7cYYjWfEhnqIw= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=loBNgvfdq/vh+q5b0xP2M4wY6ZA7RodjlaGOVqoQIgQ=; b=N0nyiXDfNa0lsv5IoTQN1SDzWLgSM9vgZ5dnj7CyFnNecajt3re2I0CVT49BhEJPbx 5hGMiE78eWtOXJrBhhcDjuejgp/GSgUVuHZliIcxQgv9xj0qDE+OHcTsmqa48qnTM5Jc NMtTy5bHCb59lDj+Cf5e+qNgD2g5aijIXYPOPS8BtRGZcn+HtevWOYSfTVtgqaDSGvU2 P0lL+NfkCP5YqsK7pXfbtYytEue3NesQrqk8v9mE0WXmtIvbGwsguv3G4cYjcJBJ4SqV zFjfpjY06hXYf5ylM5b8E/IBbWsBX++TNx0ZqAplLcSOSZ8fGO5PCUoWqYmqWLnIk30h fUeg== X-Gm-Message-State: AOAM533ZPNo0pm4TBfqZbvUYJ3yqmxgpHGB/Ivg09Oqm8AiNekIR1waT qGK0oe2zUoTFukbDf4VWGk7BoA== X-Google-Smtp-Source: ABdhPJwF0uYyAvVJHLAKSPzAGWaO6LHCugVgwokBaJgUvBSb8BHs7+KBcJM96IyJnQmOWL8xCiZEuQ== X-Received: by 2002:a17:902:bcc6:b0:151:f36d:2658 with SMTP id o6-20020a170902bcc600b00151f36d2658mr6808467pls.125.1646734212808; Tue, 08 Mar 2022 02:10:12 -0800 (PST) Received: from wenstp920.tpe.corp.google.com ([2401:fa00:1:10:73f8:5e3f:6894:8f44]) by smtp.gmail.com with ESMTPSA id k19-20020a056a00135300b004f734327960sm1707553pfu.106.2022.03.08.02.10.11 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 08 Mar 2022 02:10:12 -0800 (PST) From: Chen-Yu Tsai To: Sean Wang , Linus Walleij , Matthias Brugger Cc: Chen-Yu Tsai , linux-mediatek@lists.infradead.org, linux-gpio@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, AngeloGioacchino Del Regno Subject: [PATCH v2 04/11] pinctrl: mediatek: paris: Fix pingroup pin config state readback Date: Tue, 8 Mar 2022 18:09:49 +0800 Message-Id: <20220308100956.2750295-5-wenst@chromium.org> X-Mailer: git-send-email 2.35.1.616.g0bdcbb4464-goog In-Reply-To: <20220308100956.2750295-1-wenst@chromium.org> References: <20220308100956.2750295-1-wenst@chromium.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org mtk_pconf_group_get(), used to read back pingroup pin config state, simply returns a set of configs saved from a previous invocation of mtk_pconf_group_set(). This is an unfiltered, unvalidated set passed in from the pinconf core, which does not match the current hardware state. Since the driver library is designed to have one pin per group, pass through mtk_pconf_group_get() to mtk_pinconf_get(), to read back the current pin config state of the only pin in the group. Also drop the assignment of pin config state to the group. Fixes: 805250982bb5 ("pinctrl: mediatek: add pinctrl-paris that implements the vendor dt-bindings") Signed-off-by: Chen-Yu Tsai Reviewed-by: AngeloGioacchino Del Regno --- drivers/pinctrl/mediatek/pinctrl-paris.c | 8 +++----- 1 file changed, 3 insertions(+), 5 deletions(-) diff --git a/drivers/pinctrl/mediatek/pinctrl-paris.c b/drivers/pinctrl/mediatek/pinctrl-paris.c index c668191933a0..3bda1aac650b 100644 --- a/drivers/pinctrl/mediatek/pinctrl-paris.c +++ b/drivers/pinctrl/mediatek/pinctrl-paris.c @@ -732,10 +732,10 @@ static int mtk_pconf_group_get(struct pinctrl_dev *pctldev, unsigned group, unsigned long *config) { struct mtk_pinctrl *hw = pinctrl_dev_get_drvdata(pctldev); + struct mtk_pinctrl_group *grp = &hw->groups[group]; - *config = hw->groups[group].config; - - return 0; + /* One pin per group only */ + return mtk_pinconf_get(pctldev, grp->pin, config); } static int mtk_pconf_group_set(struct pinctrl_dev *pctldev, unsigned group, @@ -751,8 +751,6 @@ static int mtk_pconf_group_set(struct pinctrl_dev *pctldev, unsigned group, pinconf_to_config_argument(configs[i])); if (ret < 0) return ret; - - grp->config = configs[i]; } return 0; From patchwork Tue Mar 8 10:09:50 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chen-Yu Tsai X-Patchwork-Id: 549886 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id A6628C433EF for ; Tue, 8 Mar 2022 10:10:21 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1345686AbiCHKLP (ORCPT ); Tue, 8 Mar 2022 05:11:15 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:41046 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1345696AbiCHKLO (ORCPT ); Tue, 8 Mar 2022 05:11:14 -0500 Received: from mail-pj1-x102f.google.com (mail-pj1-x102f.google.com [IPv6:2607:f8b0:4864:20::102f]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 52D6B41FA0 for ; Tue, 8 Mar 2022 02:10:15 -0800 (PST) Received: by mail-pj1-x102f.google.com with SMTP id p3-20020a17090a680300b001bbfb9d760eso1775456pjj.2 for ; Tue, 08 Mar 2022 02:10:15 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=oGdSDDQNkWhUKe33kF4Pj3YfO7xrQa9jh28/YPNZHXQ=; b=Xc64V2C3B+kdpVRo+6vOPVtr+wdh+pkujfSHyLdve/PVnzSDyR8OAFEMyRnpsHi6jN eaFxWFfybXPd+S69UPSIo50ij3LSwFkygbdRkOTMcRDO8J6qh0fwexcLjDaxZJh9Yw70 LmXcfY33hytZUxq99hTKvsp3EiXSuWR/bIGeU= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=oGdSDDQNkWhUKe33kF4Pj3YfO7xrQa9jh28/YPNZHXQ=; b=egmMPkNE3bi6icFKcbr+Kaade9gPQrX+/REeWd7uupJ3hTFe75pDwG6ccqNw3yJoa1 tysU9lsIzQhvzrhz4T0W5KxpjPNYImx13IqSS2wn8byE6JdW9qsYDPnJT6Ec0LdotIxv ZpdJjsACWlVI3dT2vLVeTM5/QCj2DZrepcIW5E3XJhzCMQw0jhICH8PkCsBuVLl3va0D CUo2rcGZmRTrTHoN84cYihMA/5tS62Ip1bd93YlqvqP8QutyFE14Y8yeQIaGtg6bm8qm vn80v6hUfurX0uB7PIvKqsV/K0gnWe0f+/pYsUOUNlE8Dd4bAOyeTE8juB7ddY61mVEO H3Gw== X-Gm-Message-State: AOAM532JuYA5dPMce20iQFyYy4ysBxhvH8HmTx3qcame7kK+v2cEvzXK ZeKua9rG+mBk/8iLikSGC7GtBw== X-Google-Smtp-Source: ABdhPJxTWoED9DBGHXC3bbL4qawyt3m8I6aWwzNtsOMjlw76oLy6YYPISct3R0U33YSX/T9UDF9BFw== X-Received: by 2002:a17:902:d2d1:b0:151:ef69:c27d with SMTP id n17-20020a170902d2d100b00151ef69c27dmr7994753plc.34.1646734214813; Tue, 08 Mar 2022 02:10:14 -0800 (PST) Received: from wenstp920.tpe.corp.google.com ([2401:fa00:1:10:73f8:5e3f:6894:8f44]) by smtp.gmail.com with ESMTPSA id k19-20020a056a00135300b004f734327960sm1707553pfu.106.2022.03.08.02.10.13 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 08 Mar 2022 02:10:14 -0800 (PST) From: Chen-Yu Tsai To: Sean Wang , Linus Walleij , Matthias Brugger Cc: Chen-Yu Tsai , linux-mediatek@lists.infradead.org, linux-gpio@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, AngeloGioacchino Del Regno Subject: [PATCH v2 05/11] pinctrl: mediatek: paris: Drop extra newline in mtk_pctrl_show_one_pin() Date: Tue, 8 Mar 2022 18:09:50 +0800 Message-Id: <20220308100956.2750295-6-wenst@chromium.org> X-Mailer: git-send-email 2.35.1.616.g0bdcbb4464-goog In-Reply-To: <20220308100956.2750295-1-wenst@chromium.org> References: <20220308100956.2750295-1-wenst@chromium.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org The caller of mtk_pctrl_show_one_pin() is responsible for printing the full line. mtk_pctrl_show_one_pin(), called through mtk_pctrl_dbg_show(), should only produce a string containing the extra information the driver wants included. Drop the extra newlines. Also unbreak the line that is only slightly over 80 characters to make it easier on the eye, and get rid of the braces now that each block in the conditionals is just one line. Fixes: 184d8e13f9b1 ("pinctrl: mediatek: Add support for pin configuration dump via debugfs.") Fixes: fb34a9ae383a ("pinctrl: mediatek: support rsel feature") Signed-off-by: Chen-Yu Tsai Reviewed-by: AngeloGioacchino Del Regno --- drivers/pinctrl/mediatek/pinctrl-paris.c | 12 ++++-------- 1 file changed, 4 insertions(+), 8 deletions(-) diff --git a/drivers/pinctrl/mediatek/pinctrl-paris.c b/drivers/pinctrl/mediatek/pinctrl-paris.c index 3bda1aac650b..38a00a906daf 100644 --- a/drivers/pinctrl/mediatek/pinctrl-paris.c +++ b/drivers/pinctrl/mediatek/pinctrl-paris.c @@ -634,14 +634,10 @@ ssize_t mtk_pctrl_show_one_pin(struct mtk_pinctrl *hw, pullen, pullup); - if (r1 != -1) { - len += scnprintf(buf + len, buf_len - len, " (%1d %1d)\n", - r1, r0); - } else if (rsel != -1) { - len += scnprintf(buf + len, buf_len - len, " (%1d)\n", rsel); - } else { - len += scnprintf(buf + len, buf_len - len, "\n"); - } + if (r1 != -1) + len += scnprintf(buf + len, buf_len - len, " (%1d %1d)", r1, r0); + else if (rsel != -1) + len += scnprintf(buf + len, buf_len - len, " (%1d)", rsel); return len; } From patchwork Tue Mar 8 10:09:51 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chen-Yu Tsai X-Patchwork-Id: 549525 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5F93CC433EF for ; Tue, 8 Mar 2022 10:10:26 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1345681AbiCHKLV (ORCPT ); Tue, 8 Mar 2022 05:11:21 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:41022 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1345700AbiCHKLO (ORCPT ); Tue, 8 Mar 2022 05:11:14 -0500 Received: from mail-pj1-x102e.google.com (mail-pj1-x102e.google.com [IPv6:2607:f8b0:4864:20::102e]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 5387342A0C for ; Tue, 8 Mar 2022 02:10:17 -0800 (PST) Received: by mail-pj1-x102e.google.com with SMTP id cx5so16724633pjb.1 for ; Tue, 08 Mar 2022 02:10:17 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=YCEYLzINbSJ27Mxc1gQH0RSj42l80KVWvId+vHnO050=; b=VFlI3NcvOJtijZK9dnSyiiARFam7LJ8qmOTLKNc6BwqUaKaUlKU4+8f3icJASzdiix OthB+gk44a6lieASchFK+lLJcJ+pUaxnkcomxmj4/ef/plXlIWS42RAYtXU1/9+aRBkL h4lX3waAzusF3Hgh0IGsk99Q5//h4ggK0BCFc= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=YCEYLzINbSJ27Mxc1gQH0RSj42l80KVWvId+vHnO050=; b=gsaF8eatKYQiCAiuM415Fm0s2nyxAnVbYFdLMR1+vmYC7Ph9UN/THfcnb6sOHEwSm3 PeTGrwHrKGHIPAZTaDWQJofzMgsTwbipoNOCG+3+ImcONUUm4hF/hCCl+GYreI3jOvvJ aoAIN7BYZmc71dMggMVyO9XeTSxTYXsRbH8F0M1QY9XemT9bUzRwInXDO7rqiVDsLCUo E3XKcKodQk+MqhAQZO7MfF6vNiS5SLzOh6m5niV3DKxEHkRMUe5aCgHcVeehomfpWHny Tks/aN1OYnfZg93ZgEhCsm4C7bp7CyALQQ78yzvzjfAy9vouvPIPMw2+2wVPI4MUfu8A JnPA== X-Gm-Message-State: AOAM531qjJwESKcRC2vjqDWCnERZUuzL9alzwCw6wpM20GOgaxZf9JH3 /1Tley2BuHmsa4l0gvpZgVLV8g== X-Google-Smtp-Source: ABdhPJxvlMwg053TxzUU1yh1e9ywYI4FTa148KhAT6lQrsDtI61chzmA/3TvSGQDlNZ1lmoCT8ZRig== X-Received: by 2002:a17:902:ef4d:b0:14f:e82b:25fd with SMTP id e13-20020a170902ef4d00b0014fe82b25fdmr16531295plx.80.1646734216854; Tue, 08 Mar 2022 02:10:16 -0800 (PST) Received: from wenstp920.tpe.corp.google.com ([2401:fa00:1:10:73f8:5e3f:6894:8f44]) by smtp.gmail.com with ESMTPSA id k19-20020a056a00135300b004f734327960sm1707553pfu.106.2022.03.08.02.10.15 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 08 Mar 2022 02:10:16 -0800 (PST) From: Chen-Yu Tsai To: Sean Wang , Linus Walleij , Matthias Brugger Cc: Chen-Yu Tsai , linux-mediatek@lists.infradead.org, linux-gpio@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, AngeloGioacchino Del Regno Subject: [PATCH v2 06/11] pinctrl: mediatek: paris: Skip custom extra pin config dump for virtual GPIOs Date: Tue, 8 Mar 2022 18:09:51 +0800 Message-Id: <20220308100956.2750295-7-wenst@chromium.org> X-Mailer: git-send-email 2.35.1.616.g0bdcbb4464-goog In-Reply-To: <20220308100956.2750295-1-wenst@chromium.org> References: <20220308100956.2750295-1-wenst@chromium.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org Virtual GPIOs do not have any hardware state associated with them. Any attempt to read back hardware state for these pins result in error codes. Skip dumping extra pin config information for these virtual GPIOs. Fixes: 184d8e13f9b1 ("pinctrl: mediatek: Add support for pin configuration dump via debugfs.") Signed-off-by: Chen-Yu Tsai Reviewed-by: AngeloGioacchino Del Regno --- drivers/pinctrl/mediatek/pinctrl-paris.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/pinctrl/mediatek/pinctrl-paris.c b/drivers/pinctrl/mediatek/pinctrl-paris.c index 38a00a906daf..39487e0c2726 100644 --- a/drivers/pinctrl/mediatek/pinctrl-paris.c +++ b/drivers/pinctrl/mediatek/pinctrl-paris.c @@ -581,6 +581,9 @@ ssize_t mtk_pctrl_show_one_pin(struct mtk_pinctrl *hw, if (gpio >= hw->soc->npins) return -EINVAL; + if (mtk_is_virt_gpio(hw, gpio)) + return -EINVAL; + desc = (const struct mtk_pin_desc *)&hw->soc->pins[gpio]; pinmux = mtk_pctrl_get_pinmux(hw, gpio); if (pinmux >= hw->soc->nfuncs) From patchwork Tue Mar 8 10:09:52 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chen-Yu Tsai X-Patchwork-Id: 549526 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 87D1EC433F5 for ; Tue, 8 Mar 2022 10:10:24 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1345664AbiCHKLR (ORCPT ); Tue, 8 Mar 2022 05:11:17 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:41044 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1345693AbiCHKLQ (ORCPT ); Tue, 8 Mar 2022 05:11:16 -0500 Received: from mail-pg1-x52c.google.com (mail-pg1-x52c.google.com [IPv6:2607:f8b0:4864:20::52c]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 8080B37A18 for ; Tue, 8 Mar 2022 02:10:19 -0800 (PST) Received: by mail-pg1-x52c.google.com with SMTP id c11so3616750pgu.11 for ; Tue, 08 Mar 2022 02:10:19 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=AN8AQlXUHY8dzoH7tRwXIxVaLJny20Q1qo/2QYSwxHk=; b=bvMT2jkFovcX32w1PT4TTZsspSO3e8SRTk4q/igiSkmk1cUsE98JgeoEY/AL+dcqqr jS34mDr+t3NiSxzysNh51S4J/5tPFK4zct+75oThi+ZUuqpucK6VNZsvlnz481UDatKe G827DuIdlh6BrRcFNn62siIpYzUjZpPJMfngo= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=AN8AQlXUHY8dzoH7tRwXIxVaLJny20Q1qo/2QYSwxHk=; b=rR9+1+QkGyPgj7gJSfesVcM6jqtgc+TMHIrI3n6gotVHMbMKR2v1hef4LiSpqS4Yxo rF5bfzZCYYqc7LpACM/sOMssFJhc8+BHDSnVM99f5Y0ETHmoCqFoSdUcyAh07BtBvRg3 4K+KjokkrW4JLvJvuYBZ/yfNQZd4jmUgwpzdDqbhovfb+UM6pjj+Nk1WauJgW/WSfQiL HKI81KFtAcOxQ2MmUi8awYBzl2l4K7H1gfzI1aLSwi/mjzrZCkL8ZpsxVhJmZWnYqAC/ 2aik8ORZ0/XLeyYa8lBJiFgxVVR4jbfIQWxJrjbfjA8DzrKO8q4z24sOxeKBXAknV/pT 3nsA== X-Gm-Message-State: AOAM531ZMt7F5zVd7VFwWynaBFyAWMm/u5Btduldtz5JGK182mwAFbvs ijBlSIyIdSjVzkEvOhweWUc5rB9pSqfeOQ== X-Google-Smtp-Source: ABdhPJwL9D+0SHRBS3XhC6nSpflTUI/0erBZkhgu01psg9Z8qe64mE6poyKANJlHUDzPcjgGtUO/Ag== X-Received: by 2002:a63:2ccb:0:b0:37c:626c:d7e with SMTP id s194-20020a632ccb000000b0037c626c0d7emr13324616pgs.290.1646734218922; Tue, 08 Mar 2022 02:10:18 -0800 (PST) Received: from wenstp920.tpe.corp.google.com ([2401:fa00:1:10:73f8:5e3f:6894:8f44]) by smtp.gmail.com with ESMTPSA id k19-20020a056a00135300b004f734327960sm1707553pfu.106.2022.03.08.02.10.17 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 08 Mar 2022 02:10:18 -0800 (PST) From: Chen-Yu Tsai To: Sean Wang , Linus Walleij , Matthias Brugger Cc: Chen-Yu Tsai , linux-mediatek@lists.infradead.org, linux-gpio@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, AngeloGioacchino Del Regno Subject: [PATCH v2 07/11] pinctrl: mediatek: paris: Rework mtk_pinconf_{get,set} switch/case logic Date: Tue, 8 Mar 2022 18:09:52 +0800 Message-Id: <20220308100956.2750295-8-wenst@chromium.org> X-Mailer: git-send-email 2.35.1.616.g0bdcbb4464-goog In-Reply-To: <20220308100956.2750295-1-wenst@chromium.org> References: <20220308100956.2750295-1-wenst@chromium.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org The current code deals with optional features by testing for the function pointers and returning -ENOTSUPP if it is not valid. This is done for multiple pin config settings and results in the code that handles the supporting cases to get indented by one level. This is aggrevated by the fact that some features require another level of conditionals. Instead of assigning the same error code in all unsupported optional feature cases, simply have that error code as the default, and break out of the switch/case block whenever a feature is unsupported, or an error is returned. This reduces indentation by one level for the useful code. Also replace the goto statements with break statements. The result is the same, as the gotos simply exit the switch/case block, which can also be achieved with a break statement. With the latter the intent is clear and easier to understand. Signed-off-by: Chen-Yu Tsai Reviewed-by: AngeloGioacchino Del Regno --- drivers/pinctrl/mediatek/pinctrl-paris.c | 144 ++++++++++------------- 1 file changed, 61 insertions(+), 83 deletions(-) diff --git a/drivers/pinctrl/mediatek/pinctrl-paris.c b/drivers/pinctrl/mediatek/pinctrl-paris.c index 39487e0c2726..1ea3f3c54ef3 100644 --- a/drivers/pinctrl/mediatek/pinctrl-paris.c +++ b/drivers/pinctrl/mediatek/pinctrl-paris.c @@ -79,37 +79,34 @@ static int mtk_pinconf_get(struct pinctrl_dev *pctldev, { struct mtk_pinctrl *hw = pinctrl_dev_get_drvdata(pctldev); u32 param = pinconf_to_config_param(*config); - int pullup, err, reg, ret = 1; + int pullup, reg, err = -ENOTSUPP, ret = 1; const struct mtk_pin_desc *desc; - if (pin >= hw->soc->npins) { - err = -EINVAL; - goto out; - } + if (pin >= hw->soc->npins) + return -EINVAL; + desc = (const struct mtk_pin_desc *)&hw->soc->pins[pin]; switch (param) { case PIN_CONFIG_BIAS_DISABLE: case PIN_CONFIG_BIAS_PULL_UP: case PIN_CONFIG_BIAS_PULL_DOWN: - if (hw->soc->bias_get_combo) { - err = hw->soc->bias_get_combo(hw, desc, &pullup, &ret); - if (err) - goto out; - if (ret == MTK_PUPD_SET_R1R0_00) - ret = MTK_DISABLE; - if (param == PIN_CONFIG_BIAS_DISABLE) { - if (ret != MTK_DISABLE) - err = -EINVAL; - } else if (param == PIN_CONFIG_BIAS_PULL_UP) { - if (!pullup || ret == MTK_DISABLE) - err = -EINVAL; - } else if (param == PIN_CONFIG_BIAS_PULL_DOWN) { - if (pullup || ret == MTK_DISABLE) - err = -EINVAL; - } - } else { - err = -ENOTSUPP; + if (!hw->soc->bias_get_combo) + break; + err = hw->soc->bias_get_combo(hw, desc, &pullup, &ret); + if (err) + break; + if (ret == MTK_PUPD_SET_R1R0_00) + ret = MTK_DISABLE; + if (param == PIN_CONFIG_BIAS_DISABLE) { + if (ret != MTK_DISABLE) + err = -EINVAL; + } else if (param == PIN_CONFIG_BIAS_PULL_UP) { + if (!pullup || ret == MTK_DISABLE) + err = -EINVAL; + } else if (param == PIN_CONFIG_BIAS_PULL_DOWN) { + if (pullup || ret == MTK_DISABLE) + err = -EINVAL; } break; case PIN_CONFIG_SLEW_RATE: @@ -119,7 +116,7 @@ static int mtk_pinconf_get(struct pinctrl_dev *pctldev, case PIN_CONFIG_OUTPUT_ENABLE: err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_DIR, &ret); if (err) - goto out; + break; /* CONFIG Current direction return value * ------------- ----------------- ---------------------- * OUTPUT_ENABLE output 1 (= HW value) @@ -134,23 +131,21 @@ static int mtk_pinconf_get(struct pinctrl_dev *pctldev, case PIN_CONFIG_INPUT_SCHMITT_ENABLE: err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_DIR, &ret); if (err) - goto out; + break; /* return error when in output mode * because schmitt trigger only work in input mode */ if (ret) { err = -EINVAL; - goto out; + break; } err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_SMT, &ret); - break; case PIN_CONFIG_DRIVE_STRENGTH: - if (hw->soc->drive_get) - err = hw->soc->drive_get(hw, desc, &ret); - else - err = -ENOTSUPP; + if (!hw->soc->drive_get) + break; + err = hw->soc->drive_get(hw, desc, &ret); break; case MTK_PIN_CONFIG_TDSEL: case MTK_PIN_CONFIG_RDSEL: @@ -160,23 +155,18 @@ static int mtk_pinconf_get(struct pinctrl_dev *pctldev, break; case MTK_PIN_CONFIG_PU_ADV: case MTK_PIN_CONFIG_PD_ADV: - if (hw->soc->adv_pull_get) { - pullup = param == MTK_PIN_CONFIG_PU_ADV; - err = hw->soc->adv_pull_get(hw, desc, pullup, &ret); - } else - err = -ENOTSUPP; + if (!hw->soc->adv_pull_get) + break; + pullup = param == MTK_PIN_CONFIG_PU_ADV; + err = hw->soc->adv_pull_get(hw, desc, pullup, &ret); break; case MTK_PIN_CONFIG_DRV_ADV: - if (hw->soc->adv_drive_get) - err = hw->soc->adv_drive_get(hw, desc, &ret); - else - err = -ENOTSUPP; + if (!hw->soc->adv_drive_get) + break; + err = hw->soc->adv_drive_get(hw, desc, &ret); break; - default: - err = -ENOTSUPP; } -out: if (!err) *config = pinconf_to_config_packed(param, ret); @@ -188,33 +178,29 @@ static int mtk_pinconf_set(struct pinctrl_dev *pctldev, unsigned int pin, { struct mtk_pinctrl *hw = pinctrl_dev_get_drvdata(pctldev); const struct mtk_pin_desc *desc; - int err = 0; + int err = -ENOTSUPP; u32 reg; - if (pin >= hw->soc->npins) { - err = -EINVAL; - goto err; - } + if (pin >= hw->soc->npins) + return -EINVAL; + desc = (const struct mtk_pin_desc *)&hw->soc->pins[pin]; switch ((u32)param) { case PIN_CONFIG_BIAS_DISABLE: - if (hw->soc->bias_set_combo) - err = hw->soc->bias_set_combo(hw, desc, 0, MTK_DISABLE); - else - err = -ENOTSUPP; + if (!hw->soc->bias_set_combo) + break; + err = hw->soc->bias_set_combo(hw, desc, 0, MTK_DISABLE); break; case PIN_CONFIG_BIAS_PULL_UP: - if (hw->soc->bias_set_combo) - err = hw->soc->bias_set_combo(hw, desc, 1, arg); - else - err = -ENOTSUPP; + if (!hw->soc->bias_set_combo) + break; + err = hw->soc->bias_set_combo(hw, desc, 1, arg); break; case PIN_CONFIG_BIAS_PULL_DOWN: - if (hw->soc->bias_set_combo) - err = hw->soc->bias_set_combo(hw, desc, 0, arg); - else - err = -ENOTSUPP; + if (!hw->soc->bias_set_combo) + break; + err = hw->soc->bias_set_combo(hw, desc, 0, arg); break; case PIN_CONFIG_OUTPUT_ENABLE: err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_SMT, @@ -223,7 +209,7 @@ static int mtk_pinconf_set(struct pinctrl_dev *pctldev, unsigned int pin, * does not have SMT control */ if (err != -ENOTSUPP) - goto err; + break; err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_DIR, MTK_OUTPUT); @@ -232,7 +218,7 @@ static int mtk_pinconf_set(struct pinctrl_dev *pctldev, unsigned int pin, /* regard all non-zero value as enable */ err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_IES, !!arg); if (err) - goto err; + break; err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_DIR, MTK_INPUT); @@ -245,7 +231,7 @@ static int mtk_pinconf_set(struct pinctrl_dev *pctldev, unsigned int pin, err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_DO, arg); if (err) - goto err; + break; err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_DIR, MTK_OUTPUT); @@ -257,15 +243,14 @@ static int mtk_pinconf_set(struct pinctrl_dev *pctldev, unsigned int pin, */ err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_DIR, !arg); if (err) - goto err; + break; err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_SMT, !!arg); break; case PIN_CONFIG_DRIVE_STRENGTH: - if (hw->soc->drive_set) - err = hw->soc->drive_set(hw, desc, arg); - else - err = -ENOTSUPP; + if (!hw->soc->drive_set) + break; + err = hw->soc->drive_set(hw, desc, arg); break; case MTK_PIN_CONFIG_TDSEL: case MTK_PIN_CONFIG_RDSEL: @@ -275,26 +260,19 @@ static int mtk_pinconf_set(struct pinctrl_dev *pctldev, unsigned int pin, break; case MTK_PIN_CONFIG_PU_ADV: case MTK_PIN_CONFIG_PD_ADV: - if (hw->soc->adv_pull_set) { - bool pullup; - - pullup = param == MTK_PIN_CONFIG_PU_ADV; - err = hw->soc->adv_pull_set(hw, desc, pullup, - arg); - } else - err = -ENOTSUPP; + if (!hw->soc->adv_pull_set) + break; + err = hw->soc->adv_pull_set(hw, desc, + (param == MTK_PIN_CONFIG_PU_ADV), + arg); break; case MTK_PIN_CONFIG_DRV_ADV: - if (hw->soc->adv_drive_set) - err = hw->soc->adv_drive_set(hw, desc, arg); - else - err = -ENOTSUPP; + if (!hw->soc->adv_drive_set) + break; + err = hw->soc->adv_drive_set(hw, desc, arg); break; - default: - err = -ENOTSUPP; } -err: return err; } From patchwork Tue Mar 8 10:09:53 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chen-Yu Tsai X-Patchwork-Id: 549884 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id C9E0BC433F5 for ; Tue, 8 Mar 2022 10:10:29 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1345720AbiCHKLW (ORCPT ); Tue, 8 Mar 2022 05:11:22 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:41262 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1345702AbiCHKLT (ORCPT ); Tue, 8 Mar 2022 05:11:19 -0500 Received: from mail-pl1-x635.google.com (mail-pl1-x635.google.com [IPv6:2607:f8b0:4864:20::635]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id EC86C37A8C for ; Tue, 8 Mar 2022 02:10:21 -0800 (PST) Received: by mail-pl1-x635.google.com with SMTP id p17so16604065plo.9 for ; Tue, 08 Mar 2022 02:10:21 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=1HzDn1y9bF4mL2TwPHFzwmvmpvjVc5+8wRjfSvBXPFs=; b=iX9EgdxUqNlM3gsr2/giz0GMRZ7bA8G6QFObBSKiSEpOkj2vpQRNOSg03hc6ae67fD 2W+QPLh/2foXuuGGfi1XOmJyciVx+XHCljWyFIZihandnYlSuaMNn7faS/Bw9rSZRuyG yo0xpbSt3Y46GeTP+XGHuklHBz1XBxcsX5GE8= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=1HzDn1y9bF4mL2TwPHFzwmvmpvjVc5+8wRjfSvBXPFs=; b=frY43Qw6KrSnY0eX9b4OawkMV7LshJn0e2s3uVMf+YZnmu7zNsx3y7deHB0XT+wTvm /UmZWXztB7GePjzO+hT4V+4nN4uf5iboOTavILYGuIC7qU7KNYmk7ZEXegrHgNLsCJeM xr5SQG7qoIDZ4O9k74fyJ0WG7qPRpNYbqj4xAaiCjPMeKvtJxQpGZaVOBmcBi2wWBR6p CAcuaw70FevDslUqg9S7h7TuCe97E6iM0TJKhYtf9ulXVaFt15YtKgm3qyvFK5wMC9SU FDSRAJtADB25YNoHTsSec3VlIm5IyHQe6u6Mu/hygADn9xDFO5lvpVAGrJBcr8Qg0nac 0K0Q== X-Gm-Message-State: AOAM532DRr5IAzIp3QWib7Lxyx2+IT+yNvWVuvEJNapLDaFG055iXhA4 /Zfmy7+Ukg0AQfpbDYML9+YNjFxxTmrIWg== X-Google-Smtp-Source: ABdhPJyMrd0GH2X+Hm3rLZPvZtvquwQZkf1dabtzsGZyJ4pmxvqJFooM2QYqDOrllOdyMj2FrLUjmQ== X-Received: by 2002:a17:90a:8987:b0:1be:dde1:c672 with SMTP id v7-20020a17090a898700b001bedde1c672mr3830895pjn.208.1646734220894; Tue, 08 Mar 2022 02:10:20 -0800 (PST) Received: from wenstp920.tpe.corp.google.com ([2401:fa00:1:10:73f8:5e3f:6894:8f44]) by smtp.gmail.com with ESMTPSA id k19-20020a056a00135300b004f734327960sm1707553pfu.106.2022.03.08.02.10.19 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 08 Mar 2022 02:10:20 -0800 (PST) From: Chen-Yu Tsai To: Sean Wang , Linus Walleij , Matthias Brugger Cc: Chen-Yu Tsai , linux-mediatek@lists.infradead.org, linux-gpio@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, AngeloGioacchino Del Regno Subject: [PATCH v2 08/11] pinctrl: mediatek: paris: Support generic PIN_CONFIG_DRIVE_STRENGTH_UA Date: Tue, 8 Mar 2022 18:09:53 +0800 Message-Id: <20220308100956.2750295-9-wenst@chromium.org> X-Mailer: git-send-email 2.35.1.616.g0bdcbb4464-goog In-Reply-To: <20220308100956.2750295-1-wenst@chromium.org> References: <20220308100956.2750295-1-wenst@chromium.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org Some of the MediaTek chips that utilize the Paris pinctrl driver library support a lower drive strength (<= 1mA) than the standard drive strength settings (2~16 mA) on certain pins. This was previously supported by the custom MTK_PIN_CONFIG_DRV_ADV parameter along with the "mediatek,drive-strength-adv" device tree property. The drive strength values for this hardware are 125, 250, 500, and 1000 mA, and can be readily described by the existing "drive-strength-microamp" property, which then gets parsed by the generic pinconf library into the parameter PIN_CONFIG_DRIVE_STRENGTH_UA. Add support for PIN_CONFIG_DRIVE_STRENGTH_UA while keeping the old custom parameter around for backward compatibility. Signed-off-by: Chen-Yu Tsai --- drivers/pinctrl/mediatek/pinctrl-paris.c | 99 ++++++++++++++++++++++++ 1 file changed, 99 insertions(+) diff --git a/drivers/pinctrl/mediatek/pinctrl-paris.c b/drivers/pinctrl/mediatek/pinctrl-paris.c index 1ea3f3c54ef3..25d999848c2a 100644 --- a/drivers/pinctrl/mediatek/pinctrl-paris.c +++ b/drivers/pinctrl/mediatek/pinctrl-paris.c @@ -48,6 +48,53 @@ static const char * const mtk_gpio_functions[] = { "func12", "func13", "func14", "func15", }; +/* + * This section supports converting to/from custom MTK_PIN_CONFIG_DRV_ADV + * and standard PIN_CONFIG_DRIVE_STRENGTH_UA pin configs. + * + * The custom value encodes three hardware bits as follows: + * + * | Bits | + * | 2 (E1) | 1 (E0) | 0 (EN) | drive strength (uA) + * ------------------------------------------------ + * | x | x | 0 | disabled, use standard drive strength + * ------------------------------------- + * | 0 | 0 | 1 | 125 uA + * | 0 | 1 | 1 | 250 uA + * | 1 | 0 | 1 | 500 uA + * | 1 | 1 | 1 | 1000 uA + */ +static const int mtk_drv_adv_uA[] = { 125, 250, 500, 1000 }; + +static int mtk_drv_adv_to_uA(int val) +{ + /* This should never happen. */ + if (WARN_ON_ONCE(val < 0 || val > 7)) + return -EINVAL; + + /* Bit 0 simply enables this hardware part */ + if (!(val & BIT(0))) + return -EINVAL; + + return mtk_drv_adv_uA[(val >> 1)]; +} + +static int mtk_drv_uA_to_adv(int val) +{ + switch (val) { + case 125: + return 0x1; + case 250: + return 0x3; + case 500: + return 0x5; + case 1000: + return 0x7; + } + + return -EINVAL; +} + static int mtk_pinmux_gpio_request_enable(struct pinctrl_dev *pctldev, struct pinctrl_gpio_range *range, unsigned int pin) @@ -145,8 +192,35 @@ static int mtk_pinconf_get(struct pinctrl_dev *pctldev, case PIN_CONFIG_DRIVE_STRENGTH: if (!hw->soc->drive_get) break; + + if (hw->soc->adv_drive_get) { + err = hw->soc->adv_drive_get(hw, desc, &ret); + if (!err) { + err = mtk_drv_adv_to_uA(ret); + if (err > 0) { + /* PIN_CONFIG_DRIVE_STRENGTH_UA used */ + err = -EINVAL; + break; + } + } + } + err = hw->soc->drive_get(hw, desc, &ret); break; + case PIN_CONFIG_DRIVE_STRENGTH_UA: + if (!hw->soc->adv_drive_get) + break; + + err = hw->soc->adv_drive_get(hw, desc, &ret); + if (err) + break; + err = mtk_drv_adv_to_uA(ret); + if (err < 0) + break; + + ret = err; + err = 0; + break; case MTK_PIN_CONFIG_TDSEL: case MTK_PIN_CONFIG_RDSEL: reg = (param == MTK_PIN_CONFIG_TDSEL) ? @@ -252,6 +326,15 @@ static int mtk_pinconf_set(struct pinctrl_dev *pctldev, unsigned int pin, break; err = hw->soc->drive_set(hw, desc, arg); break; + case PIN_CONFIG_DRIVE_STRENGTH_UA: + if (!hw->soc->adv_drive_set) + break; + + err = mtk_drv_uA_to_adv(arg); + if (err < 0) + break; + err = hw->soc->adv_drive_set(hw, desc, err); + break; case MTK_PIN_CONFIG_TDSEL: case MTK_PIN_CONFIG_RDSEL: reg = (param == MTK_PIN_CONFIG_TDSEL) ? @@ -720,6 +803,8 @@ static int mtk_pconf_group_set(struct pinctrl_dev *pctldev, unsigned group, { struct mtk_pinctrl *hw = pinctrl_dev_get_drvdata(pctldev); struct mtk_pinctrl_group *grp = &hw->groups[group]; + bool drive_strength_uA_found = false; + bool adv_drve_strength_found = false; int i, ret; for (i = 0; i < num_configs; i++) { @@ -728,8 +813,22 @@ static int mtk_pconf_group_set(struct pinctrl_dev *pctldev, unsigned group, pinconf_to_config_argument(configs[i])); if (ret < 0) return ret; + + if (pinconf_to_config_param(configs[i]) == PIN_CONFIG_DRIVE_STRENGTH_UA) + drive_strength_uA_found = true; + if (pinconf_to_config_param(configs[i]) == MTK_PIN_CONFIG_DRV_ADV) + adv_drve_strength_found = true; } + /* + * Disable advanced drive strength mode if drive-strength-microamp + * is not set. However, mediatek,drive-strength-adv takes precedence + * as its value can explicitly request the mode be enabled or not. + */ + if (hw->soc->adv_drive_set && !drive_strength_uA_found && + !adv_drve_strength_found) + hw->soc->adv_drive_set(hw, &hw->soc->pins[grp->pin], 0); + return 0; } From patchwork Tue Mar 8 10:09:54 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chen-Yu Tsai X-Patchwork-Id: 549523 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7053FC433F5 for ; Tue, 8 Mar 2022 10:10:35 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1345710AbiCHKL2 (ORCPT ); Tue, 8 Mar 2022 05:11:28 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:41414 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1345693AbiCHKLW (ORCPT ); Tue, 8 Mar 2022 05:11:22 -0500 Received: from mail-pj1-x1033.google.com (mail-pj1-x1033.google.com [IPv6:2607:f8b0:4864:20::1033]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 6FC043B3D4 for ; Tue, 8 Mar 2022 02:10:23 -0800 (PST) Received: by mail-pj1-x1033.google.com with SMTP id v4so16704891pjh.2 for ; Tue, 08 Mar 2022 02:10:23 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=2QEmSIEQFxB2Wc84ArL948mjUQ6bp5HIyQKnBGn7bWA=; b=e5hlsZ8M6FrXSm5O1f+PV6XxTqqhgfqU73P/IYJh4E0hSqqWGYVO0tRmckACGlOYw7 /UOEQpi/SLYAuvbg6741+WVuaxEb1MV6seNKX4C0R7k/xBIHIXhx+GyyjIUl/PxX9nq+ Gio7RkFHIVNjGn7Ma5LMRTdCDaTpZuUesPNVY= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=2QEmSIEQFxB2Wc84ArL948mjUQ6bp5HIyQKnBGn7bWA=; b=ZfwWcVjHzK/KkCqJQddV2qkdcy1ZuV9pHg39eH1WQtFy3rEZfhM71d2D9SnWQGseRc OJaJNA2u/5+N4iAO74LuG3elHanwriAzk642F2NZ2wCzsORDPyBpy/mPPULmVxxXxpz8 LStv/umSK0sh42OO+kkquv9WCpqDQOP62SMU/yRl2KuO/HvNOHIzhFd922oNXiyE/2lH nFyH/HjPgskudl2sCVdlutg/nCugE6lozM1NYxsHVjnntdQ8EdRl/ly0NbPSxULKoI18 4TVcxrt1q7s+QSkXhAKJZjVy9PCdTAnvFoA6JJUKYfS9aL/lkGmihpJtRdURa74DYzRD 2Fwg== X-Gm-Message-State: AOAM532ftNt70tPrdASiouro0mt1eVUrOwQ4y9iv7PQqKpU9Ehl02U9x pBnZpPeccNOjkXNLprBjfeU1xA== X-Google-Smtp-Source: ABdhPJzUIGM7/aLnoqVgZbi6x5gKdbjCUJrwbdnqiMSuTVYjMyywx1haZYeF+oYRHLRbmkLV6lNEOg== X-Received: by 2002:a17:902:f785:b0:14d:d2b6:b7c with SMTP id q5-20020a170902f78500b0014dd2b60b7cmr16603240pln.68.1646734222911; Tue, 08 Mar 2022 02:10:22 -0800 (PST) Received: from wenstp920.tpe.corp.google.com ([2401:fa00:1:10:73f8:5e3f:6894:8f44]) by smtp.gmail.com with ESMTPSA id k19-20020a056a00135300b004f734327960sm1707553pfu.106.2022.03.08.02.10.21 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 08 Mar 2022 02:10:22 -0800 (PST) From: Chen-Yu Tsai To: Sean Wang , Linus Walleij , Matthias Brugger Cc: AngeloGioacchino Del Regno , linux-mediatek@lists.infradead.org, linux-gpio@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Chen-Yu Tsai Subject: [PATCH v2 09/11] pinctrl: mediatek: pinctrl-moore: Simplify with dev_err_probe() Date: Tue, 8 Mar 2022 18:09:54 +0800 Message-Id: <20220308100956.2750295-10-wenst@chromium.org> X-Mailer: git-send-email 2.35.1.616.g0bdcbb4464-goog In-Reply-To: <20220308100956.2750295-1-wenst@chromium.org> References: <20220308100956.2750295-1-wenst@chromium.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org From: AngeloGioacchino Del Regno Use the dev_err_probe() helper to simplify error handling during probe. Signed-off-by: AngeloGioacchino Del Regno Reviewed-by: Chen-Yu Tsai Signed-off-by: Chen-Yu Tsai --- drivers/pinctrl/mediatek/pinctrl-moore.c | 25 +++++++++--------------- 1 file changed, 9 insertions(+), 16 deletions(-) diff --git a/drivers/pinctrl/mediatek/pinctrl-moore.c b/drivers/pinctrl/mediatek/pinctrl-moore.c index 5bfaa84839c7..526faaebaf77 100644 --- a/drivers/pinctrl/mediatek/pinctrl-moore.c +++ b/drivers/pinctrl/mediatek/pinctrl-moore.c @@ -605,6 +605,7 @@ static int mtk_build_functions(struct mtk_pinctrl *hw) int mtk_moore_pinctrl_probe(struct platform_device *pdev, const struct mtk_pin_soc *soc) { + struct device *dev = &pdev->dev; struct pinctrl_pin_desc *pins; struct mtk_pinctrl *hw; int err, i; @@ -616,11 +617,9 @@ int mtk_moore_pinctrl_probe(struct platform_device *pdev, hw->soc = soc; hw->dev = &pdev->dev; - if (!hw->soc->nbase_names) { - dev_err(&pdev->dev, + if (!hw->soc->nbase_names) + return dev_err_probe(dev, -EINVAL, "SoC should be assigned at least one register base\n"); - return -EINVAL; - } hw->base = devm_kmalloc_array(&pdev->dev, hw->soc->nbase_names, sizeof(*hw->base), GFP_KERNEL); @@ -665,17 +664,13 @@ int mtk_moore_pinctrl_probe(struct platform_device *pdev, /* Setup groups descriptions per SoC types */ err = mtk_build_groups(hw); - if (err) { - dev_err(&pdev->dev, "Failed to build groups\n"); - return err; - } + if (err) + return dev_err_probe(dev, err, "Failed to build groups\n"); /* Setup functions descriptions per SoC types */ err = mtk_build_functions(hw); - if (err) { - dev_err(&pdev->dev, "Failed to build functions\n"); - return err; - } + if (err) + return dev_err_probe(dev, err, "Failed to build functions\n"); /* For able to make pinctrl_claim_hogs, we must not enable pinctrl * until all groups and functions are being added one. @@ -691,10 +686,8 @@ int mtk_moore_pinctrl_probe(struct platform_device *pdev, /* Build gpiochip should be after pinctrl_enable is done */ err = mtk_build_gpiochip(hw); - if (err) { - dev_err(&pdev->dev, "Failed to add gpio_chip\n"); - return err; - } + if (err) + return dev_err_probe(dev, err, "Failed to add gpio_chip\n"); platform_set_drvdata(pdev, hw); From patchwork Tue Mar 8 10:09:55 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chen-Yu Tsai X-Patchwork-Id: 549524 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id A9332C433EF for ; Tue, 8 Mar 2022 10:10:31 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1345683AbiCHKL0 (ORCPT ); Tue, 8 Mar 2022 05:11:26 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:41442 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1345719AbiCHKLW (ORCPT ); Tue, 8 Mar 2022 05:11:22 -0500 Received: from mail-pl1-x62b.google.com (mail-pl1-x62b.google.com [IPv6:2607:f8b0:4864:20::62b]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 7250042A1D for ; Tue, 8 Mar 2022 02:10:25 -0800 (PST) Received: by mail-pl1-x62b.google.com with SMTP id e13so16622230plh.3 for ; Tue, 08 Mar 2022 02:10:25 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=6XAPYlXfrbQb3eNY+AafE+ihWQbItq1u/P6A4TCShoQ=; b=hFJUBUeTgT0nhSfBieWGKfelni90TSaIJERtQxilM8ZLSJl9NORTRX+eYAHr0Oo/KN rtF3oBwXKEbzQ5WY3SP7hQuS4sRXkse6SHLPPpMV5onMsLuGrNungp8YKWBWIjDI+jhQ KDmzDYVcK9y3FD/VsxCam5wouCWfbI/FbjoPY= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=6XAPYlXfrbQb3eNY+AafE+ihWQbItq1u/P6A4TCShoQ=; b=KVbhKDLPVCFaw9VLHx+MaZP3ni4JrDLXRVwu0shQ8FpocdXVdCWzluQ0jjYUNvJymR ZN3+jrlRkv2lgkNRUPRA3HPx8RUpsAoNcDbaVA+4VI063TS8Xg4rVOW/C5ja8tw8zX9c cm7i/cgpliuBfpO5s1ft9k6kbyUp0GV9ndlgM97ZZejS/7jmH9rTZAuuWQakg+gxRPBG RQtNyqXQOVVcRsrr2MVpQHHQcLc3hQYJ+jEQjvz0WWTuw7ravcUPU6ismrP1qPakgaAB 9fWO6Ufq5c7pG2vvrSqHWEw0DiIMhgznfCNy/G9QZpaqHx+RZNyTBara41G6wtVPvg/d +YSQ== X-Gm-Message-State: AOAM530BMD11ohWj6sNPGiyHjlSiXr6Wq1k8IfhwmbGHshY5rcQJrQbt ZwsVaKhEayu2An4UtohL+s9hNQ== X-Google-Smtp-Source: ABdhPJzGrWZUwCSTl12rRQJ06sxqRAcLOqol6JfTehC0xhhxAaiMBo1vwZYNvhWDGPkLqvhA3N3OEw== X-Received: by 2002:a17:90b:4a92:b0:1bf:2a03:987c with SMTP id lp18-20020a17090b4a9200b001bf2a03987cmr3753511pjb.186.1646734224826; Tue, 08 Mar 2022 02:10:24 -0800 (PST) Received: from wenstp920.tpe.corp.google.com ([2401:fa00:1:10:73f8:5e3f:6894:8f44]) by smtp.gmail.com with ESMTPSA id k19-20020a056a00135300b004f734327960sm1707553pfu.106.2022.03.08.02.10.23 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 08 Mar 2022 02:10:24 -0800 (PST) From: Chen-Yu Tsai To: Sean Wang , Linus Walleij , Matthias Brugger Cc: AngeloGioacchino Del Regno , linux-mediatek@lists.infradead.org, linux-gpio@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Chen-Yu Tsai Subject: [PATCH v2 10/11] pinctrl: mediatek: pinctrl-paris: Simplify with dev_err_probe() Date: Tue, 8 Mar 2022 18:09:55 +0800 Message-Id: <20220308100956.2750295-11-wenst@chromium.org> X-Mailer: git-send-email 2.35.1.616.g0bdcbb4464-goog In-Reply-To: <20220308100956.2750295-1-wenst@chromium.org> References: <20220308100956.2750295-1-wenst@chromium.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org From: AngeloGioacchino Del Regno Use the dev_err_probe() helper to simplify error handling during probe. Signed-off-by: AngeloGioacchino Del Regno Reviewed-by: Chen-Yu Tsai Signed-off-by: Chen-Yu Tsai --- drivers/pinctrl/mediatek/pinctrl-paris.c | 19 +++++++------------ 1 file changed, 7 insertions(+), 12 deletions(-) diff --git a/drivers/pinctrl/mediatek/pinctrl-paris.c b/drivers/pinctrl/mediatek/pinctrl-paris.c index 25d999848c2a..b587379eef4b 100644 --- a/drivers/pinctrl/mediatek/pinctrl-paris.c +++ b/drivers/pinctrl/mediatek/pinctrl-paris.c @@ -1024,6 +1024,7 @@ static int mtk_pctrl_build_state(struct platform_device *pdev) int mtk_paris_pinctrl_probe(struct platform_device *pdev, const struct mtk_pin_soc *soc) { + struct device *dev = &pdev->dev; struct pinctrl_pin_desc *pins; struct mtk_pinctrl *hw; int err, i; @@ -1036,11 +1037,9 @@ int mtk_paris_pinctrl_probe(struct platform_device *pdev, hw->soc = soc; hw->dev = &pdev->dev; - if (!hw->soc->nbase_names) { - dev_err(&pdev->dev, + if (!hw->soc->nbase_names) + return dev_err_probe(dev, -EINVAL, "SoC should be assigned at least one register base\n"); - return -EINVAL; - } hw->base = devm_kmalloc_array(&pdev->dev, hw->soc->nbase_names, sizeof(*hw->base), GFP_KERNEL); @@ -1065,10 +1064,8 @@ int mtk_paris_pinctrl_probe(struct platform_device *pdev, spin_lock_init(&hw->lock); err = mtk_pctrl_build_state(pdev); - if (err) { - dev_err(&pdev->dev, "build state failed: %d\n", err); - return -EINVAL; - } + if (err) + return dev_err_probe(dev, err, "build state failed\n"); /* Copy from internal struct mtk_pin_desc to register to the core */ pins = devm_kmalloc_array(&pdev->dev, hw->soc->npins, sizeof(*pins), @@ -1106,10 +1103,8 @@ int mtk_paris_pinctrl_probe(struct platform_device *pdev, /* Build gpiochip should be after pinctrl_enable is done */ err = mtk_build_gpiochip(hw); - if (err) { - dev_err(&pdev->dev, "Failed to add gpio_chip\n"); - return err; - } + if (err) + return dev_err_probe(dev, err, "Failed to add gpio_chip\n"); platform_set_drvdata(pdev, hw); From patchwork Tue Mar 8 10:09:56 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chen-Yu Tsai X-Patchwork-Id: 549883 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id BF8B4C4332F for ; Tue, 8 Mar 2022 10:10:32 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1345700AbiCHKL1 (ORCPT ); Tue, 8 Mar 2022 05:11:27 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:41374 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1345717AbiCHKLZ (ORCPT ); Tue, 8 Mar 2022 05:11:25 -0500 Received: from mail-pj1-x102b.google.com (mail-pj1-x102b.google.com [IPv6:2607:f8b0:4864:20::102b]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 58826427E6 for ; Tue, 8 Mar 2022 02:10:27 -0800 (PST) Received: by mail-pj1-x102b.google.com with SMTP id m11-20020a17090a7f8b00b001beef6143a8so1937358pjl.4 for ; Tue, 08 Mar 2022 02:10:27 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=zXk7G6JY4X+JwjWY48i+9FfgXzOs0xnKY40nTgz7InE=; b=Iih/7wB0+IpP36es4iTqigsioyu2iHjzDuVZnq/qs9MyOXwxGmVBx7sOTDb5AhnyO+ 2sZwP/aYAtauLIJACxh4+PVzOkF3OJzIatEGocvS1oRGisfVTo3n/ESZu+QrMRY72nDH We3fU8biGRDQ2jLWN1UagC6QXVPE59SclSHNs= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=zXk7G6JY4X+JwjWY48i+9FfgXzOs0xnKY40nTgz7InE=; b=uFHI1n3FZnnkHmQQYaDkOBWp/29iENbd9tjP6kIGewP6z0pAN4qfgfSOtLXxG4m65F uHnfVS16EN1azzkh3yRoQq1n9IhFp4u4fB+uGMYWfroExSl+BmKrbX4wQG/oyOLFeaU4 vGrrDzWlH/y3WDpDt50BV85bsF6kg5AvRcCapANioDzmVxctxnEdsVHqYi39BCiw7D2h j0SkWWBQuQzDSzN8Q7L/Sa8WPkznQA51vn1ZNHgv+Ukfqq8uRqs6qaze2hrOUZR98IWr i6jTYr5qt2GkV378wz6/at12PybXKcHGbqGXHJsXmuqz9pox2WxRF/iRi8Gxr1bnF66Q 8+Mg== X-Gm-Message-State: AOAM531kSDeD7hk1spv6SwS6/yV5KuT6bPeLDNBh8VcsgelbUoF5l5Y2 csXzngx176MrR47PfqrJ980szw== X-Google-Smtp-Source: ABdhPJw/CHBw7tkeZMpzpsFv+JZ9TCc08ybAM2WlWG6+8xZ5vVVTWpE3LRP4Tr6krv+ObbHBQi9ZPA== X-Received: by 2002:a17:903:291:b0:14d:522c:fe3d with SMTP id j17-20020a170903029100b0014d522cfe3dmr16734037plr.100.1646734226709; Tue, 08 Mar 2022 02:10:26 -0800 (PST) Received: from wenstp920.tpe.corp.google.com ([2401:fa00:1:10:73f8:5e3f:6894:8f44]) by smtp.gmail.com with ESMTPSA id k19-20020a056a00135300b004f734327960sm1707553pfu.106.2022.03.08.02.10.25 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 08 Mar 2022 02:10:26 -0800 (PST) From: Chen-Yu Tsai To: Sean Wang , Linus Walleij , Matthias Brugger Cc: AngeloGioacchino Del Regno , linux-mediatek@lists.infradead.org, linux-gpio@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Chen-Yu Tsai Subject: [PATCH v2 11/11] pinctrl: mediatek: pinctrl-mtk-common: Simplify with dev_err_probe() Date: Tue, 8 Mar 2022 18:09:56 +0800 Message-Id: <20220308100956.2750295-12-wenst@chromium.org> X-Mailer: git-send-email 2.35.1.616.g0bdcbb4464-goog In-Reply-To: <20220308100956.2750295-1-wenst@chromium.org> References: <20220308100956.2750295-1-wenst@chromium.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org From: AngeloGioacchino Del Regno Use the dev_err_probe() helper to simplify error handling during probe. Signed-off-by: AngeloGioacchino Del Regno Reviewed-by: Chen-Yu Tsai Signed-off-by: Chen-Yu Tsai --- drivers/pinctrl/mediatek/pinctrl-mtk-common.c | 25 ++++++++----------- 1 file changed, 11 insertions(+), 14 deletions(-) diff --git a/drivers/pinctrl/mediatek/pinctrl-mtk-common.c b/drivers/pinctrl/mediatek/pinctrl-mtk-common.c index 5f7c421ab6e7..6f8dfa6ae5a0 100644 --- a/drivers/pinctrl/mediatek/pinctrl-mtk-common.c +++ b/drivers/pinctrl/mediatek/pinctrl-mtk-common.c @@ -1013,10 +1013,12 @@ static int mtk_eint_init(struct mtk_pinctrl *pctl, struct platform_device *pdev) return mtk_eint_do_init(pctl->eint); } +/* This is used as a common probe function */ int mtk_pctrl_init(struct platform_device *pdev, const struct mtk_pinctrl_devdata *data, struct regmap *regmap) { + struct device *dev = &pdev->dev; struct pinctrl_pin_desc *pins; struct mtk_pinctrl *pctl; struct device_node *np = pdev->dev.of_node, *node; @@ -1030,10 +1032,9 @@ int mtk_pctrl_init(struct platform_device *pdev, platform_set_drvdata(pdev, pctl); prop = of_find_property(np, "pins-are-numbered", NULL); - if (!prop) { - dev_err(&pdev->dev, "only support pins-are-numbered format\n"); - return -EINVAL; - } + if (!prop) + return dev_err_probe(dev, -EINVAL, + "only support pins-are-numbered format\n"); node = of_parse_phandle(np, "mediatek,pctl-regmap", 0); if (node) { @@ -1043,8 +1044,7 @@ int mtk_pctrl_init(struct platform_device *pdev, } else if (regmap) { pctl->regmap1 = regmap; } else { - dev_err(&pdev->dev, "Pinctrl node has not register regmap.\n"); - return -EINVAL; + return dev_err_probe(dev, -EINVAL, "Cannot find pinctrl regmap.\n"); } /* Only 8135 has two base addr, other SoCs have only one. */ @@ -1057,10 +1057,8 @@ int mtk_pctrl_init(struct platform_device *pdev, pctl->devdata = data; ret = mtk_pctrl_build_state(pdev); - if (ret) { - dev_err(&pdev->dev, "build state failed: %d\n", ret); - return -EINVAL; - } + if (ret) + return dev_err_probe(dev, ret, "build state failed\n"); pins = devm_kcalloc(&pdev->dev, pctl->devdata->npins, sizeof(*pins), GFP_KERNEL); @@ -1081,10 +1079,9 @@ int mtk_pctrl_init(struct platform_device *pdev, pctl->pctl_dev = devm_pinctrl_register(&pdev->dev, &pctl->pctl_desc, pctl); - if (IS_ERR(pctl->pctl_dev)) { - dev_err(&pdev->dev, "couldn't register pinctrl driver\n"); - return PTR_ERR(pctl->pctl_dev); - } + if (IS_ERR(pctl->pctl_dev)) + return dev_err_probe(dev, PTR_ERR(pctl->pctl_dev), + "Couldn't register pinctrl driver\n"); pctl->chip = devm_kzalloc(&pdev->dev, sizeof(*pctl->chip), GFP_KERNEL); if (!pctl->chip)