From patchwork Sat Mar 5 21:58:34 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Geis X-Patchwork-Id: 548687 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5A2E3C433F5 for ; Sat, 5 Mar 2022 21:58:45 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232689AbiCEV7e (ORCPT ); Sat, 5 Mar 2022 16:59:34 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:49746 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229832AbiCEV7d (ORCPT ); Sat, 5 Mar 2022 16:59:33 -0500 Received: from mail-qt1-x82a.google.com (mail-qt1-x82a.google.com [IPv6:2607:f8b0:4864:20::82a]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id CA8103DA7E; Sat, 5 Mar 2022 13:58:42 -0800 (PST) Received: by mail-qt1-x82a.google.com with SMTP id t28so10331191qtc.7; Sat, 05 Mar 2022 13:58:42 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=ct38wuS+j+KdARYVXEvHL+p/0EBV034tSVqTgQxYy/U=; b=lfUc/RQ3J+tTlsfPuOC/ab+OMU3mVuCcB4s7Px11WkslxfatjJrSn+avZ0CETKOM4R vNcCBnebj/girjqxQHd2H7h/tRv4gi/WDxgWoOE2cRfANKVz4wMIedKVBahV9olXt6el +U35guGBBVNvrmS31BjkHkM9yz/sK1Nm1S12Ofj/GvMRGj0Jl/IpIvKA538nMQT1Pck0 hnxIPQcnwSQJJVu4FpAILCgmcV5XAwq7Sa1BTyJeFbA6K6MlzJiq6oZYhXJwuk+10Qc+ RnefUeOYfO0P/mWNTAIDXnj5GmFZY5LWYUYNJPe2ZKVwoS0tSwza07qTjo4WX4hiooIV v33g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=ct38wuS+j+KdARYVXEvHL+p/0EBV034tSVqTgQxYy/U=; b=sc3p3aiK7TJhgePjiP/vBj7mQ9hexUVTiXjqk91kLNR6XoehV38W3c7BoHZIVqX1xk 2kEv5MuHjkbBN5qu31URGkwR5p3CNi5jg8y8hM4H+3uJxB1uB9VqTRDZOqrivHD8Cu1l vEneAKAVxsQZaIo0IFj+cYbt0jAjdvu/XXYGjTZQOwL0+iP0AUVCW6HMfMXCUczprWjg eru9dndtMVxliKG3lYLDjvaQyOdt+CgNhP7ry4end7zKCdbWvCCE1NRtKfgfuHwFN9SR XnY8nF2OhtJRhJfdIsNDYxnPhK8KJcqibpsaByG4oauwHGL1MQ/e8K1ksSeM5QmiNcIo hNrA== X-Gm-Message-State: AOAM533FbrymLKHl99F86SQITrkkDEUJxiyazvUXuN9nKN0xUTNpcnDI xmwsSWABOdSIXh2idzIRMbI= X-Google-Smtp-Source: ABdhPJwkcUtvAR6twCDRCalsZKvOr+O+o9namgpdwUWCoHGmZOsKiCUtUVyLUEgi2B5e9H2Y49ftCA== X-Received: by 2002:a05:622a:1809:b0:2de:6f5c:23ed with SMTP id t9-20020a05622a180900b002de6f5c23edmr4224001qtc.406.1646517521810; Sat, 05 Mar 2022 13:58:41 -0800 (PST) Received: from master-x64.sparksnet ([2601:153:980:85b1::10]) by smtp.gmail.com with ESMTPSA id h188-20020a376cc5000000b00648d7e2a36bsm4230067qkc.117.2022.03.05.13.58.41 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 05 Mar 2022 13:58:41 -0800 (PST) From: Peter Geis To: Jaehoon Chung , Ulf Hansson Cc: robin.murphy@arm.com, linux-rockchip@lists.infradead.org, Peter Geis , linux-mmc@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v3 1/2] mmc: host: dw_mmc: support setting f_min from host drivers Date: Sat, 5 Mar 2022 16:58:34 -0500 Message-Id: <20220305215835.2210388-2-pgwipeout@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220305215835.2210388-1-pgwipeout@gmail.com> References: <20220305215835.2210388-1-pgwipeout@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-mmc@vger.kernel.org Host drivers may not be able to support frequencies as low as dw-mmc supports. Unfortunately f_min isn't available when the drv_data->init function is called, as the mmc_host struct hasn't been set up yet. Support the host drivers saving the requested minimum frequency, so we can later set f_min when it is available. Signed-off-by: Peter Geis --- drivers/mmc/host/dw_mmc.c | 7 ++++++- drivers/mmc/host/dw_mmc.h | 2 ++ 2 files changed, 8 insertions(+), 1 deletion(-) diff --git a/drivers/mmc/host/dw_mmc.c b/drivers/mmc/host/dw_mmc.c index 42bf8a2287ba..0d90d0201759 100644 --- a/drivers/mmc/host/dw_mmc.c +++ b/drivers/mmc/host/dw_mmc.c @@ -2898,7 +2898,12 @@ static int dw_mci_init_slot_caps(struct dw_mci_slot *slot) if (host->pdata->caps2) mmc->caps2 = host->pdata->caps2; - mmc->f_min = DW_MCI_FREQ_MIN; + /* if host has set a minimum_freq, we should respect it */ + if (host->minimum_speed) + mmc->f_min = host->minimum_speed; + else + mmc->f_min = DW_MCI_FREQ_MIN; + if (!mmc->f_max) mmc->f_max = DW_MCI_FREQ_MAX; diff --git a/drivers/mmc/host/dw_mmc.h b/drivers/mmc/host/dw_mmc.h index 7f1e38621d13..4ed81f94f7ca 100644 --- a/drivers/mmc/host/dw_mmc.h +++ b/drivers/mmc/host/dw_mmc.h @@ -99,6 +99,7 @@ struct dw_mci_dma_slave { * @bus_hz: The rate of @mck in Hz. This forms the basis for MMC bus * rate and timeout calculations. * @current_speed: Configured rate of the controller. + * @minimum_speed: Stored minimum rate of the controller. * @fifoth_val: The value of FIFOTH register. * @verid: Denote Version ID. * @dev: Device associated with the MMC controller. @@ -201,6 +202,7 @@ struct dw_mci { u32 bus_hz; u32 current_speed; + u32 minimum_speed; u32 fifoth_val; u16 verid; struct device *dev; From patchwork Sat Mar 5 21:58:35 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Geis X-Patchwork-Id: 548686 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 98301C433F5 for ; Sat, 5 Mar 2022 21:58:48 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229716AbiCEV7f (ORCPT ); Sat, 5 Mar 2022 16:59:35 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:49798 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232691AbiCEV7e (ORCPT ); Sat, 5 Mar 2022 16:59:34 -0500 Received: from mail-qk1-x736.google.com (mail-qk1-x736.google.com [IPv6:2607:f8b0:4864:20::736]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id ACCAD3D4A4; Sat, 5 Mar 2022 13:58:43 -0800 (PST) Received: by mail-qk1-x736.google.com with SMTP id s16so904596qks.4; Sat, 05 Mar 2022 13:58:43 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=bA6COhkxqJULw1J6YY+ycVS3dSCISRuj2zyilCuPjTI=; b=BXZW4KqpbIUC7e+zCk9eKL18jIJ0xZDUM3QtLst9hKoIqWVpoDyleq8wSY2l5TncMf JQk2xtn64KZmU1Ia3GSEU6RIMKWAGnrVYFoHUoI2RhJSOit01nr0AibQupeN8cW08iHC RDYBX6rgSbkNCwhalIT+DRyn1Gbr/XWUyswf8JXXuhL9gyPJ6zlQexrG+xA6/BSn0g0B skCYIBmAmproF0AygsVLr6LeZBsjJkbCkYF7zkkea53wpfy42+0yUB6rY9VY4apC7SzL xwf5LMUJyZKnmUL0YucmXeOny0+opvohkONeP7QKsY/f8na36oD8KkMEjI5GAXEhuUh5 1H4g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=bA6COhkxqJULw1J6YY+ycVS3dSCISRuj2zyilCuPjTI=; b=rbJ4wQIJ+WGD6OY4epI3i1iOCYwNmR5oqor6PwDbrNo0kG/3Kv1pGYvz0xEcNJ5jtC w5e0Ux/VJYdQ6JbNM68RNOZe4WpHG2b+EHlmrsv5s+K68c59CGzNDaqwj/dC4Ci/ww2S tB54dQI63O1+J9rHwSp/Rmi7HON/AchJQnoGxCwpVoukNapWpGnyR7zV2HEpR9MpazBp sWMlx9yjTei7T60UQuIM8LrzTGsThskCpmFlCfiajWr+rA2i20dGqj5KgXgYXgGKbkyG L8B6+0fbcRnoPI3+uNjJtuwA1C4/JfbJeJMRitWQD89J3U2lIdESyMNF6pNGc/bSGXxd aqdQ== X-Gm-Message-State: AOAM533kqOA3pj1XU5wHZQjd9QIwRRMe/Y/AlcTgFIR6rM1C8dx7ZU1e /ai+pk6sBiVw1TSxPj+Q+EA= X-Google-Smtp-Source: ABdhPJw4vJOzmKSTMCO2ApCNqa91/MVS9ULXJohkxDqioQVkTER3QFf0T9/hF/IJnPH+tAoyzM+xew== X-Received: by 2002:a05:620a:4307:b0:507:d5b1:f65e with SMTP id u7-20020a05620a430700b00507d5b1f65emr2924851qko.363.1646517522746; Sat, 05 Mar 2022 13:58:42 -0800 (PST) Received: from master-x64.sparksnet ([2601:153:980:85b1::10]) by smtp.gmail.com with ESMTPSA id h188-20020a376cc5000000b00648d7e2a36bsm4230067qkc.117.2022.03.05.13.58.42 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 05 Mar 2022 13:58:42 -0800 (PST) From: Peter Geis To: Jaehoon Chung , Ulf Hansson , Heiko Stuebner Cc: robin.murphy@arm.com, linux-rockchip@lists.infradead.org, Peter Geis , linux-mmc@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v3 2/2] mmc: host: dw-mmc-rockchip: fix handling invalid clock rates Date: Sat, 5 Mar 2022 16:58:35 -0500 Message-Id: <20220305215835.2210388-3-pgwipeout@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220305215835.2210388-1-pgwipeout@gmail.com> References: <20220305215835.2210388-1-pgwipeout@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-mmc@vger.kernel.org The Rockchip rk356x ciu clock cannot be set as low as the dw-mmc hardware supports. This leads to a situation during card initialization where the clock is set lower than the clock driver can support. The dw-mmc-rockchip driver spews errors when this happens. For normal operation this only happens a few times during boot, but when cd-broken is enabled (in cases such as the SoQuartz module) this fires multiple times each poll cycle. Fix this by testing the lowest possible frequency that the clock driver can support which is within the mmc specification. Divide that rate by the internal divider and set f_min to this. Signed-off-by: Peter Geis --- drivers/mmc/host/dw_mmc-rockchip.c | 27 +++++++++++++++++++++++---- 1 file changed, 23 insertions(+), 4 deletions(-) diff --git a/drivers/mmc/host/dw_mmc-rockchip.c b/drivers/mmc/host/dw_mmc-rockchip.c index 95d0ec0f5f3a..f825487aa739 100644 --- a/drivers/mmc/host/dw_mmc-rockchip.c +++ b/drivers/mmc/host/dw_mmc-rockchip.c @@ -15,7 +15,9 @@ #include "dw_mmc.h" #include "dw_mmc-pltfm.h" -#define RK3288_CLKGEN_DIV 2 +#define RK3288_CLKGEN_DIV 2 + +static const unsigned int freqs[] = { 100000, 200000, 300000, 400000 }; struct dw_mci_rockchip_priv_data { struct clk *drv_clk; @@ -51,7 +53,7 @@ static void dw_mci_rk3288_set_ios(struct dw_mci *host, struct mmc_ios *ios) ret = clk_set_rate(host->ciu_clk, cclkin); if (ret) - dev_warn(host->dev, "failed to set rate %uHz\n", ios->clock); + dev_warn(host->dev, "failed to set rate %uHz err: %d\n", cclkin, ret); bus_hz = clk_get_rate(host->ciu_clk) / RK3288_CLKGEN_DIV; if (bus_hz != host->bus_hz) { @@ -290,13 +292,30 @@ static int dw_mci_rk3288_parse_dt(struct dw_mci *host) static int dw_mci_rockchip_init(struct dw_mci *host) { + int ret, i; + /* It is slot 8 on Rockchip SoCs */ host->sdio_id0 = 8; - if (of_device_is_compatible(host->dev->of_node, - "rockchip,rk3288-dw-mshc")) + if (of_device_is_compatible(host->dev->of_node, "rockchip,rk3288-dw-mshc")) { host->bus_hz /= RK3288_CLKGEN_DIV; + /* clock driver will fail if the clock is less than the lowest source clock + * divided by the internal clock divider. Test for the lowest available + * clock and set the minimum freq to clock / clock divider. + */ + + for (i = 0; i < ARRAY_SIZE(freqs); i++) { + ret = clk_round_rate(host->ciu_clk, freqs[i] * RK3288_CLKGEN_DIV); + if (ret > 0) { + host->minimum_speed = ret / RK3288_CLKGEN_DIV; + break; + } + } + if (ret < 0) + dev_warn(host->dev, "no valid minimum freq: %d\n", ret); + } + return 0; }