From patchwork Sat Mar 5 11:26:03 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Frank Wunderlich X-Patchwork-Id: 548616 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2957BC433F5 for ; Sat, 5 Mar 2022 11:26:26 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231588AbiCEL1O (ORCPT ); Sat, 5 Mar 2022 06:27:14 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:56500 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231582AbiCEL1N (ORCPT ); Sat, 5 Mar 2022 06:27:13 -0500 Received: from mxout2.routing.net (mxout2.routing.net [IPv6:2a03:2900:1:a::b]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id C06B940A25; Sat, 5 Mar 2022 03:26:22 -0800 (PST) Received: from mxbox2.masterlogin.de (unknown [192.168.10.89]) by mxout2.routing.net (Postfix) with ESMTP id F35BD5FBFE; Sat, 5 Mar 2022 11:26:20 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=mailerdienst.de; s=20200217; t=1646479581; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=TTV1xdOBqDO16+gerFGDl04Vvm4klTkftcSfewYgx6I=; b=CtGvlIRLG7LITJ//B1/j/XOMBJPGpi8rCTzbev1PxxkIEyv6oNo8bXgSPimc9vr1SDn3+X /3XI1H3WTCruxJe4+kS/weCu0OIiITglaW7zdlaGFpq2r6pIHeg5jkccXOHnLG/p/zwefm qsD6dHP3MtwMZeQzyyLcQ5G7FCTHPi0= Received: from localhost.localdomain (fttx-pool-217.61.157.101.bambit.de [217.61.157.101]) by mxbox2.masterlogin.de (Postfix) with ESMTPSA id 031311007BC; Sat, 5 Mar 2022 11:26:19 +0000 (UTC) From: Frank Wunderlich To: devicetree@vger.kernel.org Cc: Frank Wunderlich , Damien Le Moal , Rob Herring , Krzysztof Kozlowski , Andrew Lunn , Gregory Clement , Sebastian Hesselbarth , Russell King , Heiko Stuebner , Peter Geis , Michael Riesch , Hans de Goede , Jens Axboe , linux-ide@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org Subject: [PATCH v5 1/5] dt-bindings: ata: ahci-platform: Convert DT bindings to yaml Date: Sat, 5 Mar 2022 12:26:03 +0100 Message-Id: <20220305112607.257734-2-linux@fw-web.de> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220305112607.257734-1-linux@fw-web.de> References: <20220305112607.257734-1-linux@fw-web.de> MIME-Version: 1.0 X-Mail-ID: e7dc101d-d7d6-43d3-8dfc-70946311db46 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Frank Wunderlich Create a yaml file for dtbs_check from the old txt binding. Signed-off-by: Frank Wunderlich --- v5: - change subject - drop brcm,iproc-ahci from standalone enum - fix reg address in example 2 - move clocknames next to clocks, regnames to reg - drop interrupts description - drop newline from dma-coherent - drop max-items from ports-implemented - min2max in child phys - fix identation for compatible and sata-common - add additionalProperties=false for subnodes - pipe for paragraphs and newline after title - add maximum for ports-implemented (found only 0x1 as its value) - add phy-names to sata-ports v4: - fix min vs. max - fix indention of examples - move up sata-common.yaml - reorder compatible - add descriptions/maxitems - fix compatible-structure - fix typo in example achi vs. ahci - add clock-names and reg-names - fix ns2 errors in separate patch v3: - add conversion to sata-series - fix some errors in dt_binding_check and dtbs_check - move to unevaluated properties = false --- .../devicetree/bindings/ata/ahci-platform.txt | 79 --------- .../bindings/ata/ahci-platform.yaml | 163 ++++++++++++++++++ 2 files changed, 163 insertions(+), 79 deletions(-) delete mode 100644 Documentation/devicetree/bindings/ata/ahci-platform.txt create mode 100644 Documentation/devicetree/bindings/ata/ahci-platform.yaml diff --git a/Documentation/devicetree/bindings/ata/ahci-platform.txt b/Documentation/devicetree/bindings/ata/ahci-platform.txt deleted file mode 100644 index 77091a277642..000000000000 --- a/Documentation/devicetree/bindings/ata/ahci-platform.txt +++ /dev/null @@ -1,79 +0,0 @@ -* AHCI SATA Controller - -SATA nodes are defined to describe on-chip Serial ATA controllers. -Each SATA controller should have its own node. - -It is possible, but not required, to represent each port as a sub-node. -It allows to enable each port independently when dealing with multiple -PHYs. - -Required properties: -- compatible : compatible string, one of: - - "brcm,iproc-ahci" - - "hisilicon,hisi-ahci" - - "cavium,octeon-7130-ahci" - - "ibm,476gtr-ahci" - - "marvell,armada-380-ahci" - - "marvell,armada-3700-ahci" - - "snps,dwc-ahci" - - "snps,spear-ahci" - - "generic-ahci" -- interrupts : -- reg : - -Please note that when using "generic-ahci" you must also specify a SoC specific -compatible: - compatible = "manufacturer,soc-model-ahci", "generic-ahci"; - -Optional properties: -- dma-coherent : Present if dma operations are coherent -- clocks : a list of phandle + clock specifier pairs -- resets : a list of phandle + reset specifier pairs -- target-supply : regulator for SATA target power -- phy-supply : regulator for PHY power -- phys : reference to the SATA PHY node -- phy-names : must be "sata-phy" -- ahci-supply : regulator for AHCI controller -- ports-implemented : Mask that indicates which ports that the HBA supports - are available for software to use. Useful if PORTS_IMPL - is not programmed by the BIOS, which is true with - some embedded SOC's. - -Required properties when using sub-nodes: -- #address-cells : number of cells to encode an address -- #size-cells : number of cells representing the size of an address - -Sub-nodes required properties: -- reg : the port number -And at least one of the following properties: -- phys : reference to the SATA PHY node -- target-supply : regulator for SATA target power - -Examples: - sata@ffe08000 { - compatible = "snps,spear-ahci"; - reg = <0xffe08000 0x1000>; - interrupts = <115>; - }; - -With sub-nodes: - sata@f7e90000 { - compatible = "marvell,berlin2q-achi", "generic-ahci"; - reg = <0xe90000 0x1000>; - interrupts = ; - clocks = <&chip CLKID_SATA>; - #address-cells = <1>; - #size-cells = <0>; - - sata0: sata-port@0 { - reg = <0>; - phys = <&sata_phy 0>; - target-supply = <®_sata0>; - }; - - sata1: sata-port@1 { - reg = <1>; - phys = <&sata_phy 1>; - target-supply = <®_sata1>;; - }; - }; diff --git a/Documentation/devicetree/bindings/ata/ahci-platform.yaml b/Documentation/devicetree/bindings/ata/ahci-platform.yaml new file mode 100644 index 000000000000..fae042539824 --- /dev/null +++ b/Documentation/devicetree/bindings/ata/ahci-platform.yaml @@ -0,0 +1,163 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/ata/ahci-platform.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: AHCI SATA Controller + +description: | + SATA nodes are defined to describe on-chip Serial ATA controllers. + Each SATA controller should have its own node. + + It is possible, but not required, to represent each port as a sub-node. + It allows to enable each port independently when dealing with multiple + PHYs. + +maintainers: + - Hans de Goede + - Jens Axboe + +allOf: + - $ref: "sata-common.yaml#" + +properties: + compatible: + oneOf: + - items: + - enum: + - brcm,iproc-ahci + - marvell,armada-8k-ahci + - marvell,berlin2q-ahci + - const: generic-ahci + - enum: + - cavium,octeon-7130-ahci + - hisilicon,hisi-ahci + - ibm,476gtr-ahci + - marvell,armada-3700-ahci + - marvell,armada-380-ahci + - snps,dwc-ahci + - snps,spear-ahci + + reg: + maxItems: 1 + + reg-names: + maxItems: 1 + + clocks: + description: + Clock IDs array as required by the controller. + minItems: 1 + maxItems: 3 + + clock-names: + description: + Names of clocks corresponding to IDs in the clock property. + minItems: 1 + maxItems: 3 + + interrupts: + maxItems: 1 + + ahci-supply: + description: + regulator for AHCI controller + + dma-coherent: true + + phy-supply: + description: + regulator for PHY power + + phys: + description: + List of all PHYs on this controller + maxItems: 1 + + phy-names: + description: + Name specifier for the PHYs + maxItems: 1 + + ports-implemented: + $ref: '/schemas/types.yaml#/definitions/uint32' + description: | + Mask that indicates which ports that the HBA supports + are available for software to use. Useful if PORTS_IMPL + is not programmed by the BIOS, which is true with + some embedded SoCs. + maximum: 0x1 + + resets: + maxItems: 1 + + target-supply: + description: + regulator for SATA target power + +required: + - compatible + - reg + - interrupts + +patternProperties: + "^sata-port@[0-9a-f]+$": + type: object + additionalProperties: false + description: + Subnode with configuration of the Ports. + + properties: + reg: + maxItems: 1 + + phys: + maxItems: 1 + + phy-names: + maxItems: 1 + + target-supply: + description: + regulator for SATA target power + + required: + - reg + + anyOf: + - required: [ phys ] + - required: [ target-supply ] + +unevaluatedProperties: false + +examples: + - | + sata@ffe08000 { + compatible = "snps,spear-ahci"; + reg = <0xffe08000 0x1000>; + interrupts = <115>; + }; + - | + #include + #include + sata@f7e90000 { + compatible = "marvell,berlin2q-ahci", "generic-ahci"; + reg = <0xf7e90000 0x1000>; + interrupts = ; + clocks = <&chip CLKID_SATA>; + #address-cells = <1>; + #size-cells = <0>; + + sata0: sata-port@0 { + reg = <0>; + phys = <&sata_phy 0>; + target-supply = <®_sata0>; + }; + + sata1: sata-port@1 { + reg = <1>; + phys = <&sata_phy 1>; + target-supply = <®_sata1>; + }; + }; From patchwork Sat Mar 5 11:26:05 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Frank Wunderlich X-Patchwork-Id: 548778 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6F966C433FE for ; Sat, 5 Mar 2022 11:26:28 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231597AbiCEL1O (ORCPT ); Sat, 5 Mar 2022 06:27:14 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:56520 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231591AbiCEL1O (ORCPT ); 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Sat, 5 Mar 2022 11:26:21 +0000 (UTC) From: Frank Wunderlich To: devicetree@vger.kernel.org Cc: Frank Wunderlich , Damien Le Moal , Rob Herring , Krzysztof Kozlowski , Andrew Lunn , Gregory Clement , Sebastian Hesselbarth , Russell King , Heiko Stuebner , Peter Geis , Michael Riesch , Hans de Goede , Jens Axboe , linux-ide@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org Subject: [PATCH v5 3/5] dt-bindings: ata: ahci-platform: Add power-domains property Date: Sat, 5 Mar 2022 12:26:05 +0100 Message-Id: <20220305112607.257734-4-linux@fw-web.de> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220305112607.257734-1-linux@fw-web.de> References: <20220305112607.257734-1-linux@fw-web.de> MIME-Version: 1.0 X-Mail-ID: 088accf3-e553-47cb-a6f8-8e9ee91f3e9a Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Frank Wunderlich Some SoC using power-domains property so add it here Signed-off-by: Frank Wunderlich Reviewed-by: Krzysztof Kozlowski --- changes in v5: added reviewed by changes in v4: none changes in v3: - new patch --- Documentation/devicetree/bindings/ata/ahci-platform.yaml | 3 +++ 1 file changed, 3 insertions(+) diff --git a/Documentation/devicetree/bindings/ata/ahci-platform.yaml b/Documentation/devicetree/bindings/ata/ahci-platform.yaml index fae042539824..82be26ce4384 100644 --- a/Documentation/devicetree/bindings/ata/ahci-platform.yaml +++ b/Documentation/devicetree/bindings/ata/ahci-platform.yaml @@ -89,6 +89,9 @@ properties: some embedded SoCs. maximum: 0x1 + power-domains: + maxItems: 1 + resets: maxItems: 1 From patchwork Sat Mar 5 11:26:06 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Frank Wunderlich X-Patchwork-Id: 548777 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6052FC43217 for ; Sat, 5 Mar 2022 11:26:34 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231614AbiCEL1U (ORCPT ); Sat, 5 Mar 2022 06:27:20 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:56526 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231594AbiCEL1O (ORCPT ); Sat, 5 Mar 2022 06:27:14 -0500 Received: from mxout3.routing.net (mxout3.routing.net [IPv6:2a03:2900:1:a::8]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 0DC543F8BE; Sat, 5 Mar 2022 03:26:25 -0800 (PST) Received: from mxbox2.masterlogin.de (unknown [192.168.10.89]) by mxout3.routing.net (Postfix) with ESMTP id AE1CB60564; Sat, 5 Mar 2022 11:26:23 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=mailerdienst.de; s=20200217; t=1646479583; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=fAy+g86pSYjjn5it3aXzVtAlRS9cIWELtqRIuuhnMoM=; b=oaTL491z195TsUb55ZNq26DHCbxbtqD5d/1COKvJ+sVMdta7VNYKI/vAsDLgfBd5YDcBs/ tr06evrij1izBklB2hixVD+b86JLcXh6TqR4duVnpXdo7ONadnVIVa4xC610mfz0mkxwrk qwCb+q4ZTsSAHve9h/YZp/27FcQCtCg= Received: from localhost.localdomain (fttx-pool-217.61.157.101.bambit.de [217.61.157.101]) by mxbox2.masterlogin.de (Postfix) with ESMTPSA id BBE891007BC; Sat, 5 Mar 2022 11:26:22 +0000 (UTC) From: Frank Wunderlich To: devicetree@vger.kernel.org Cc: Frank Wunderlich , Damien Le Moal , Rob Herring , Krzysztof Kozlowski , Andrew Lunn , Gregory Clement , Sebastian Hesselbarth , Russell King , Heiko Stuebner , Peter Geis , Michael Riesch , Hans de Goede , Jens Axboe , linux-ide@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org Subject: [PATCH v5 4/5] dt-bindings: ata: ahci-platform: Add rk3568-dwc3-ahci compatible Date: Sat, 5 Mar 2022 12:26:06 +0100 Message-Id: <20220305112607.257734-5-linux@fw-web.de> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220305112607.257734-1-linux@fw-web.de> References: <20220305112607.257734-1-linux@fw-web.de> MIME-Version: 1.0 X-Mail-ID: bfb49fcd-9f41-417a-a608-f94191395798 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Frank Wunderlich Add SoC specific compatible for rk3568 ahci controller Signed-off-by: Frank Wunderlich --- Documentation/devicetree/bindings/ata/ahci-platform.yaml | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/Documentation/devicetree/bindings/ata/ahci-platform.yaml b/Documentation/devicetree/bindings/ata/ahci-platform.yaml index 82be26ce4384..5766941305ef 100644 --- a/Documentation/devicetree/bindings/ata/ahci-platform.yaml +++ b/Documentation/devicetree/bindings/ata/ahci-platform.yaml @@ -30,6 +30,10 @@ properties: - marvell,armada-8k-ahci - marvell,berlin2q-ahci - const: generic-ahci + - items: + - enum: + - rockchip,rk3568-dwc-ahci + - const: snps,dwc-ahci - enum: - cavium,octeon-7130-ahci - hisilicon,hisi-ahci From patchwork Sat Mar 5 11:26:07 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Frank Wunderlich X-Patchwork-Id: 548615 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 29ADCC433FE for ; Sat, 5 Mar 2022 11:26:35 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231622AbiCEL1V (ORCPT ); Sat, 5 Mar 2022 06:27:21 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:56548 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231600AbiCEL1P (ORCPT ); Sat, 5 Mar 2022 06:27:15 -0500 Received: from mxout2.routing.net (mxout2.routing.net [IPv6:2a03:2900:1:a::b]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id EBBD940E7D; Sat, 5 Mar 2022 03:26:25 -0800 (PST) Received: from mxbox2.masterlogin.de (unknown [192.168.10.89]) by mxout2.routing.net (Postfix) with ESMTP id 8AA445FD5D; Sat, 5 Mar 2022 11:26:24 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=mailerdienst.de; s=20200217; t=1646479584; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=oeojDkbixb+3+AqcShTPnuHWz+1GrcPznWJUJt5Sy3k=; b=v+/pylN7fIi8+EJUtnWzr056KkXzMdaedd8sSSturEfyQOeI/a9pkpI49bIs4yF/Ja939r PGjd/jAyuF/eyz+2yuGft/UJbOOMwn/NJkYAHL3di/Z10AG0fLpyvwGR17sXfiZhtiOV2b w34lFlqgJmc4Nma/5qE68J+88L8z9Mw= Received: from localhost.localdomain (fttx-pool-217.61.157.101.bambit.de [217.61.157.101]) by mxbox2.masterlogin.de (Postfix) with ESMTPSA id 9D40F1007DD; Sat, 5 Mar 2022 11:26:23 +0000 (UTC) From: Frank Wunderlich To: devicetree@vger.kernel.org Cc: Frank Wunderlich , Damien Le Moal , Rob Herring , Krzysztof Kozlowski , Andrew Lunn , Gregory Clement , Sebastian Hesselbarth , Russell King , Heiko Stuebner , Peter Geis , Michael Riesch , Hans de Goede , Jens Axboe , linux-ide@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org Subject: [PATCH v5 5/5] arm64: dts: rockchip: Add sata nodes to rk356x Date: Sat, 5 Mar 2022 12:26:07 +0100 Message-Id: <20220305112607.257734-6-linux@fw-web.de> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220305112607.257734-1-linux@fw-web.de> References: <20220305112607.257734-1-linux@fw-web.de> MIME-Version: 1.0 X-Mail-ID: 6c0e6171-3ca7-422f-bfb9-56d26079865c Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Frank Wunderlich RK356x supports up to 3 sata controllers which were compatible with the existing snps,dwc-ahci binding. Signed-off-by: Frank Wunderlich --- changes in v4: - drop newline in dts - re-add clock-names - add soc specific compatible changes in v3: - fix combphy error by moving sata0 to rk3568.dtsi - remove clock-names and interrupt-names changes in v2: - added sata0 + 1, but have only tested sata2 --- arch/arm64/boot/dts/rockchip/rk3568.dtsi | 14 ++++++++++++ arch/arm64/boot/dts/rockchip/rk356x.dtsi | 28 ++++++++++++++++++++++++ 2 files changed, 42 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3568.dtsi b/arch/arm64/boot/dts/rockchip/rk3568.dtsi index 5b0f528d6818..3e07d9f6a2d1 100644 --- a/arch/arm64/boot/dts/rockchip/rk3568.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3568.dtsi @@ -8,6 +8,20 @@ / { compatible = "rockchip,rk3568"; + sata0: sata@fc000000 { + compatible = "rockchip,rk3568-dwc-ahci", "snps,dwc-ahci"; + reg = <0 0xfc000000 0 0x1000>; + clocks = <&cru ACLK_SATA0>, <&cru CLK_SATA0_PMALIVE>, + <&cru CLK_SATA0_RXOOB>; + clock-names = "sata", "pmalive", "rxoob"; + interrupts = ; + phys = <&combphy0 PHY_TYPE_SATA>; + phy-names = "sata-phy"; + ports-implemented = <0x1>; + power-domains = <&power RK3568_PD_PIPE>; + status = "disabled"; + }; + pipe_phy_grf0: syscon@fdc70000 { compatible = "rockchip,rk3568-pipe-phy-grf", "syscon"; reg = <0x0 0xfdc70000 0x0 0x1000>; diff --git a/arch/arm64/boot/dts/rockchip/rk356x.dtsi b/arch/arm64/boot/dts/rockchip/rk356x.dtsi index 7cdef800cb3c..264dd030e703 100644 --- a/arch/arm64/boot/dts/rockchip/rk356x.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk356x.dtsi @@ -230,6 +230,34 @@ scmi_shmem: sram@0 { }; }; + sata1: sata@fc400000 { + compatible = "rockchip,rk3568-dwc-ahci", "snps,dwc-ahci"; + reg = <0 0xfc400000 0 0x1000>; + clocks = <&cru ACLK_SATA1>, <&cru CLK_SATA1_PMALIVE>, + <&cru CLK_SATA1_RXOOB>; + clock-names = "sata", "pmalive", "rxoob"; + interrupts = ; + phys = <&combphy1 PHY_TYPE_SATA>; + phy-names = "sata-phy"; + ports-implemented = <0x1>; + power-domains = <&power RK3568_PD_PIPE>; + status = "disabled"; + }; + + sata2: sata@fc800000 { + compatible = "rockchip,rk3568-dwc-ahci", "snps,dwc-ahci"; + reg = <0 0xfc800000 0 0x1000>; + clocks = <&cru ACLK_SATA2>, <&cru CLK_SATA2_PMALIVE>, + <&cru CLK_SATA2_RXOOB>; + clock-names = "sata", "pmalive", "rxoob"; + interrupts = ; + phys = <&combphy2 PHY_TYPE_SATA>; + phy-names = "sata-phy"; + ports-implemented = <0x1>; + power-domains = <&power RK3568_PD_PIPE>; + status = "disabled"; + }; + gic: interrupt-controller@fd400000 { compatible = "arm,gic-v3"; reg = <0x0 0xfd400000 0 0x10000>, /* GICD */