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Fri, 25 Feb 2022 10:09:58 +0000 From: Michael Riesch To: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org Cc: Rob Herring , Heiko Stuebner , Michael Riesch , Sascha Hauer , Liang Chen , Peter Geis , Johan Jonker , Simon Xue , Yifeng Zhao , Nicolas Frattaroli Subject: [PATCH 1/2] arm64: dts: rockchip: add the usb3 nodes to rk356x Date: Fri, 25 Feb 2022 11:09:42 +0100 Message-Id: <20220225100943.2115933-2-michael.riesch@wolfvision.net> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20220225100943.2115933-1-michael.riesch@wolfvision.net> References: <20220225100943.2115933-1-michael.riesch@wolfvision.net> X-ClientProxiedBy: ZR0P278CA0146.CHEP278.PROD.OUTLOOK.COM (2603:10a6:910:41::7) To HE1PR0802MB2426.eurprd08.prod.outlook.com (2603:10a6:3:e1::23) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 0556446a-d23b-49f7-2104-08d9f846fa21 X-MS-TrafficTypeDiagnostic: DB8PR08MB4169:EE_ X-Microsoft-Antispam-PRVS: X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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Signed-off-by: Sascha Hauer Signed-off-by: Michael Riesch --- arch/arm64/boot/dts/rockchip/rk3568.dtsi | 5 ++ arch/arm64/boot/dts/rockchip/rk356x.dtsi | 58 ++++++++++++++++++++++++ 2 files changed, 63 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3568.dtsi b/arch/arm64/boot/dts/rockchip/rk3568.dtsi index 91a0b798b857..0cd4ef36066a 100644 --- a/arch/arm64/boot/dts/rockchip/rk3568.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3568.dtsi @@ -116,3 +116,8 @@ power-domain@RK3568_PD_PIPE { #power-domain-cells = <0>; }; }; + +&usb_host0_dwc3 { + phys = <&usb2phy0_otg>, <&combphy0 PHY_TYPE_USB3>; + phy-names = "usb2-phy", "usb3-phy"; +}; diff --git a/arch/arm64/boot/dts/rockchip/rk356x.dtsi b/arch/arm64/boot/dts/rockchip/rk356x.dtsi index 8b9fae3d348a..b46794486037 100644 --- a/arch/arm64/boot/dts/rockchip/rk356x.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk356x.dtsi @@ -230,6 +230,64 @@ scmi_shmem: sram@0 { }; }; + usb_host0_xhci: usb@fcc00000 { + compatible = "rockchip,rk3399-dwc3"; + #address-cells = <2>; + clocks = <&cru CLK_USB3OTG0_REF>, <&cru CLK_USB3OTG0_SUSPEND>, + <&cru ACLK_USB3OTG0>, <&cru PCLK_PIPE>; + clock-names = "ref_clk", "suspend_clk", "bus_clk", "grf_clk"; + ranges; + #size-cells = <2>; + status = "disabled"; + + usb_host0_dwc3: usb@fcc00000 { + compatible = "snps,dwc3"; + reg = <0x0 0xfcc00000 0x0 0x400000>; + interrupts = ; + dr_mode = "otg"; + phy_type = "utmi_wide"; + power-domains = <&power RK3568_PD_PIPE>; + resets = <&cru SRST_USB3OTG0>; + reset-names = "usb3-otg"; + snps,dis-del-phy-power-chg-quirk; + snps,dis_enblslpm_quirk; + snps,dis_rxdet_inp3_quirk; + snps,dis-tx-ipgap-linecheck-quirk; + snps,dis-u2-freeclk-exists-quirk; + snps,xhci-trb-ent-quirk; + }; + }; + + usb_host1_xhci: usb@fd000000 { + compatible = "rockchip,rk3399-dwc3"; + #address-cells = <2>; + clocks = <&cru CLK_USB3OTG1_REF>, <&cru CLK_USB3OTG1_SUSPEND>, + <&cru ACLK_USB3OTG1>, <&cru PCLK_PIPE>; + clock-names = "ref_clk", "suspend_clk", "bus_clk", "grf_clk"; + ranges; + #size-cells = <2>; + status = "disabled"; + + usb_host1_dwc3: usb@fd000000 { + compatible = "snps,dwc3"; + reg = <0x0 0xfd000000 0x0 0x400000>; + interrupts = ; + dr_mode = "host"; + phy_type = "utmi_wide"; + phys = <&usb2phy0_host>, <&combphy1 PHY_TYPE_USB3>; + phy-names = "usb2-phy", "usb3-phy"; + power-domains = <&power RK3568_PD_PIPE>; + resets = <&cru SRST_USB3OTG1>; + reset-names = "usb3-host"; + snps,dis-del-phy-power-chg-quirk; + snps,dis_enblslpm_quirk; + snps,dis_rxdet_inp3_quirk; + snps,dis-tx-ipgap-linecheck-quirk; + snps,dis-u2-freeclk-exists-quirk; + snps,xhci-trb-ent-quirk; + }; + }; + gic: interrupt-controller@fd400000 { compatible = "arm,gic-v3"; reg = <0x0 0xfd400000 0 0x10000>, /* GICD */