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[209.132.180.67]) by mx.google.com with ESMTP id l3si29267696pld.155.2018.11.25.16.16.01; Sun, 25 Nov 2018 16:16:01 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=HCjQnNnn; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726101AbeKZLIV (ORCPT + 6 others); Mon, 26 Nov 2018 06:08:21 -0500 Received: from lelv0142.ext.ti.com ([198.47.23.249]:52648 "EHLO lelv0142.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726085AbeKZLIV (ORCPT ); Mon, 26 Nov 2018 06:08:21 -0500 Received: from lelv0265.itg.ti.com ([10.180.67.224]) by lelv0142.ext.ti.com (8.15.2/8.15.2) with ESMTP id wAQ0FXb5098850; Sun, 25 Nov 2018 18:15:33 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1543191333; bh=ulvx31p1DRQxy6U1DhK/TBV9tfMB95PHkVQjJb2fCaQ=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=HCjQnNnnfRv7mSrB3S7XzAf0fsP6W9xVQL0HvoVCZDL1aersUMy+Hcv2CbDL7AMnG jxpO86zJHIY0+QOIJ2HF9TAGM0VuJ4hCW4kJLMh96wz94I2s8RLmcsudRaguZmDKcG 3SHBjXX2Yy+2igVOyw4BxVH8C/AXpwKNdClhS2IU= Received: from DLEE114.ent.ti.com (dlee114.ent.ti.com [157.170.170.25]) by lelv0265.itg.ti.com (8.15.2/8.15.2) with ESMTPS id wAQ0FXMC101826 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Sun, 25 Nov 2018 18:15:33 -0600 Received: from DLEE110.ent.ti.com (157.170.170.21) by DLEE114.ent.ti.com (157.170.170.25) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1591.10; Sun, 25 Nov 2018 18:15:33 -0600 Received: from dflp33.itg.ti.com (10.64.6.16) by DLEE110.ent.ti.com (157.170.170.21) with Microsoft SMTP Server (version=TLS1_0, cipher=TLS_RSA_WITH_AES_256_CBC_SHA) id 15.1.1591.10 via Frontend Transport; Sun, 25 Nov 2018 18:15:33 -0600 Received: from legion.dal.desgin.ti.com (legion.dal.design.ti.com [128.247.22.53]) by dflp33.itg.ti.com (8.14.3/8.13.8) with ESMTP id wAQ0FWgV005235; Sun, 25 Nov 2018 18:15:33 -0600 Received: from localhost (uda0226610.dhcp.ti.com [128.247.59.147]) by legion.dal.desgin.ti.com (8.11.7p1+Sun/8.11.7) with ESMTP id wAQ0FWU04338; Sun, 25 Nov 2018 18:15:32 -0600 (CST) From: Grygorii Strashko To: "David S. Miller" , Tony Lindgren , Kishon Vijay Abraham I , Rob Herring CC: , Sekhar Nori , , , Andrew Lunn , , , Grygorii Strashko Subject: [PATCH linux-next 01/10] dt-bindings: phy: add cpsw port interface mode selection phy bindings Date: Sun, 25 Nov 2018 18:15:22 -0600 Message-ID: <20181126001531.12974-2-grygorii.strashko@ti.com> X-Mailer: git-send-email 2.10.5 In-Reply-To: <20181126001531.12974-1-grygorii.strashko@ti.com> References: <20181126001531.12974-1-grygorii.strashko@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add CPSW Port's Interface Mode Selection PHY (phy-gmii-sel) DT Bindings Cc: Kishon Vijay Abraham I Cc: Tony Lindgren Signed-off-by: Grygorii Strashko --- .../devicetree/bindings/phy/ti-phy-gmii-sel.txt | 68 ++++++++++++++++++++++ 1 file changed, 68 insertions(+) create mode 100644 Documentation/devicetree/bindings/phy/ti-phy-gmii-sel.txt -- 2.10.5 Acked-by: Tony Lindgren diff --git a/Documentation/devicetree/bindings/phy/ti-phy-gmii-sel.txt b/Documentation/devicetree/bindings/phy/ti-phy-gmii-sel.txt new file mode 100644 index 0000000..50ce9ae --- /dev/null +++ b/Documentation/devicetree/bindings/phy/ti-phy-gmii-sel.txt @@ -0,0 +1,68 @@ +CPSW Port's Interface Mode Selection PHY Tree Bindings +----------------------------------------------- + +TI am335x/am437x/dra7(am5)/dm814x CPSW3G Ethernet Subsystem supports +two 10/100/1000 Ethernet ports with selectable G/MII, RMII, and RGMII interfaces. +The interface mode is selected by configuring the MII mode selection register(s) +(GMII_SEL) in the System Control Module chapter (SCM). GMII_SEL register(s) and +bit fields placement in SCM are different between SoCs while fields meaning +is the same. + +--------------+ + +-------------------------------+ |SCM | + | CPSW | | +---------+ | + | +--------------------------------+gmii_sel | | + | | | | +---------+ | + | +----v---+ +--------+ | +--------------+ + | |Port 1..<--+-->GMII/MII<-------> + | | | | | | | + | +--------+ | +--------+ | + | | | + | | +--------+ | + | | | RMII <-------> + | +--> | | + | | +--------+ | + | | | + | | +--------+ | + | | | RGMII <-------> + | +--> | | + | +--------+ | + +-------------------------------+ + +CPSW Port's Interface Mode Selection PHY describes MII interface mode between +CPSW Port and Ethernet PHY which depends on Eth PHY and board configuration. + +CPSW Port's Interface Mode Selection PHY device should defined as child device +of SCM node (scm_conf) and can be attached to each CPSW port node using standard +PHY bindings (See phy/phy-bindings.txt). + +Required properties: +- compatible : Should be "ti,am3352-phy-gmii-sel" for am335x platform + "ti,dra7xx-phy-gmii-sel" for dra7xx/am57xx platform + "ti,am43xx-phy-gmii-sel" for am43xx platform + "ti,dm814-phy-gmii-sel" for dm814x platform +- reg : Address and length of the register set for the device +- #phy-cells : must be 2. + cell 1 - CPSW port number (starting from 1) + cell 2 - RMII refclk mode + +Examples: + phy_gmii_sel: phy-gmii-sel { + compatible = "ti,am3352-phy-gmii-sel"; + reg = <0x650 0x4>; + #phy-cells = <2>; + }; + + mac: ethernet@4a100000 { + compatible = "ti,am335x-cpsw","ti,cpsw"; + ... + + cpsw_emac0: slave@4a100200 { + ... + phys = <&phy_gmii_sel 1 1>; + }; + + cpsw_emac1: slave@4a100300 { + ... + phys = <&phy_gmii_sel 2 1>; + }; + }; From patchwork Mon Nov 26 00:15:26 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Grygorii Strashko X-Patchwork-Id: 151964 Delivered-To: patch@linaro.org Received: by 2002:a2e:299d:0:0:0:0:0 with SMTP id p29-v6csp4971287ljp; Sun, 25 Nov 2018 16:16:53 -0800 (PST) X-Google-Smtp-Source: AFSGD/UOQmgjz9y1c5rqGghtEM7o+OsOSZWxWOQXSZIxICMs25idx8n1cORT265AEEopAfNozF64 X-Received: by 2002:a63:4c4e:: with SMTP id m14mr22708137pgl.173.1543191413028; Sun, 25 Nov 2018 16:16:53 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1543191413; cv=none; d=google.com; s=arc-20160816; b=nRICFsrE3JUrDm9Y5riI7TyovI25SPWrHrqTy1ucfVV1Z23l6q5T2eSQHnTBjw2i2W yuk1f5ceuXa9PzIrwrQMoRQB9IPRW/bHsoxW6pJpGGDtyrATxYjaDTDbptOsH+XuOjji k85VZIx/Y9M7aFLC6yEj/zPWV+sxOymfWh+IK1uRQnyAYbm5oGJfw2rHSMv21trdRMDU SHBBdKNmLc5YI2j1PtXF4DTuDQqPB1O7qyhDi6yDBP54X5rEyMdD1uv5LzWUODy3YdzZ T2M/35cw7BMwQf5enRDKCis+89bm4sf4CFF/thS2mlYoQCDKCM8TfkCvIrWujuwYbcL9 qujA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:dkim-signature; bh=YrU66IcFED47YmXor6mWZI1X4/9endTYobs3p5s0qeY=; b=hin/cROib29jC6wf3FWQh7oC1QDYYdLWPRjlYdQF4wxIZZKa+hJWE6gIC7qDwqvoak bc0tgAOQQzQqKHbC+zy9rvOlgk4qQKVJwL1UdsPU5Ky4gGJpBBTRm6ovIOPXEWv++PUr c59re7WTsi1JjDTcRM4IZ8DqqIGhd33g/RQNxslw6mxUNGL2xV1Q3uCWPaBk706EeLvo RAgAsP54rxE5thWnoa/I76WPAA5mf0ifFw8hic8Q7Njo/AVi5zUlGuz4/vLjjfkbfwan gqsQvRRghpknvjqRZhT0bgULknDimlCKQB3/Kmn4mFvtAjJIPe/aNaLWVJVNeMy5IVJX eoEA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=xrJTxo9H; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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Miller" , Tony Lindgren , Kishon Vijay Abraham I , Rob Herring CC: , Sekhar Nori , , , Andrew Lunn , , , Grygorii Strashko Subject: [PATCH linux-next 05/10] ARM: dts: dra7: switch to use phy-gmii-sel Date: Sun, 25 Nov 2018 18:15:26 -0600 Message-ID: <20181126001531.12974-6-grygorii.strashko@ti.com> X-Mailer: git-send-email 2.10.5 In-Reply-To: <20181126001531.12974-1-grygorii.strashko@ti.com> References: <20181126001531.12974-1-grygorii.strashko@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Switch to use phy-gmii-sel PHY instead of cpsw-phy-sel. Cc: Kishon Vijay Abraham I Cc: Tony Lindgren Signed-off-by: Grygorii Strashko --- arch/arm/boot/dts/dra7-l4.dtsi | 15 ++++++++------- 1 file changed, 8 insertions(+), 7 deletions(-) -- 2.10.5 diff --git a/arch/arm/boot/dts/dra7-l4.dtsi b/arch/arm/boot/dts/dra7-l4.dtsi index 7e5c0d4f..7070095 100644 --- a/arch/arm/boot/dts/dra7-l4.dtsi +++ b/arch/arm/boot/dts/dra7-l4.dtsi @@ -77,18 +77,18 @@ }; }; + phy_gmii_sel: phy-gmii-sel { + compatible = "ti,dra7xx-phy-gmii-sel"; + reg = <0x554 0x4>; + #phy-cells = <1>; + }; + scm_conf_clocks: clocks { #address-cells = <1>; #size-cells = <0>; }; }; - phy_sel: cpsw-phy-sel@554 { - compatible = "ti,dra7xx-cpsw-phy-sel"; - reg= <0x554 0x4>; - reg-names = "gmii-sel"; - }; - dra7_pmx_core: pinmux@1400 { compatible = "ti,dra7-padconf", "pinctrl-single"; @@ -3060,7 +3060,6 @@ ; ranges = <0 0 0x4000>; syscon = <&scm_conf>; - cpsw-phy-sel = <&phy_sel>; status = "disabled"; davinci_mdio: mdio@1000 { @@ -3075,11 +3074,13 @@ cpsw_emac0: slave@200 { /* Filled in by U-Boot */ mac-address = [ 00 00 00 00 00 00 ]; + phys = <&phy_gmii_sel 1>; }; cpsw_emac1: slave@300 { /* Filled in by U-Boot */ mac-address = [ 00 00 00 00 00 00 ]; + phys = <&phy_gmii_sel 2>; }; }; };