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[90.63.244.31]) by smtp.gmail.com with ESMTPSA id y9sm13856434wrq.55.2018.11.22.01.07.44 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 22 Nov 2018 01:07:44 -0800 (PST) From: Neil Armstrong To: u-boot@lists.denx.de Date: Thu, 22 Nov 2018 10:07:22 +0100 Message-Id: <20181122090740.29739-2-narmstrong@baylibre.com> X-Mailer: git-send-email 2.19.1 In-Reply-To: <20181122090740.29739-1-narmstrong@baylibre.com> References: <20181122090740.29739-1-narmstrong@baylibre.com> MIME-Version: 1.0 Cc: linux-amlogic@lists.infradead.org, trini@konsulko.com Subject: [U-Boot] [PATCH u-boot v2 01/19] ARM: meson: clean-up platform selection X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" From: Jerome Brunet Even if multiple board are selected through Kconfig, u-boot will only compile one. This makes sense since compiling these targets will export global symbols, such as board_init() The change rework amlogic Kconfig so only one board may be selected at a time Signed-off-by: Jerome Brunet Signed-off-by: Neil Armstrong --- arch/arm/mach-meson/Kconfig | 51 +++++++++++++++---------------------- 1 file changed, 20 insertions(+), 31 deletions(-) diff --git a/arch/arm/mach-meson/Kconfig b/arch/arm/mach-meson/Kconfig index cc943443b3..bc0f6a169b 100644 --- a/arch/arm/mach-meson/Kconfig +++ b/arch/arm/mach-meson/Kconfig @@ -1,41 +1,32 @@ if ARCH_MESON -config MESON_GXBB - bool "Support Meson GXBaby" +config MESON64_COMMON + bool select ARM64 select CLK select DM select DM_SERIAL imply CMD_DM - help - The Amlogic Meson GXBaby (S905) is an ARM SoC with a - quad-core Cortex-A53 CPU and a Mali-450 GPU. + +config MESON_GXBB + bool + select MESON64_COMMON config MESON_GXL - bool "Support Meson GXL" - select ARM64 - select CLK - select DM - select DM_SERIAL - imply CMD_DM - help - The Amlogic Meson GXL (S905X and S905D) is an ARM SoC with a - quad-core Cortex-A53 CPU and a Mali-450 GPU. + bool + select MESON64_COMMON config MESON_GXM - bool "Support Meson GXM" - select ARM64 - select CLK - select DM - select DM_SERIAL - help - The Amlogic Meson GXM (S912) is an ARM SoC with an - octo-core Cortex-A53 CPU and a Mali-T860 GPU. + bool + select MESON64_COMMON -if MESON_GXBB +choice + prompt "Platform select" + default TARGET_ODROID_C2 config TARGET_ODROID_C2 bool "ODROID-C2" + select MESON_GXBB help ODROID-C2 is a single board computer based on Meson GXBaby with 2 GiB of RAM, Gigabit Ethernet, HDMI, 4 USB, micro-SD @@ -43,16 +34,15 @@ config TARGET_ODROID_C2 config TARGET_NANOPI_K2 bool "NANOPI_K2" + select MESON_GXBB help NANOPI_K2 is a single board computer based on Meson GXBaby with 2 GiB of RAM, Gigabit Ethernet,AP6212 Wifi, HDMI, 4 USB, micro-SD slot, eMMC, IR receiver and a 40-pin GPIO header. -endif - -if MESON_GXL config TARGET_P212 bool "P212" + select MESON_GXL help P212 is a reference dessign board based on Meson GXL S905X SoC with 2 GiB of RAM, Ethernet, HDMI, 2 USB, micro-SD slot, @@ -60,6 +50,7 @@ config TARGET_P212 config TARGET_LIBRETECH_CC bool "LIBRETECH-CC" + select MESON_GXL help LibreTech CC is a single board computer based on Meson GXL with 2 GiB of RAM, Ethernet, HDMI, 4 USB, micro-SD slot, @@ -67,23 +58,21 @@ config TARGET_LIBRETECH_CC config TARGET_KHADAS_VIM bool "KHADAS-VIM" + select MESON_GXL help Khadas VIM is a single board computer based on Meson GXL with 2 GiB of RAM, Ethernet, HDMI, 4 USB, micro-SD slot, eMMC, IR receiver and a 40-pin GPIO header. -endif - -if MESON_GXM - config TARGET_KHADAS_VIM2 bool "KHADAS-VIM2" + select MESON_GXM help Khadas VIM2 is a single board computer based on Meson GXM with 2/3 GiB of RAM, Ethernet, HDMI, 4 USB, micro-SD slot, eMMC, IR receiver and a 40-pin GPIO header. -endif +endchoice config SYS_SOC default "meson" From patchwork Thu Nov 22 09:07:23 2018 Content-Type: text/plain; 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[90.63.244.31]) by smtp.gmail.com with ESMTPSA id y9sm13856434wrq.55.2018.11.22.01.07.45 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 22 Nov 2018 01:07:45 -0800 (PST) From: Neil Armstrong To: u-boot@lists.denx.de Date: Thu, 22 Nov 2018 10:07:23 +0100 Message-Id: <20181122090740.29739-3-narmstrong@baylibre.com> X-Mailer: git-send-email 2.19.1 In-Reply-To: <20181122090740.29739-1-narmstrong@baylibre.com> References: <20181122090740.29739-1-narmstrong@baylibre.com> MIME-Version: 1.0 Cc: linux-amlogic@lists.infradead.org, trini@konsulko.com Subject: [U-Boot] [PATCH u-boot v2 02/19] configs: meson: remove unnecessary MESON_FDTFILE_SETTING X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" From: Jerome Brunet MESON_FDTFILE_SETTING is used to define the default name of the fdt file in u-boot environment. We can easily derive it from CONFIG_DEFAULT_DEVICE_TREE instead. This will help factorize the code a bit Signed-off-by: Jerome Brunet Signed-off-by: Neil Armstrong --- include/configs/khadas-vim.h | 2 -- include/configs/libretech-cc.h | 2 -- include/configs/meson-gx-common.h | 2 +- include/configs/nanopi-k2.h | 4 ---- include/configs/odroid-c2.h | 4 ---- include/configs/p212.h | 4 ---- 6 files changed, 1 insertion(+), 17 deletions(-) diff --git a/include/configs/khadas-vim.h b/include/configs/khadas-vim.h index 6615f7711d..ff87c02820 100644 --- a/include/configs/khadas-vim.h +++ b/include/configs/khadas-vim.h @@ -9,8 +9,6 @@ #ifndef __CONFIG_H #define __CONFIG_H -#define MESON_FDTFILE_SETTING "fdtfile=amlogic/meson-gxl-s905x-khadas-vim.dtb\0" - #include #endif /* __CONFIG_H */ diff --git a/include/configs/libretech-cc.h b/include/configs/libretech-cc.h index a0856f98da..95e0f346fd 100644 --- a/include/configs/libretech-cc.h +++ b/include/configs/libretech-cc.h @@ -9,8 +9,6 @@ #ifndef __CONFIG_H #define __CONFIG_H -#define MESON_FDTFILE_SETTING "fdtfile=amlogic/meson-gxl-s905x-libretech-cc.dtb\0" - #include #endif /* __CONFIG_H */ diff --git a/include/configs/meson-gx-common.h b/include/configs/meson-gx-common.h index c46522ef7e..c43697665d 100644 --- a/include/configs/meson-gx-common.h +++ b/include/configs/meson-gx-common.h @@ -44,7 +44,7 @@ "kernel_addr_r=0x01080000\0" \ "pxefile_addr_r=0x01080000\0" \ "ramdisk_addr_r=0x13000000\0" \ - MESON_FDTFILE_SETTING \ + "fdtfile=amlogic/" CONFIG_DEFAULT_DEVICE_TREE ".dtb\0" \ BOOTENV #define CONFIG_SYS_BOOTM_LEN (64 << 20) /* 64 MiB */ diff --git a/include/configs/nanopi-k2.h b/include/configs/nanopi-k2.h index ef53f20c0f..3fd6e8fba4 100644 --- a/include/configs/nanopi-k2.h +++ b/include/configs/nanopi-k2.h @@ -7,10 +7,6 @@ #ifndef __CONFIG_H #define __CONFIG_H -/* Serial setup */ - -#define MESON_FDTFILE_SETTING "fdtfile=amlogic/meson-gxbb-nanopi-k2.dtb\0" - #include #endif /* __CONFIG_H */ diff --git a/include/configs/odroid-c2.h b/include/configs/odroid-c2.h index d117b183aa..87e3ddb342 100644 --- a/include/configs/odroid-c2.h +++ b/include/configs/odroid-c2.h @@ -7,10 +7,6 @@ #ifndef __CONFIG_H #define __CONFIG_H -/* Serial setup */ - -#define MESON_FDTFILE_SETTING "fdtfile=amlogic/meson-gxbb-odroidc2.dtb\0" - #include #endif /* __CONFIG_H */ diff --git a/include/configs/p212.h b/include/configs/p212.h index 2aa9f5d143..4414293479 100644 --- a/include/configs/p212.h +++ b/include/configs/p212.h @@ -9,10 +9,6 @@ #ifndef __CONFIG_H #define __CONFIG_H -/* Serial setup */ - -#define MESON_FDTFILE_SETTING "fdtfile=amlogic/meson-gxl-s905x-p212.dtb\0" - #include #endif /* __CONFIG_H */ From patchwork Thu Nov 22 09:07:24 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Neil Armstrong X-Patchwork-Id: 151735 Delivered-To: patch@linaro.org Received: by 2002:a2e:299d:0:0:0:0:0 with SMTP id p29-v6csp484774ljp; Thu, 22 Nov 2018 01:10:20 -0800 (PST) X-Google-Smtp-Source: AFSGD/V+7gzw9wVSm1xrvUWmcjU8/5XpQ0mr71ALgWnqWqZ4Q8u8LIER3pkQZOt1V+n/TzY/k5Pj X-Received: by 2002:aa7:db0e:: with SMTP id t14mr5581116eds.292.1542877819955; Thu, 22 Nov 2018 01:10:19 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1542877819; cv=none; d=google.com; s=arc-20160816; b=0plEDxQ97qsaZSRIMq2kN/a0l68DqF0Vh6Qb01fUtwRPQoRwaX4h6Nhs0Z3ZboDFNQ BIMhG7zKr0e4ZAjvB38EllHFnB9BHdV7zBy/6MPwAVt4kNVROkeS99Z9f2R/w7sM2D3J qGGfb3gTB1QujmoeGnen8pSOvxuFohBTVbTjr1jskccg0MnZExIDoeqiluBthadnH+9U YsgrnUD5nMrTmwc9X9bC3mOYtHLOdid6RVxk4eM3pqgnag4wOewTtsefZI2+WCPz0g2i g8WkIskSvqmOXCsyRVPXyDyKkcffufHAMURd3eVDKc5rTYJee7E+AOCMuivcVLQWN00P l7bQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:content-transfer-encoding:list-subscribe:list-help :list-post:list-archive:list-unsubscribe:list-id:precedence:subject :cc:mime-version:references:in-reply-to:message-id:date:to:from :dkim-signature; bh=9Bxes7zZ6LlSbp90/5rgrOgiMbk7kfhxel2y1Ph6gvs=; b=gKMeBMbiXOMeI8JRxx42RSYbeKXLSIn9qMazIMPmXXqg65E0+dmGyLucrCdA/1R1zg 4uAJv3YDYz0btYfPvxTF5vy7udwlzGGpkjovVXD1hyrzWAkhDpbmD7c8l+D11uelpxHe RYLaPmI9vVtOmAeeUvWzcVC0KZKr6B5vnyxeuI5bbhQX8xv55CPH6mZ/Q4JPBUAUVF+P sPEektoSOUXcvipwLp+xJPOEkI/6viIw5LwURNFveMXm9ee0RE5INeVoQiynLLN4TygF /McOyFAGSGA34OmoQs+isJcBj9Vsv7Gxj1HhhT+WkbiR+JYLwJD9XKlGoSYrsRFj8TA9 3ydw== ARC-Authentication-Results: i=1; mx.google.com; dkim=neutral (body hash did not verify) header.i=@baylibre-com.20150623.gappssmtp.com header.s=20150623 header.b=f+6Kumof; spf=pass (google.com: best guess record for domain of u-boot-bounces@lists.denx.de designates 81.169.180.215 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de Return-Path: Received: from lists.denx.de (dione.denx.de. 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[90.63.244.31]) by smtp.gmail.com with ESMTPSA id y9sm13856434wrq.55.2018.11.22.01.07.46 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 22 Nov 2018 01:07:46 -0800 (PST) From: Neil Armstrong To: u-boot@lists.denx.de Date: Thu, 22 Nov 2018 10:07:24 +0100 Message-Id: <20181122090740.29739-4-narmstrong@baylibre.com> X-Mailer: git-send-email 2.19.1 In-Reply-To: <20181122090740.29739-1-narmstrong@baylibre.com> References: <20181122090740.29739-1-narmstrong@baylibre.com> MIME-Version: 1.0 Cc: linux-amlogic@lists.infradead.org, trini@konsulko.com Subject: [U-Boot] [PATCH u-boot v2 03/19] board: amlogic: remove p212 derivatives X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" From: Jerome Brunet The Khadas vim and the libretech aml-s905x-cc (aka Potato) derive from amlogic s905x reference design (P212). All the code in these board is a copy/paste from the p212, which is tedious to maintain. This change use p212 u-boot board for all these boards, while keeping a dedicated defconfig to customize the names and device tree. Signed-off-by: Jerome Brunet Signed-off-by: Neil Armstrong --- arch/arm/mach-meson/Kconfig | 22 +------ board/amlogic/khadas-vim/Kconfig | 12 ---- board/amlogic/khadas-vim/MAINTAINERS | 6 -- board/amlogic/khadas-vim/Makefile | 6 -- board/amlogic/khadas-vim/khadas-vim.c | 57 ------------------- board/amlogic/libretech-cc/Kconfig | 12 ---- board/amlogic/libretech-cc/MAINTAINERS | 6 -- board/amlogic/libretech-cc/Makefile | 6 -- board/amlogic/libretech-cc/libretech-cc.c | 57 ------------------- .../README => p212/README.khadas-vim} | 0 .../README => p212/README.libretech-cc} | 0 board/amlogic/p212/{README => README.p212} | 0 configs/khadas-vim_defconfig | 2 +- configs/libretech-cc_defconfig | 2 +- 14 files changed, 4 insertions(+), 184 deletions(-) delete mode 100644 board/amlogic/khadas-vim/Kconfig delete mode 100644 board/amlogic/khadas-vim/MAINTAINERS delete mode 100644 board/amlogic/khadas-vim/Makefile delete mode 100644 board/amlogic/khadas-vim/khadas-vim.c delete mode 100644 board/amlogic/libretech-cc/Kconfig delete mode 100644 board/amlogic/libretech-cc/MAINTAINERS delete mode 100644 board/amlogic/libretech-cc/Makefile delete mode 100644 board/amlogic/libretech-cc/libretech-cc.c rename board/amlogic/{khadas-vim/README => p212/README.khadas-vim} (100%) rename board/amlogic/{libretech-cc/README => p212/README.libretech-cc} (100%) rename board/amlogic/p212/{README => README.p212} (100%) diff --git a/arch/arm/mach-meson/Kconfig b/arch/arm/mach-meson/Kconfig index bc0f6a169b..e0b2812477 100644 --- a/arch/arm/mach-meson/Kconfig +++ b/arch/arm/mach-meson/Kconfig @@ -47,22 +47,8 @@ config TARGET_P212 P212 is a reference dessign board based on Meson GXL S905X SoC with 2 GiB of RAM, Ethernet, HDMI, 2 USB, micro-SD slot, eMMC, IR receiver, CVBS+Audio jack and a SDIO WiFi module. - -config TARGET_LIBRETECH_CC - bool "LIBRETECH-CC" - select MESON_GXL - help - LibreTech CC is a single board computer based on Meson GXL - with 2 GiB of RAM, Ethernet, HDMI, 4 USB, micro-SD slot, - eMMC, IR receiver and a 40-pin GPIO header. - -config TARGET_KHADAS_VIM - bool "KHADAS-VIM" - select MESON_GXL - help - Khadas VIM is a single board computer based on Meson GXL - with 2 GiB of RAM, Ethernet, HDMI, 4 USB, micro-SD slot, - eMMC, IR receiver and a 40-pin GPIO header. + You should also select this TARGET if you have Khadas Vim or + a libretech aml-s905x-cc config TARGET_KHADAS_VIM2 bool "KHADAS-VIM2" @@ -86,10 +72,6 @@ source "board/amlogic/nanopi-k2/Kconfig" source "board/amlogic/p212/Kconfig" -source "board/amlogic/libretech-cc/Kconfig" - -source "board/amlogic/khadas-vim/Kconfig" - source "board/amlogic/khadas-vim2/Kconfig" endif diff --git a/board/amlogic/khadas-vim/Kconfig b/board/amlogic/khadas-vim/Kconfig deleted file mode 100644 index 0fa8db97ea..0000000000 --- a/board/amlogic/khadas-vim/Kconfig +++ /dev/null @@ -1,12 +0,0 @@ -if TARGET_KHADAS_VIM - -config SYS_BOARD - default "khadas-vim" - -config SYS_VENDOR - default "amlogic" - -config SYS_CONFIG_NAME - default "khadas-vim" - -endif diff --git a/board/amlogic/khadas-vim/MAINTAINERS b/board/amlogic/khadas-vim/MAINTAINERS deleted file mode 100644 index 024220a526..0000000000 --- a/board/amlogic/khadas-vim/MAINTAINERS +++ /dev/null @@ -1,6 +0,0 @@ -KHADAS-VIM -M: Neil Armstrong -S: Maintained -F: board/amlogic/khadas-vim/ -F: include/configs/khadas-vim.h -F: configs/khadas-vim_defconfig diff --git a/board/amlogic/khadas-vim/Makefile b/board/amlogic/khadas-vim/Makefile deleted file mode 100644 index 558c0769b7..0000000000 --- a/board/amlogic/khadas-vim/Makefile +++ /dev/null @@ -1,6 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0+ -# -# (C) Copyright 2016 BayLibre, SAS -# Author: Neil Armstrong - -obj-y := khadas-vim.o diff --git a/board/amlogic/khadas-vim/khadas-vim.c b/board/amlogic/khadas-vim/khadas-vim.c deleted file mode 100644 index 692bf2add3..0000000000 --- a/board/amlogic/khadas-vim/khadas-vim.c +++ /dev/null @@ -1,57 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * Copyright (C) 2016 BayLibre, SAS - * Author: Neil Armstrong - */ - -#include -#include -#include -#include -#include -#include -#include -#include - -#define EFUSE_SN_OFFSET 20 -#define EFUSE_SN_SIZE 16 -#define EFUSE_MAC_OFFSET 52 -#define EFUSE_MAC_SIZE 6 - -int board_init(void) -{ - return 0; -} - -int misc_init_r(void) -{ - u8 mac_addr[EFUSE_MAC_SIZE]; - char serial[EFUSE_SN_SIZE]; - ssize_t len; - - meson_gx_eth_init(PHY_INTERFACE_MODE_RMII, - MESON_GXL_USE_INTERNAL_RMII_PHY); - - if (!eth_env_get_enetaddr("ethaddr", mac_addr)) { - len = meson_sm_read_efuse(EFUSE_MAC_OFFSET, - mac_addr, EFUSE_MAC_SIZE); - if (len == EFUSE_MAC_SIZE && is_valid_ethaddr(mac_addr)) - eth_env_set_enetaddr("ethaddr", mac_addr); - } - - if (!env_get("serial#")) { - len = meson_sm_read_efuse(EFUSE_SN_OFFSET, serial, - EFUSE_SN_SIZE); - if (len == EFUSE_SN_SIZE) - env_set("serial#", serial); - } - - return 0; -} - -int ft_board_setup(void *blob, bd_t *bd) -{ - meson_gx_init_reserved_memory(blob); - - return 0; -} diff --git a/board/amlogic/libretech-cc/Kconfig b/board/amlogic/libretech-cc/Kconfig deleted file mode 100644 index 7a6f9169bd..0000000000 --- a/board/amlogic/libretech-cc/Kconfig +++ /dev/null @@ -1,12 +0,0 @@ -if TARGET_LIBRETECH_CC - -config SYS_BOARD - default "libretech-cc" - -config SYS_VENDOR - default "amlogic" - -config SYS_CONFIG_NAME - default "libretech-cc" - -endif diff --git a/board/amlogic/libretech-cc/MAINTAINERS b/board/amlogic/libretech-cc/MAINTAINERS deleted file mode 100644 index 398ce57db2..0000000000 --- a/board/amlogic/libretech-cc/MAINTAINERS +++ /dev/null @@ -1,6 +0,0 @@ -LIBRETECH-CC -M: Neil Armstrong -S: Maintained -F: board/amlogic/libretech-cc/ -F: include/configs/libretech-cc.h -F: configs/libretech-cc_defconfig diff --git a/board/amlogic/libretech-cc/Makefile b/board/amlogic/libretech-cc/Makefile deleted file mode 100644 index 3b0adf8bf5..0000000000 --- a/board/amlogic/libretech-cc/Makefile +++ /dev/null @@ -1,6 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0+ -# -# (C) Copyright 2016 BayLibre, SAS -# Author: Neil Armstrong - -obj-y := libretech-cc.o diff --git a/board/amlogic/libretech-cc/libretech-cc.c b/board/amlogic/libretech-cc/libretech-cc.c deleted file mode 100644 index ccab1272c5..0000000000 --- a/board/amlogic/libretech-cc/libretech-cc.c +++ /dev/null @@ -1,57 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * Copyright (C) 2016 BayLibre, SAS - * Author: Neil Armstrong - */ - -#include -#include -#include -#include -#include -#include -#include -#include - -#define EFUSE_SN_OFFSET 20 -#define EFUSE_SN_SIZE 16 -#define EFUSE_MAC_OFFSET 52 -#define EFUSE_MAC_SIZE 6 - -int board_init(void) -{ - return 0; -} - -int misc_init_r(void) -{ - u8 mac_addr[EFUSE_MAC_SIZE]; - char serial[EFUSE_SN_SIZE]; - ssize_t len; - - meson_gx_eth_init(PHY_INTERFACE_MODE_RMII, - MESON_GXL_USE_INTERNAL_RMII_PHY); - - if (!eth_env_get_enetaddr("ethaddr", mac_addr)) { - len = meson_sm_read_efuse(EFUSE_MAC_OFFSET, - mac_addr, EFUSE_MAC_SIZE); - if (len == EFUSE_MAC_SIZE && is_valid_ethaddr(mac_addr)) - eth_env_set_enetaddr("ethaddr", mac_addr); - } - - if (!env_get("serial#")) { - len = meson_sm_read_efuse(EFUSE_SN_OFFSET, serial, - EFUSE_SN_SIZE); - if (len == EFUSE_SN_SIZE) - env_set("serial#", serial); - } - - return 0; -} - -int ft_board_setup(void *blob, bd_t *bd) -{ - meson_gx_init_reserved_memory(blob); - - return 0; -} diff --git a/board/amlogic/khadas-vim/README b/board/amlogic/p212/README.khadas-vim similarity index 100% rename from board/amlogic/khadas-vim/README rename to board/amlogic/p212/README.khadas-vim diff --git a/board/amlogic/libretech-cc/README b/board/amlogic/p212/README.libretech-cc similarity index 100% rename from board/amlogic/libretech-cc/README rename to board/amlogic/p212/README.libretech-cc diff --git a/board/amlogic/p212/README b/board/amlogic/p212/README.p212 similarity index 100% rename from board/amlogic/p212/README rename to board/amlogic/p212/README.p212 diff --git a/configs/khadas-vim_defconfig b/configs/khadas-vim_defconfig index 0c89d9a22c..af30113760 100644 --- a/configs/khadas-vim_defconfig +++ b/configs/khadas-vim_defconfig @@ -2,7 +2,7 @@ CONFIG_ARM=y CONFIG_ARCH_MESON=y CONFIG_SYS_TEXT_BASE=0x01000000 CONFIG_MESON_GXL=y -CONFIG_TARGET_KHADAS_VIM=y +CONFIG_TARGET_P212=y CONFIG_DEBUG_UART_BASE=0xc81004c0 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_IDENT_STRING=" khadas-vim" diff --git a/configs/libretech-cc_defconfig b/configs/libretech-cc_defconfig index 36d117c4ab..7526516060 100644 --- a/configs/libretech-cc_defconfig +++ b/configs/libretech-cc_defconfig @@ -2,7 +2,7 @@ CONFIG_ARM=y CONFIG_ARCH_MESON=y CONFIG_SYS_TEXT_BASE=0x01000000 CONFIG_MESON_GXL=y -CONFIG_TARGET_LIBRETECH_CC=y +CONFIG_TARGET_P212=y CONFIG_DEBUG_UART_BASE=0xc81004c0 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_IDENT_STRING=" libretech-cc" From patchwork Thu Nov 22 09:07:26 2018 Content-Type: text/plain; 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[90.63.244.31]) by smtp.gmail.com with ESMTPSA id y9sm13856434wrq.55.2018.11.22.01.07.48 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 22 Nov 2018 01:07:48 -0800 (PST) From: Neil Armstrong To: u-boot@lists.denx.de Date: Thu, 22 Nov 2018 10:07:26 +0100 Message-Id: <20181122090740.29739-6-narmstrong@baylibre.com> X-Mailer: git-send-email 2.19.1 In-Reply-To: <20181122090740.29739-1-narmstrong@baylibre.com> References: <20181122090740.29739-1-narmstrong@baylibre.com> MIME-Version: 1.0 Cc: linux-amlogic@lists.infradead.org, trini@konsulko.com Subject: [U-Boot] [PATCH u-boot v2 05/19] board: amlogic: factorise gxbb boards X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" From: Jerome Brunet The nanopi-k2 and the odroid-c2 are similar enough to be supported by the same u-boot board. This change use odroid-c2 u-boot board for the nanopi-k2 as well. Dedicated defconfig are kept to customize the names and device tree. Signed-off-by: Jerome Brunet Signed-off-by: Neil Armstrong --- arch/arm/mach-meson/Kconfig | 11 +--- board/amlogic/nanopi-k2/Kconfig | 12 ---- board/amlogic/nanopi-k2/MAINTAINERS | 6 -- board/amlogic/nanopi-k2/Makefile | 7 --- board/amlogic/nanopi-k2/nanopi-k2.c | 55 ------------------- board/amlogic/odroid-c2/MAINTAINERS | 1 + .../README => odroid-c2/README.nanopi-k2} | 0 .../odroid-c2/{README => README.odroid-c2} | 0 configs/nanopi-k2_defconfig | 2 +- 9 files changed, 3 insertions(+), 91 deletions(-) delete mode 100644 board/amlogic/nanopi-k2/Kconfig delete mode 100644 board/amlogic/nanopi-k2/MAINTAINERS delete mode 100644 board/amlogic/nanopi-k2/Makefile delete mode 100644 board/amlogic/nanopi-k2/nanopi-k2.c rename board/amlogic/{nanopi-k2/README => odroid-c2/README.nanopi-k2} (100%) rename board/amlogic/odroid-c2/{README => README.odroid-c2} (100%) diff --git a/arch/arm/mach-meson/Kconfig b/arch/arm/mach-meson/Kconfig index 98303dbda1..d86b1bed78 100644 --- a/arch/arm/mach-meson/Kconfig +++ b/arch/arm/mach-meson/Kconfig @@ -31,14 +31,7 @@ config TARGET_ODROID_C2 ODROID-C2 is a single board computer based on Meson GXBaby with 2 GiB of RAM, Gigabit Ethernet, HDMI, 4 USB, micro-SD slot, eMMC, IR receiver and a 40-pin GPIO header. - -config TARGET_NANOPI_K2 - bool "NANOPI_K2" - select MESON_GXBB - help - NANOPI_K2 is a single board computer based on Meson GXBaby - with 2 GiB of RAM, Gigabit Ethernet,AP6212 Wifi, HDMI, 4 USB, - micro-SD slot, eMMC, IR receiver and a 40-pin GPIO header. + You should also select this TARGET if you have an nanopi-k2 config TARGET_P212 bool "P212" @@ -69,8 +62,6 @@ config SYS_MALLOC_F_LEN source "board/amlogic/odroid-c2/Kconfig" -source "board/amlogic/nanopi-k2/Kconfig" - source "board/amlogic/p212/Kconfig" source "board/amlogic/q200/Kconfig" diff --git a/board/amlogic/nanopi-k2/Kconfig b/board/amlogic/nanopi-k2/Kconfig deleted file mode 100644 index 374bda200c..0000000000 --- a/board/amlogic/nanopi-k2/Kconfig +++ /dev/null @@ -1,12 +0,0 @@ -if TARGET_NANOPI_K2 - -config SYS_BOARD - default "nanopi-k2" - -config SYS_VENDOR - default "amlogic" - -config SYS_CONFIG_NAME - default "nanopi-k2" - -endif diff --git a/board/amlogic/nanopi-k2/MAINTAINERS b/board/amlogic/nanopi-k2/MAINTAINERS deleted file mode 100644 index 0452bd1fa1..0000000000 --- a/board/amlogic/nanopi-k2/MAINTAINERS +++ /dev/null @@ -1,6 +0,0 @@ -NANOPI-K2 -M: Neil Armstrong -S: Maintained -F: board/amlogic/nanopi-k2/ -F: include/configs/nanopi-k2.h -F: configs/nanopi-k2_defconfig diff --git a/board/amlogic/nanopi-k2/Makefile b/board/amlogic/nanopi-k2/Makefile deleted file mode 100644 index 7d9b666e76..0000000000 --- a/board/amlogic/nanopi-k2/Makefile +++ /dev/null @@ -1,7 +0,0 @@ -# -# (C) Copyright 2018 Thomas McKahan -# -# SPDX-License-Identifier: GPL-2.0+ -# - -obj-y := nanopi-k2.o diff --git a/board/amlogic/nanopi-k2/nanopi-k2.c b/board/amlogic/nanopi-k2/nanopi-k2.c deleted file mode 100644 index ae29dd6fa4..0000000000 --- a/board/amlogic/nanopi-k2/nanopi-k2.c +++ /dev/null @@ -1,55 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * (C) Copyright 2018 Thomas McKahan - */ - -#include -#include -#include -#include -#include -#include -#include -#include - -#define EFUSE_SN_OFFSET 20 -#define EFUSE_SN_SIZE 16 -#define EFUSE_MAC_OFFSET 52 -#define EFUSE_MAC_SIZE 6 - -int board_init(void) -{ - return 0; -} - -int misc_init_r(void) -{ - u8 mac_addr[EFUSE_MAC_SIZE]; - char serial[EFUSE_SN_SIZE]; - ssize_t len; - - meson_gx_eth_init(PHY_INTERFACE_MODE_RGMII, 0); - - if (!eth_env_get_enetaddr("ethaddr", mac_addr)) { - len = meson_sm_read_efuse(EFUSE_MAC_OFFSET, - mac_addr, EFUSE_MAC_SIZE); - if (len == EFUSE_MAC_SIZE && is_valid_ethaddr(mac_addr)) - eth_env_set_enetaddr("ethaddr", mac_addr); - } - - if (!env_get("serial#")) { - len = meson_sm_read_efuse(EFUSE_SN_OFFSET, serial, - EFUSE_SN_SIZE); - if (len == EFUSE_SN_SIZE) - env_set("serial#", serial); - } - - return 0; -} - -int ft_board_setup(void *blob, bd_t *bd) -{ - meson_gx_init_reserved_memory(blob); - - return 0; -} diff --git a/board/amlogic/odroid-c2/MAINTAINERS b/board/amlogic/odroid-c2/MAINTAINERS index 699850fd0c..fd74d53bfe 100644 --- a/board/amlogic/odroid-c2/MAINTAINERS +++ b/board/amlogic/odroid-c2/MAINTAINERS @@ -1,5 +1,6 @@ ODROID-C2 M: Beniamino Galvani +M: Neil Armstrong S: Maintained F: board/amlogic/odroid-c2/ F: include/configs/odroid-c2.h diff --git a/board/amlogic/nanopi-k2/README b/board/amlogic/odroid-c2/README.nanopi-k2 similarity index 100% rename from board/amlogic/nanopi-k2/README rename to board/amlogic/odroid-c2/README.nanopi-k2 diff --git a/board/amlogic/odroid-c2/README b/board/amlogic/odroid-c2/README.odroid-c2 similarity index 100% rename from board/amlogic/odroid-c2/README rename to board/amlogic/odroid-c2/README.odroid-c2 diff --git a/configs/nanopi-k2_defconfig b/configs/nanopi-k2_defconfig index 5c8c747bf3..01196d6655 100644 --- a/configs/nanopi-k2_defconfig +++ b/configs/nanopi-k2_defconfig @@ -2,7 +2,7 @@ CONFIG_ARM=y CONFIG_ARCH_MESON=y CONFIG_SYS_TEXT_BASE=0x01000000 CONFIG_MESON_GXBB=y -CONFIG_TARGET_NANOPI_K2=y +CONFIG_TARGET_ODROID_C2=y CONFIG_DEBUG_UART_BASE=0xc81004c0 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_IDENT_STRING=" nanopi-k2" From patchwork Thu Nov 22 09:07:27 2018 Content-Type: text/plain; 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[90.63.244.31]) by smtp.gmail.com with ESMTPSA id y9sm13856434wrq.55.2018.11.22.01.07.48 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 22 Nov 2018 01:07:49 -0800 (PST) From: Neil Armstrong To: u-boot@lists.denx.de Date: Thu, 22 Nov 2018 10:07:27 +0100 Message-Id: <20181122090740.29739-7-narmstrong@baylibre.com> X-Mailer: git-send-email 2.19.1 In-Reply-To: <20181122090740.29739-1-narmstrong@baylibre.com> References: <20181122090740.29739-1-narmstrong@baylibre.com> MIME-Version: 1.0 Cc: linux-amlogic@lists.infradead.org, trini@konsulko.com Subject: [U-Boot] [PATCH u-boot v2 06/19] ARM: rework amlogic configuration X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" From: Jerome Brunet Rework the board SYS_BOARD, SYS_VENDOR and SYS_CONFIG_NAME setup by moving the board Kconfig into the mach-meson Kconfig to make it easier to add new boards for a SoC architecture and add a custom config header or custom board handler for a platform. This drops the board CONFIGs and the duplicate boards configs headers in favor of a single meson64.h config header. Signed-off-by: Jerome Brunet Signed-off-by: Neil Armstrong --- arch/arm/mach-meson/Kconfig | 73 +++++++++---------- board/amlogic/odroid-c2/Kconfig | 12 --- board/amlogic/p212/Kconfig | 12 --- board/amlogic/q200/Kconfig | 12 --- configs/khadas-vim2_defconfig | 1 - configs/khadas-vim_defconfig | 1 - configs/libretech-cc_defconfig | 1 - configs/nanopi-k2_defconfig | 2 - configs/odroid-c2_defconfig | 1 - configs/p212_defconfig | 1 - include/configs/khadas-vim.h | 14 ---- include/configs/libretech-cc.h | 14 ---- .../configs/{meson-gx-common.h => meson64.h} | 25 ++++--- include/configs/nanopi-k2.h | 12 --- include/configs/odroid-c2.h | 12 --- include/configs/p212.h | 14 ---- include/configs/q200.h | 18 ----- 17 files changed, 50 insertions(+), 175 deletions(-) delete mode 100644 board/amlogic/odroid-c2/Kconfig delete mode 100644 board/amlogic/p212/Kconfig delete mode 100644 board/amlogic/q200/Kconfig delete mode 100644 include/configs/khadas-vim.h delete mode 100644 include/configs/libretech-cc.h rename include/configs/{meson-gx-common.h => meson64.h} (81%) delete mode 100644 include/configs/nanopi-k2.h delete mode 100644 include/configs/odroid-c2.h delete mode 100644 include/configs/p212.h delete mode 100644 include/configs/q200.h diff --git a/arch/arm/mach-meson/Kconfig b/arch/arm/mach-meson/Kconfig index d86b1bed78..6f60167c8c 100644 --- a/arch/arm/mach-meson/Kconfig +++ b/arch/arm/mach-meson/Kconfig @@ -8,49 +8,27 @@ config MESON64_COMMON select DM_SERIAL imply CMD_DM +choice + prompt "Platform select" + default MESON_GXBB + config MESON_GXBB - bool + bool "GXBB" select MESON64_COMMON + help + Select this if your SoC is an S905 config MESON_GXL - bool + bool "GXL" select MESON64_COMMON + help + Select this if your SoC is an S905X/D or S805X config MESON_GXM - bool + bool "GXM" select MESON64_COMMON - -choice - prompt "Platform select" - default TARGET_ODROID_C2 - -config TARGET_ODROID_C2 - bool "ODROID-C2" - select MESON_GXBB help - ODROID-C2 is a single board computer based on Meson GXBaby - with 2 GiB of RAM, Gigabit Ethernet, HDMI, 4 USB, micro-SD - slot, eMMC, IR receiver and a 40-pin GPIO header. - You should also select this TARGET if you have an nanopi-k2 - -config TARGET_P212 - bool "P212" - select MESON_GXL - help - P212 is a reference dessign board based on Meson GXL S905X SoC - with 2 GiB of RAM, Ethernet, HDMI, 2 USB, micro-SD slot, - eMMC, IR receiver, CVBS+Audio jack and a SDIO WiFi module. - You should also select this TARGET if you have Khadas Vim or - a libretech aml-s905x-cc - -config TARGET_Q200 - bool "KHADAS-VIM2" - select MESON_GXM - help - Q200 is a reference dessign board based on Meson GXM - with 2/3 GiB of RAM, Ethernet, HDMI, 4 USB, micro-SD slot, - eMMC, IR receiver. - You should also select this TARGET if you have Khadas Vim2. + Select this if your SoC is an S912 endchoice @@ -60,10 +38,31 @@ config SYS_SOC config SYS_MALLOC_F_LEN default 0x1000 -source "board/amlogic/odroid-c2/Kconfig" +config SYS_VENDOR + string "Vendor name" + default "amlogic" + help + This option contains information about board name. + Based on this option board// will + be used. -source "board/amlogic/p212/Kconfig" +config SYS_BOARD + string "Board name" + default "odroid-c2" if MESON_GXBB + default "p212" if MESON_GXL + default "q200" if MESON_GXM + default "" + help + This option contains information about board name. + Based on this option board// will + be used. -source "board/amlogic/q200/Kconfig" +config SYS_CONFIG_NAME + string "Board configuration name" + default "meson64" + help + This option contains information about board configuration name. + Based on this option include/configs/.h header + will be used for board configuration. endif diff --git a/board/amlogic/odroid-c2/Kconfig b/board/amlogic/odroid-c2/Kconfig deleted file mode 100644 index 2b16889b07..0000000000 --- a/board/amlogic/odroid-c2/Kconfig +++ /dev/null @@ -1,12 +0,0 @@ -if TARGET_ODROID_C2 - -config SYS_BOARD - default "odroid-c2" - -config SYS_VENDOR - default "amlogic" - -config SYS_CONFIG_NAME - default "odroid-c2" - -endif diff --git a/board/amlogic/p212/Kconfig b/board/amlogic/p212/Kconfig deleted file mode 100644 index 720c92b1ee..0000000000 --- a/board/amlogic/p212/Kconfig +++ /dev/null @@ -1,12 +0,0 @@ -if TARGET_P212 - -config SYS_BOARD - default "p212" - -config SYS_VENDOR - default "amlogic" - -config SYS_CONFIG_NAME - default "p212" - -endif diff --git a/board/amlogic/q200/Kconfig b/board/amlogic/q200/Kconfig deleted file mode 100644 index cfaf3797ac..0000000000 --- a/board/amlogic/q200/Kconfig +++ /dev/null @@ -1,12 +0,0 @@ -if TARGET_Q200 - -config SYS_BOARD - default "q200" - -config SYS_VENDOR - default "amlogic" - -config SYS_CONFIG_NAME - default "q200" - -endif diff --git a/configs/khadas-vim2_defconfig b/configs/khadas-vim2_defconfig index 49b8104960..6fe861c0e5 100644 --- a/configs/khadas-vim2_defconfig +++ b/configs/khadas-vim2_defconfig @@ -2,7 +2,6 @@ CONFIG_ARM=y CONFIG_ARCH_MESON=y CONFIG_SYS_TEXT_BASE=0x01000000 CONFIG_MESON_GXM=y -CONFIG_TARGET_Q200=y CONFIG_DEBUG_UART_BASE=0xc81004c0 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_IDENT_STRING=" khadas-vim2" diff --git a/configs/khadas-vim_defconfig b/configs/khadas-vim_defconfig index af30113760..6e855dd6eb 100644 --- a/configs/khadas-vim_defconfig +++ b/configs/khadas-vim_defconfig @@ -2,7 +2,6 @@ CONFIG_ARM=y CONFIG_ARCH_MESON=y CONFIG_SYS_TEXT_BASE=0x01000000 CONFIG_MESON_GXL=y -CONFIG_TARGET_P212=y CONFIG_DEBUG_UART_BASE=0xc81004c0 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_IDENT_STRING=" khadas-vim" diff --git a/configs/libretech-cc_defconfig b/configs/libretech-cc_defconfig index 7526516060..c2f985fcfb 100644 --- a/configs/libretech-cc_defconfig +++ b/configs/libretech-cc_defconfig @@ -2,7 +2,6 @@ CONFIG_ARM=y CONFIG_ARCH_MESON=y CONFIG_SYS_TEXT_BASE=0x01000000 CONFIG_MESON_GXL=y -CONFIG_TARGET_P212=y CONFIG_DEBUG_UART_BASE=0xc81004c0 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_IDENT_STRING=" libretech-cc" diff --git a/configs/nanopi-k2_defconfig b/configs/nanopi-k2_defconfig index 01196d6655..8bbf48f41f 100644 --- a/configs/nanopi-k2_defconfig +++ b/configs/nanopi-k2_defconfig @@ -1,8 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_MESON=y CONFIG_SYS_TEXT_BASE=0x01000000 -CONFIG_MESON_GXBB=y -CONFIG_TARGET_ODROID_C2=y CONFIG_DEBUG_UART_BASE=0xc81004c0 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_IDENT_STRING=" nanopi-k2" diff --git a/configs/odroid-c2_defconfig b/configs/odroid-c2_defconfig index 19196b3585..68554ba745 100644 --- a/configs/odroid-c2_defconfig +++ b/configs/odroid-c2_defconfig @@ -2,7 +2,6 @@ CONFIG_ARM=y CONFIG_ARCH_MESON=y CONFIG_SYS_TEXT_BASE=0x01000000 CONFIG_MESON_GXBB=y -CONFIG_TARGET_ODROID_C2=y CONFIG_DEBUG_UART_BASE=0xc81004c0 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_IDENT_STRING=" odroid-c2" diff --git a/configs/p212_defconfig b/configs/p212_defconfig index 9e3b1d6bfb..a15064da81 100644 --- a/configs/p212_defconfig +++ b/configs/p212_defconfig @@ -2,7 +2,6 @@ CONFIG_ARM=y CONFIG_ARCH_MESON=y CONFIG_SYS_TEXT_BASE=0x01000000 CONFIG_MESON_GXL=y -CONFIG_TARGET_P212=y CONFIG_DEBUG_UART_BASE=0xc81004c0 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_IDENT_STRING=" p212" diff --git a/include/configs/khadas-vim.h b/include/configs/khadas-vim.h deleted file mode 100644 index ff87c02820..0000000000 --- a/include/configs/khadas-vim.h +++ /dev/null @@ -1,14 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * Configuration for Khadas VIM - * - * Copyright (C) 2017 Baylibre, SAS - * Author: Neil Armstrong - */ - -#ifndef __CONFIG_H -#define __CONFIG_H - -#include - -#endif /* __CONFIG_H */ diff --git a/include/configs/libretech-cc.h b/include/configs/libretech-cc.h deleted file mode 100644 index 95e0f346fd..0000000000 --- a/include/configs/libretech-cc.h +++ /dev/null @@ -1,14 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * Configuration for LibreTech CC - * - * Copyright (C) 2017 Baylibre, SAS - * Author: Neil Armstrong - */ - -#ifndef __CONFIG_H -#define __CONFIG_H - -#include - -#endif /* __CONFIG_H */ diff --git a/include/configs/meson-gx-common.h b/include/configs/meson64.h similarity index 81% rename from include/configs/meson-gx-common.h rename to include/configs/meson64.h index c43697665d..1929a3e406 100644 --- a/include/configs/meson-gx-common.h +++ b/include/configs/meson64.h @@ -1,11 +1,15 @@ /* SPDX-License-Identifier: GPL-2.0+ */ /* - * Configuration for Amlogic Meson GX SoCs + * Configuration for Amlogic Meson 64bits SoCs * (C) Copyright 2016 Beniamino Galvani */ -#ifndef __MESON_GX_COMMON_CONFIG_H -#define __MESON_GX_COMMON_CONFIG_H +#ifndef __MESON64_CONFIG_H +#define __MESON64_CONFIG_H + +/* Generic Interrupt Controller Definitions */ +#define GICD_BASE 0xc4301000 +#define GICC_BASE 0xc4302000 #define CONFIG_CPU_ARMV8 #define CONFIG_REMAKE_ELF @@ -17,10 +21,7 @@ #define CONFIG_SYS_SDRAM_BASE 0 #define CONFIG_SYS_INIT_SP_ADDR 0x20000000 #define CONFIG_SYS_LOAD_ADDR CONFIG_SYS_TEXT_BASE - -/* Generic Interrupt Controller Definitions */ -#define GICD_BASE 0xc4301000 -#define GICC_BASE 0xc4302000 +#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* 64 MiB */ #ifdef CONFIG_CMD_USB #define BOOT_TARGET_DEVICES_USB(func) func(USB, usb, 0) @@ -28,6 +29,7 @@ #define BOOT_TARGET_DEVICES_USB(func) #endif +#ifndef BOOT_TARGET_DEVICES #define BOOT_TARGET_DEVICES(func) \ func(MMC, mmc, 0) \ func(MMC, mmc, 1) \ @@ -35,9 +37,9 @@ BOOT_TARGET_DEVICES_USB(func) \ func(PXE, pxe, na) \ func(DHCP, dhcp, na) +#endif -#include - +#ifndef CONFIG_EXTRA_ENV_SETTINGS #define CONFIG_EXTRA_ENV_SETTINGS \ "fdt_addr_r=0x01000000\0" \ "scriptaddr=0x1f000000\0" \ @@ -46,7 +48,8 @@ "ramdisk_addr_r=0x13000000\0" \ "fdtfile=amlogic/" CONFIG_DEFAULT_DEVICE_TREE ".dtb\0" \ BOOTENV +#endif -#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* 64 MiB */ +#include -#endif /* __MESON_GX_COMMON_CONFIG_H */ +#endif /* __MESON64_CONFIG_H */ diff --git a/include/configs/nanopi-k2.h b/include/configs/nanopi-k2.h deleted file mode 100644 index 3fd6e8fba4..0000000000 --- a/include/configs/nanopi-k2.h +++ /dev/null @@ -1,12 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * Configuration for NANOPI-K2 - * (C) Copyright 2018 Thomas McKahan - */ - -#ifndef __CONFIG_H -#define __CONFIG_H - -#include - -#endif /* __CONFIG_H */ diff --git a/include/configs/odroid-c2.h b/include/configs/odroid-c2.h deleted file mode 100644 index 87e3ddb342..0000000000 --- a/include/configs/odroid-c2.h +++ /dev/null @@ -1,12 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * Configuration for ODROID-C2 - * (C) Copyright 2016 Beniamino Galvani - */ - -#ifndef __CONFIG_H -#define __CONFIG_H - -#include - -#endif /* __CONFIG_H */ diff --git a/include/configs/p212.h b/include/configs/p212.h deleted file mode 100644 index 4414293479..0000000000 --- a/include/configs/p212.h +++ /dev/null @@ -1,14 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * Configuration for Amlogic P212 - * - * Copyright (C) 2017 Baylibre, SAS - * Author: Neil Armstrong - */ - -#ifndef __CONFIG_H -#define __CONFIG_H - -#include - -#endif /* __CONFIG_H */ diff --git a/include/configs/q200.h b/include/configs/q200.h deleted file mode 100644 index 7ef8f42bd2..0000000000 --- a/include/configs/q200.h +++ /dev/null @@ -1,18 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * Configuration for Khadas VIM2 - * - * Copyright (C) 2017 Baylibre, SAS - * Author: Neil Armstrong - */ - -#ifndef __CONFIG_H -#define __CONFIG_H - -#define CONFIG_MISC_INIT_R - -#define MESON_FDTFILE_SETTING "fdtfile=amlogic/meson-gxm-khadas-vim2.dtb\0" - -#include - -#endif /* __CONFIG_H */ From patchwork Thu Nov 22 09:07:28 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Neil Armstrong X-Patchwork-Id: 151736 Delivered-To: patch@linaro.org Received: by 2002:a2e:299d:0:0:0:0:0 with SMTP id p29-v6csp486765ljp; Thu, 22 Nov 2018 01:12:22 -0800 (PST) X-Google-Smtp-Source: AJdET5cDSGG/kg7K3nIAZrleniFH4ZPQqHIBEEzD2bwstIrSlyvt41j5mOeHlAu55UfVAi7WbT6v X-Received: by 2002:a17:906:3f87:: with SMTP id b7-v6mr7499518ejj.158.1542877942846; Thu, 22 Nov 2018 01:12:22 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1542877942; cv=none; d=google.com; s=arc-20160816; b=hUHJmR8plSNt0ZLoW0VYC7Erum/idDVhhQX8muHwj15ItREB2q7jF4Juj8V1y0Scof BbSAMcxLijDChiAJcyzcyAITb5oWCsap3ZwHZ6Xd71DmFlaguew2gIYHPtoQ6J2mRYdq mvTV0lB/n8f8Azj6uRFaF46hvFwBeN4evvgrKjWYx0flwVCqQLR7TZuhLvsvbUNzLe8Q 46+mHvz/SYjmLQjwNDiklwGXr8yFDybhdXsosTvfCvyNlEbA772RGnbfIJAYqJ0F7moC q18M6cw0rFv+CSSOm2vupjTVhqNkOzQolm+4Rc7dYqDJ+EHfIbxrPyxtemQNJ1joUWWn Rsbw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:content-transfer-encoding:list-subscribe:list-help :list-post:list-archive:list-unsubscribe:list-id:precedence:subject :cc:mime-version:references:in-reply-to:message-id:date:to:from :dkim-signature; bh=gPifxNp+wUCLI3VuDWPfEFACR226E6vFDlWwumQqDU8=; b=rn+JkHXgfkekHh0JrsHolM0fbdAGEoR52eyM6dN5EVHNpmQSmBCiptaEc+c0IAnoEu TA6Ug58B4LjWN2jmP5PMMCkhT8lJmF/qO0HGH+it4sgiunaNs4cdF02e3ERv3Rls3ZOV G8WwxvSAMYsCEu8poIFQw07B+yoTATXU+TmzV8h1OQDE/hdqTa/1qp4KVx0vy9LDdgRQ kqFudj36qjFQ84ub7ybsQ0IQ89lPmXw8pQ91e4xuqO5Z6OqG/Um7me4sjc2J6aulJXM5 8T080fhDT7SLd5wA3LC5J/yIbIjdNpwY9oYsEsJuVUkdIm9wL2SwEjfo7rUfDf/j3joY Ar1Q== ARC-Authentication-Results: i=1; mx.google.com; dkim=neutral (body hash did not verify) header.i=@baylibre-com.20150623.gappssmtp.com header.s=20150623 header.b=AqUOGgfe; spf=pass (google.com: best guess record for domain of u-boot-bounces@lists.denx.de designates 81.169.180.215 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de Return-Path: Received: from lists.denx.de (dione.denx.de. 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[90.63.244.31]) by smtp.gmail.com with ESMTPSA id y9sm13856434wrq.55.2018.11.22.01.07.49 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 22 Nov 2018 01:07:50 -0800 (PST) From: Neil Armstrong To: u-boot@lists.denx.de Date: Thu, 22 Nov 2018 10:07:28 +0100 Message-Id: <20181122090740.29739-8-narmstrong@baylibre.com> X-Mailer: git-send-email 2.19.1 In-Reply-To: <20181122090740.29739-1-narmstrong@baylibre.com> References: <20181122090740.29739-1-narmstrong@baylibre.com> MIME-Version: 1.0 Cc: linux-amlogic@lists.infradead.org, trini@konsulko.com Subject: [U-Boot] [PATCH u-boot v2 07/19] configs: meson: change default load addresses X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" From: Jerome Brunet The original chosen addresses conflict with the BL2 initialisation. So far there was no issue with them but if we preload binaries in RAM (ROMUSB boot) before running the BL2 they get corrupted by the execution of BL2 init. If we load them around 0x08000000, there is no such issue. Signed-off-by: Jerome Brunet Signed-off-by: Neil Armstrong --- include/configs/meson64.h | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/include/configs/meson64.h b/include/configs/meson64.h index 1929a3e406..80c883e3f4 100644 --- a/include/configs/meson64.h +++ b/include/configs/meson64.h @@ -41,9 +41,9 @@ #ifndef CONFIG_EXTRA_ENV_SETTINGS #define CONFIG_EXTRA_ENV_SETTINGS \ - "fdt_addr_r=0x01000000\0" \ - "scriptaddr=0x1f000000\0" \ - "kernel_addr_r=0x01080000\0" \ + "fdt_addr_r=0x08008000\0" \ + "scriptaddr=0x08000000\0" \ + "kernel_addr_r=0x08080000\0" \ "pxefile_addr_r=0x01080000\0" \ "ramdisk_addr_r=0x13000000\0" \ "fdtfile=amlogic/" CONFIG_DEFAULT_DEVICE_TREE ".dtb\0" \ From patchwork Thu Nov 22 09:07:29 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Neil Armstrong X-Patchwork-Id: 151739 Delivered-To: patch@linaro.org Received: by 2002:a2e:299d:0:0:0:0:0 with SMTP id p29-v6csp490369ljp; Thu, 22 Nov 2018 01:16:05 -0800 (PST) X-Google-Smtp-Source: AJdET5epj2GlVuMFs/isfVlWbLvvpet+mEfxGDQOpoxkN/04XDdcec+SRi/yNUk1IDCaAqUWrpFa X-Received: by 2002:a17:906:2452:: with SMTP id a18-v6mr7299953ejb.17.1542878165398; Thu, 22 Nov 2018 01:16:05 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1542878165; cv=none; d=google.com; s=arc-20160816; b=XMR+EJLakPO+8Ulg1wFBQuqpdbfHEHjaeK2NkKy6+ikGko9YNIRC2KOeftZmergSa+ lyBrVyFGpVhieebVFDABFKrzpuvGX1XDN4iWY/kiyyY2HiCaEtrRN7voj8uqVkukuml+ o8X+hray6hQ5HI+suf4QgNUM6Bwy3lyx+pPDK57xRbzbTkf8syq1broyBXpRC95GnWfP ipNFjDmApuUMYpvGCV+NptlUzKBJHNwmrebGWj9dGpYwYzOt80s/vIVR32wyPDl0lCvW JDZf+/qTqumyHA1jogDJtRJsFSJq/M+MEW8GT/MS0B646cewv+wvxVOCkXt+QaaL3rjU /dCQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:content-transfer-encoding:list-subscribe:list-help :list-post:list-archive:list-unsubscribe:list-id:precedence:subject :cc:mime-version:references:in-reply-to:message-id:date:to:from :dkim-signature; bh=P8lc2rVHAEIYWUA6VhOzGZwWcvR/mkejKFIqUpZ65Ow=; b=gba+lzzJIcaPadFuAyH73OeseWPSYNBBvXwAyJVYHLcE2gj3Q31pkdvVDNq60yjEX9 akq2Ts+Df2WZ6YEPhOR+RGct0+4nnr8sDspMgOEI5fw+cYxF+KZjWTtx+Ry47OaItmcz Du1Be5rMcnXzyFSHcSzb7rGupvUe6Rvp2EfXgvAlP7f4nBNh86rZTcD2/LrNYq0dpR6C RZd1lY1t8Zu+SsJJtlJrbWjGXwax8IHYNNVvhncZm3FyaA6E5qLW0IGwGb6+4SJGuQnb ZB5p1F0KFibJ2Xma5Hlvy9EU7d4uUkD5NejwKt8x56LiWFauCV7P+u9bPlVnaWP4kPOW zLRQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=neutral (body hash did not verify) header.i=@baylibre-com.20150623.gappssmtp.com header.s=20150623 header.b=XMLr6NSr; spf=pass (google.com: best guess record for domain of u-boot-bounces@lists.denx.de designates 81.169.180.215 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de Return-Path: Received: from lists.denx.de (dione.denx.de. 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[90.63.244.31]) by smtp.gmail.com with ESMTPSA id y9sm13856434wrq.55.2018.11.22.01.07.50 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 22 Nov 2018 01:07:50 -0800 (PST) From: Neil Armstrong To: u-boot@lists.denx.de Date: Thu, 22 Nov 2018 10:07:29 +0100 Message-Id: <20181122090740.29739-9-narmstrong@baylibre.com> X-Mailer: git-send-email 2.19.1 In-Reply-To: <20181122090740.29739-1-narmstrong@baylibre.com> References: <20181122090740.29739-1-narmstrong@baylibre.com> MIME-Version: 1.0 Cc: linux-amlogic@lists.infradead.org, trini@konsulko.com Subject: [U-Boot] [PATCH u-boot v2 08/19] pinctrl: meson: rework gx pmx function X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" From: Jerome Brunet In preparation of supporting the new Amlogix AGX SoCs, we need to move the Amlogic GX pinmux functions out of the common code to be able to add a different set of SoC specific pinmux functions for AXG. Signed-off-by: Jerome Brunet Signed-off-by: Neil Armstrong --- drivers/pinctrl/meson/Kconfig | 8 +- drivers/pinctrl/meson/Makefile | 1 + drivers/pinctrl/meson/pinctrl-meson-gx-pmx.c | 97 +++++++++++++++++ drivers/pinctrl/meson/pinctrl-meson-gx.h | 48 ++++++++ drivers/pinctrl/meson/pinctrl-meson-gxbb.c | 6 +- drivers/pinctrl/meson/pinctrl-meson-gxl.c | 6 +- drivers/pinctrl/meson/pinctrl-meson.c | 109 +++---------------- drivers/pinctrl/meson/pinctrl-meson.h | 37 +++---- 8 files changed, 191 insertions(+), 121 deletions(-) create mode 100644 drivers/pinctrl/meson/pinctrl-meson-gx-pmx.c create mode 100644 drivers/pinctrl/meson/pinctrl-meson-gx.h diff --git a/drivers/pinctrl/meson/Kconfig b/drivers/pinctrl/meson/Kconfig index 27ba8909d7..15a8d9c704 100644 --- a/drivers/pinctrl/meson/Kconfig +++ b/drivers/pinctrl/meson/Kconfig @@ -4,12 +4,16 @@ config PINCTRL_MESON depends on PINCTRL_GENERIC bool +config PINCTRL_MESON_GX_PMX + select PINCTRL_MESON + bool + config PINCTRL_MESON_GXBB bool "Amlogic Meson GXBB SoC pinctrl driver" - select PINCTRL_MESON + select PINCTRL_MESON_GX_PMX config PINCTRL_MESON_GXL bool "Amlogic Meson GXL SoC pinctrl driver" - select PINCTRL_MESON + select PINCTRL_MESON_GX_PMX endif diff --git a/drivers/pinctrl/meson/Makefile b/drivers/pinctrl/meson/Makefile index 965092cd81..30b6875b88 100644 --- a/drivers/pinctrl/meson/Makefile +++ b/drivers/pinctrl/meson/Makefile @@ -1,5 +1,6 @@ # SPDX-License-Identifier: GPL-2.0+ obj-y += pinctrl-meson.o +obj-$(CONFIG_PINCTRL_MESON_GX_PMX) += pinctrl-meson-gx-pmx.o obj-$(CONFIG_PINCTRL_MESON_GXBB) += pinctrl-meson-gxbb.o obj-$(CONFIG_PINCTRL_MESON_GXL) += pinctrl-meson-gxl.o diff --git a/drivers/pinctrl/meson/pinctrl-meson-gx-pmx.c b/drivers/pinctrl/meson/pinctrl-meson-gx-pmx.c new file mode 100644 index 0000000000..fc1538ea71 --- /dev/null +++ b/drivers/pinctrl/meson/pinctrl-meson-gx-pmx.c @@ -0,0 +1,97 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * (C) Copyright 2016 - Beniamino Galvani + */ + +#include +#include +#include +#include +#include +#include "pinctrl-meson-gx.h" + +static void meson_gx_pinmux_disable_other_groups(struct meson_pinctrl *priv, + unsigned int pin, + int sel_group) +{ + struct meson_pmx_group *group; + struct meson_gx_pmx_data *pmx_data; + void __iomem *addr; + int i, j; + + for (i = 0; i < priv->data->num_groups; i++) { + group = &priv->data->groups[i]; + pmx_data = (struct meson_gx_pmx_data *)group->data; + if (pmx_data->is_gpio || i == sel_group) + continue; + + for (j = 0; j < group->num_pins; j++) { + if (group->pins[j] == pin) { + /* We have found a group using the pin */ + debug("pinmux: disabling %s\n", group->name); + addr = priv->reg_mux + pmx_data->reg * 4; + writel(readl(addr) & ~BIT(pmx_data->bit), addr); + } + } + } +} + +static int meson_gx_pinmux_group_set(struct udevice *dev, + unsigned int group_selector, + unsigned int func_selector) +{ + struct meson_pinctrl *priv = dev_get_priv(dev); + const struct meson_pmx_group *group; + const struct meson_pmx_func *func; + struct meson_gx_pmx_data *pmx_data; + void __iomem *addr; + int i; + + group = &priv->data->groups[group_selector]; + pmx_data = (struct meson_gx_pmx_data *)group->data; + func = &priv->data->funcs[func_selector]; + + debug("pinmux: set group %s func %s\n", group->name, func->name); + + /* + * Disable groups using the same pins. + * The selected group is not disabled to avoid glitches. + */ + for (i = 0; i < group->num_pins; i++) { + meson_gx_pinmux_disable_other_groups(priv, + group->pins[i], + group_selector); + } + + /* Function 0 (GPIO) doesn't need any additional setting */ + if (func_selector) { + addr = priv->reg_mux + pmx_data->reg * 4; + writel(readl(addr) | BIT(pmx_data->bit), addr); + } + + return 0; +} + +const struct pinctrl_ops meson_gx_pinctrl_ops = { + .get_groups_count = meson_pinctrl_get_groups_count, + .get_group_name = meson_pinctrl_get_group_name, + .get_functions_count = meson_pinmux_get_functions_count, + .get_function_name = meson_pinmux_get_function_name, + .pinmux_group_set = meson_gx_pinmux_group_set, + .set_state = pinctrl_generic_set_state, +}; + +static const struct dm_gpio_ops meson_gx_gpio_ops = { + .set_value = meson_gpio_set, + .get_value = meson_gpio_get, + .get_function = meson_gpio_get_direction, + .direction_input = meson_gpio_direction_input, + .direction_output = meson_gpio_direction_output, +}; + +const struct driver meson_gx_gpio_driver = { + .name = "meson-gx-gpio", + .id = UCLASS_GPIO, + .probe = meson_gpio_probe, + .ops = &meson_gx_gpio_ops, +}; diff --git a/drivers/pinctrl/meson/pinctrl-meson-gx.h b/drivers/pinctrl/meson/pinctrl-meson-gx.h new file mode 100644 index 0000000000..4c1aa1a300 --- /dev/null +++ b/drivers/pinctrl/meson/pinctrl-meson-gx.h @@ -0,0 +1,48 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright (C) 2014 Beniamino Galvani + * Copyright (C) 2017 Jerome Brunet + */ + +#ifndef __PINCTRL_MESON_GX_H__ +#define __PINCTRL_MESON_GX_H__ + +#include "pinctrl-meson.h" + +struct meson_gx_pmx_data { + bool is_gpio; + unsigned int reg; + unsigned int bit; +}; + +#define PMX_DATA(r, b, g) \ + { \ + .reg = r, \ + .bit = b, \ + .is_gpio = g, \ + } + +#define GROUP(grp, r, b) \ + { \ + .name = #grp, \ + .pins = grp ## _pins, \ + .num_pins = ARRAY_SIZE(grp ## _pins), \ + .data = (const struct meson_gx_pmx_data[]){ \ + PMX_DATA(r, b, false), \ + }, \ + } + +#define GPIO_GROUP(gpio, b) \ + { \ + .name = #gpio, \ + .pins = (const unsigned int[]){ PIN(gpio, b) }, \ + .num_pins = 1, \ + .data = (const struct meson_gx_pmx_data[]){ \ + PMX_DATA(0, 0, true), \ + }, \ + } + +extern const struct pinctrl_ops meson_gx_pinctrl_ops; +extern const struct driver meson_gx_gpio_driver; + +#endif /* __PINCTRL_MESON_GX_H__ */ diff --git a/drivers/pinctrl/meson/pinctrl-meson-gxbb.c b/drivers/pinctrl/meson/pinctrl-meson-gxbb.c index a8e47e3c4e..22e8b055d7 100644 --- a/drivers/pinctrl/meson/pinctrl-meson-gxbb.c +++ b/drivers/pinctrl/meson/pinctrl-meson-gxbb.c @@ -11,7 +11,7 @@ #include #include -#include "pinctrl-meson.h" +#include "pinctrl-meson-gx.h" #define EE_OFF 15 @@ -417,6 +417,7 @@ struct meson_pinctrl_data meson_gxbb_periphs_pinctrl_data = { .num_groups = ARRAY_SIZE(meson_gxbb_periphs_groups), .num_funcs = ARRAY_SIZE(meson_gxbb_periphs_functions), .num_banks = ARRAY_SIZE(meson_gxbb_periphs_banks), + .gpio_driver = &meson_gx_gpio_driver, }; struct meson_pinctrl_data meson_gxbb_aobus_pinctrl_data = { @@ -429,6 +430,7 @@ struct meson_pinctrl_data meson_gxbb_aobus_pinctrl_data = { .num_groups = ARRAY_SIZE(meson_gxbb_aobus_groups), .num_funcs = ARRAY_SIZE(meson_gxbb_aobus_functions), .num_banks = ARRAY_SIZE(meson_gxbb_aobus_banks), + .gpio_driver = &meson_gx_gpio_driver, }; static const struct udevice_id meson_gxbb_pinctrl_match[] = { @@ -449,5 +451,5 @@ U_BOOT_DRIVER(meson_gxbb_pinctrl) = { .of_match = of_match_ptr(meson_gxbb_pinctrl_match), .probe = meson_pinctrl_probe, .priv_auto_alloc_size = sizeof(struct meson_pinctrl), - .ops = &meson_pinctrl_ops, + .ops = &meson_gx_pinctrl_ops, }; diff --git a/drivers/pinctrl/meson/pinctrl-meson-gxl.c b/drivers/pinctrl/meson/pinctrl-meson-gxl.c index ba6e3531d9..1819eee4d0 100644 --- a/drivers/pinctrl/meson/pinctrl-meson-gxl.c +++ b/drivers/pinctrl/meson/pinctrl-meson-gxl.c @@ -11,7 +11,7 @@ #include #include -#include "pinctrl-meson.h" +#include "pinctrl-meson-gx.h" #define EE_OFF 11 @@ -699,6 +699,7 @@ struct meson_pinctrl_data meson_gxl_periphs_pinctrl_data = { .num_groups = ARRAY_SIZE(meson_gxl_periphs_groups), .num_funcs = ARRAY_SIZE(meson_gxl_periphs_functions), .num_banks = ARRAY_SIZE(meson_gxl_periphs_banks), + .gpio_driver = &meson_gx_gpio_driver, }; struct meson_pinctrl_data meson_gxl_aobus_pinctrl_data = { @@ -711,6 +712,7 @@ struct meson_pinctrl_data meson_gxl_aobus_pinctrl_data = { .num_groups = ARRAY_SIZE(meson_gxl_aobus_groups), .num_funcs = ARRAY_SIZE(meson_gxl_aobus_functions), .num_banks = ARRAY_SIZE(meson_gxl_aobus_banks), + .gpio_driver = &meson_gx_gpio_driver, }; static const struct udevice_id meson_gxl_pinctrl_match[] = { @@ -731,5 +733,5 @@ U_BOOT_DRIVER(meson_gxl_pinctrl) = { .of_match = of_match_ptr(meson_gxl_pinctrl_match), .probe = meson_pinctrl_probe, .priv_auto_alloc_size = sizeof(struct meson_pinctrl), - .ops = &meson_pinctrl_ops, + .ops = &meson_gx_pinctrl_ops, }; diff --git a/drivers/pinctrl/meson/pinctrl-meson.c b/drivers/pinctrl/meson/pinctrl-meson.c index 387c241d12..0bd6152803 100644 --- a/drivers/pinctrl/meson/pinctrl-meson.c +++ b/drivers/pinctrl/meson/pinctrl-meson.c @@ -20,15 +20,15 @@ DECLARE_GLOBAL_DATA_PTR; static const char *meson_pinctrl_dummy_name = "_dummy"; -static int meson_pinctrl_get_groups_count(struct udevice *dev) +int meson_pinctrl_get_groups_count(struct udevice *dev) { struct meson_pinctrl *priv = dev_get_priv(dev); return priv->data->num_groups; } -static const char *meson_pinctrl_get_group_name(struct udevice *dev, - unsigned selector) +const char *meson_pinctrl_get_group_name(struct udevice *dev, + unsigned int selector) { struct meson_pinctrl *priv = dev_get_priv(dev); @@ -38,87 +38,21 @@ static const char *meson_pinctrl_get_group_name(struct udevice *dev, return priv->data->groups[selector].name; } -static int meson_pinmux_get_functions_count(struct udevice *dev) +int meson_pinmux_get_functions_count(struct udevice *dev) { struct meson_pinctrl *priv = dev_get_priv(dev); return priv->data->num_funcs; } -static const char *meson_pinmux_get_function_name(struct udevice *dev, - unsigned selector) +const char *meson_pinmux_get_function_name(struct udevice *dev, + unsigned int selector) { struct meson_pinctrl *priv = dev_get_priv(dev); return priv->data->funcs[selector].name; } -static void meson_pinmux_disable_other_groups(struct meson_pinctrl *priv, - unsigned int pin, int sel_group) -{ - struct meson_pmx_group *group; - void __iomem *addr; - int i, j; - - for (i = 0; i < priv->data->num_groups; i++) { - group = &priv->data->groups[i]; - if (group->is_gpio || i == sel_group) - continue; - - for (j = 0; j < group->num_pins; j++) { - if (group->pins[j] == pin) { - /* We have found a group using the pin */ - debug("pinmux: disabling %s\n", group->name); - addr = priv->reg_mux + group->reg * 4; - writel(readl(addr) & ~BIT(group->bit), addr); - } - } - } -} - -static int meson_pinmux_group_set(struct udevice *dev, - unsigned group_selector, - unsigned func_selector) -{ - struct meson_pinctrl *priv = dev_get_priv(dev); - const struct meson_pmx_group *group; - const struct meson_pmx_func *func; - void __iomem *addr; - int i; - - group = &priv->data->groups[group_selector]; - func = &priv->data->funcs[func_selector]; - - debug("pinmux: set group %s func %s\n", group->name, func->name); - - /* - * Disable groups using the same pins. - * The selected group is not disabled to avoid glitches. - */ - for (i = 0; i < group->num_pins; i++) { - meson_pinmux_disable_other_groups(priv, - group->pins[i], - group_selector); - } - - /* Function 0 (GPIO) doesn't need any additional setting */ - if (func_selector) { - addr = priv->reg_mux + group->reg * 4; - writel(readl(addr) | BIT(group->bit), addr); - } - - return 0; -} - -const struct pinctrl_ops meson_pinctrl_ops = { - .get_groups_count = meson_pinctrl_get_groups_count, - .get_group_name = meson_pinctrl_get_group_name, - .get_functions_count = meson_pinmux_get_functions_count, - .get_function_name = meson_pinmux_get_function_name, - .pinmux_group_set = meson_pinmux_group_set, - .set_state = pinctrl_generic_set_state, -}; - static int meson_gpio_calc_reg_and_bit(struct udevice *dev, unsigned int offset, enum meson_reg_type reg_type, unsigned int *reg, unsigned int *bit) @@ -149,7 +83,7 @@ static int meson_gpio_calc_reg_and_bit(struct udevice *dev, unsigned int offset, return 0; } -static int meson_gpio_get(struct udevice *dev, unsigned int offset) +int meson_gpio_get(struct udevice *dev, unsigned int offset) { struct meson_pinctrl *priv = dev_get_priv(dev->parent); unsigned int reg, bit; @@ -162,7 +96,7 @@ static int meson_gpio_get(struct udevice *dev, unsigned int offset) return !!(readl(priv->reg_gpio + reg) & BIT(bit)); } -static int meson_gpio_set(struct udevice *dev, unsigned int offset, int value) +int meson_gpio_set(struct udevice *dev, unsigned int offset, int value) { struct meson_pinctrl *priv = dev_get_priv(dev->parent); unsigned int reg, bit; @@ -177,7 +111,7 @@ static int meson_gpio_set(struct udevice *dev, unsigned int offset, int value) return 0; } -static int meson_gpio_get_direction(struct udevice *dev, unsigned int offset) +int meson_gpio_get_direction(struct udevice *dev, unsigned int offset) { struct meson_pinctrl *priv = dev_get_priv(dev->parent); unsigned int reg, bit, val; @@ -192,7 +126,7 @@ static int meson_gpio_get_direction(struct udevice *dev, unsigned int offset) return (val & BIT(bit)) ? GPIOF_INPUT : GPIOF_OUTPUT; } -static int meson_gpio_direction_input(struct udevice *dev, unsigned int offset) +int meson_gpio_direction_input(struct udevice *dev, unsigned int offset) { struct meson_pinctrl *priv = dev_get_priv(dev->parent); unsigned int reg, bit; @@ -207,8 +141,8 @@ static int meson_gpio_direction_input(struct udevice *dev, unsigned int offset) return 0; } -static int meson_gpio_direction_output(struct udevice *dev, - unsigned int offset, int value) +int meson_gpio_direction_output(struct udevice *dev, + unsigned int offset, int value) { struct meson_pinctrl *priv = dev_get_priv(dev->parent); unsigned int reg, bit; @@ -229,7 +163,7 @@ static int meson_gpio_direction_output(struct udevice *dev, return 0; } -static int meson_gpio_probe(struct udevice *dev) +int meson_gpio_probe(struct udevice *dev) { struct meson_pinctrl *priv = dev_get_priv(dev->parent); struct gpio_dev_priv *uc_priv; @@ -241,21 +175,6 @@ static int meson_gpio_probe(struct udevice *dev) return 0; } -static const struct dm_gpio_ops meson_gpio_ops = { - .set_value = meson_gpio_set, - .get_value = meson_gpio_get, - .get_function = meson_gpio_get_direction, - .direction_input = meson_gpio_direction_input, - .direction_output = meson_gpio_direction_output, -}; - -static struct driver meson_gpio_driver = { - .name = "meson-gpio", - .id = UCLASS_GPIO, - .probe = meson_gpio_probe, - .ops = &meson_gpio_ops, -}; - static fdt_addr_t parse_address(int offset, const char *name, int na, int ns) { int index, len = 0; @@ -334,7 +253,7 @@ int meson_pinctrl_probe(struct udevice *dev) sprintf(name, "meson-gpio"); /* Create child device UCLASS_GPIO and bind it */ - device_bind(dev, &meson_gpio_driver, name, NULL, gpio, &gpio_dev); + device_bind(dev, priv->data->gpio_driver, name, NULL, gpio, &gpio_dev); dev_set_of_offset(gpio_dev, gpio); return 0; diff --git a/drivers/pinctrl/meson/pinctrl-meson.h b/drivers/pinctrl/meson/pinctrl-meson.h index 6ec89ba117..bdee721fc0 100644 --- a/drivers/pinctrl/meson/pinctrl-meson.h +++ b/drivers/pinctrl/meson/pinctrl-meson.h @@ -12,9 +12,7 @@ struct meson_pmx_group { const char *name; const unsigned int *pins; unsigned int num_pins; - bool is_gpio; - unsigned int reg; - unsigned int bit; + const void *data; }; struct meson_pmx_func { @@ -33,6 +31,8 @@ struct meson_pinctrl_data { unsigned int num_groups; unsigned int num_funcs; unsigned int num_banks; + const struct driver *gpio_driver; + void *pmx_data; }; struct meson_pinctrl { @@ -89,23 +89,6 @@ struct meson_bank { #define PIN(x, b) (b + x) -#define GROUP(grp, r, b) \ - { \ - .name = #grp, \ - .pins = grp ## _pins, \ - .num_pins = ARRAY_SIZE(grp ## _pins), \ - .reg = r, \ - .bit = b, \ - } - -#define GPIO_GROUP(gpio, b) \ - { \ - .name = #gpio, \ - .pins = (const unsigned int[]){ PIN(gpio, b) }, \ - .num_pins = 1, \ - .is_gpio = true, \ - } - #define FUNCTION(fn) \ { \ .name = #fn, \ @@ -131,6 +114,20 @@ struct meson_bank { extern const struct pinctrl_ops meson_pinctrl_ops; +int meson_pinctrl_get_groups_count(struct udevice *dev); +const char *meson_pinctrl_get_group_name(struct udevice *dev, + unsigned int selector); +int meson_pinmux_get_functions_count(struct udevice *dev); +const char *meson_pinmux_get_function_name(struct udevice *dev, + unsigned int selector); int meson_pinctrl_probe(struct udevice *dev); +int meson_gpio_get(struct udevice *dev, unsigned int offset); +int meson_gpio_set(struct udevice *dev, unsigned int offset, int value); +int meson_gpio_get_direction(struct udevice *dev, unsigned int offset); +int meson_gpio_direction_input(struct udevice *dev, unsigned int offset); +int meson_gpio_direction_output(struct udevice *dev, unsigned int offset, + int value); +int meson_gpio_probe(struct udevice *dev); + #endif /* __PINCTRL_MESON_H__ */ From patchwork Thu Nov 22 09:07:30 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Neil Armstrong X-Patchwork-Id: 151740 Delivered-To: patch@linaro.org Received: by 2002:a2e:299d:0:0:0:0:0 with SMTP id p29-v6csp492033ljp; Thu, 22 Nov 2018 01:17:46 -0800 (PST) X-Google-Smtp-Source: AJdET5fF2XULoLkUYeVtBEIPc3P9zr4aE+WG9n6DAUPG0eGuQTBGKbrfbqnrn70kI7FcLq7oPgjJ X-Received: by 2002:a17:906:1001:: with SMTP id 1-v6mr7474060ejm.91.1542878266188; Thu, 22 Nov 2018 01:17:46 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1542878266; cv=none; d=google.com; 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[90.63.244.31]) by smtp.gmail.com with ESMTPSA id y9sm13856434wrq.55.2018.11.22.01.07.52 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 22 Nov 2018 01:07:52 -0800 (PST) From: Neil Armstrong To: u-boot@lists.denx.de Date: Thu, 22 Nov 2018 10:07:30 +0100 Message-Id: <20181122090740.29739-10-narmstrong@baylibre.com> X-Mailer: git-send-email 2.19.1 In-Reply-To: <20181122090740.29739-1-narmstrong@baylibre.com> References: <20181122090740.29739-1-narmstrong@baylibre.com> MIME-Version: 1.0 Cc: linux-amlogic@lists.infradead.org, trini@konsulko.com Subject: [U-Boot] [PATCH u-boot v2 09/19] pinctrl: meson: select generic pinctrl X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" From: Jerome Brunet Meson pinctrl needs generic pinctrl, rather than depending on it select it Signed-off-by: Jerome Brunet Signed-off-by: Neil Armstrong --- drivers/pinctrl/meson/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/pinctrl/meson/Kconfig b/drivers/pinctrl/meson/Kconfig index 15a8d9c704..fc51b4361a 100644 --- a/drivers/pinctrl/meson/Kconfig +++ b/drivers/pinctrl/meson/Kconfig @@ -1,7 +1,7 @@ if ARCH_MESON config PINCTRL_MESON - depends on PINCTRL_GENERIC + select PINCTRL_GENERIC bool config PINCTRL_MESON_GX_PMX From patchwork Thu Nov 22 09:07:31 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Neil Armstrong X-Patchwork-Id: 151738 Delivered-To: patch@linaro.org Received: by 2002:a2e:299d:0:0:0:0:0 with SMTP id p29-v6csp488185ljp; Thu, 22 Nov 2018 01:13:53 -0800 (PST) X-Google-Smtp-Source: AFSGD/W2Z2vp7DpUxLDlR+tQ4d+HQFueHN4Y+l+d7QZQB2OTx6+dqeJ1xg91v50EGZ0Wq/mIJqQo X-Received: by 2002:a50:8f04:: with SMTP id 4mr8663101edy.95.1542878033894; Thu, 22 Nov 2018 01:13:53 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1542878033; cv=none; d=google.com; s=arc-20160816; b=uEVPGwDCt+xweX1KTzTO1clv1eLhCmTZAgGzaCTKyKFQBSTmY1Yz5RiP97uE6CYE2t sTGOKhCOll/KF4LHIVXvOiXenqnXBc1KRmSV8IVFOezu7nmSH23Y1pZWCLTD2BIhmCOK GJruIFlebEGlxVJiepEAyIVFSF3ACE1CdAn4XbWK4fpdofFyfCtSjBxHAJCLT0MeR9J+ 9FGUB0zcteslunec9WN3oSsJEdfzCKjAhj59Qu55OZzaVXQ+T5Cj1dHFgKeOW/eCCfkX i+gLeKRvuHxNeDZiqiHGowARcRIz3uIELe3NVmXDdEhl5ihoGiR8N8p7aknEfcCZFges JDAA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:content-transfer-encoding:list-subscribe:list-help :list-post:list-archive:list-unsubscribe:list-id:precedence:subject :cc:mime-version:references:in-reply-to:message-id:date:to:from :dkim-signature; bh=UmvOSC48fdHXGxw0J+LV0wlw+BYWP6XdwaOBQbVbpYw=; b=cS8sCvVxdq/sejs0X9DfnuRBmJy0mUVr995pVPHLLgel0ztvySzUdtMwodsYfRG53c 9WWzFguLfGoGuu66EOzidGi4tfftujCsdjguMsOk4Et0+wDG+yhOzkIHe+pGUUAXDG7X Np4v2PY/e26Fo/+c23rcJ22+Vg7f4pBODHmMyEKuheobWUsPA3Q9zTGCqKrMmpK5OkrY cMB+L6hT+FgRSNPSE3fxYT+w/GSJxIpiw/YKOtqh+gCkCevQQ5i0w6SKCvGx5twa5SSJ Z1HxbKd21yUxpQNA6IgweD8DXZAH2FD0PWMmHcvDjuKi8w/+W4wRl3+lxgnu04XLuqYm 3LGQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=neutral (body hash did not verify) header.i=@baylibre-com.20150623.gappssmtp.com header.s=20150623 header.b=AEiTPOuU; spf=pass (google.com: best guess record for domain of u-boot-bounces@lists.denx.de designates 81.169.180.215 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de Return-Path: Received: from lists.denx.de (dione.denx.de. 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[90.63.244.31]) by smtp.gmail.com with ESMTPSA id y9sm13856434wrq.55.2018.11.22.01.07.52 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 22 Nov 2018 01:07:53 -0800 (PST) From: Neil Armstrong To: u-boot@lists.denx.de Date: Thu, 22 Nov 2018 10:07:31 +0100 Message-Id: <20181122090740.29739-11-narmstrong@baylibre.com> X-Mailer: git-send-email 2.19.1 In-Reply-To: <20181122090740.29739-1-narmstrong@baylibre.com> References: <20181122090740.29739-1-narmstrong@baylibre.com> MIME-Version: 1.0 Cc: linux-amlogic@lists.infradead.org, trini@konsulko.com Subject: [U-Boot] [PATCH u-boot v2 10/19] pinctrl: meson: add axg support X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" From: Jerome Brunet This adds support for the Amlogic AXG SoC pinctrl and GPIO controller using a specific set of pinctrl functions which differs from the GX SoCs. Signed-off-by: Jerome Brunet Signed-off-by: Neil Armstrong --- drivers/pinctrl/meson/Kconfig | 8 + drivers/pinctrl/meson/Makefile | 2 + drivers/pinctrl/meson/pinctrl-meson-axg-pmx.c | 125 +++ drivers/pinctrl/meson/pinctrl-meson-axg.c | 979 ++++++++++++++++++ drivers/pinctrl/meson/pinctrl-meson-axg.h | 66 ++ 5 files changed, 1180 insertions(+) create mode 100644 drivers/pinctrl/meson/pinctrl-meson-axg-pmx.c create mode 100644 drivers/pinctrl/meson/pinctrl-meson-axg.c create mode 100644 drivers/pinctrl/meson/pinctrl-meson-axg.h diff --git a/drivers/pinctrl/meson/Kconfig b/drivers/pinctrl/meson/Kconfig index fc51b4361a..ee820a57a0 100644 --- a/drivers/pinctrl/meson/Kconfig +++ b/drivers/pinctrl/meson/Kconfig @@ -8,6 +8,10 @@ config PINCTRL_MESON_GX_PMX select PINCTRL_MESON bool +config PINCTRL_MESON_AXG_PMX + select PINCTRL_MESON + bool + config PINCTRL_MESON_GXBB bool "Amlogic Meson GXBB SoC pinctrl driver" select PINCTRL_MESON_GX_PMX @@ -16,4 +20,8 @@ config PINCTRL_MESON_GXL bool "Amlogic Meson GXL SoC pinctrl driver" select PINCTRL_MESON_GX_PMX +config PINCTRL_MESON_AXG + bool "Amlogic Meson AXG SoC pinctrl driver" + select PINCTRL_MESON_AXG_PMX + endif diff --git a/drivers/pinctrl/meson/Makefile b/drivers/pinctrl/meson/Makefile index 30b6875b88..707287cd1d 100644 --- a/drivers/pinctrl/meson/Makefile +++ b/drivers/pinctrl/meson/Makefile @@ -2,5 +2,7 @@ obj-y += pinctrl-meson.o obj-$(CONFIG_PINCTRL_MESON_GX_PMX) += pinctrl-meson-gx-pmx.o +obj-$(CONFIG_PINCTRL_MESON_AXG_PMX) += pinctrl-meson-axg-pmx.o obj-$(CONFIG_PINCTRL_MESON_GXBB) += pinctrl-meson-gxbb.o obj-$(CONFIG_PINCTRL_MESON_GXL) += pinctrl-meson-gxl.o +obj-$(CONFIG_PINCTRL_MESON_AXG) += pinctrl-meson-axg.o diff --git a/drivers/pinctrl/meson/pinctrl-meson-axg-pmx.c b/drivers/pinctrl/meson/pinctrl-meson-axg-pmx.c new file mode 100644 index 0000000000..c82413d08f --- /dev/null +++ b/drivers/pinctrl/meson/pinctrl-meson-axg-pmx.c @@ -0,0 +1,125 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2018 Jerome Brunet + * Copyright (C) 2017 Xingyu Chen + */ + +#include +#include +#include +#include +#include +#include "pinctrl-meson-axg.h" + +static int meson_axg_pmx_get_bank(struct udevice *dev, unsigned int pin, + struct meson_pmx_bank **bank) +{ + int i; + struct meson_pinctrl *priv = dev_get_priv(dev); + struct meson_axg_pmx_data *pmx = priv->data->pmx_data; + + for (i = 0; i < pmx->num_pmx_banks; i++) + if (pin >= pmx->pmx_banks[i].first && + pin <= pmx->pmx_banks[i].last) { + *bank = &pmx->pmx_banks[i]; + return 0; + } + + return -EINVAL; +} + +static int meson_axg_pmx_calc_reg_and_offset(struct meson_pmx_bank *bank, + unsigned int pin, + unsigned int *reg, + unsigned int *offset) +{ + int shift; + + shift = pin - bank->first; + + *reg = bank->reg + (bank->offset + (shift << 2)) / 32; + *offset = (bank->offset + (shift << 2)) % 32; + + return 0; +} + +static int meson_axg_pmx_update_function(struct udevice *dev, + unsigned int pin, unsigned int func) +{ + struct meson_pinctrl *priv = dev_get_priv(dev); + struct meson_pmx_bank *bank; + unsigned int offset; + unsigned int reg; + unsigned int tmp; + int ret; + + ret = meson_axg_pmx_get_bank(dev, pin, &bank); + if (ret) + return ret; + + meson_axg_pmx_calc_reg_and_offset(bank, pin, ®, &offset); + + tmp = readl(priv->reg_mux + (reg << 2)); + tmp &= ~(0xf << offset); + tmp |= (func & 0xf) << offset; + writel(tmp, priv->reg_mux + (reg << 2)); + + return ret; +} + +static int meson_axg_pinmux_group_set(struct udevice *dev, + unsigned int group_selector, + unsigned int func_selector) +{ + struct meson_pinctrl *priv = dev_get_priv(dev); + const struct meson_pmx_group *group; + const struct meson_pmx_func *func; + struct meson_pmx_axg_data *pmx_data; + int i, ret; + + group = &priv->data->groups[group_selector]; + pmx_data = (struct meson_pmx_axg_data *)group->data; + func = &priv->data->funcs[func_selector]; + + debug("pinmux: set group %s func %s\n", group->name, func->name); + + for (i = 0; i < group->num_pins; i++) { + ret = meson_axg_pmx_update_function(dev, group->pins[i], + pmx_data->func); + if (ret) + return ret; + } + + return 0; +} + +const struct pinctrl_ops meson_axg_pinctrl_ops = { + .get_groups_count = meson_pinctrl_get_groups_count, + .get_group_name = meson_pinctrl_get_group_name, + .get_functions_count = meson_pinmux_get_functions_count, + .get_function_name = meson_pinmux_get_function_name, + .pinmux_group_set = meson_axg_pinmux_group_set, + .set_state = pinctrl_generic_set_state, +}; + +static int meson_axg_gpio_request(struct udevice *dev, + unsigned int offset, const char *label) +{ + return meson_axg_pmx_update_function(dev->parent, offset, 0); +} + +static const struct dm_gpio_ops meson_axg_gpio_ops = { + .request = meson_axg_gpio_request, + .set_value = meson_gpio_set, + .get_value = meson_gpio_get, + .get_function = meson_gpio_get_direction, + .direction_input = meson_gpio_direction_input, + .direction_output = meson_gpio_direction_output, +}; + +const struct driver meson_axg_gpio_driver = { + .name = "meson-axg-gpio", + .id = UCLASS_GPIO, + .probe = meson_gpio_probe, + .ops = &meson_axg_gpio_ops, +}; diff --git a/drivers/pinctrl/meson/pinctrl-meson-axg.c b/drivers/pinctrl/meson/pinctrl-meson-axg.c new file mode 100644 index 0000000000..a54fbce910 --- /dev/null +++ b/drivers/pinctrl/meson/pinctrl-meson-axg.c @@ -0,0 +1,979 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * (C) Copyright (C) 2018 Neil Armstrong + * + * Based on code from Linux kernel: + * Copyright (c) 2017 Amlogic, Inc. All rights reserved. + * Author: Xingyu Chen + */ + +#include +#include +#include +#include + +#include "pinctrl-meson-axg.h" + +#define EE_OFF 14 + +/* emmc */ +static const unsigned int emmc_nand_d0_pins[] = {BOOT_0}; +static const unsigned int emmc_nand_d1_pins[] = {BOOT_1}; +static const unsigned int emmc_nand_d2_pins[] = {BOOT_2}; +static const unsigned int emmc_nand_d3_pins[] = {BOOT_3}; +static const unsigned int emmc_nand_d4_pins[] = {BOOT_4}; +static const unsigned int emmc_nand_d5_pins[] = {BOOT_5}; +static const unsigned int emmc_nand_d6_pins[] = {BOOT_6}; +static const unsigned int emmc_nand_d7_pins[] = {BOOT_7}; + +static const unsigned int emmc_clk_pins[] = {BOOT_8}; +static const unsigned int emmc_cmd_pins[] = {BOOT_10}; +static const unsigned int emmc_ds_pins[] = {BOOT_13}; + +/* nand */ +static const unsigned int nand_ce0_pins[] = {BOOT_8}; +static const unsigned int nand_ale_pins[] = {BOOT_9}; +static const unsigned int nand_cle_pins[] = {BOOT_10}; +static const unsigned int nand_wen_clk_pins[] = {BOOT_11}; +static const unsigned int nand_ren_wr_pins[] = {BOOT_12}; +static const unsigned int nand_rb0_pins[] = {BOOT_13}; + +/* nor */ +static const unsigned int nor_hold_pins[] = {BOOT_3}; +static const unsigned int nor_d_pins[] = {BOOT_4}; +static const unsigned int nor_q_pins[] = {BOOT_5}; +static const unsigned int nor_c_pins[] = {BOOT_6}; +static const unsigned int nor_wp_pins[] = {BOOT_9}; +static const unsigned int nor_cs_pins[] = {BOOT_14}; + +/* sdio */ +static const unsigned int sdio_d0_pins[] = {GPIOX_0}; +static const unsigned int sdio_d1_pins[] = {GPIOX_1}; +static const unsigned int sdio_d2_pins[] = {GPIOX_2}; +static const unsigned int sdio_d3_pins[] = {GPIOX_3}; +static const unsigned int sdio_clk_pins[] = {GPIOX_4}; +static const unsigned int sdio_cmd_pins[] = {GPIOX_5}; + +/* spi0 */ +static const unsigned int spi0_clk_pins[] = {GPIOZ_0}; +static const unsigned int spi0_mosi_pins[] = {GPIOZ_1}; +static const unsigned int spi0_miso_pins[] = {GPIOZ_2}; +static const unsigned int spi0_ss0_pins[] = {GPIOZ_3}; +static const unsigned int spi0_ss1_pins[] = {GPIOZ_4}; +static const unsigned int spi0_ss2_pins[] = {GPIOZ_5}; + +/* spi1 */ +static const unsigned int spi1_clk_x_pins[] = {GPIOX_19}; +static const unsigned int spi1_mosi_x_pins[] = {GPIOX_17}; +static const unsigned int spi1_miso_x_pins[] = {GPIOX_18}; +static const unsigned int spi1_ss0_x_pins[] = {GPIOX_16}; + +static const unsigned int spi1_clk_a_pins[] = {GPIOA_4}; +static const unsigned int spi1_mosi_a_pins[] = {GPIOA_2}; +static const unsigned int spi1_miso_a_pins[] = {GPIOA_3}; +static const unsigned int spi1_ss0_a_pins[] = {GPIOA_5}; +static const unsigned int spi1_ss1_pins[] = {GPIOA_6}; + +/* i2c0 */ +static const unsigned int i2c0_sck_pins[] = {GPIOZ_6}; +static const unsigned int i2c0_sda_pins[] = {GPIOZ_7}; + +/* i2c1 */ +static const unsigned int i2c1_sck_z_pins[] = {GPIOZ_8}; +static const unsigned int i2c1_sda_z_pins[] = {GPIOZ_9}; + +static const unsigned int i2c1_sck_x_pins[] = {GPIOX_16}; +static const unsigned int i2c1_sda_x_pins[] = {GPIOX_17}; + +/* i2c2 */ +static const unsigned int i2c2_sck_x_pins[] = {GPIOX_18}; +static const unsigned int i2c2_sda_x_pins[] = {GPIOX_19}; + +static const unsigned int i2c2_sda_a_pins[] = {GPIOA_17}; +static const unsigned int i2c2_sck_a_pins[] = {GPIOA_18}; + +/* i2c3 */ +static const unsigned int i2c3_sda_a6_pins[] = {GPIOA_6}; +static const unsigned int i2c3_sck_a7_pins[] = {GPIOA_7}; + +static const unsigned int i2c3_sda_a12_pins[] = {GPIOA_12}; +static const unsigned int i2c3_sck_a13_pins[] = {GPIOA_13}; + +static const unsigned int i2c3_sda_a19_pins[] = {GPIOA_19}; +static const unsigned int i2c3_sck_a20_pins[] = {GPIOA_20}; + +/* uart_a */ +static const unsigned int uart_rts_a_pins[] = {GPIOX_11}; +static const unsigned int uart_cts_a_pins[] = {GPIOX_10}; +static const unsigned int uart_tx_a_pins[] = {GPIOX_8}; +static const unsigned int uart_rx_a_pins[] = {GPIOX_9}; + +/* uart_b */ +static const unsigned int uart_rts_b_z_pins[] = {GPIOZ_0}; +static const unsigned int uart_cts_b_z_pins[] = {GPIOZ_1}; +static const unsigned int uart_tx_b_z_pins[] = {GPIOZ_2}; +static const unsigned int uart_rx_b_z_pins[] = {GPIOZ_3}; + +static const unsigned int uart_rts_b_x_pins[] = {GPIOX_18}; +static const unsigned int uart_cts_b_x_pins[] = {GPIOX_19}; +static const unsigned int uart_tx_b_x_pins[] = {GPIOX_16}; +static const unsigned int uart_rx_b_x_pins[] = {GPIOX_17}; + +/* uart_ao_b */ +static const unsigned int uart_ao_tx_b_z_pins[] = {GPIOZ_8}; +static const unsigned int uart_ao_rx_b_z_pins[] = {GPIOZ_9}; +static const unsigned int uart_ao_cts_b_z_pins[] = {GPIOZ_6}; +static const unsigned int uart_ao_rts_b_z_pins[] = {GPIOZ_7}; + +/* pwm_a */ +static const unsigned int pwm_a_z_pins[] = {GPIOZ_5}; + +static const unsigned int pwm_a_x18_pins[] = {GPIOX_18}; +static const unsigned int pwm_a_x20_pins[] = {GPIOX_20}; + +static const unsigned int pwm_a_a_pins[] = {GPIOA_14}; + +/* pwm_b */ +static const unsigned int pwm_b_z_pins[] = {GPIOZ_4}; + +static const unsigned int pwm_b_x_pins[] = {GPIOX_19}; + +static const unsigned int pwm_b_a_pins[] = {GPIOA_15}; + +/* pwm_c */ +static const unsigned int pwm_c_x10_pins[] = {GPIOX_10}; +static const unsigned int pwm_c_x17_pins[] = {GPIOX_17}; + +static const unsigned int pwm_c_a_pins[] = {GPIOA_16}; + +/* pwm_d */ +static const unsigned int pwm_d_x11_pins[] = {GPIOX_11}; +static const unsigned int pwm_d_x16_pins[] = {GPIOX_16}; + +/* pwm_vs */ +static const unsigned int pwm_vs_pins[] = {GPIOA_0}; + +/* spdif_in */ +static const unsigned int spdif_in_z_pins[] = {GPIOZ_4}; + +static const unsigned int spdif_in_a1_pins[] = {GPIOA_1}; +static const unsigned int spdif_in_a7_pins[] = {GPIOA_7}; +static const unsigned int spdif_in_a19_pins[] = {GPIOA_19}; +static const unsigned int spdif_in_a20_pins[] = {GPIOA_20}; + +/* spdif_out */ +static const unsigned int spdif_out_z_pins[] = {GPIOZ_5}; + +static const unsigned int spdif_out_a1_pins[] = {GPIOA_1}; +static const unsigned int spdif_out_a11_pins[] = {GPIOA_11}; +static const unsigned int spdif_out_a19_pins[] = {GPIOA_19}; +static const unsigned int spdif_out_a20_pins[] = {GPIOA_20}; + +/* jtag_ee */ +static const unsigned int jtag_tdo_x_pins[] = {GPIOX_0}; +static const unsigned int jtag_tdi_x_pins[] = {GPIOX_1}; +static const unsigned int jtag_clk_x_pins[] = {GPIOX_4}; +static const unsigned int jtag_tms_x_pins[] = {GPIOX_5}; + +/* eth */ +static const unsigned int eth_txd0_x_pins[] = {GPIOX_8}; +static const unsigned int eth_txd1_x_pins[] = {GPIOX_9}; +static const unsigned int eth_txen_x_pins[] = {GPIOX_10}; +static const unsigned int eth_rgmii_rx_clk_x_pins[] = {GPIOX_12}; +static const unsigned int eth_rxd0_x_pins[] = {GPIOX_13}; +static const unsigned int eth_rxd1_x_pins[] = {GPIOX_14}; +static const unsigned int eth_rx_dv_x_pins[] = {GPIOX_15}; +static const unsigned int eth_mdio_x_pins[] = {GPIOX_21}; +static const unsigned int eth_mdc_x_pins[] = {GPIOX_22}; + +static const unsigned int eth_txd0_y_pins[] = {GPIOY_10}; +static const unsigned int eth_txd1_y_pins[] = {GPIOY_11}; +static const unsigned int eth_txen_y_pins[] = {GPIOY_9}; +static const unsigned int eth_rgmii_rx_clk_y_pins[] = {GPIOY_2}; +static const unsigned int eth_rxd0_y_pins[] = {GPIOY_4}; +static const unsigned int eth_rxd1_y_pins[] = {GPIOY_5}; +static const unsigned int eth_rx_dv_y_pins[] = {GPIOY_3}; +static const unsigned int eth_mdio_y_pins[] = {GPIOY_0}; +static const unsigned int eth_mdc_y_pins[] = {GPIOY_1}; + +static const unsigned int eth_rxd2_rgmii_pins[] = {GPIOY_6}; +static const unsigned int eth_rxd3_rgmii_pins[] = {GPIOY_7}; +static const unsigned int eth_rgmii_tx_clk_pins[] = {GPIOY_8}; +static const unsigned int eth_txd2_rgmii_pins[] = {GPIOY_12}; +static const unsigned int eth_txd3_rgmii_pins[] = {GPIOY_13}; + +/* pdm */ +static const unsigned int pdm_dclk_a14_pins[] = {GPIOA_14}; +static const unsigned int pdm_dclk_a19_pins[] = {GPIOA_19}; +static const unsigned int pdm_din0_pins[] = {GPIOA_15}; +static const unsigned int pdm_din1_pins[] = {GPIOA_16}; +static const unsigned int pdm_din2_pins[] = {GPIOA_17}; +static const unsigned int pdm_din3_pins[] = {GPIOA_18}; + +/* mclk */ +static const unsigned int mclk_c_pins[] = {GPIOA_0}; +static const unsigned int mclk_b_pins[] = {GPIOA_1}; + +/* tdm */ +static const unsigned int tdma_sclk_pins[] = {GPIOX_12}; +static const unsigned int tdma_sclk_slv_pins[] = {GPIOX_12}; +static const unsigned int tdma_fs_pins[] = {GPIOX_13}; +static const unsigned int tdma_fs_slv_pins[] = {GPIOX_13}; +static const unsigned int tdma_din0_pins[] = {GPIOX_14}; +static const unsigned int tdma_dout0_x14_pins[] = {GPIOX_14}; +static const unsigned int tdma_dout0_x15_pins[] = {GPIOX_15}; +static const unsigned int tdma_dout1_pins[] = {GPIOX_15}; +static const unsigned int tdma_din1_pins[] = {GPIOX_15}; + +static const unsigned int tdmc_sclk_pins[] = {GPIOA_2}; +static const unsigned int tdmc_sclk_slv_pins[] = {GPIOA_2}; +static const unsigned int tdmc_fs_pins[] = {GPIOA_3}; +static const unsigned int tdmc_fs_slv_pins[] = {GPIOA_3}; +static const unsigned int tdmc_din0_pins[] = {GPIOA_4}; +static const unsigned int tdmc_dout0_pins[] = {GPIOA_4}; +static const unsigned int tdmc_din1_pins[] = {GPIOA_5}; +static const unsigned int tdmc_dout1_pins[] = {GPIOA_5}; +static const unsigned int tdmc_din2_pins[] = {GPIOA_6}; +static const unsigned int tdmc_dout2_pins[] = {GPIOA_6}; +static const unsigned int tdmc_din3_pins[] = {GPIOA_7}; +static const unsigned int tdmc_dout3_pins[] = {GPIOA_7}; + +static const unsigned int tdmb_sclk_pins[] = {GPIOA_8}; +static const unsigned int tdmb_sclk_slv_pins[] = {GPIOA_8}; +static const unsigned int tdmb_fs_pins[] = {GPIOA_9}; +static const unsigned int tdmb_fs_slv_pins[] = {GPIOA_9}; +static const unsigned int tdmb_din0_pins[] = {GPIOA_10}; +static const unsigned int tdmb_dout0_pins[] = {GPIOA_10}; +static const unsigned int tdmb_din1_pins[] = {GPIOA_11}; +static const unsigned int tdmb_dout1_pins[] = {GPIOA_11}; +static const unsigned int tdmb_din2_pins[] = {GPIOA_12}; +static const unsigned int tdmb_dout2_pins[] = {GPIOA_12}; +static const unsigned int tdmb_din3_pins[] = {GPIOA_13}; +static const unsigned int tdmb_dout3_pins[] = {GPIOA_13}; + +static struct meson_pmx_group meson_axg_periphs_groups[] = { + GPIO_GROUP(GPIOZ_0, EE_OFF), + GPIO_GROUP(GPIOZ_1, EE_OFF), + GPIO_GROUP(GPIOZ_2, EE_OFF), + GPIO_GROUP(GPIOZ_3, EE_OFF), + GPIO_GROUP(GPIOZ_4, EE_OFF), + GPIO_GROUP(GPIOZ_5, EE_OFF), + GPIO_GROUP(GPIOZ_6, EE_OFF), + GPIO_GROUP(GPIOZ_7, EE_OFF), + GPIO_GROUP(GPIOZ_8, EE_OFF), + GPIO_GROUP(GPIOZ_9, EE_OFF), + GPIO_GROUP(GPIOZ_10, EE_OFF), + + GPIO_GROUP(BOOT_0, EE_OFF), + GPIO_GROUP(BOOT_1, EE_OFF), + GPIO_GROUP(BOOT_2, EE_OFF), + GPIO_GROUP(BOOT_3, EE_OFF), + GPIO_GROUP(BOOT_4, EE_OFF), + GPIO_GROUP(BOOT_5, EE_OFF), + GPIO_GROUP(BOOT_6, EE_OFF), + GPIO_GROUP(BOOT_7, EE_OFF), + GPIO_GROUP(BOOT_8, EE_OFF), + GPIO_GROUP(BOOT_9, EE_OFF), + GPIO_GROUP(BOOT_10, EE_OFF), + GPIO_GROUP(BOOT_11, EE_OFF), + GPIO_GROUP(BOOT_12, EE_OFF), + GPIO_GROUP(BOOT_13, EE_OFF), + GPIO_GROUP(BOOT_14, EE_OFF), + + GPIO_GROUP(GPIOA_0, EE_OFF), + GPIO_GROUP(GPIOA_1, EE_OFF), + GPIO_GROUP(GPIOA_2, EE_OFF), + GPIO_GROUP(GPIOA_3, EE_OFF), + GPIO_GROUP(GPIOA_4, EE_OFF), + GPIO_GROUP(GPIOA_5, EE_OFF), + GPIO_GROUP(GPIOA_6, EE_OFF), + GPIO_GROUP(GPIOA_7, EE_OFF), + GPIO_GROUP(GPIOA_8, EE_OFF), + GPIO_GROUP(GPIOA_9, EE_OFF), + GPIO_GROUP(GPIOA_10, EE_OFF), + GPIO_GROUP(GPIOA_11, EE_OFF), + GPIO_GROUP(GPIOA_12, EE_OFF), + GPIO_GROUP(GPIOA_13, EE_OFF), + GPIO_GROUP(GPIOA_14, EE_OFF), + GPIO_GROUP(GPIOA_15, EE_OFF), + GPIO_GROUP(GPIOA_16, EE_OFF), + GPIO_GROUP(GPIOA_17, EE_OFF), + GPIO_GROUP(GPIOA_19, EE_OFF), + GPIO_GROUP(GPIOA_20, EE_OFF), + + GPIO_GROUP(GPIOX_0, EE_OFF), + GPIO_GROUP(GPIOX_1, EE_OFF), + GPIO_GROUP(GPIOX_2, EE_OFF), + GPIO_GROUP(GPIOX_3, EE_OFF), + GPIO_GROUP(GPIOX_4, EE_OFF), + GPIO_GROUP(GPIOX_5, EE_OFF), + GPIO_GROUP(GPIOX_6, EE_OFF), + GPIO_GROUP(GPIOX_7, EE_OFF), + GPIO_GROUP(GPIOX_8, EE_OFF), + GPIO_GROUP(GPIOX_9, EE_OFF), + GPIO_GROUP(GPIOX_10, EE_OFF), + GPIO_GROUP(GPIOX_11, EE_OFF), + GPIO_GROUP(GPIOX_12, EE_OFF), + GPIO_GROUP(GPIOX_13, EE_OFF), + GPIO_GROUP(GPIOX_14, EE_OFF), + GPIO_GROUP(GPIOX_15, EE_OFF), + GPIO_GROUP(GPIOX_16, EE_OFF), + GPIO_GROUP(GPIOX_17, EE_OFF), + GPIO_GROUP(GPIOX_18, EE_OFF), + GPIO_GROUP(GPIOX_19, EE_OFF), + GPIO_GROUP(GPIOX_20, EE_OFF), + GPIO_GROUP(GPIOX_21, EE_OFF), + GPIO_GROUP(GPIOX_22, EE_OFF), + + GPIO_GROUP(GPIOY_0, EE_OFF), + GPIO_GROUP(GPIOY_1, EE_OFF), + GPIO_GROUP(GPIOY_2, EE_OFF), + GPIO_GROUP(GPIOY_3, EE_OFF), + GPIO_GROUP(GPIOY_4, EE_OFF), + GPIO_GROUP(GPIOY_5, EE_OFF), + GPIO_GROUP(GPIOY_6, EE_OFF), + GPIO_GROUP(GPIOY_7, EE_OFF), + GPIO_GROUP(GPIOY_8, EE_OFF), + GPIO_GROUP(GPIOY_9, EE_OFF), + GPIO_GROUP(GPIOY_10, EE_OFF), + GPIO_GROUP(GPIOY_11, EE_OFF), + GPIO_GROUP(GPIOY_12, EE_OFF), + GPIO_GROUP(GPIOY_13, EE_OFF), + GPIO_GROUP(GPIOY_14, EE_OFF), + GPIO_GROUP(GPIOY_15, EE_OFF), + + /* bank BOOT */ + GROUP(emmc_nand_d0, 1), + GROUP(emmc_nand_d1, 1), + GROUP(emmc_nand_d2, 1), + GROUP(emmc_nand_d3, 1), + GROUP(emmc_nand_d4, 1), + GROUP(emmc_nand_d5, 1), + GROUP(emmc_nand_d6, 1), + GROUP(emmc_nand_d7, 1), + GROUP(emmc_clk, 1), + GROUP(emmc_cmd, 1), + GROUP(emmc_ds, 1), + GROUP(nand_ce0, 2), + GROUP(nand_ale, 2), + GROUP(nand_cle, 2), + GROUP(nand_wen_clk, 2), + GROUP(nand_ren_wr, 2), + GROUP(nand_rb0, 2), + GROUP(nor_hold, 3), + GROUP(nor_d, 3), + GROUP(nor_q, 3), + GROUP(nor_c, 3), + GROUP(nor_wp, 3), + GROUP(nor_cs, 3), + + /* bank GPIOZ */ + GROUP(spi0_clk, 1), + GROUP(spi0_mosi, 1), + GROUP(spi0_miso, 1), + GROUP(spi0_ss0, 1), + GROUP(spi0_ss1, 1), + GROUP(spi0_ss2, 1), + GROUP(i2c0_sck, 1), + GROUP(i2c0_sda, 1), + GROUP(i2c1_sck_z, 1), + GROUP(i2c1_sda_z, 1), + GROUP(uart_rts_b_z, 2), + GROUP(uart_cts_b_z, 2), + GROUP(uart_tx_b_z, 2), + GROUP(uart_rx_b_z, 2), + GROUP(pwm_a_z, 2), + GROUP(pwm_b_z, 2), + GROUP(spdif_in_z, 3), + GROUP(spdif_out_z, 3), + GROUP(uart_ao_tx_b_z, 2), + GROUP(uart_ao_rx_b_z, 2), + GROUP(uart_ao_cts_b_z, 2), + GROUP(uart_ao_rts_b_z, 2), + + /* bank GPIOX */ + GROUP(sdio_d0, 1), + GROUP(sdio_d1, 1), + GROUP(sdio_d2, 1), + GROUP(sdio_d3, 1), + GROUP(sdio_clk, 1), + GROUP(sdio_cmd, 1), + GROUP(i2c1_sck_x, 1), + GROUP(i2c1_sda_x, 1), + GROUP(i2c2_sck_x, 1), + GROUP(i2c2_sda_x, 1), + GROUP(uart_rts_a, 1), + GROUP(uart_cts_a, 1), + GROUP(uart_tx_a, 1), + GROUP(uart_rx_a, 1), + GROUP(uart_rts_b_x, 2), + GROUP(uart_cts_b_x, 2), + GROUP(uart_tx_b_x, 2), + GROUP(uart_rx_b_x, 2), + GROUP(jtag_tdo_x, 2), + GROUP(jtag_tdi_x, 2), + GROUP(jtag_clk_x, 2), + GROUP(jtag_tms_x, 2), + GROUP(spi1_clk_x, 4), + GROUP(spi1_mosi_x, 4), + GROUP(spi1_miso_x, 4), + GROUP(spi1_ss0_x, 4), + GROUP(pwm_a_x18, 3), + GROUP(pwm_a_x20, 1), + GROUP(pwm_b_x, 3), + GROUP(pwm_c_x10, 3), + GROUP(pwm_c_x17, 3), + GROUP(pwm_d_x11, 3), + GROUP(pwm_d_x16, 3), + GROUP(eth_txd0_x, 4), + GROUP(eth_txd1_x, 4), + GROUP(eth_txen_x, 4), + GROUP(eth_rgmii_rx_clk_x, 4), + GROUP(eth_rxd0_x, 4), + GROUP(eth_rxd1_x, 4), + GROUP(eth_rx_dv_x, 4), + GROUP(eth_mdio_x, 4), + GROUP(eth_mdc_x, 4), + GROUP(tdma_sclk, 1), + GROUP(tdma_sclk_slv, 2), + GROUP(tdma_fs, 1), + GROUP(tdma_fs_slv, 2), + GROUP(tdma_din0, 1), + GROUP(tdma_dout0_x14, 2), + GROUP(tdma_dout0_x15, 1), + GROUP(tdma_dout1, 2), + GROUP(tdma_din1, 3), + + /* bank GPIOY */ + GROUP(eth_txd0_y, 1), + GROUP(eth_txd1_y, 1), + GROUP(eth_txen_y, 1), + GROUP(eth_rgmii_rx_clk_y, 1), + GROUP(eth_rxd0_y, 1), + GROUP(eth_rxd1_y, 1), + GROUP(eth_rx_dv_y, 1), + GROUP(eth_mdio_y, 1), + GROUP(eth_mdc_y, 1), + GROUP(eth_rxd2_rgmii, 1), + GROUP(eth_rxd3_rgmii, 1), + GROUP(eth_rgmii_tx_clk, 1), + GROUP(eth_txd2_rgmii, 1), + GROUP(eth_txd3_rgmii, 1), + + /* bank GPIOA */ + GROUP(spdif_out_a1, 4), + GROUP(spdif_out_a11, 3), + GROUP(spdif_out_a19, 2), + GROUP(spdif_out_a20, 1), + GROUP(spdif_in_a1, 3), + GROUP(spdif_in_a7, 3), + GROUP(spdif_in_a19, 1), + GROUP(spdif_in_a20, 2), + GROUP(spi1_clk_a, 3), + GROUP(spi1_mosi_a, 3), + GROUP(spi1_miso_a, 3), + GROUP(spi1_ss0_a, 3), + GROUP(spi1_ss1, 3), + GROUP(pwm_a_a, 3), + GROUP(pwm_b_a, 3), + GROUP(pwm_c_a, 3), + GROUP(pwm_vs, 2), + GROUP(i2c2_sda_a, 3), + GROUP(i2c2_sck_a, 3), + GROUP(i2c3_sda_a6, 4), + GROUP(i2c3_sck_a7, 4), + GROUP(i2c3_sda_a12, 4), + GROUP(i2c3_sck_a13, 4), + GROUP(i2c3_sda_a19, 4), + GROUP(i2c3_sck_a20, 4), + GROUP(pdm_dclk_a14, 1), + GROUP(pdm_dclk_a19, 3), + GROUP(pdm_din0, 1), + GROUP(pdm_din1, 1), + GROUP(pdm_din2, 1), + GROUP(pdm_din3, 1), + GROUP(mclk_c, 1), + GROUP(mclk_b, 1), + GROUP(tdmc_sclk, 1), + GROUP(tdmc_sclk_slv, 2), + GROUP(tdmc_fs, 1), + GROUP(tdmc_fs_slv, 2), + GROUP(tdmc_din0, 2), + GROUP(tdmc_dout0, 1), + GROUP(tdmc_din1, 2), + GROUP(tdmc_dout1, 1), + GROUP(tdmc_din2, 2), + GROUP(tdmc_dout2, 1), + GROUP(tdmc_din3, 2), + GROUP(tdmc_dout3, 1), + GROUP(tdmb_sclk, 1), + GROUP(tdmb_sclk_slv, 2), + GROUP(tdmb_fs, 1), + GROUP(tdmb_fs_slv, 2), + GROUP(tdmb_din0, 2), + GROUP(tdmb_dout0, 1), + GROUP(tdmb_din1, 2), + GROUP(tdmb_dout1, 1), + GROUP(tdmb_din2, 2), + GROUP(tdmb_dout2, 1), + GROUP(tdmb_din3, 2), + GROUP(tdmb_dout3, 1), +}; + +/* uart_ao_a */ +static const unsigned int uart_ao_tx_a_pins[] = {GPIOAO_0}; +static const unsigned int uart_ao_rx_a_pins[] = {GPIOAO_1}; +static const unsigned int uart_ao_cts_a_pins[] = {GPIOAO_2}; +static const unsigned int uart_ao_rts_a_pins[] = {GPIOAO_3}; + +/* uart_ao_b */ +static const unsigned int uart_ao_tx_b_pins[] = {GPIOAO_4}; +static const unsigned int uart_ao_rx_b_pins[] = {GPIOAO_5}; +static const unsigned int uart_ao_cts_b_pins[] = {GPIOAO_2}; +static const unsigned int uart_ao_rts_b_pins[] = {GPIOAO_3}; + +/* i2c_ao */ +static const unsigned int i2c_ao_sck_4_pins[] = {GPIOAO_4}; +static const unsigned int i2c_ao_sda_5_pins[] = {GPIOAO_5}; +static const unsigned int i2c_ao_sck_8_pins[] = {GPIOAO_8}; +static const unsigned int i2c_ao_sda_9_pins[] = {GPIOAO_9}; +static const unsigned int i2c_ao_sck_10_pins[] = {GPIOAO_10}; +static const unsigned int i2c_ao_sda_11_pins[] = {GPIOAO_11}; + +/* i2c_ao_slave */ +static const unsigned int i2c_ao_slave_sck_pins[] = {GPIOAO_10}; +static const unsigned int i2c_ao_slave_sda_pins[] = {GPIOAO_11}; + +/* ir_in */ +static const unsigned int remote_input_ao_pins[] = {GPIOAO_6}; + +/* ir_out */ +static const unsigned int remote_out_ao_pins[] = {GPIOAO_7}; + +/* pwm_ao_a */ +static const unsigned int pwm_ao_a_pins[] = {GPIOAO_3}; + +/* pwm_ao_b */ +static const unsigned int pwm_ao_b_ao2_pins[] = {GPIOAO_2}; +static const unsigned int pwm_ao_b_ao12_pins[] = {GPIOAO_12}; + +/* pwm_ao_c */ +static const unsigned int pwm_ao_c_ao8_pins[] = {GPIOAO_8}; +static const unsigned int pwm_ao_c_ao13_pins[] = {GPIOAO_13}; + +/* pwm_ao_d */ +static const unsigned int pwm_ao_d_pins[] = {GPIOAO_9}; + +/* jtag_ao */ +static const unsigned int jtag_ao_tdi_pins[] = {GPIOAO_3}; +static const unsigned int jtag_ao_tdo_pins[] = {GPIOAO_4}; +static const unsigned int jtag_ao_clk_pins[] = {GPIOAO_5}; +static const unsigned int jtag_ao_tms_pins[] = {GPIOAO_7}; + +static struct meson_pmx_group meson_axg_aobus_groups[] = { + GPIO_GROUP(GPIOAO_0, 0), + GPIO_GROUP(GPIOAO_1, 0), + GPIO_GROUP(GPIOAO_2, 0), + GPIO_GROUP(GPIOAO_3, 0), + GPIO_GROUP(GPIOAO_4, 0), + GPIO_GROUP(GPIOAO_5, 0), + GPIO_GROUP(GPIOAO_6, 0), + GPIO_GROUP(GPIOAO_7, 0), + GPIO_GROUP(GPIOAO_8, 0), + GPIO_GROUP(GPIOAO_9, 0), + GPIO_GROUP(GPIOAO_10, 0), + GPIO_GROUP(GPIOAO_11, 0), + GPIO_GROUP(GPIOAO_12, 0), + GPIO_GROUP(GPIOAO_13, 0), + GPIO_GROUP(GPIO_TEST_N, 0), + + /* bank AO */ + GROUP(uart_ao_tx_a, 1), + GROUP(uart_ao_rx_a, 1), + GROUP(uart_ao_cts_a, 2), + GROUP(uart_ao_rts_a, 2), + GROUP(uart_ao_tx_b, 1), + GROUP(uart_ao_rx_b, 1), + GROUP(uart_ao_cts_b, 1), + GROUP(uart_ao_rts_b, 1), + GROUP(i2c_ao_sck_4, 2), + GROUP(i2c_ao_sda_5, 2), + GROUP(i2c_ao_sck_8, 2), + GROUP(i2c_ao_sda_9, 2), + GROUP(i2c_ao_sck_10, 2), + GROUP(i2c_ao_sda_11, 2), + GROUP(i2c_ao_slave_sck, 1), + GROUP(i2c_ao_slave_sda, 1), + GROUP(remote_input_ao, 1), + GROUP(remote_out_ao, 1), + GROUP(pwm_ao_a, 3), + GROUP(pwm_ao_b_ao2, 3), + GROUP(pwm_ao_b_ao12, 3), + GROUP(pwm_ao_c_ao8, 3), + GROUP(pwm_ao_c_ao13, 3), + GROUP(pwm_ao_d, 3), + GROUP(jtag_ao_tdi, 4), + GROUP(jtag_ao_tdo, 4), + GROUP(jtag_ao_clk, 4), + GROUP(jtag_ao_tms, 4), +}; + +static const char * const gpio_periphs_groups[] = { + "GPIOZ_0", "GPIOZ_1", "GPIOZ_2", "GPIOZ_3", "GPIOZ_4", + "GPIOZ_5", "GPIOZ_6", "GPIOZ_7", "GPIOZ_8", "GPIOZ_9", + "GPIOZ_10", + + "BOOT_0", "BOOT_1", "BOOT_2", "BOOT_3", "BOOT_4", + "BOOT_5", "BOOT_6", "BOOT_7", "BOOT_8", "BOOT_9", + "BOOT_10", "BOOT_11", "BOOT_12", "BOOT_13", "BOOT_14", + + "GPIOA_0", "GPIOA_1", "GPIOA_2", "GPIOA_3", "GPIOA_4", + "GPIOA_5", "GPIOA_6", "GPIOA_7", "GPIOA_8", "GPIOA_9", + "GPIOA_10", "GPIOA_11", "GPIOA_12", "GPIOA_13", "GPIOA_14", + "GPIOA_15", "GPIOA_16", "GPIOA_17", "GPIOA_18", "GPIOA_19", + "GPIOA_20", + + "GPIOX_0", "GPIOX_1", "GPIOX_2", "GPIOX_3", "GPIOX_4", + "GPIOX_5", "GPIOX_6", "GPIOX_7", "GPIOX_8", "GPIOX_9", + "GPIOX_10", "GPIOX_11", "GPIOX_12", "GPIOX_13", "GPIOX_14", + "GPIOX_15", "GPIOX_16", "GPIOX_17", "GPIOX_18", "GPIOX_19", + "GPIOX_20", "GPIOX_21", "GPIOX_22", + + "GPIOY_0", "GPIOY_1", "GPIOY_2", "GPIOY_3", "GPIOY_4", + "GPIOY_5", "GPIOY_6", "GPIOY_7", "GPIOY_8", "GPIOY_9", + "GPIOY_10", "GPIOY_11", "GPIOY_12", "GPIOY_13", "GPIOY_14", + "GPIOY_15", +}; + +static const char * const emmc_groups[] = { + "emmc_nand_d0", "emmc_nand_d1", "emmc_nand_d2", + "emmc_nand_d3", "emmc_nand_d4", "emmc_nand_d5", + "emmc_nand_d6", "emmc_nand_d7", + "emmc_clk", "emmc_cmd", "emmc_ds", +}; + +static const char * const nand_groups[] = { + "emmc_nand_d0", "emmc_nand_d1", "emmc_nand_d2", + "emmc_nand_d3", "emmc_nand_d4", "emmc_nand_d5", + "emmc_nand_d6", "emmc_nand_d7", + "nand_ce0", "nand_ale", "nand_cle", + "nand_wen_clk", "nand_ren_wr", "nand_rb0", +}; + +static const char * const nor_groups[] = { + "nor_d", "nor_q", "nor_c", "nor_cs", + "nor_hold", "nor_wp", +}; + +static const char * const sdio_groups[] = { + "sdio_d0", "sdio_d1", "sdio_d2", "sdio_d3", + "sdio_cmd", "sdio_clk", +}; + +static const char * const spi0_groups[] = { + "spi0_clk", "spi0_mosi", "spi0_miso", "spi0_ss0", + "spi0_ss1", "spi0_ss2" +}; + +static const char * const spi1_groups[] = { + "spi1_clk_x", "spi1_mosi_x", "spi1_miso_x", "spi1_ss0_x", + "spi1_clk_a", "spi1_mosi_a", "spi1_miso_a", "spi1_ss0_a", + "spi1_ss1" +}; + +static const char * const uart_a_groups[] = { + "uart_tx_a", "uart_rx_a", "uart_cts_a", "uart_rts_a", +}; + +static const char * const uart_b_groups[] = { + "uart_tx_b_z", "uart_rx_b_z", "uart_cts_b_z", "uart_rts_b_z", + "uart_tx_b_x", "uart_rx_b_x", "uart_cts_b_x", "uart_rts_b_x", +}; + +static const char * const uart_ao_b_z_groups[] = { + "uart_ao_tx_b_z", "uart_ao_rx_b_z", + "uart_ao_cts_b_z", "uart_ao_rts_b_z", +}; + +static const char * const i2c0_groups[] = { + "i2c0_sck", "i2c0_sda", +}; + +static const char * const i2c1_groups[] = { + "i2c1_sck_z", "i2c1_sda_z", + "i2c1_sck_x", "i2c1_sda_x", +}; + +static const char * const i2c2_groups[] = { + "i2c2_sck_x", "i2c2_sda_x", + "i2c2_sda_a", "i2c2_sck_a", +}; + +static const char * const i2c3_groups[] = { + "i2c3_sda_a6", "i2c3_sck_a7", + "i2c3_sda_a12", "i2c3_sck_a13", + "i2c3_sda_a19", "i2c3_sck_a20", +}; + +static const char * const eth_groups[] = { + "eth_rxd2_rgmii", "eth_rxd3_rgmii", "eth_rgmii_tx_clk", + "eth_txd2_rgmii", "eth_txd3_rgmii", + "eth_txd0_x", "eth_txd1_x", "eth_txen_x", "eth_rgmii_rx_clk_x", + "eth_rxd0_x", "eth_rxd1_x", "eth_rx_dv_x", "eth_mdio_x", + "eth_mdc_x", + "eth_txd0_y", "eth_txd1_y", "eth_txen_y", "eth_rgmii_rx_clk_y", + "eth_rxd0_y", "eth_rxd1_y", "eth_rx_dv_y", "eth_mdio_y", + "eth_mdc_y", +}; + +static const char * const pwm_a_groups[] = { + "pwm_a_z", "pwm_a_x18", "pwm_a_x20", "pwm_a_a", +}; + +static const char * const pwm_b_groups[] = { + "pwm_b_z", "pwm_b_x", "pwm_b_a", +}; + +static const char * const pwm_c_groups[] = { + "pwm_c_x10", "pwm_c_x17", "pwm_c_a", +}; + +static const char * const pwm_d_groups[] = { + "pwm_d_x11", "pwm_d_x16", +}; + +static const char * const pwm_vs_groups[] = { + "pwm_vs", +}; + +static const char * const spdif_out_groups[] = { + "spdif_out_z", "spdif_out_a1", "spdif_out_a11", + "spdif_out_a19", "spdif_out_a20", +}; + +static const char * const spdif_in_groups[] = { + "spdif_in_z", "spdif_in_a1", "spdif_in_a7", + "spdif_in_a19", "spdif_in_a20", +}; + +static const char * const jtag_ee_groups[] = { + "jtag_tdo_x", "jtag_tdi_x", "jtag_clk_x", + "jtag_tms_x", +}; + +static const char * const pdm_groups[] = { + "pdm_din0", "pdm_din1", "pdm_din2", "pdm_din3", + "pdm_dclk_a14", "pdm_dclk_a19", +}; + +static const char * const gpio_aobus_groups[] = { + "GPIOAO_0", "GPIOAO_1", "GPIOAO_2", "GPIOAO_3", "GPIOAO_4", + "GPIOAO_5", "GPIOAO_6", "GPIOAO_7", "GPIOAO_8", "GPIOAO_9", + "GPIOAO_10", "GPIOAO_11", "GPIOAO_12", "GPIOAO_13", + "GPIO_TEST_N", +}; + +static const char * const uart_ao_a_groups[] = { + "uart_ao_tx_a", "uart_ao_rx_a", "uart_ao_cts_a", "uart_ao_rts_a", +}; + +static const char * const uart_ao_b_groups[] = { + "uart_ao_tx_b", "uart_ao_rx_b", "uart_ao_cts_b", "uart_ao_rts_b", +}; + +static const char * const i2c_ao_groups[] = { + "i2c_ao_sck_4", "i2c_ao_sda_5", + "i2c_ao_sck_8", "i2c_ao_sda_9", + "i2c_ao_sck_10", "i2c_ao_sda_11", +}; + +static const char * const i2c_ao_slave_groups[] = { + "i2c_ao_slave_sck", "i2c_ao_slave_sda", +}; + +static const char * const remote_input_ao_groups[] = { + "remote_input_ao", +}; + +static const char * const remote_out_ao_groups[] = { + "remote_out_ao", +}; + +static const char * const pwm_ao_a_groups[] = { + "pwm_ao_a", +}; + +static const char * const pwm_ao_b_groups[] = { + "pwm_ao_b_ao2", "pwm_ao_b_ao12", +}; + +static const char * const pwm_ao_c_groups[] = { + "pwm_ao_c_ao8", "pwm_ao_c_ao13", +}; + +static const char * const pwm_ao_d_groups[] = { + "pwm_ao_d", +}; + +static const char * const jtag_ao_groups[] = { + "jtag_ao_tdi", "jtag_ao_tdo", "jtag_ao_clk", "jtag_ao_tms", +}; + +static const char * const mclk_c_groups[] = { + "mclk_c", +}; + +static const char * const mclk_b_groups[] = { + "mclk_b", +}; + +static const char * const tdma_groups[] = { + "tdma_sclk", "tdma_sclk_slv", "tdma_fs", "tdma_fs_slv", + "tdma_din0", "tdma_dout0_x14", "tdma_dout0_x15", "tdma_dout1", + "tdma_din1", +}; + +static const char * const tdmc_groups[] = { + "tdmc_sclk", "tdmc_sclk_slv", "tdmc_fs", "tdmc_fs_slv", + "tdmc_din0", "tdmc_dout0", "tdmc_din1", "tdmc_dout1", + "tdmc_din2", "tdmc_dout2", "tdmc_din3", "tdmc_dout3", +}; + +static const char * const tdmb_groups[] = { + "tdmb_sclk", "tdmb_sclk_slv", "tdmb_fs", "tdmb_fs_slv", + "tdmb_din0", "tdmb_dout0", "tdmb_din1", "tdmb_dout1", + "tdmb_din2", "tdmb_dout2", "tdmb_din3", "tdmb_dout3", +}; + +static struct meson_pmx_func meson_axg_periphs_functions[] = { + FUNCTION(gpio_periphs), + FUNCTION(emmc), + FUNCTION(nor), + FUNCTION(spi0), + FUNCTION(spi1), + FUNCTION(sdio), + FUNCTION(nand), + FUNCTION(uart_a), + FUNCTION(uart_b), + FUNCTION(uart_ao_b_z), + FUNCTION(i2c0), + FUNCTION(i2c1), + FUNCTION(i2c2), + FUNCTION(i2c3), + FUNCTION(eth), + FUNCTION(pwm_a), + FUNCTION(pwm_b), + FUNCTION(pwm_c), + FUNCTION(pwm_d), + FUNCTION(pwm_vs), + FUNCTION(spdif_out), + FUNCTION(spdif_in), + FUNCTION(jtag_ee), + FUNCTION(pdm), + FUNCTION(mclk_b), + FUNCTION(mclk_c), + FUNCTION(tdma), + FUNCTION(tdmb), + FUNCTION(tdmc), +}; + +static struct meson_pmx_func meson_axg_aobus_functions[] = { + FUNCTION(gpio_aobus), + FUNCTION(uart_ao_a), + FUNCTION(uart_ao_b), + FUNCTION(i2c_ao), + FUNCTION(i2c_ao_slave), + FUNCTION(remote_input_ao), + FUNCTION(remote_out_ao), + FUNCTION(pwm_ao_a), + FUNCTION(pwm_ao_b), + FUNCTION(pwm_ao_c), + FUNCTION(pwm_ao_d), + FUNCTION(jtag_ao), +}; + +static struct meson_bank meson_axg_periphs_banks[] = { + /* name first last pullen pull dir out in */ + BANK("Z", GPIOZ_0, GPIOZ_10, 3, 0, 3, 0, 9, 0, 10, 0, 11, 0), + BANK("BOOT", BOOT_0, BOOT_14, 4, 0, 4, 0, 12, 0, 13, 0, 14, 0), + BANK("A", GPIOA_0, GPIOA_20, 0, 0, 0, 0, 0, 0, 1, 0, 2, 0), + BANK("X", GPIOX_0, GPIOX_22, 2, 0, 2, 0, 6, 0, 7, 0, 8, 0), + BANK("Y", GPIOY_0, GPIOY_15, 1, 0, 1, 0, 3, 0, 4, 0, 5, 0), +}; + +static struct meson_bank meson_axg_aobus_banks[] = { + /* name first last pullen pull dir out in */ + BANK("AO", GPIOAO_0, GPIOAO_13, 0, 16, 0, 0, 0, 0, 0, 16, 1, 0), +}; + +static struct meson_pmx_bank meson_axg_periphs_pmx_banks[] = { + /* name first lask reg offset */ + BANK_PMX("Z", GPIOZ_0, GPIOZ_10, 0x2, 0), + BANK_PMX("BOOT", BOOT_0, BOOT_14, 0x0, 0), + BANK_PMX("A", GPIOA_0, GPIOA_20, 0xb, 0), + BANK_PMX("X", GPIOX_0, GPIOX_22, 0x4, 0), + BANK_PMX("Y", GPIOY_0, GPIOY_15, 0x8, 0), +}; + +static struct meson_axg_pmx_data meson_axg_periphs_pmx_banks_data = { + .pmx_banks = meson_axg_periphs_pmx_banks, + .num_pmx_banks = ARRAY_SIZE(meson_axg_periphs_pmx_banks), +}; + +static struct meson_pmx_bank meson_axg_aobus_pmx_banks[] = { + BANK_PMX("AO", GPIOAO_0, GPIOAO_13, 0x0, 0), +}; + +static struct meson_axg_pmx_data meson_axg_aobus_pmx_banks_data = { + .pmx_banks = meson_axg_aobus_pmx_banks, + .num_pmx_banks = ARRAY_SIZE(meson_axg_aobus_pmx_banks), +}; + +struct meson_pinctrl_data meson_axg_periphs_pinctrl_data = { + .name = "periphs-banks", + .pin_base = 11, + .groups = meson_axg_periphs_groups, + .funcs = meson_axg_periphs_functions, + .banks = meson_axg_periphs_banks, + .num_pins = 100, + .num_groups = ARRAY_SIZE(meson_axg_periphs_groups), + .num_funcs = ARRAY_SIZE(meson_axg_periphs_functions), + .num_banks = ARRAY_SIZE(meson_axg_periphs_banks), + .gpio_driver = &meson_axg_gpio_driver, + .pmx_data = &meson_axg_periphs_pmx_banks_data, +}; + +struct meson_pinctrl_data meson_axg_aobus_pinctrl_data = { + .name = "aobus-banks", + .pin_base = 0, + .groups = meson_axg_aobus_groups, + .funcs = meson_axg_aobus_functions, + .banks = meson_axg_aobus_banks, + .num_pins = 14, + .num_groups = ARRAY_SIZE(meson_axg_aobus_groups), + .num_funcs = ARRAY_SIZE(meson_axg_aobus_functions), + .num_banks = ARRAY_SIZE(meson_axg_aobus_banks), + .gpio_driver = &meson_axg_gpio_driver, + .pmx_data = &meson_axg_aobus_pmx_banks_data, +}; + +static const struct udevice_id meson_axg_pinctrl_match[] = { + { + .compatible = "amlogic,meson-axg-periphs-pinctrl", + .data = (ulong)&meson_axg_periphs_pinctrl_data, + }, + { + .compatible = "amlogic,meson-axg-aobus-pinctrl", + .data = (ulong)&meson_axg_aobus_pinctrl_data, + }, + { /* sentinel */ } +}; + +U_BOOT_DRIVER(meson_axg_pinctrl) = { + .name = "meson-axg-pinctrl", + .id = UCLASS_PINCTRL, + .of_match = of_match_ptr(meson_axg_pinctrl_match), + .probe = meson_pinctrl_probe, + .priv_auto_alloc_size = sizeof(struct meson_pinctrl), + .ops = &meson_axg_pinctrl_ops, +}; diff --git a/drivers/pinctrl/meson/pinctrl-meson-axg.h b/drivers/pinctrl/meson/pinctrl-meson-axg.h new file mode 100644 index 0000000000..c8d2b3af03 --- /dev/null +++ b/drivers/pinctrl/meson/pinctrl-meson-axg.h @@ -0,0 +1,66 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright (C) 2017 Jerome Brunet + * Copyright (C) 2017 Xingyu Chen + */ + +#ifndef __PINCTRL_MESON_AXG_H__ +#define __PINCTRL_MESON_AXG_H__ + +#include "pinctrl-meson.h" + +struct meson_pmx_bank { + const char *name; + unsigned int first; + unsigned int last; + unsigned int reg; + unsigned int offset; +}; + +struct meson_axg_pmx_data { + struct meson_pmx_bank *pmx_banks; + unsigned int num_pmx_banks; +}; + +#define BANK_PMX(n, f, l, r, o) \ + { \ + .name = n, \ + .first = f, \ + .last = l, \ + .reg = r, \ + .offset = o, \ + } + +struct meson_pmx_axg_data { + unsigned int func; +}; + +#define PMX_DATA(f) \ + { \ + .func = f, \ + } + +#define GROUP(grp, f) \ + { \ + .name = #grp, \ + .pins = grp ## _pins, \ + .num_pins = ARRAY_SIZE(grp ## _pins), \ + .data = (const struct meson_pmx_axg_data[]){ \ + PMX_DATA(f), \ + }, \ + } + +#define GPIO_GROUP(gpio, b) \ + { \ + .name = #gpio, \ + .pins = (const unsigned int[]){ PIN(gpio, b) }, \ + .num_pins = 1, \ + .data = (const struct meson_pmx_axg_data[]){ \ + PMX_DATA(0), \ + }, \ + } + +extern const struct pinctrl_ops meson_axg_pinctrl_ops; +extern const struct driver meson_axg_gpio_driver; + +#endif /* __PINCTRL_MESON_AXG_H__ */ From patchwork Thu Nov 22 09:07:33 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Neil Armstrong X-Patchwork-Id: 151741 Delivered-To: patch@linaro.org Received: by 2002:a2e:299d:0:0:0:0:0 with SMTP id p29-v6csp493366ljp; Thu, 22 Nov 2018 01:19:16 -0800 (PST) X-Google-Smtp-Source: AFSGD/XjtjwA7+cp/u6M6yGeio/zDvvze7HYmK1VCskeE6W1pVG0mrFl4fZOXkGlMZX74KiKOjY0 X-Received: by 2002:a50:a399:: with SMTP id s25mr8953513edb.1.1542878356263; Thu, 22 Nov 2018 01:19:16 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1542878356; cv=none; d=google.com; s=arc-20160816; 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[90.63.244.31]) by smtp.gmail.com with ESMTPSA id y9sm13856434wrq.55.2018.11.22.01.07.54 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 22 Nov 2018 01:07:55 -0800 (PST) From: Neil Armstrong To: u-boot@lists.denx.de Date: Thu, 22 Nov 2018 10:07:33 +0100 Message-Id: <20181122090740.29739-13-narmstrong@baylibre.com> X-Mailer: git-send-email 2.19.1 In-Reply-To: <20181122090740.29739-1-narmstrong@baylibre.com> References: <20181122090740.29739-1-narmstrong@baylibre.com> MIME-Version: 1.0 Cc: linux-amlogic@lists.infradead.org, trini@konsulko.com Subject: [U-Boot] [PATCH u-boot v2 12/19] clk: meson: silence debug print X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" From: Jerome Brunet This debug print was not designed to be active in non-debug mode. Signed-off-by: Jerome Brunet Signed-off-by: Neil Armstrong --- drivers/clk/clk_meson.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/clk/clk_meson.c b/drivers/clk/clk_meson.c index a096a3582c..f34f376057 100644 --- a/drivers/clk/clk_meson.c +++ b/drivers/clk/clk_meson.c @@ -791,7 +791,7 @@ static ulong meson_clk_get_rate_by_id(struct clk *clk, unsigned long id) return -ENOENT; } - printf("clock %lu has rate %lu\n", id, rate); + debug("clock %lu has rate %lu\n", id, rate); return rate; } From patchwork Thu Nov 22 09:07:34 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Neil Armstrong X-Patchwork-Id: 151742 Delivered-To: patch@linaro.org Received: by 2002:aa7:da0f:0:0:0:0:0 with SMTP id r15csp530560eds; Thu, 22 Nov 2018 01:21:51 -0800 (PST) X-Google-Smtp-Source: AJdET5cwRMr6/HgCNqaRz6+dfEK4MfTUwcc2D9bC16nzwNmhmundhC6yBgRL98x/0Wzfi2SsBRCm X-Received: by 2002:a17:906:c5a:: with SMTP id t26-v6mr7651823ejf.140.1542878511860; Thu, 22 Nov 2018 01:21:51 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1542878511; cv=none; d=google.com; s=arc-20160816; b=QJlEz0ImOKqzCj1613bN8XA3CieSb+BmDxl54tvbKNJVanUGk/zhgiBRRWjXX764Cv KzIvKFPivro4BGJ4bqhuuMEAdCfg5Et1s5TmNTfpLcLKnxUeb2wyoovlq+FRPrFmY7BF pYPQKkFkE9i1PQTLGcMXdRbcPVsmbvhZBJFgFQQsN52QNRX5rHb7oxLnCCf8GXltOavf IaOOLr0pqsqDER1vDNGTlBzlBIwa0ZgRZZOLXGibEYJWH3QNJtBoEU0q30NGBsH0IPD2 pn3CDotns43a7M7KF5wf4TRSXh/2kFwBxN8w/5i70435fvF1pLezo/YMHEEHhhJDwx+b wFgw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:content-transfer-encoding:list-subscribe:list-help :list-post:list-archive:list-unsubscribe:list-id:precedence:subject :cc:mime-version:references:in-reply-to:message-id:date:to:from :dkim-signature; bh=Oud1YoMx0OmHoXZvq/Bngi4Ldl72ee0HeV/0WAfbk84=; b=c24YdJuT+ZJghDRL/75aAFqYYSQer16oEJvgN0A0v97p3HGNX74F9qXooE0f+WYJts par0KP1EQzda48StyTpbpn05ISBZUAErUW3aAO4j4X54lGyswO0pfP8eiB0PfhwnVlPL DI1DDmknloBYqK8MkljktHNjkr1KbIXLsvj1Xrva9kvCkLLAASpqUBg5tVTheN4clDfP bVJcxEhICjK2wv31hZ0Qt41nxsmVzLLvfUUw95rndARnxniac6KPbwbaiI/O8gbPIabb DS/F/1O6oKPyBS3DWBhFfpqO4eqg6IRY5G2ESLBjOEU/5YsyjxXdwOzHcRANooEnKpOS p2og== ARC-Authentication-Results: i=1; mx.google.com; dkim=neutral (body hash did not verify) header.i=@baylibre-com.20150623.gappssmtp.com header.s=20150623 header.b=kgZVjRoo; spf=pass (google.com: best guess record for domain of u-boot-bounces@lists.denx.de designates 81.169.180.215 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de Return-Path: Received: from lists.denx.de (dione.denx.de. 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[90.63.244.31]) by smtp.gmail.com with ESMTPSA id y9sm13856434wrq.55.2018.11.22.01.07.55 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 22 Nov 2018 01:07:56 -0800 (PST) From: Neil Armstrong To: u-boot@lists.denx.de Date: Thu, 22 Nov 2018 10:07:34 +0100 Message-Id: <20181122090740.29739-14-narmstrong@baylibre.com> X-Mailer: git-send-email 2.19.1 In-Reply-To: <20181122090740.29739-1-narmstrong@baylibre.com> References: <20181122090740.29739-1-narmstrong@baylibre.com> MIME-Version: 1.0 Cc: linux-amlogic@lists.infradead.org, trini@konsulko.com Subject: [U-Boot] [PATCH u-boot v2 13/19] ARM: meson: rework soc arch file to prepare for new SoC X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" From: Jerome Brunet We are about to add support for the Amlogic AXG SoC. While very close to the Gx SoC family, we will need to handle a few thing which are different in this SoC. Rework the meson arch directory to prepare for this. Signed-off-by: Jerome Brunet Signed-off-by: Neil Armstrong --- .../asm/arch-meson/{clock.h => clock-gx.h} | 4 +- arch/arm/include/asm/arch-meson/eth.h | 6 +- arch/arm/include/asm/arch-meson/mem.h | 3 +- arch/arm/mach-meson/Kconfig | 10 +- arch/arm/mach-meson/Makefile | 3 +- arch/arm/mach-meson/board-common.c | 55 +++++++++ arch/arm/mach-meson/{board.c => board-gx.c} | 106 +++++++++--------- arch/arm/mach-meson/eth.c | 53 --------- arch/arm/mach-meson/sm.c | 1 - board/amlogic/odroid-c2/odroid-c2.c | 6 +- board/amlogic/p212/p212.c | 6 +- board/amlogic/q200/q200.c | 4 +- drivers/clk/clk_meson.c | 2 +- 13 files changed, 134 insertions(+), 125 deletions(-) rename arch/arm/include/asm/arch-meson/{clock.h => clock-gx.h} (98%) create mode 100644 arch/arm/mach-meson/board-common.c rename arch/arm/mach-meson/{board.c => board-gx.c} (61%) delete mode 100644 arch/arm/mach-meson/eth.c diff --git a/arch/arm/include/asm/arch-meson/clock.h b/arch/arm/include/asm/arch-meson/clock-gx.h similarity index 98% rename from arch/arm/include/asm/arch-meson/clock.h rename to arch/arm/include/asm/arch-meson/clock-gx.h index c0ff00fc9a..13a2e7688f 100644 --- a/arch/arm/include/asm/arch-meson/clock.h +++ b/arch/arm/include/asm/arch-meson/clock-gx.h @@ -3,8 +3,8 @@ * Copyright 2016 - AmLogic, Inc. * Copyright 2018 - Beniamino Galvani */ -#ifndef _ARCH_MESON_CLOCK_H_ -#define _ARCH_MESON_CLOCK_H_ +#ifndef _ARCH_MESON_CLOCK_GX_H_ +#define _ARCH_MESON_CLOCK_GX_H_ /* * Clock controller register offsets diff --git a/arch/arm/include/asm/arch-meson/eth.h b/arch/arm/include/asm/arch-meson/eth.h index 1aa0872d53..08acc5cbf7 100644 --- a/arch/arm/include/asm/arch-meson/eth.h +++ b/arch/arm/include/asm/arch-meson/eth.h @@ -10,13 +10,13 @@ #include enum { - /* Use GXL Internal RMII PHY */ - MESON_GXL_USE_INTERNAL_RMII_PHY = 1, + /* Use Internal RMII PHY */ + MESON_USE_INTERNAL_RMII_PHY = 1, }; /* Configure the Ethernet MAC with the requested interface mode * with some optional flags. */ -void meson_gx_eth_init(phy_interface_t mode, unsigned int flags); +void meson_eth_init(phy_interface_t mode, unsigned int flags); #endif /* __MESON_ETH_H__ */ diff --git a/arch/arm/include/asm/arch-meson/mem.h b/arch/arm/include/asm/arch-meson/mem.h index 62818335d9..a65100aeb7 100644 --- a/arch/arm/include/asm/arch-meson/mem.h +++ b/arch/arm/include/asm/arch-meson/mem.h @@ -10,6 +10,7 @@ /* Configure the reserved memory zones exported by the secure registers * into EFI and DTB reserved memory entries. */ -void meson_gx_init_reserved_memory(void *fdt); +void meson_board_add_reserved_memory(void *fdt, u64 start, u64 size); +void meson_init_reserved_memory(void *fdt); #endif /* __MESON_MEM_H__ */ diff --git a/arch/arm/mach-meson/Kconfig b/arch/arm/mach-meson/Kconfig index 6f60167c8c..6225417a56 100644 --- a/arch/arm/mach-meson/Kconfig +++ b/arch/arm/mach-meson/Kconfig @@ -8,25 +8,29 @@ config MESON64_COMMON select DM_SERIAL imply CMD_DM +config MESON_GX + bool + select MESON64_COMMON + choice prompt "Platform select" default MESON_GXBB config MESON_GXBB bool "GXBB" - select MESON64_COMMON + select MESON_GX help Select this if your SoC is an S905 config MESON_GXL bool "GXL" - select MESON64_COMMON + select MESON_GX help Select this if your SoC is an S905X/D or S805X config MESON_GXM bool "GXM" - select MESON64_COMMON + select MESON_GX help Select this if your SoC is an S912 diff --git a/arch/arm/mach-meson/Makefile b/arch/arm/mach-meson/Makefile index 8ad9b3e575..78345b47f2 100644 --- a/arch/arm/mach-meson/Makefile +++ b/arch/arm/mach-meson/Makefile @@ -2,4 +2,5 @@ # # Copyright (c) 2016 Beniamino Galvani -obj-y += board.o sm.o eth.o +obj-y += board-common.o sm.o +obj-$(CONFIG_MESON_GX) += board-gx.o diff --git a/arch/arm/mach-meson/board-common.c b/arch/arm/mach-meson/board-common.c new file mode 100644 index 0000000000..6340445053 --- /dev/null +++ b/arch/arm/mach-meson/board-common.c @@ -0,0 +1,55 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * (C) Copyright 2016 Beniamino Galvani + */ + +#include +#include +#include +#include +#include +#include +#include +#include + +DECLARE_GLOBAL_DATA_PTR; + +int dram_init(void) +{ + const fdt64_t *val; + int offset; + int len; + + offset = fdt_path_offset(gd->fdt_blob, "/memory"); + if (offset < 0) + return -EINVAL; + + val = fdt_getprop(gd->fdt_blob, offset, "reg", &len); + if (len < sizeof(*val) * 2) + return -EINVAL; + + /* Use unaligned access since cache is still disabled */ + gd->ram_size = get_unaligned_be64(&val[1]); + + return 0; +} + +void meson_board_add_reserved_memory(void *fdt, u64 start, u64 size) +{ + int ret; + + ret = fdt_add_mem_rsv(fdt, start, size); + if (ret) + printf("Could not reserve zone @ 0x%llx\n", start); + + if (IS_ENABLED(CONFIG_EFI_LOADER)) { + efi_add_memory_map(start, + ALIGN(size, EFI_PAGE_SIZE) >> EFI_PAGE_SHIFT, + EFI_RESERVED_MEMORY_TYPE, false); + } +} + +void reset_cpu(ulong addr) +{ + psci_system_reset(); +} diff --git a/arch/arm/mach-meson/board.c b/arch/arm/mach-meson/board-gx.c similarity index 61% rename from arch/arm/mach-meson/board.c rename to arch/arm/mach-meson/board-gx.c index d6c6253152..f1397f87c5 100644 --- a/arch/arm/mach-meson/board.c +++ b/arch/arm/mach-meson/board-gx.c @@ -1,64 +1,24 @@ // SPDX-License-Identifier: GPL-2.0+ /* * (C) Copyright 2016 Beniamino Galvani + * (C) Copyright 2018 Neil Armstrong */ #include -#include -#include +#include #include -#include +#include +#include #include -#include #include -#include -#include +#include DECLARE_GLOBAL_DATA_PTR; -int dram_init(void) -{ - const fdt64_t *val; - int offset; - int len; - - offset = fdt_path_offset(gd->fdt_blob, "/memory"); - if (offset < 0) - return -EINVAL; - - val = fdt_getprop(gd->fdt_blob, offset, "reg", &len); - if (len < sizeof(*val) * 2) - return -EINVAL; - - /* Use unaligned access since cache is still disabled */ - gd->ram_size = get_unaligned_be64(&val[1]); - - return 0; -} - -phys_size_t get_effective_memsize(void) -{ - /* Size is reported in MiB, convert it in bytes */ - return ((readl(GX_AO_SEC_GP_CFG0) & GX_AO_MEM_SIZE_MASK) - >> GX_AO_MEM_SIZE_SHIFT) * SZ_1M; -} - -static void meson_board_add_reserved_memory(void *fdt, u64 start, u64 size) -{ - int ret; - - ret = fdt_add_mem_rsv(fdt, start, size); - if (ret) - printf("Could not reserve zone @ 0x%llx\n", start); - - if (IS_ENABLED(CONFIG_EFI_LOADER)) { - efi_add_memory_map(start, - ALIGN(size, EFI_PAGE_SIZE) >> EFI_PAGE_SHIFT, - EFI_RESERVED_MEMORY_TYPE, false); - } -} - -void meson_gx_init_reserved_memory(void *fdt) +/* Configure the reserved memory zones exported by the secure registers + * into EFI and DTB reserved memory entries. + */ +void meson_init_reserved_memory(void *fdt) { u64 bl31_size, bl31_start; u64 bl32_size, bl32_start; @@ -70,7 +30,6 @@ void meson_gx_init_reserved_memory(void *fdt) * - AO_SEC_GP_CFG5: bl31 physical start address, can be NULL * - AO_SEC_GP_CFG4: bl32 physical start address, can be NULL */ - reg = readl(GX_AO_SEC_GP_CFG3); bl31_size = ((reg & GX_AO_BL31_RSVMEM_SIZE_MASK) @@ -102,9 +61,11 @@ void meson_gx_init_reserved_memory(void *fdt) meson_board_add_reserved_memory(fdt, bl32_start, bl32_size); } -void reset_cpu(ulong addr) +phys_size_t get_effective_memsize(void) { - psci_system_reset(); + /* Size is reported in MiB, convert it in bytes */ + return ((readl(GX_AO_SEC_GP_CFG0) & GX_AO_MEM_SIZE_MASK) + >> GX_AO_MEM_SIZE_SHIFT) * SZ_1M; } static struct mm_region gx_mem_map[] = { @@ -128,3 +89,44 @@ static struct mm_region gx_mem_map[] = { }; struct mm_region *mem_map = gx_mem_map; + +/* Configure the Ethernet MAC with the requested interface mode + * with some optional flags. + */ +void meson_eth_init(phy_interface_t mode, unsigned int flags) +{ + switch (mode) { + case PHY_INTERFACE_MODE_RGMII: + case PHY_INTERFACE_MODE_RGMII_ID: + case PHY_INTERFACE_MODE_RGMII_RXID: + case PHY_INTERFACE_MODE_RGMII_TXID: + /* Set RGMII mode */ + setbits_le32(GX_ETH_REG_0, GX_ETH_REG_0_PHY_INTF | + GX_ETH_REG_0_TX_PHASE(1) | + GX_ETH_REG_0_TX_RATIO(4) | + GX_ETH_REG_0_PHY_CLK_EN | + GX_ETH_REG_0_CLK_EN); + break; + + case PHY_INTERFACE_MODE_RMII: + /* Set RMII mode */ + out_le32(GX_ETH_REG_0, GX_ETH_REG_0_INVERT_RMII_CLK | + GX_ETH_REG_0_CLK_EN); + + /* Use GXL RMII Internal PHY */ + if (IS_ENABLED(CONFIG_MESON_GXL) && + (flags & MESON_USE_INTERNAL_RMII_PHY)) { + writel(0x10110181, GX_ETH_REG_2); + writel(0xe40908ff, GX_ETH_REG_3); + } + + break; + + default: + printf("Invalid Ethernet interface mode\n"); + return; + } + + /* Enable power gate */ + clrbits_le32(GX_MEM_PD_REG_0, GX_MEM_PD_REG_0_ETH_MASK); +} diff --git a/arch/arm/mach-meson/eth.c b/arch/arm/mach-meson/eth.c deleted file mode 100644 index 8b28bc8531..0000000000 --- a/arch/arm/mach-meson/eth.c +++ /dev/null @@ -1,53 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * Copyright (C) 2016 BayLibre, SAS - * Author: Neil Armstrong - */ - -#include -#include -#include -#include -#include -#include - -/* Configure the Ethernet MAC with the requested interface mode - * with some optional flags. - */ -void meson_gx_eth_init(phy_interface_t mode, unsigned int flags) -{ - switch (mode) { - case PHY_INTERFACE_MODE_RGMII: - case PHY_INTERFACE_MODE_RGMII_ID: - case PHY_INTERFACE_MODE_RGMII_RXID: - case PHY_INTERFACE_MODE_RGMII_TXID: - /* Set RGMII mode */ - setbits_le32(GX_ETH_REG_0, GX_ETH_REG_0_PHY_INTF | - GX_ETH_REG_0_TX_PHASE(1) | - GX_ETH_REG_0_TX_RATIO(4) | - GX_ETH_REG_0_PHY_CLK_EN | - GX_ETH_REG_0_CLK_EN); - break; - - case PHY_INTERFACE_MODE_RMII: - /* Set RMII mode */ - out_le32(GX_ETH_REG_0, GX_ETH_REG_0_INVERT_RMII_CLK | - GX_ETH_REG_0_CLK_EN); - - /* Use GXL RMII Internal PHY */ - if (IS_ENABLED(CONFIG_MESON_GXL) && - (flags & MESON_GXL_USE_INTERNAL_RMII_PHY)) { - writel(0x10110181, GX_ETH_REG_2); - writel(0xe40908ff, GX_ETH_REG_3); - } - - break; - - default: - printf("Invalid Ethernet interface mode\n"); - return; - } - - /* Enable power gate */ - clrbits_le32(GX_MEM_PD_REG_0, GX_MEM_PD_REG_0_ETH_MASK); -} diff --git a/arch/arm/mach-meson/sm.c b/arch/arm/mach-meson/sm.c index 0bba5e4a07..a07b46895d 100644 --- a/arch/arm/mach-meson/sm.c +++ b/arch/arm/mach-meson/sm.c @@ -6,7 +6,6 @@ */ #include -#include #include #define FN_GET_SHARE_MEM_INPUT_BASE 0x82000020 diff --git a/board/amlogic/odroid-c2/odroid-c2.c b/board/amlogic/odroid-c2/odroid-c2.c index 2a2755c387..d784d6bd09 100644 --- a/board/amlogic/odroid-c2/odroid-c2.c +++ b/board/amlogic/odroid-c2/odroid-c2.c @@ -28,7 +28,7 @@ int misc_init_r(void) char serial[EFUSE_SN_SIZE]; ssize_t len; - meson_gx_eth_init(PHY_INTERFACE_MODE_RGMII, 0); + meson_eth_init(PHY_INTERFACE_MODE_RGMII, 0); if (!eth_env_get_enetaddr("ethaddr", mac_addr)) { len = meson_sm_read_efuse(EFUSE_MAC_OFFSET, @@ -40,7 +40,7 @@ int misc_init_r(void) if (!env_get("serial#")) { len = meson_sm_read_efuse(EFUSE_SN_OFFSET, serial, EFUSE_SN_SIZE); - if (len == EFUSE_SN_SIZE) + if (len == EFUSE_SN_SIZE) env_set("serial#", serial); } @@ -49,7 +49,7 @@ int misc_init_r(void) int ft_board_setup(void *blob, bd_t *bd) { - meson_gx_init_reserved_memory(blob); + meson_init_reserved_memory(blob); return 0; } diff --git a/board/amlogic/p212/p212.c b/board/amlogic/p212/p212.c index 00e07d77ad..33992a2279 100644 --- a/board/amlogic/p212/p212.c +++ b/board/amlogic/p212/p212.c @@ -29,8 +29,8 @@ int misc_init_r(void) char serial[EFUSE_SN_SIZE]; ssize_t len; - meson_gx_eth_init(PHY_INTERFACE_MODE_RMII, - MESON_GXL_USE_INTERNAL_RMII_PHY); + meson_eth_init(PHY_INTERFACE_MODE_RMII, + MESON_USE_INTERNAL_RMII_PHY); if (!eth_env_get_enetaddr("ethaddr", mac_addr)) { len = meson_sm_read_efuse(EFUSE_MAC_OFFSET, @@ -51,7 +51,7 @@ int misc_init_r(void) int ft_board_setup(void *blob, bd_t *bd) { - meson_gx_init_reserved_memory(blob); + meson_init_reserved_memory(blob); return 0; } diff --git a/board/amlogic/q200/q200.c b/board/amlogic/q200/q200.c index ff56569f17..b59c11bd35 100644 --- a/board/amlogic/q200/q200.c +++ b/board/amlogic/q200/q200.c @@ -29,7 +29,7 @@ int misc_init_r(void) char serial[EFUSE_SN_SIZE]; ssize_t len; - meson_gx_eth_init(PHY_INTERFACE_MODE_RGMII, 0); + meson_eth_init(PHY_INTERFACE_MODE_RGMII, 0); /* Reset PHY on GPIOZ_14 */ clrbits_le32(GX_GPIO_EN(3), BIT(14)); @@ -56,7 +56,7 @@ int misc_init_r(void) int ft_board_setup(void *blob, bd_t *bd) { - meson_gx_init_reserved_memory(blob); + meson_init_reserved_memory(blob); return 0; } diff --git a/drivers/clk/clk_meson.c b/drivers/clk/clk_meson.c index f34f376057..0df8b91d42 100644 --- a/drivers/clk/clk_meson.c +++ b/drivers/clk/clk_meson.c @@ -6,7 +6,7 @@ */ #include -#include +#include #include #include #include From patchwork Thu Nov 22 09:07:39 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Neil Armstrong X-Patchwork-Id: 151743 Delivered-To: patch@linaro.org Received: by 2002:aa7:da0f:0:0:0:0:0 with SMTP id r15csp531435eds; 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[90.63.244.31]) by smtp.gmail.com with ESMTPSA id y9sm13856434wrq.55.2018.11.22.01.08.01 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 22 Nov 2018 01:08:02 -0800 (PST) From: Neil Armstrong To: u-boot@lists.denx.de Date: Thu, 22 Nov 2018 10:07:39 +0100 Message-Id: <20181122090740.29739-19-narmstrong@baylibre.com> X-Mailer: git-send-email 2.19.1 In-Reply-To: <20181122090740.29739-1-narmstrong@baylibre.com> References: <20181122090740.29739-1-narmstrong@baylibre.com> MIME-Version: 1.0 Cc: linux-amlogic@lists.infradead.org, trini@konsulko.com Subject: [U-Boot] [PATCH u-boot v2 18/19] ARM: meson: factorize common code out amlogic's boards X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" From: Jerome Brunet Now we have moved all the Amlogic board support to common generic board code, we can move the identical board_init() and ft_board_setup() functions to weak functions into the board-common mach-meson file. Signed-off-by: Jerome Brunet Signed-off-by: Neil Armstrong --- arch/arm/mach-meson/board-common.c | 17 +++++++++++++++++ board/amlogic/odroid-c2/odroid-c2.c | 12 ------------ board/amlogic/p212/p212.c | 12 ------------ board/amlogic/q200/q200.c | 12 ------------ board/amlogic/s400/s400.c | 12 ------------ 5 files changed, 17 insertions(+), 48 deletions(-) diff --git a/arch/arm/mach-meson/board-common.c b/arch/arm/mach-meson/board-common.c index 6340445053..8c4f3074fb 100644 --- a/arch/arm/mach-meson/board-common.c +++ b/arch/arm/mach-meson/board-common.c @@ -14,6 +14,11 @@ DECLARE_GLOBAL_DATA_PTR; +__weak int board_init(void) +{ + return 0; +} + int dram_init(void) { const fdt64_t *val; @@ -34,6 +39,18 @@ int dram_init(void) return 0; } +__weak int meson_ft_board_setup(void *blob, bd_t *bd) +{ + return 0; +} + +int ft_board_setup(void *blob, bd_t *bd) +{ + meson_init_reserved_memory(blob); + + return meson_ft_board_setup(blob, bd); +} + void meson_board_add_reserved_memory(void *fdt, u64 start, u64 size) { int ret; diff --git a/board/amlogic/odroid-c2/odroid-c2.c b/board/amlogic/odroid-c2/odroid-c2.c index d784d6bd09..62f0f4c871 100644 --- a/board/amlogic/odroid-c2/odroid-c2.c +++ b/board/amlogic/odroid-c2/odroid-c2.c @@ -17,11 +17,6 @@ #define EFUSE_MAC_OFFSET 52 #define EFUSE_MAC_SIZE 6 -int board_init(void) -{ - return 0; -} - int misc_init_r(void) { u8 mac_addr[EFUSE_MAC_SIZE]; @@ -46,10 +41,3 @@ int misc_init_r(void) return 0; } - -int ft_board_setup(void *blob, bd_t *bd) -{ - meson_init_reserved_memory(blob); - - return 0; -} diff --git a/board/amlogic/p212/p212.c b/board/amlogic/p212/p212.c index 33992a2279..546c4d9c86 100644 --- a/board/amlogic/p212/p212.c +++ b/board/amlogic/p212/p212.c @@ -18,11 +18,6 @@ #define EFUSE_MAC_OFFSET 52 #define EFUSE_MAC_SIZE 6 -int board_init(void) -{ - return 0; -} - int misc_init_r(void) { u8 mac_addr[EFUSE_MAC_SIZE]; @@ -48,10 +43,3 @@ int misc_init_r(void) return 0; } - -int ft_board_setup(void *blob, bd_t *bd) -{ - meson_init_reserved_memory(blob); - - return 0; -} diff --git a/board/amlogic/q200/q200.c b/board/amlogic/q200/q200.c index b59c11bd35..6db1b26e08 100644 --- a/board/amlogic/q200/q200.c +++ b/board/amlogic/q200/q200.c @@ -18,11 +18,6 @@ #define EFUSE_MAC_OFFSET 52 #define EFUSE_MAC_SIZE 6 -int board_init(void) -{ - return 0; -} - int misc_init_r(void) { u8 mac_addr[EFUSE_MAC_SIZE]; @@ -53,10 +48,3 @@ int misc_init_r(void) return 0; } - -int ft_board_setup(void *blob, bd_t *bd) -{ - meson_init_reserved_memory(blob); - - return 0; -} diff --git a/board/amlogic/s400/s400.c b/board/amlogic/s400/s400.c index c2b50f6c17..02a0e9286c 100644 --- a/board/amlogic/s400/s400.c +++ b/board/amlogic/s400/s400.c @@ -13,21 +13,9 @@ #include #include -int board_init(void) -{ - return 0; -} - int misc_init_r(void) { meson_eth_init(PHY_INTERFACE_MODE_RGMII, 0); return 0; } - -int ft_board_setup(void *blob, bd_t *bd) -{ - meson_init_reserved_memory(blob); - - return 0; -}