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Initialize ret to 0 to avoid this. Fixes: 9678f3361afc ("usb: dwc3: xilinx: Skip resets and USB3 register settings for USB2.0 mode") Signed-off-by: Robert Hancock --- drivers/usb/dwc3/dwc3-xilinx.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/usb/dwc3/dwc3-xilinx.c b/drivers/usb/dwc3/dwc3-xilinx.c index e14ac15e24c3..a6f3a9b38789 100644 --- a/drivers/usb/dwc3/dwc3-xilinx.c +++ b/drivers/usb/dwc3/dwc3-xilinx.c @@ -99,7 +99,7 @@ static int dwc3_xlnx_init_zynqmp(struct dwc3_xlnx *priv_data) struct device *dev = priv_data->dev; struct reset_control *crst, *hibrst, *apbrst; struct phy *usb3_phy; - int ret; + int ret = 0; u32 reg; usb3_phy = devm_phy_optional_get(dev, "usb3-phy"); From patchwork Wed Jan 26 23:40:16 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Robert Hancock X-Patchwork-Id: 537545 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id E9E67C4332F for ; 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Signed-off-by: Robert Hancock --- Documentation/devicetree/bindings/usb/dwc3-xilinx.yaml | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/Documentation/devicetree/bindings/usb/dwc3-xilinx.yaml b/Documentation/devicetree/bindings/usb/dwc3-xilinx.yaml index f77c16e203d5..823ce731e95f 100644 --- a/Documentation/devicetree/bindings/usb/dwc3-xilinx.yaml +++ b/Documentation/devicetree/bindings/usb/dwc3-xilinx.yaml @@ -59,6 +59,10 @@ properties: - const: usb_hibrst - const: usb_apbrst + reset-gpios: + description: Optional GPIO connected to ULPI PHY reset line. + maxItems: 1 + phys: minItems: 1 maxItems: 2 From patchwork Wed Jan 26 23:40:17 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Robert Hancock X-Patchwork-Id: 537068 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 56C4FC433F5 for ; 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Wed, 26 Jan 2022 23:40:34 +0000 Received: from YT3PR01MB6274.CANPRD01.PROD.OUTLOOK.COM ([fe80::6929:c39f:d893:b6c8]) by YT3PR01MB6274.CANPRD01.PROD.OUTLOOK.COM ([fe80::6929:c39f:d893:b6c8%2]) with mapi id 15.20.4888.020; Wed, 26 Jan 2022 23:40:34 +0000 From: Robert Hancock To: linux-usb@vger.kernel.org Cc: balbi@kernel.org, gregkh@linuxfoundation.org, michal.simek@xilinx.com, manish.narani@xilinx.com, sean.anderson@seco.com, robh+dt@kernel.org, devicetree@vger.kernel.org, piyush.mehta@xilinx.com, Robert Hancock Subject: [PATCH v8 3/3] usb: dwc3: xilinx: Add ULPI PHY reset handling Date: Wed, 26 Jan 2022 17:40:17 -0600 Message-Id: <20220126234017.3619108-4-robert.hancock@calian.com> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20220126234017.3619108-1-robert.hancock@calian.com> References: <20220126234017.3619108-1-robert.hancock@calian.com> X-ClientProxiedBy: CH2PR14CA0023.namprd14.prod.outlook.com (2603:10b6:610:60::33) To YT3PR01MB6274.CANPRD01.PROD.OUTLOOK.COM (2603:10b6:b01:6a::19) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 1a82da99-06e4-4c21-149b-08d9e1253f1c X-MS-TrafficTypeDiagnostic: YQXPR0101MB0853:EE_ X-Microsoft-Antispam-PRVS: X-MS-Oob-TLC-OOBClassifiers: OLM:7219; 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This is typically already done by the first-stage boot loader, however it can be more robust to ensure this reset is done prior to loading the driver in Linux. Based on a patch "usb: dwc3: xilinx: Add gpio-reset support" in the Xilinx kernel tree by Piyush Mehta . Signed-off-by: Robert Hancock --- drivers/usb/dwc3/dwc3-xilinx.c | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) diff --git a/drivers/usb/dwc3/dwc3-xilinx.c b/drivers/usb/dwc3/dwc3-xilinx.c index a6f3a9b38789..1ee6011ada44 100644 --- a/drivers/usb/dwc3/dwc3-xilinx.c +++ b/drivers/usb/dwc3/dwc3-xilinx.c @@ -11,6 +11,7 @@ #include #include #include +#include #include #include #include @@ -101,6 +102,7 @@ static int dwc3_xlnx_init_zynqmp(struct dwc3_xlnx *priv_data) struct phy *usb3_phy; int ret = 0; u32 reg; + struct gpio_desc *reset_gpio; usb3_phy = devm_phy_optional_get(dev, "usb3-phy"); if (IS_ERR(usb3_phy)) { @@ -110,6 +112,14 @@ static int dwc3_xlnx_init_zynqmp(struct dwc3_xlnx *priv_data) goto err; } + reset_gpio = devm_gpiod_get_optional(dev, "reset", GPIOD_OUT_HIGH); + if (IS_ERR(reset_gpio)) { + ret = PTR_ERR(reset_gpio); + dev_err_probe(dev, ret, + "Failed to get reset gpio\n"); + goto err; + } + /* * The following core resets are not required unless a USB3 PHY * is used, and the subsequent register settings are not required @@ -201,6 +211,15 @@ static int dwc3_xlnx_init_zynqmp(struct dwc3_xlnx *priv_data) } skip_usb3_phy: + /* ulpi reset via gpio-modepin or gpio-framework driver */ + if (reset_gpio) { + /* Toggle ulpi to reset the phy. */ + gpiod_set_value(reset_gpio, 0); + usleep_range(5000, 10000); /* delay */ + gpiod_set_value(reset_gpio, 1); + usleep_range(5000, 10000); /* delay */ + } + /* * This routes the USB DMA traffic to go through FPD path instead * of reaching DDR directly. This traffic routing is needed to