From patchwork Tue Jan 25 19:42:16 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Florian Fainelli X-Patchwork-Id: 536661 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4DCBBC433EF for ; Tue, 25 Jan 2022 19:42:56 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230437AbiAYTmz (ORCPT ); Tue, 25 Jan 2022 14:42:55 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:53752 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230323AbiAYTmc (ORCPT ); Tue, 25 Jan 2022 14:42:32 -0500 Received: from mail-pg1-x52c.google.com (mail-pg1-x52c.google.com [IPv6:2607:f8b0:4864:20::52c]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id ABD41C061744; Tue, 25 Jan 2022 11:42:31 -0800 (PST) Received: by mail-pg1-x52c.google.com with SMTP id h23so19087425pgk.11; Tue, 25 Jan 2022 11:42:31 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=USylQJa0mmjFoWzFG1F23zqiuVgJzl9csCdHBPEVti0=; b=AGsZXhsZqaGaQ/7FfzfFQUPt6190AFi34+2oo7FWEiCMfJ2dQkry8b3ebO/HWyzyNf yYas0Sed2vJ+1rQP2DqXcs6KubmlR4O0GXIVJf3o2fPJj7yDT9F2iwSoYDW5IG/Fj8J3 tNEOu1paHg+IET7AvKjyRKtos9b76YKbsebnuuAAgIBDfb109oWWczMCOqkdYelDnnPB 3K4B28+IxTI06FiuaWO6YdGz7ivVR+kDSRGRbF3P8+83U/CIHMvbosmTjX1H/YhliCCL w/fvkcvugYjyH1GCNJ4P6rx38buOnjg74p+1VBcItyaVdhkk7WtdZ1g8Jt4NmbcfkpCJ BjwA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=USylQJa0mmjFoWzFG1F23zqiuVgJzl9csCdHBPEVti0=; b=bHwGpgY4W8bmlZYMKb1RVp6IStnihApKSe8EUkW/Sv5Ql92/TEZ7TPpdolcbnI76/x 1iDt/9+net/rcx8xwiGe4qG7BvmpUKmISn/LAVLZyj3s8aBqgQ1sMcq653CGMzbkqd9/ mg6wtBKHEFTEfYeiGChr/DkHPOPreznUSKCr44/DhROW6AqhiHHfc19yblP9W7Z8Gtu2 cplhga5GIHLAtcfRkUHo/mLnZyh2Y07ioekr6JBhT21ICWuVz07tLTFCyskzaBZxjx/E Ig8drkfQPSE2bzhSnZO6ZdLr7wXATbqvDAutsWzJYm8wTBaFhUEwNfcj5eMq9Vz4YTq8 rLxg== X-Gm-Message-State: AOAM530kQ223nF8jtZH0UVhRZyrB0bPLTASKFacaRpVAOWk5+JMHpWEe zDPLzEoxF6Fp3azTpHf63BzwRI9WHJc= X-Google-Smtp-Source: ABdhPJxU7m+A1cnKQNKtl0hRt9J5+wU269A0iWMlPMN/4VtZ1CkP/A9+w2NkAkb813oA5xnFXwgTbw== X-Received: by 2002:a63:5009:: with SMTP id e9mr13207593pgb.9.1643139750867; Tue, 25 Jan 2022 11:42:30 -0800 (PST) Received: from 7YHHR73.igp.broadcom.net (ip72-194-116-95.oc.oc.cox.net. [72.194.116.95]) by smtp.gmail.com with ESMTPSA id a1sm15087343pgm.83.2022.01.25.11.42.29 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 25 Jan 2022 11:42:30 -0800 (PST) From: Florian Fainelli To: stable@vger.kernel.org Cc: Stefan Wahren , Nicolas Saenz Julienne , Linus Walleij , Florian Fainelli , Rob Herring , Mark Rutland , Ray Jui , Scott Branden , bcm-kernel-feedback-list@broadcom.com (maintainer:BROADCOM BCM281XX/BCM11XXX/BCM216XX ARM ARCHITE...), Eric Anholt , Stefan Wahren , Nicolas Saenz Julienne , Phil Elwell , devicetree@vger.kernel.org (open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS), linux-kernel@vger.kernel.org (open list), linux-gpio@vger.kernel.org (open list:PIN CONTROL SUBSYSTEM), linux-rpi-kernel@lists.infradead.org (moderated list:BROADCOM BCM2711/BCM2835 ARM ARCHITECTURE), linux-arm-kernel@lists.infradead.org (moderated list:BROADCOM BCM2711/BCM2835 ARM ARCHITECTURE) Subject: [PATCH stable 5.4 1/7] pinctrl: bcm2835: Drop unused define Date: Tue, 25 Jan 2022 11:42:16 -0800 Message-Id: <20220125194222.12783-2-f.fainelli@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220125194222.12783-1-f.fainelli@gmail.com> References: <20220125194222.12783-1-f.fainelli@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org From: Stefan Wahren commit be30d5de0a5a52c6ee2cc453a51301037ab94aa upstream There is no usage for this define, so drop it. Signed-off-by: Stefan Wahren Link: https://lore.kernel.org/r/1580148908-4863-2-git-send-email-stefan.wahren@i2se.com Reviewed-by: Nicolas Saenz Julienne Signed-off-by: Linus Walleij Signed-off-by: Florian Fainelli --- drivers/pinctrl/bcm/pinctrl-bcm2835.c | 3 --- 1 file changed, 3 deletions(-) diff --git a/drivers/pinctrl/bcm/pinctrl-bcm2835.c b/drivers/pinctrl/bcm/pinctrl-bcm2835.c index 0de1a3a96984..3fc26389a573 100644 --- a/drivers/pinctrl/bcm/pinctrl-bcm2835.c +++ b/drivers/pinctrl/bcm/pinctrl-bcm2835.c @@ -40,9 +40,6 @@ #define BCM2835_NUM_BANKS 2 #define BCM2835_NUM_IRQS 3 -#define BCM2835_PIN_BITMAP_SZ \ - DIV_ROUND_UP(BCM2835_NUM_GPIOS, sizeof(unsigned long) * 8) - /* GPIO register offsets */ #define GPFSEL0 0x0 /* Function Select */ #define GPSET0 0x1c /* Pin Output Set */ From patchwork Tue Jan 25 19:42:17 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Florian Fainelli X-Patchwork-Id: 536660 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id E94EAC4167B for ; Tue, 25 Jan 2022 19:42:57 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230443AbiAYTm4 (ORCPT ); Tue, 25 Jan 2022 14:42:56 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:53760 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230325AbiAYTmd (ORCPT ); Tue, 25 Jan 2022 14:42:33 -0500 Received: from mail-pf1-x436.google.com (mail-pf1-x436.google.com [IPv6:2607:f8b0:4864:20::436]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 76225C06173B; Tue, 25 Jan 2022 11:42:33 -0800 (PST) Received: by mail-pf1-x436.google.com with SMTP id e28so16270476pfj.5; Tue, 25 Jan 2022 11:42:33 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=W2puOskk/Ji58wUW2ugwQLrVah690CBvN78hET2BpvA=; b=a8kFwxgCXgWpD3vGaYCER36Z1JEw+CeMm3Bsx+Sof03sENhaGKDUdsl/PQKv9HP9Ei pAR/i+zvJzuZwdb7G99pd4vNgP9rPgmAFEaIt5x/Q9+i8Cqye3ET5Gn9z8mnGFGta15m ln02Xnmcmjd4t7gXE6B7h854wR8B0T5L/i/SA5YQml3g1B2dhxzVY/1LSj/AJwaPA1tR Sn88oP++F/DuAl9SuRtBqAUxexFSSJud6mymeOmnfi5noV+h///FezG0mrMf7AnYgZKK 8tF7gjCmlhjReUpcTmDA/rZwrQxQMGq5su/L715LT/7UdPzZZKgNTwhMMItG0658COUp CSUA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=W2puOskk/Ji58wUW2ugwQLrVah690CBvN78hET2BpvA=; b=Y+w803Ob9qZ2r6QIU5stMaM5w+BhLTvTM4VZ2od/HJAqydkIqReGaDd39RkFnn9hyC OO9cFYfL5MQHMsdLKM9pIEaEtuGEdhmMk9J2y1ZAXPlQfvG3CiiQdyQaoZzx4/s3MpIi ezoM/lSt3SqG3TLHoAQCXDpOJATzeNkpDJPvL/2i4Y9IcQg6Nu9uAd3eKWMyAbUnHKSb OHFJuSvmIKxRjE2JzBrTy7xSo9CnWIX80WdOawnXgHgvEhbe4oJtB9hYUBLVcsyb/UDZ usrUfxxDFjFmAeirvvbj5nMr2vE0dt9I5gwz6df3ucPsihLebcM4MjY0emuRJMXTUOyS EmCQ== X-Gm-Message-State: AOAM530o7upbEmvFk0WnYqEi5hTuL3o5fmql2U5pIjGYHqtKDK5ZO7s7 Z4LxtROsqjh6Ikhy5IKUMMhvKk1MPM4= X-Google-Smtp-Source: ABdhPJxuCccb995G/sYt3VUqX2rKr6UW4V5q7BJAN4GRBs7NmSNWNwG5GmpSODAZmXI7Py3w5qIYrw== X-Received: by 2002:a05:6a00:2189:b0:4bc:3def:b662 with SMTP id h9-20020a056a00218900b004bc3defb662mr20078506pfi.5.1643139752644; Tue, 25 Jan 2022 11:42:32 -0800 (PST) Received: from 7YHHR73.igp.broadcom.net (ip72-194-116-95.oc.oc.cox.net. [72.194.116.95]) by smtp.gmail.com with ESMTPSA id a1sm15087343pgm.83.2022.01.25.11.42.30 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 25 Jan 2022 11:42:32 -0800 (PST) From: Florian Fainelli To: stable@vger.kernel.org Cc: Stefan Wahren , Nicolas Saenz Julienne , Linus Walleij , Florian Fainelli , Rob Herring , Mark Rutland , Ray Jui , Scott Branden , bcm-kernel-feedback-list@broadcom.com (maintainer:BROADCOM BCM281XX/BCM11XXX/BCM216XX ARM ARCHITE...), Eric Anholt , Stefan Wahren , Nicolas Saenz Julienne , Phil Elwell , devicetree@vger.kernel.org (open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS), linux-kernel@vger.kernel.org (open list), linux-gpio@vger.kernel.org (open list:PIN CONTROL SUBSYSTEM), linux-rpi-kernel@lists.infradead.org (moderated list:BROADCOM BCM2711/BCM2835 ARM ARCHITECTURE), linux-arm-kernel@lists.infradead.org (moderated list:BROADCOM BCM2711/BCM2835 ARM ARCHITECTURE) Subject: [PATCH stable 5.4 2/7] pinctrl: bcm2835: Refactor platform data Date: Tue, 25 Jan 2022 11:42:17 -0800 Message-Id: <20220125194222.12783-3-f.fainelli@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220125194222.12783-1-f.fainelli@gmail.com> References: <20220125194222.12783-1-f.fainelli@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org From: Stefan Wahren commit 90bfaf028d61a6d523c685b63c2bcc94eebb8057 upstream This prepares the platform data to be easier to extend for more GPIOs. Except of this there is no functional change. Signed-off-by: Stefan Wahren Link: https://lore.kernel.org/r/1581166975-22949-3-git-send-email-stefan.wahren@i2se.com Reviewed-by: Nicolas Saenz Julienne Signed-off-by: Linus Walleij Signed-off-by: Florian Fainelli --- drivers/pinctrl/bcm/pinctrl-bcm2835.c | 57 +++++++++++++++++++++------ 1 file changed, 44 insertions(+), 13 deletions(-) diff --git a/drivers/pinctrl/bcm/pinctrl-bcm2835.c b/drivers/pinctrl/bcm/pinctrl-bcm2835.c index 3fc26389a573..7f0a9c647927 100644 --- a/drivers/pinctrl/bcm/pinctrl-bcm2835.c +++ b/drivers/pinctrl/bcm/pinctrl-bcm2835.c @@ -82,6 +82,7 @@ struct bcm2835_pinctrl { struct pinctrl_dev *pctl_dev; struct gpio_chip gpio_chip; + struct pinctrl_desc pctl_desc; struct pinctrl_gpio_range gpio_range; raw_spinlock_t irq_lock[BCM2835_NUM_BANKS]; @@ -1051,7 +1052,7 @@ static const struct pinconf_ops bcm2711_pinconf_ops = { .pin_config_set = bcm2711_pinconf_set, }; -static struct pinctrl_desc bcm2835_pinctrl_desc = { +static const struct pinctrl_desc bcm2835_pinctrl_desc = { .name = MODULE_NAME, .pins = bcm2835_gpio_pins, .npins = ARRAY_SIZE(bcm2835_gpio_pins), @@ -1061,19 +1062,47 @@ static struct pinctrl_desc bcm2835_pinctrl_desc = { .owner = THIS_MODULE, }; -static struct pinctrl_gpio_range bcm2835_pinctrl_gpio_range = { +static const struct pinctrl_desc bcm2711_pinctrl_desc = { + .name = MODULE_NAME, + .pins = bcm2835_gpio_pins, + .npins = ARRAY_SIZE(bcm2835_gpio_pins), + .pctlops = &bcm2835_pctl_ops, + .pmxops = &bcm2835_pmx_ops, + .confops = &bcm2711_pinconf_ops, + .owner = THIS_MODULE, +}; + +static const struct pinctrl_gpio_range bcm2835_pinctrl_gpio_range = { .name = MODULE_NAME, .npins = BCM2835_NUM_GPIOS, }; +struct bcm_plat_data { + const struct gpio_chip *gpio_chip; + const struct pinctrl_desc *pctl_desc; + const struct pinctrl_gpio_range *gpio_range; +}; + +static const struct bcm_plat_data bcm2835_plat_data = { + .gpio_chip = &bcm2835_gpio_chip, + .pctl_desc = &bcm2835_pinctrl_desc, + .gpio_range = &bcm2835_pinctrl_gpio_range, +}; + +static const struct bcm_plat_data bcm2711_plat_data = { + .gpio_chip = &bcm2835_gpio_chip, + .pctl_desc = &bcm2711_pinctrl_desc, + .gpio_range = &bcm2835_pinctrl_gpio_range, +}; + static const struct of_device_id bcm2835_pinctrl_match[] = { { .compatible = "brcm,bcm2835-gpio", - .data = &bcm2835_pinconf_ops, + .data = &bcm2835_plat_data, }, { .compatible = "brcm,bcm2711-gpio", - .data = &bcm2711_pinconf_ops, + .data = &bcm2711_plat_data, }, {} }; @@ -1082,6 +1111,7 @@ static int bcm2835_pinctrl_probe(struct platform_device *pdev) { struct device *dev = &pdev->dev; struct device_node *np = dev->of_node; + const struct bcm_plat_data *pdata; struct bcm2835_pinctrl *pc; struct gpio_irq_chip *girq; struct resource iomem; @@ -1108,7 +1138,13 @@ static int bcm2835_pinctrl_probe(struct platform_device *pdev) if (IS_ERR(pc->base)) return PTR_ERR(pc->base); - pc->gpio_chip = bcm2835_gpio_chip; + match = of_match_node(bcm2835_pinctrl_match, pdev->dev.of_node); + if (!match) + return -EINVAL; + + pdata = match->data; + + pc->gpio_chip = *pdata->gpio_chip; pc->gpio_chip.parent = dev; pc->gpio_chip.of_node = np; @@ -1159,19 +1195,14 @@ static int bcm2835_pinctrl_probe(struct platform_device *pdev) return err; } - match = of_match_node(bcm2835_pinctrl_match, pdev->dev.of_node); - if (match) { - bcm2835_pinctrl_desc.confops = - (const struct pinconf_ops *)match->data; - } - - pc->pctl_dev = devm_pinctrl_register(dev, &bcm2835_pinctrl_desc, pc); + pc->pctl_desc = *pdata->pctl_desc; + pc->pctl_dev = devm_pinctrl_register(dev, &pc->pctl_desc, pc); if (IS_ERR(pc->pctl_dev)) { gpiochip_remove(&pc->gpio_chip); return PTR_ERR(pc->pctl_dev); } - pc->gpio_range = bcm2835_pinctrl_gpio_range; + pc->gpio_range = *pdata->gpio_range; pc->gpio_range.base = pc->gpio_chip.base; pc->gpio_range.gc = &pc->gpio_chip; pinctrl_add_gpio_range(pc->pctl_dev, &pc->gpio_range); From patchwork Tue Jan 25 19:42:18 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Florian Fainelli X-Patchwork-Id: 536958 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 89D9FC41535 for ; Tue, 25 Jan 2022 19:42:58 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230357AbiAYTm5 (ORCPT ); Tue, 25 Jan 2022 14:42:57 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:53770 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230328AbiAYTmh (ORCPT ); Tue, 25 Jan 2022 14:42:37 -0500 Received: from mail-pf1-x430.google.com (mail-pf1-x430.google.com [IPv6:2607:f8b0:4864:20::430]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 57B5BC061744; Tue, 25 Jan 2022 11:42:35 -0800 (PST) Received: by mail-pf1-x430.google.com with SMTP id a8so15383927pfa.6; Tue, 25 Jan 2022 11:42:35 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=DxqlDLmZJgxjUCsP0FCIBoO5ZvudEfErx4WpcVVz2is=; b=jbqkzgQbio3speo4hV8gz+HrDtMKsHChLVQlRRsoOF0awP/KS5RKTGq1Ze4fydJu0S IL14RYh0LNcZq2SrD2bFBznincs+qPEj8AYRL4UWT/IUhLiryr7Km5xIDsXvekrS9PfQ s78EdUkAcVpgnp3VG/+rCWEOLKsZqxj1teLB4bJ07UTMLPk/iRJAWIQ3fI5VMc+1QlaG Pa7ZwOdEZPqsxgAhMElBBbcW0pZ4+84UPRZ69qGNEIut9Ve/EuJoDUVzgCd6/GVSEB0m geqOnUDLBluzsajhOMu5i7vVa2O4Flk/Lhs0UZLINIFNrT/OubNkWCfUvEnySxxUOCOq UpDQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=DxqlDLmZJgxjUCsP0FCIBoO5ZvudEfErx4WpcVVz2is=; b=yMJrUz8UabVMbvPVeroowehUgdxim11Moflk2K+J6Cfx+uwmqj34Vo4HKJd6CIDtjg u40Yn+uJfRZtg/J2mpz08xJYqSJr6nHGg7Z/gcnK2ij6i9LLQZSyREVbtGlFDiLSlw6x bWSkmUkUAgisf8ShToouaeFonZ0cZ//zbpj0uVIlDPIEUplG8Iv9k7s++IjWzx4QIpRH 24M3HyxnWDo2AnO/+U8Ke7G6xLkibZ/BsHVgP7gXXYxcn79Jx1CBCxenJj2cGlru/mor fEK1QNECMg1wfJYvsBHB+fAKpSF7FAESg2E0r2/3lMETji7PmAu1X2UV9h/J2AP5k253 BP0w== X-Gm-Message-State: AOAM530sWUuudNwM5xaxMn7oNyMHg4jf/1qJC2n39T5KlQO6BW5QZqHh JRE2bglwaLGcfLnLha0uy8JMvAEYM5A= X-Google-Smtp-Source: ABdhPJyTtR7DQSBRuRNmRF1u+U9ozmchNil7WrqnrG5UHBJ+Eb9eCo02HX8XCpTOFwGY1YRusKEs2w== X-Received: by 2002:a05:6a00:23c1:b0:4c9:f220:2379 with SMTP id g1-20020a056a0023c100b004c9f2202379mr7465944pfc.65.1643139754492; Tue, 25 Jan 2022 11:42:34 -0800 (PST) Received: from 7YHHR73.igp.broadcom.net (ip72-194-116-95.oc.oc.cox.net. [72.194.116.95]) by smtp.gmail.com with ESMTPSA id a1sm15087343pgm.83.2022.01.25.11.42.32 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 25 Jan 2022 11:42:33 -0800 (PST) From: Florian Fainelli To: stable@vger.kernel.org Cc: Stefan Wahren , Nicolas Saenz Julienne , Linus Walleij , Florian Fainelli , Rob Herring , Mark Rutland , Ray Jui , Scott Branden , bcm-kernel-feedback-list@broadcom.com (maintainer:BROADCOM BCM281XX/BCM11XXX/BCM216XX ARM ARCHITE...), Eric Anholt , Stefan Wahren , Nicolas Saenz Julienne , Phil Elwell , devicetree@vger.kernel.org (open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS), linux-kernel@vger.kernel.org (open list), linux-gpio@vger.kernel.org (open list:PIN CONTROL SUBSYSTEM), linux-rpi-kernel@lists.infradead.org (moderated list:BROADCOM BCM2711/BCM2835 ARM ARCHITECTURE), linux-arm-kernel@lists.infradead.org (moderated list:BROADCOM BCM2711/BCM2835 ARM ARCHITECTURE) Subject: [PATCH stable 5.4 3/7] pinctrl: bcm2835: Add support for all GPIOs on BCM2711 Date: Tue, 25 Jan 2022 11:42:18 -0800 Message-Id: <20220125194222.12783-4-f.fainelli@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220125194222.12783-1-f.fainelli@gmail.com> References: <20220125194222.12783-1-f.fainelli@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org From: Stefan Wahren commit b1d84a3d0a26c5844a22bc09a42704b9371208bb upstream The BCM2711 supports 58 GPIOs. So extend pinctrl and GPIOs accordingly. Signed-off-by: Stefan Wahren Link: https://lore.kernel.org/r/1581166975-22949-4-git-send-email-stefan.wahren@i2se.com Reviewed-by: Nicolas Saenz Julienne Signed-off-by: Linus Walleij Signed-off-by: Florian Fainelli --- drivers/pinctrl/bcm/pinctrl-bcm2835.c | 54 +++++++++++++++++++++------ 1 file changed, 42 insertions(+), 12 deletions(-) diff --git a/drivers/pinctrl/bcm/pinctrl-bcm2835.c b/drivers/pinctrl/bcm/pinctrl-bcm2835.c index 7f0a9c647927..061e70ed17a7 100644 --- a/drivers/pinctrl/bcm/pinctrl-bcm2835.c +++ b/drivers/pinctrl/bcm/pinctrl-bcm2835.c @@ -37,6 +37,7 @@ #define MODULE_NAME "pinctrl-bcm2835" #define BCM2835_NUM_GPIOS 54 +#define BCM2711_NUM_GPIOS 58 #define BCM2835_NUM_BANKS 2 #define BCM2835_NUM_IRQS 3 @@ -78,7 +79,7 @@ struct bcm2835_pinctrl { /* note: locking assumes each bank will have its own unsigned long */ unsigned long enabled_irq_map[BCM2835_NUM_BANKS]; - unsigned int irq_type[BCM2835_NUM_GPIOS]; + unsigned int irq_type[BCM2711_NUM_GPIOS]; struct pinctrl_dev *pctl_dev; struct gpio_chip gpio_chip; @@ -145,6 +146,10 @@ static struct pinctrl_pin_desc bcm2835_gpio_pins[] = { BCM2835_GPIO_PIN(51), BCM2835_GPIO_PIN(52), BCM2835_GPIO_PIN(53), + BCM2835_GPIO_PIN(54), + BCM2835_GPIO_PIN(55), + BCM2835_GPIO_PIN(56), + BCM2835_GPIO_PIN(57), }; /* one pin per group */ @@ -203,6 +208,10 @@ static const char * const bcm2835_gpio_groups[] = { "gpio51", "gpio52", "gpio53", + "gpio54", + "gpio55", + "gpio56", + "gpio57", }; enum bcm2835_fsel { @@ -353,6 +362,22 @@ static const struct gpio_chip bcm2835_gpio_chip = { .can_sleep = false, }; +static const struct gpio_chip bcm2711_gpio_chip = { + .label = "pinctrl-bcm2711", + .owner = THIS_MODULE, + .request = gpiochip_generic_request, + .free = gpiochip_generic_free, + .direction_input = bcm2835_gpio_direction_input, + .direction_output = bcm2835_gpio_direction_output, + .get_direction = bcm2835_gpio_get_direction, + .get = bcm2835_gpio_get, + .set = bcm2835_gpio_set, + .set_config = gpiochip_generic_config, + .base = -1, + .ngpio = BCM2711_NUM_GPIOS, + .can_sleep = false, +}; + static void bcm2835_gpio_irq_handle_bank(struct bcm2835_pinctrl *pc, unsigned int bank, u32 mask) { @@ -399,7 +424,7 @@ static void bcm2835_gpio_irq_handler(struct irq_desc *desc) bcm2835_gpio_irq_handle_bank(pc, 0, 0xf0000000); bcm2835_gpio_irq_handle_bank(pc, 1, 0x00003fff); break; - case 2: /* IRQ2 covers GPIOs 46-53 */ + case 2: /* IRQ2 covers GPIOs 46-57 */ bcm2835_gpio_irq_handle_bank(pc, 1, 0x003fc000); break; } @@ -618,7 +643,7 @@ static struct irq_chip bcm2835_gpio_irq_chip = { static int bcm2835_pctl_get_groups_count(struct pinctrl_dev *pctldev) { - return ARRAY_SIZE(bcm2835_gpio_groups); + return BCM2835_NUM_GPIOS; } static const char *bcm2835_pctl_get_group_name(struct pinctrl_dev *pctldev, @@ -776,7 +801,7 @@ static int bcm2835_pctl_dt_node_to_map(struct pinctrl_dev *pctldev, err = of_property_read_u32_index(np, "brcm,pins", i, &pin); if (err) goto out; - if (pin >= ARRAY_SIZE(bcm2835_gpio_pins)) { + if (pin >= pc->pctl_desc.npins) { dev_err(pc->dev, "%pOF: invalid brcm,pins value %d\n", np, pin); err = -EINVAL; @@ -852,7 +877,7 @@ static int bcm2835_pmx_get_function_groups(struct pinctrl_dev *pctldev, { /* every pin can do every function */ *groups = bcm2835_gpio_groups; - *num_groups = ARRAY_SIZE(bcm2835_gpio_groups); + *num_groups = BCM2835_NUM_GPIOS; return 0; } @@ -1055,7 +1080,7 @@ static const struct pinconf_ops bcm2711_pinconf_ops = { static const struct pinctrl_desc bcm2835_pinctrl_desc = { .name = MODULE_NAME, .pins = bcm2835_gpio_pins, - .npins = ARRAY_SIZE(bcm2835_gpio_pins), + .npins = BCM2835_NUM_GPIOS, .pctlops = &bcm2835_pctl_ops, .pmxops = &bcm2835_pmx_ops, .confops = &bcm2835_pinconf_ops, @@ -1063,9 +1088,9 @@ static const struct pinctrl_desc bcm2835_pinctrl_desc = { }; static const struct pinctrl_desc bcm2711_pinctrl_desc = { - .name = MODULE_NAME, + .name = "pinctrl-bcm2711", .pins = bcm2835_gpio_pins, - .npins = ARRAY_SIZE(bcm2835_gpio_pins), + .npins = BCM2711_NUM_GPIOS, .pctlops = &bcm2835_pctl_ops, .pmxops = &bcm2835_pmx_ops, .confops = &bcm2711_pinconf_ops, @@ -1077,6 +1102,11 @@ static const struct pinctrl_gpio_range bcm2835_pinctrl_gpio_range = { .npins = BCM2835_NUM_GPIOS, }; +static const struct pinctrl_gpio_range bcm2711_pinctrl_gpio_range = { + .name = "pinctrl-bcm2711", + .npins = BCM2711_NUM_GPIOS, +}; + struct bcm_plat_data { const struct gpio_chip *gpio_chip; const struct pinctrl_desc *pctl_desc; @@ -1090,9 +1120,9 @@ static const struct bcm_plat_data bcm2835_plat_data = { }; static const struct bcm_plat_data bcm2711_plat_data = { - .gpio_chip = &bcm2835_gpio_chip, + .gpio_chip = &bcm2711_gpio_chip, .pctl_desc = &bcm2711_pinctrl_desc, - .gpio_range = &bcm2835_pinctrl_gpio_range, + .gpio_range = &bcm2711_pinctrl_gpio_range, }; static const struct of_device_id bcm2835_pinctrl_match[] = { @@ -1118,8 +1148,8 @@ static int bcm2835_pinctrl_probe(struct platform_device *pdev) int err, i; const struct of_device_id *match; - BUILD_BUG_ON(ARRAY_SIZE(bcm2835_gpio_pins) != BCM2835_NUM_GPIOS); - BUILD_BUG_ON(ARRAY_SIZE(bcm2835_gpio_groups) != BCM2835_NUM_GPIOS); + BUILD_BUG_ON(ARRAY_SIZE(bcm2835_gpio_pins) != BCM2711_NUM_GPIOS); + BUILD_BUG_ON(ARRAY_SIZE(bcm2835_gpio_groups) != BCM2711_NUM_GPIOS); pc = devm_kzalloc(dev, sizeof(*pc), GFP_KERNEL); if (!pc) From patchwork Tue Jan 25 19:42:19 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Florian Fainelli X-Patchwork-Id: 536957 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7FFBBC3526E for ; Tue, 25 Jan 2022 19:42:59 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230451AbiAYTm6 (ORCPT ); Tue, 25 Jan 2022 14:42:58 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:53778 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230336AbiAYTmj (ORCPT ); Tue, 25 Jan 2022 14:42:39 -0500 Received: from mail-pg1-x52e.google.com (mail-pg1-x52e.google.com [IPv6:2607:f8b0:4864:20::52e]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 25FE6C061747; Tue, 25 Jan 2022 11:42:37 -0800 (PST) Received: by mail-pg1-x52e.google.com with SMTP id g20so1006901pgn.10; Tue, 25 Jan 2022 11:42:37 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=64JkX+S1olA3Lwzfo0roarcnEBwBZP0WFc1vdxdvAQ8=; b=mpIurYUZAM4amKCDAJR1uTGUixkJnXvVc7yTI9ms62Lqu4hXki88xnOQF+0T1zo2K7 gmvCwimY+E/8RkATt1slT5Kxr/TZirqXE2iV4REDxrQc4sz/PQApvA4uCrVEdFSIuhhO 26wM/Nn14Vi+TV1X6rVBw35wgEUHtXj75fIjeGI2ONtSn2ftTebXBaaGa10cVff6CZ4r FSztfu3f4BPuFyz3rlSCQxgw4XIenNlYdQ4ZdBiflwEgw/pTu5zv3YIvQRRCdydW6Fx6 eXIpvn9jeQh8vOO/DpyTPXzDiS4N4yPKWMMzc+/YnP6HufTCrGWNgJy0uC/wn80qaNXY fxSw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=64JkX+S1olA3Lwzfo0roarcnEBwBZP0WFc1vdxdvAQ8=; b=PnVeZ1XSd2yniEUP4dfKsTmiBFc4hMi5sH/thHJcuTlmPsQuZG/leG0y9gkMuavKeB WHUP3ihCudi7kOPK6AUDzDwKsus+X4AaU5mq+Ef6VM0WhVQk7s0Lo+bEcjcB6nKzaibl CCrMHpxdaygyLZK+3+0oT+O5WJuXbM00cpwzSq3ZGBwKPP5/G21FeItkoTrqRJ0ml0Xd RxuuHuLw+ZCxSAMXQRk/IZGL3yIJpHlYkF6luo1FMIL+6UwoFzbmYvhnvkTOOD+b/yjc POMpG4z0itJnmnRmKfpcs5pTbcfc86vMHzIoOlf8Xg9SNHhQ4rQxyAFWm3Ofrd8Pa7aE HTrg== X-Gm-Message-State: AOAM533B9g17mEYBbDpP/AdQYTtOfk/+75Hpd1Chggo6HfjoJyvl8cJg numlWO8FaA1CYdev+aCGulDsZKM/NPs= X-Google-Smtp-Source: ABdhPJwTHXSEy6b/U9jnjefmpyeh3wMALUohR3ey84CK4LtZNpT1Eu98k1J4GqT7nYM7tq98Tx7jpA== X-Received: by 2002:a63:2210:: with SMTP id i16mr16336467pgi.532.1643139756309; Tue, 25 Jan 2022 11:42:36 -0800 (PST) Received: from 7YHHR73.igp.broadcom.net (ip72-194-116-95.oc.oc.cox.net. [72.194.116.95]) by smtp.gmail.com with ESMTPSA id a1sm15087343pgm.83.2022.01.25.11.42.34 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 25 Jan 2022 11:42:35 -0800 (PST) From: Florian Fainelli To: stable@vger.kernel.org Cc: Florian Fainelli , Linus Walleij , Rob Herring , Mark Rutland , Ray Jui , Scott Branden , bcm-kernel-feedback-list@broadcom.com (maintainer:BROADCOM BCM281XX/BCM11XXX/BCM216XX ARM ARCHITE...), Eric Anholt , Stefan Wahren , Nicolas Saenz Julienne , Phil Elwell , devicetree@vger.kernel.org (open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS), linux-kernel@vger.kernel.org (open list), linux-gpio@vger.kernel.org (open list:PIN CONTROL SUBSYSTEM), linux-rpi-kernel@lists.infradead.org (moderated list:BROADCOM BCM2711/BCM2835 ARM ARCHITECTURE), linux-arm-kernel@lists.infradead.org (moderated list:BROADCOM BCM2711/BCM2835 ARM ARCHITECTURE) Subject: [PATCH stable 5.4 4/7] pinctrl: bcm2835: Match BCM7211 compatible string Date: Tue, 25 Jan 2022 11:42:19 -0800 Message-Id: <20220125194222.12783-5-f.fainelli@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220125194222.12783-1-f.fainelli@gmail.com> References: <20220125194222.12783-1-f.fainelli@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org commit 562c856f96d22ef1204b0a314bc52e85617199b4 upstream The BCM7211 SoC uses the same pinconf_ops as the ones defined for the BCM2711 SoC, match the compatible string and use the correct set of options. Signed-off-by: Florian Fainelli Link: https://lore.kernel.org/r/20200531001101.24945-4-f.fainelli@gmail.com Signed-off-by: Linus Walleij Signed-off-by: Florian Fainelli --- drivers/pinctrl/bcm/pinctrl-bcm2835.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/drivers/pinctrl/bcm/pinctrl-bcm2835.c b/drivers/pinctrl/bcm/pinctrl-bcm2835.c index 061e70ed17a7..e763c680b9c2 100644 --- a/drivers/pinctrl/bcm/pinctrl-bcm2835.c +++ b/drivers/pinctrl/bcm/pinctrl-bcm2835.c @@ -1134,6 +1134,10 @@ static const struct of_device_id bcm2835_pinctrl_match[] = { .compatible = "brcm,bcm2711-gpio", .data = &bcm2711_plat_data, }, + { + .compatible = "brcm,bcm7211-gpio", + .data = &bcm2711_plat_data, + }, {} }; From patchwork Tue Jan 25 19:42:20 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Florian Fainelli X-Patchwork-Id: 536659 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id DB43FC433F5 for ; Tue, 25 Jan 2022 19:42:58 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230392AbiAYTm6 (ORCPT ); Tue, 25 Jan 2022 14:42:58 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:53788 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230338AbiAYTmj (ORCPT ); Tue, 25 Jan 2022 14:42:39 -0500 Received: from mail-pg1-x533.google.com (mail-pg1-x533.google.com [IPv6:2607:f8b0:4864:20::533]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 3780AC06173B; Tue, 25 Jan 2022 11:42:39 -0800 (PST) Received: by mail-pg1-x533.google.com with SMTP id 133so19154079pgb.0; Tue, 25 Jan 2022 11:42:39 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=/khXbDZHB903lyF75ChxyVG7aO9Sd0AWOKns64QBkow=; b=QK3JpG+rFIyG0q98TAtuuizI1sCbgM0gzYnBXEH4FZoGbY/XoIQ6Y5bHvAPtfwRyJH +hCVof1nkcnpeaLZR9mvt5wqyTUTEBLb+No+Wi2kiJkS6rsvh0rwwyO9rs0G2j5Ok/l5 pkc4rxCBAQ9L+lvwZbPeWpiLW6lQ1/0bjOCjwJ/3qDCmCZlw2bSFhZvIFFbJF9e51iu9 7Ef1v+rRfJcvREvE1Kz4hQeI7r10NO6cAqe+gwDkhEChnWxfjXJ7swePqlWXwFo9Pnti 1zXXozK6yNS8w8/9hJil63Rj24cJUCpCULxyVdGJvLq5Stu5nG3Jc2A/gPJVfd/w81Gu Qm3g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=/khXbDZHB903lyF75ChxyVG7aO9Sd0AWOKns64QBkow=; b=M8NWy+REXBwoFmYjVd0MCf2CWTHMW1CmBMx2hJOS0Wbuqx2Qp8ySOGVeaTqRaomBzT ogyT0gD3EG9A5JVz7m/i9cHFuJ5U86+JTVDkPiyop2B0PFhlggBzpnDeBy4leW7hdC6l ixhvgeE7HlXFI4HMGPguzLVgrKsxWsAj4j5/OcrBv0g2VZCnIfjt3HVJ1/sTf4Rm8pRo dxG3CI1bJTfZm5DVc/c5Ejoq6bwA4fnbj8gwtpnXbVJNHJnleA149TcjQWQmdQzlDv0j ZJ5UFbxWuVkZNKWW1NXpqFlfxp/9MW2reH0e9WpkwgtnhePvwsLN98C+BsFYEDynyEo7 alRg== X-Gm-Message-State: AOAM530BHLj6l9uoLxXrvN+1pKZbi+xPGYkghS2nzo6J8ycHIbVrOxbj 5cj+EYOO1V+iAzTUNLhmLWetzWQEbnw= X-Google-Smtp-Source: ABdhPJxIS4IZAaUWIo7Tzhth7/fpBFqVOPVfTpo4lJ3F0h+dyi/yqdeVFb6nyaYWtgSt5JHA4Pn/iA== X-Received: by 2002:a63:f452:: with SMTP id p18mr16354782pgk.545.1643139758349; Tue, 25 Jan 2022 11:42:38 -0800 (PST) Received: from 7YHHR73.igp.broadcom.net (ip72-194-116-95.oc.oc.cox.net. [72.194.116.95]) by smtp.gmail.com with ESMTPSA id a1sm15087343pgm.83.2022.01.25.11.42.36 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 25 Jan 2022 11:42:37 -0800 (PST) From: Florian Fainelli To: stable@vger.kernel.org Cc: Florian Fainelli , Linus Walleij , Rob Herring , Mark Rutland , Ray Jui , Scott Branden , bcm-kernel-feedback-list@broadcom.com (maintainer:BROADCOM BCM281XX/BCM11XXX/BCM216XX ARM ARCHITE...), Eric Anholt , Stefan Wahren , Nicolas Saenz Julienne , Phil Elwell , devicetree@vger.kernel.org (open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS), linux-kernel@vger.kernel.org (open list), linux-gpio@vger.kernel.org (open list:PIN CONTROL SUBSYSTEM), linux-rpi-kernel@lists.infradead.org (moderated list:BROADCOM BCM2711/BCM2835 ARM ARCHITECTURE), linux-arm-kernel@lists.infradead.org (moderated list:BROADCOM BCM2711/BCM2835 ARM ARCHITECTURE) Subject: [PATCH stable 5.4 5/7] pinctrl: bcm2835: Add support for wake-up interrupts Date: Tue, 25 Jan 2022 11:42:20 -0800 Message-Id: <20220125194222.12783-6-f.fainelli@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220125194222.12783-1-f.fainelli@gmail.com> References: <20220125194222.12783-1-f.fainelli@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org commit 920fecc1aa4591da27ef9dcb338fc5da86b404d7 upstream Leverage the IRQCHIP_MASK_ON_SUSPEND flag in order to avoid having to specifically treat the GPIO interrupts during suspend and resume, and simply implement an irq_set_wake() callback that is responsible for enabling the parent wake-up interrupt as a wake-up interrupt. To avoid allocating unnecessary resources for other chips, the wake-up interrupts are only initialized if we have a brcm,bcm7211-gpio compatibility string. Signed-off-by: Florian Fainelli Link: https://lore.kernel.org/r/20200531001101.24945-5-f.fainelli@gmail.com Signed-off-by: Linus Walleij Signed-off-by: Florian Fainelli --- drivers/pinctrl/bcm/pinctrl-bcm2835.c | 76 ++++++++++++++++++++++++++- 1 file changed, 75 insertions(+), 1 deletion(-) diff --git a/drivers/pinctrl/bcm/pinctrl-bcm2835.c b/drivers/pinctrl/bcm/pinctrl-bcm2835.c index e763c680b9c2..436184ebd2ef 100644 --- a/drivers/pinctrl/bcm/pinctrl-bcm2835.c +++ b/drivers/pinctrl/bcm/pinctrl-bcm2835.c @@ -19,6 +19,7 @@ #include #include #include +#include #include #include #include @@ -76,6 +77,7 @@ struct bcm2835_pinctrl { struct device *dev; void __iomem *base; + int *wake_irq; /* note: locking assumes each bank will have its own unsigned long */ unsigned long enabled_irq_map[BCM2835_NUM_BANKS]; @@ -432,6 +434,11 @@ static void bcm2835_gpio_irq_handler(struct irq_desc *desc) chained_irq_exit(host_chip, desc); } +static irqreturn_t bcm2835_gpio_wake_irq_handler(int irq, void *dev_id) +{ + return IRQ_HANDLED; +} + static inline void __bcm2835_gpio_irq_config(struct bcm2835_pinctrl *pc, unsigned reg, unsigned offset, bool enable) { @@ -631,6 +638,34 @@ static void bcm2835_gpio_irq_ack(struct irq_data *data) bcm2835_gpio_set_bit(pc, GPEDS0, gpio); } +static int bcm2835_gpio_irq_set_wake(struct irq_data *data, unsigned int on) +{ + struct gpio_chip *chip = irq_data_get_irq_chip_data(data); + struct bcm2835_pinctrl *pc = gpiochip_get_data(chip); + unsigned gpio = irqd_to_hwirq(data); + unsigned int irqgroup; + int ret = -EINVAL; + + if (!pc->wake_irq) + return ret; + + if (gpio <= 27) + irqgroup = 0; + else if (gpio >= 28 && gpio <= 45) + irqgroup = 1; + else if (gpio >= 46 && gpio <= 57) + irqgroup = 2; + else + return ret; + + if (on) + ret = enable_irq_wake(pc->wake_irq[irqgroup]); + else + ret = disable_irq_wake(pc->wake_irq[irqgroup]); + + return ret; +} + static struct irq_chip bcm2835_gpio_irq_chip = { .name = MODULE_NAME, .irq_enable = bcm2835_gpio_irq_enable, @@ -639,6 +674,8 @@ static struct irq_chip bcm2835_gpio_irq_chip = { .irq_ack = bcm2835_gpio_irq_ack, .irq_mask = bcm2835_gpio_irq_disable, .irq_unmask = bcm2835_gpio_irq_enable, + .irq_set_wake = bcm2835_gpio_irq_set_wake, + .flags = IRQCHIP_MASK_ON_SUSPEND, }; static int bcm2835_pctl_get_groups_count(struct pinctrl_dev *pctldev) @@ -1151,6 +1188,7 @@ static int bcm2835_pinctrl_probe(struct platform_device *pdev) struct resource iomem; int err, i; const struct of_device_id *match; + int is_7211 = 0; BUILD_BUG_ON(ARRAY_SIZE(bcm2835_gpio_pins) != BCM2711_NUM_GPIOS); BUILD_BUG_ON(ARRAY_SIZE(bcm2835_gpio_groups) != BCM2711_NUM_GPIOS); @@ -1177,6 +1215,7 @@ static int bcm2835_pinctrl_probe(struct platform_device *pdev) return -EINVAL; pdata = match->data; + is_7211 = of_device_is_compatible(np, "brcm,bcm7211-gpio"); pc->gpio_chip = *pdata->gpio_chip; pc->gpio_chip.parent = dev; @@ -1211,6 +1250,15 @@ static int bcm2835_pinctrl_probe(struct platform_device *pdev) GFP_KERNEL); if (!girq->parents) return -ENOMEM; + + if (is_7211) { + pc->wake_irq = devm_kcalloc(dev, BCM2835_NUM_IRQS, + sizeof(*pc->wake_irq), + GFP_KERNEL); + if (!pc->wake_irq) + return -ENOMEM; + } + /* * Use the same handler for all groups: this is necessary * since we use one gpiochip to cover all lines - the @@ -1218,8 +1266,34 @@ static int bcm2835_pinctrl_probe(struct platform_device *pdev) * bank that was firing the IRQ and look up the per-group * and bank data. */ - for (i = 0; i < BCM2835_NUM_IRQS; i++) + for (i = 0; i < BCM2835_NUM_IRQS; i++) { + int len; + char *name; + girq->parents[i] = irq_of_parse_and_map(np, i); + if (!is_7211) + continue; + + /* Skip over the all banks interrupts */ + pc->wake_irq[i] = irq_of_parse_and_map(np, i + + BCM2835_NUM_IRQS + 1); + + len = strlen(dev_name(pc->dev)) + 16; + name = devm_kzalloc(pc->dev, len, GFP_KERNEL); + if (!name) + return -ENOMEM; + + snprintf(name, len, "%s:bank%d", dev_name(pc->dev), i); + + /* These are optional interrupts */ + err = devm_request_irq(dev, pc->wake_irq[i], + bcm2835_gpio_wake_irq_handler, + IRQF_SHARED, name, pc); + if (err) + dev_warn(dev, "unable to request wake IRQ %d\n", + pc->wake_irq[i]); + } + girq->default_type = IRQ_TYPE_NONE; girq->handler = handle_level_irq; From patchwork Tue Jan 25 19:42:21 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Florian Fainelli X-Patchwork-Id: 536658 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id D219AC3526F for ; Tue, 25 Jan 2022 19:42:59 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230471AbiAYTm7 (ORCPT ); Tue, 25 Jan 2022 14:42:59 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:53796 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230348AbiAYTml (ORCPT ); Tue, 25 Jan 2022 14:42:41 -0500 Received: from mail-pg1-x535.google.com (mail-pg1-x535.google.com [IPv6:2607:f8b0:4864:20::535]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 142DDC06173B; Tue, 25 Jan 2022 11:42:41 -0800 (PST) Received: by mail-pg1-x535.google.com with SMTP id i8so19071856pgt.13; Tue, 25 Jan 2022 11:42:41 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=sXtKJXiPTm9fphtCY1N57796+JzIKGIG5Zq7MdkZmXc=; b=TC7pnkDEBnzuHNS2yxC+dWjNGHDaDuPWCuIZrPRyfCJtgtlzp+yEMC+V8/SMvkTove 7cNAKdr+9zmoC9wjFXp59CjAkpsC3eCGRxbHHEmhlAe42JTrIvKYu21JCkv8CvAOW3ws rOAWnl8s7eeScibqvIXvZ9SQGnjxIUWsxwYhr5LezW9aYhzQd9dmCgnsJa2orfWVENRv 14PIOa4Vkf11WFCH++UUY4DMF9LxGdjkPxbX+nhHmpOMbFS3FskBFi4AsULFjTTZ08mv uxecTV+sL+L2EO46hLuDc5BWfFbcjuZysbDXpFhBSFnNFcx4PTTkgU/pC5e6uTR6fT0a kYuQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=sXtKJXiPTm9fphtCY1N57796+JzIKGIG5Zq7MdkZmXc=; b=c+RjL7Ektzy4aXBEDVKoCeZczZq+ObCyyTZniHVDfnj+9sRrmIk1Bp9bL2DNyXVEPd ibgFx4iNkaXDstppNnJ4cq65PLohXoCDgoQaYuxUkpTgJyN5mHV+IaS3Xwfme7mAw6sn 6ZpGimlVkM5TzmrW9o49GOey4rJwdIDecQjZkLAckTTB1gb/KaZ1MZeXEu9bequo4/ul 697YuxJsvCyCZG0eobjU8eHl0XkxpNLp2+tLt/C98fpu+4kuI8AbTzPK7N8y2lgH7vGT vvTJ1ZXHhK8W2akF/irqHpLCvZc7RZtB1QbFZezG1JE2wuQlXkRFfm/NoaCiINFbKoOn SPFA== X-Gm-Message-State: AOAM533Jm86ESZkxKg0ZyO+bJgkWS/jHL/zmdl0q6Xws4o2fTQxHzm1U VoOi9dFnxxuk7MJXh+4xbsYCC8jthYo= X-Google-Smtp-Source: ABdhPJz4D7GrsnDYxHCSJszLD5YywGaIgspkAqlQoWSBVRXRy00G9TOiqQ3S1/QCcvuppSw93Xwr8Q== X-Received: by 2002:a63:9545:: with SMTP id t5mr16357666pgn.446.1643139760175; Tue, 25 Jan 2022 11:42:40 -0800 (PST) Received: from 7YHHR73.igp.broadcom.net (ip72-194-116-95.oc.oc.cox.net. [72.194.116.95]) by smtp.gmail.com with ESMTPSA id a1sm15087343pgm.83.2022.01.25.11.42.38 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 25 Jan 2022 11:42:39 -0800 (PST) From: Florian Fainelli To: stable@vger.kernel.org Cc: Phil Elwell , Florian Fainelli , Linus Walleij , Rob Herring , Mark Rutland , Ray Jui , Scott Branden , bcm-kernel-feedback-list@broadcom.com (maintainer:BROADCOM BCM281XX/BCM11XXX/BCM216XX ARM ARCHITE...), Eric Anholt , Stefan Wahren , Nicolas Saenz Julienne , devicetree@vger.kernel.org (open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS), linux-kernel@vger.kernel.org (open list), linux-gpio@vger.kernel.org (open list:PIN CONTROL SUBSYSTEM), linux-rpi-kernel@lists.infradead.org (moderated list:BROADCOM BCM2711/BCM2835 ARM ARCHITECTURE), linux-arm-kernel@lists.infradead.org (moderated list:BROADCOM BCM2711/BCM2835 ARM ARCHITECTURE) Subject: [PATCH stable 5.4 6/7] pinctrl: bcm2835: Change init order for gpio hogs Date: Tue, 25 Jan 2022 11:42:21 -0800 Message-Id: <20220125194222.12783-7-f.fainelli@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220125194222.12783-1-f.fainelli@gmail.com> References: <20220125194222.12783-1-f.fainelli@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org From: Phil Elwell commit 266423e60ea1b953fcc0cd97f3dad85857e434d1 upstream ...and gpio-ranges pinctrl-bcm2835 is a combined pinctrl/gpio driver. Currently the gpio side is registered first, but this breaks gpio hogs (which are configured during gpiochip_add_data). Part of the hog initialisation is a call to pinctrl_gpio_request, and since the pinctrl driver hasn't yet been registered this results in an -EPROBE_DEFER from which it can never recover. Change the initialisation sequence to register the pinctrl driver first. This also solves a similar problem with the gpio-ranges property, which is required in order for released pins to be returned to inputs. Fixes: 73345a18d464b ("pinctrl: bcm2835: Pass irqchip when adding gpiochip") Signed-off-by: Phil Elwell Reviewed-by: Florian Fainelli Link: https://lore.kernel.org/r/20211206092237.4105895-2-phil@raspberrypi.com Signed-off-by: Linus Walleij Signed-off-by: Florian Fainelli --- drivers/pinctrl/bcm/pinctrl-bcm2835.c | 29 +++++++++++++++------------ 1 file changed, 16 insertions(+), 13 deletions(-) diff --git a/drivers/pinctrl/bcm/pinctrl-bcm2835.c b/drivers/pinctrl/bcm/pinctrl-bcm2835.c index 436184ebd2ef..fa742535f679 100644 --- a/drivers/pinctrl/bcm/pinctrl-bcm2835.c +++ b/drivers/pinctrl/bcm/pinctrl-bcm2835.c @@ -1241,6 +1241,18 @@ static int bcm2835_pinctrl_probe(struct platform_device *pdev) raw_spin_lock_init(&pc->irq_lock[i]); } + pc->pctl_desc = *pdata->pctl_desc; + pc->pctl_dev = devm_pinctrl_register(dev, &pc->pctl_desc, pc); + if (IS_ERR(pc->pctl_dev)) { + gpiochip_remove(&pc->gpio_chip); + return PTR_ERR(pc->pctl_dev); + } + + pc->gpio_range = *pdata->gpio_range; + pc->gpio_range.base = pc->gpio_chip.base; + pc->gpio_range.gc = &pc->gpio_chip; + pinctrl_add_gpio_range(pc->pctl_dev, &pc->gpio_range); + girq = &pc->gpio_chip.irq; girq->chip = &bcm2835_gpio_irq_chip; girq->parent_handler = bcm2835_gpio_irq_handler; @@ -1248,8 +1260,10 @@ static int bcm2835_pinctrl_probe(struct platform_device *pdev) girq->parents = devm_kcalloc(dev, BCM2835_NUM_IRQS, sizeof(*girq->parents), GFP_KERNEL); - if (!girq->parents) + if (!girq->parents) { + pinctrl_remove_gpio_range(pc->pctl_dev, &pc->gpio_range); return -ENOMEM; + } if (is_7211) { pc->wake_irq = devm_kcalloc(dev, BCM2835_NUM_IRQS, @@ -1300,21 +1314,10 @@ static int bcm2835_pinctrl_probe(struct platform_device *pdev) err = gpiochip_add_data(&pc->gpio_chip, pc); if (err) { dev_err(dev, "could not add GPIO chip\n"); + pinctrl_remove_gpio_range(pc->pctl_dev, &pc->gpio_range); return err; } - pc->pctl_desc = *pdata->pctl_desc; - pc->pctl_dev = devm_pinctrl_register(dev, &pc->pctl_desc, pc); - if (IS_ERR(pc->pctl_dev)) { - gpiochip_remove(&pc->gpio_chip); - return PTR_ERR(pc->pctl_dev); - } - - pc->gpio_range = *pdata->gpio_range; - pc->gpio_range.base = pc->gpio_chip.base; - pc->gpio_range.gc = &pc->gpio_chip; - pinctrl_add_gpio_range(pc->pctl_dev, &pc->gpio_range); - return 0; } From patchwork Tue Jan 25 19:42:22 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Florian Fainelli X-Patchwork-Id: 536956 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7B3AAC433F5 for ; Tue, 25 Jan 2022 19:43:08 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230398AbiAYTm7 (ORCPT ); Tue, 25 Jan 2022 14:42:59 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:53806 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230352AbiAYTmn (ORCPT ); Tue, 25 Jan 2022 14:42:43 -0500 Received: from mail-pl1-x62f.google.com (mail-pl1-x62f.google.com [IPv6:2607:f8b0:4864:20::62f]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id EF3FFC061744; Tue, 25 Jan 2022 11:42:42 -0800 (PST) Received: by mail-pl1-x62f.google.com with SMTP id c9so20366778plg.11; Tue, 25 Jan 2022 11:42:42 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=0cB0U/qTfVrjxCk13SDAIYBFzvkQfg0+clBVJtK1GVQ=; b=V+4pHlEgFyQF/CyHl5QAShWssnm5bfbswQeFfGT9QiSmf/Qgpw8lPXaoSqd6e+3ddM GqJgXOrwSUOSGjYrn6Fteap+nOwM04d65keB+ADBqbSsrKEiNNvrenMFrYS8U1Abec1o Vzl/v4gHk7E3hwJoeaF66ut9hy6Rw3p+VHD5tDfCahzM4SkOir325efKHkb3nqobkgW7 hhVCN+DdQ9Tjx8cQ+ns8/y006xj9qcDi0rfncmLtX0X/MzIYhZoG09XUWo2Hqkv6I0Ia jA9qTh1/9+X+1WaE8wCpw7JRzvl7Xlh6jIOjgIKP9bJHmmVKwknut5CqhTfEQiNoJ1hv fLpA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=0cB0U/qTfVrjxCk13SDAIYBFzvkQfg0+clBVJtK1GVQ=; b=qKt1hGWR/R7lLsGqQufDkHcM1mr+L2ANx+/iz7UzjIuONlPFdUlL4DqxN05xtE4Ycr Y6d+CXm3VzgcCuJLcCn9+kEgXRp74+JeG500Jts5Xx0+ttuejL7kH8ztJY3nbH1R+ml4 jAoh/+LMbgWGQHyaypdtNyvNFjN5T9xs7iaST8noMeq1b62djs4uqItyEsIH9RD9J24V qn+QCM38058b7lu6b5Ky2yth4A3Q8rF/C/0AKeLAwzx/OtcRrHXR+TkO0MHfIYRm2N/f Cy64MyDTnCwFdr61S/6rd8JaHTtu8rk0I5BGO1H+N0PqPiD9abBDxAPAoUrS4r+pcGaM QaJA== X-Gm-Message-State: AOAM5326jgpllLwtNjtsjs01+IVzokFedFMQoumkycXUh6flIxAsUYcf uUgwXyLcijYfcZ0KgGmzRF0JGozHwZY= X-Google-Smtp-Source: ABdhPJyekVzvln7kXoeVQzAkLY24+tcynbgAQ2yyphguimJ9BZzjFLPBkvCJwNKUW8IVXgNuPz+ivQ== X-Received: by 2002:a17:902:6a8b:b0:149:82bb:560a with SMTP id n11-20020a1709026a8b00b0014982bb560amr19852322plk.158.1643139762131; Tue, 25 Jan 2022 11:42:42 -0800 (PST) Received: from 7YHHR73.igp.broadcom.net (ip72-194-116-95.oc.oc.cox.net. [72.194.116.95]) by smtp.gmail.com with ESMTPSA id a1sm15087343pgm.83.2022.01.25.11.42.40 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 25 Jan 2022 11:42:41 -0800 (PST) From: Florian Fainelli To: stable@vger.kernel.org Cc: Phil Elwell , Stefan Wahren , Florian Fainelli , Jan Kiszka , Linus Walleij , Olof Johansson , Rob Herring , Mark Rutland , Ray Jui , Scott Branden , bcm-kernel-feedback-list@broadcom.com (maintainer:BROADCOM BCM281XX/BCM11XXX/BCM216XX ARM ARCHITE...), Eric Anholt , Stefan Wahren , Nicolas Saenz Julienne , devicetree@vger.kernel.org (open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS), linux-kernel@vger.kernel.org (open list), linux-gpio@vger.kernel.org (open list:PIN CONTROL SUBSYSTEM), linux-rpi-kernel@lists.infradead.org (moderated list:BROADCOM BCM2711/BCM2835 ARM ARCHITECTURE), linux-arm-kernel@lists.infradead.org (moderated list:BROADCOM BCM2711/BCM2835 ARM ARCHITECTURE) Subject: [PATCH stable 5.4 7/7] ARM: dts: gpio-ranges property is now required Date: Tue, 25 Jan 2022 11:42:22 -0800 Message-Id: <20220125194222.12783-8-f.fainelli@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220125194222.12783-1-f.fainelli@gmail.com> References: <20220125194222.12783-1-f.fainelli@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org From: Phil Elwell commit c8013355ead68dce152cf426686f8a5f80d88b40 upstream Since [1], added in 5.7, the absence of a gpio-ranges property has prevented GPIOs from being restored to inputs when released. Add those properties for BCM283x and BCM2711 devices. [1] commit 2ab73c6d8323 ("gpio: Support GPIO controllers without pin-ranges") Link: https://lore.kernel.org/r/20220104170247.956760-1-linus.walleij@linaro.org Fixes: 2ab73c6d8323 ("gpio: Support GPIO controllers without pin-ranges") Fixes: 266423e60ea1 ("pinctrl: bcm2835: Change init order for gpio hogs") Reported-by: Stefan Wahren Reported-by: Florian Fainelli Reported-by: Jan Kiszka Signed-off-by: Phil Elwell Acked-by: Florian Fainelli Reviewed-by: Linus Walleij Link: https://lore.kernel.org/r/20211206092237.4105895-3-phil@raspberrypi.com Signed-off-by: Linus Walleij Acked-by: Florian Fainelli Signed-off-by: Olof Johansson [florian: Remove bcm2711.dtsi hunk which does not exist in 5.4] Signed-off-by: Florian Fainelli --- arch/arm/boot/dts/bcm283x.dtsi | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/boot/dts/bcm283x.dtsi b/arch/arm/boot/dts/bcm283x.dtsi index 50c64146d492..af81f386793c 100644 --- a/arch/arm/boot/dts/bcm283x.dtsi +++ b/arch/arm/boot/dts/bcm283x.dtsi @@ -183,6 +183,7 @@ interrupt-controller; #interrupt-cells = <2>; + gpio-ranges = <&gpio 0 0 54>; /* Defines pin muxing groups according to * BCM2835-ARM-Peripherals.pdf page 102.