From patchwork Fri Jan 14 09:17:39 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Zong Li X-Patchwork-Id: 532129 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 75EF7C433EF for ; Fri, 14 Jan 2022 09:17:53 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S237174AbiANJRw (ORCPT ); Fri, 14 Jan 2022 04:17:52 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:35446 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S237038AbiANJRw (ORCPT ); Fri, 14 Jan 2022 04:17:52 -0500 Received: from mail-pl1-x634.google.com (mail-pl1-x634.google.com [IPv6:2607:f8b0:4864:20::634]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id B23C7C061401 for ; Fri, 14 Jan 2022 01:17:51 -0800 (PST) Received: by mail-pl1-x634.google.com with SMTP id u15so12844205ple.2 for ; Fri, 14 Jan 2022 01:17:51 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sifive.com; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=K49u+vw8xuJoyxVWZcA3NU+d4XvPmTqJkyhbFma1tEc=; b=EVupHttrxPcen6ULmEixZnPbT26g4c+94DyjVPU66nQYYT/5Ego7P6RHu0tJanvUrH 8guNm0FdQveO46wxKD9SEyeO1sLcsuboP1p9BytGBbPXOE07McBST/jGPcHjXU98cuFL eUCb3cmm69qtqXb8LabZ/ZH5qBP794eqqa/XqLeZGEW3mCWgP4NwHIhRsqjMgfsImtyQ j5D12YxHNBxitsbn6L9UrZNArImktllj8Knsw3KhD1rb5CgKWXaF3RD7xlVinr8OLdEX QIbLoKcRC1uYTCHgQT1G7d0nqkJjlo89YF7cSPOy8fP4vJiys05E1TWfn/Z7VJIzhmAA ow2g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=K49u+vw8xuJoyxVWZcA3NU+d4XvPmTqJkyhbFma1tEc=; b=jaf4eTaeRYjbP1EoV3QsCIieMr/qWGMJSzMnjcCfwclAAZGLyhofCflpRjqGWA/X9Q oG+KuoNZVheW42p44fEPXQJ3odRaEPDqbgxrYLlNNr0fCa2IdJcqz8d9VnCrQ/iaMjFc BDK1rJUCmjAFn81GNHBL8nWVyS+1CslpkYQ3RH0u1uFePhPjOVmzztPTJ9skMlVVZ2f+ jR7FRs9O85K391YUEW2LT6f4AGlimdEmSsyziRnwA9bNA8zZ0e/2ZzB2Fz5icLorfCw6 fa86WHRbf1Ruow49THnDzmERc9/Erv68kv7MRGjZXAR5hwSX6D3LVYDhJFSm74XJt3mG WwIA== X-Gm-Message-State: AOAM53101ewOYCCcgnBoLWNInhYChmDT4O27bMODXMw525YdyH7MDazU gSFsVRaLlP5ledOOMknSCQXyow== X-Google-Smtp-Source: ABdhPJwgjZNZBcWY1WqDIfspOa+C3WcZH6OkqRDy57h33N56DUi3jBThAmxkLw4TGNzYi0naU9J2MQ== X-Received: by 2002:a17:90a:4f4b:: with SMTP id w11mr18924303pjl.112.1642151871283; Fri, 14 Jan 2022 01:17:51 -0800 (PST) Received: from hsinchu16.internal.sifive.com (59-124-168-89.hinet-ip.hinet.net. [59.124.168.89]) by smtp.gmail.com with ESMTPSA id z3sm4237179pgc.45.2022.01.14.01.17.48 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 14 Jan 2022 01:17:50 -0800 (PST) From: Zong Li To: robh+dt@kernel.org, paul.walmsley@sifive.com, palmer@dabbelt.com, aou@eecs.berkeley.edu, krzysztof.kozlowski@canonical.com, conor.dooley@microchip.com, geert@linux-m68k.org, bin.meng@windriver.com, green.wan@sifive.com, vkoul@kernel.org, dmaengine@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org Cc: Zong Li Subject: [PATCH v3 1/3] riscv: dts: Add dma-channels property in dma node Date: Fri, 14 Jan 2022 17:17:39 +0800 Message-Id: <163a2cf11b2aceee2a1b8dc83251576d2371d4a6.1642151791.git.zong.li@sifive.com> X-Mailer: git-send-email 2.31.1 In-Reply-To: References: MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add dma-channels property, then we can determine how many channels there by device tree. Signed-off-by: Zong Li --- arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi | 1 + arch/riscv/boot/dts/sifive/fu540-c000.dtsi | 1 + 2 files changed, 2 insertions(+) diff --git a/arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi b/arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi index c9f6d205d2ba..3c48f2d7a4a4 100644 --- a/arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi +++ b/arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi @@ -188,6 +188,7 @@ dma@3000000 { reg = <0x0 0x3000000 0x0 0x8000>; interrupt-parent = <&plic>; interrupts = <23 24 25 26 27 28 29 30>; + dma-channels = <4>; #dma-cells = <1>; }; diff --git a/arch/riscv/boot/dts/sifive/fu540-c000.dtsi b/arch/riscv/boot/dts/sifive/fu540-c000.dtsi index 0655b5c4201d..2bdfe7f06e4b 100644 --- a/arch/riscv/boot/dts/sifive/fu540-c000.dtsi +++ b/arch/riscv/boot/dts/sifive/fu540-c000.dtsi @@ -171,6 +171,7 @@ dma: dma@3000000 { reg = <0x0 0x3000000 0x0 0x8000>; interrupt-parent = <&plic0>; interrupts = <23 24 25 26 27 28 29 30>; + dma-channels = <4>; #dma-cells = <1>; }; uart1: serial@10011000 { From patchwork Fri Jan 14 09:17:40 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Zong Li X-Patchwork-Id: 532353 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2DB7BC4332F for ; Fri, 14 Jan 2022 09:17:56 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S239772AbiANJRz (ORCPT ); Fri, 14 Jan 2022 04:17:55 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:35466 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S239756AbiANJRz (ORCPT ); Fri, 14 Jan 2022 04:17:55 -0500 Received: from mail-pj1-x1035.google.com (mail-pj1-x1035.google.com [IPv6:2607:f8b0:4864:20::1035]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D6BCFC061401 for ; Fri, 14 Jan 2022 01:17:54 -0800 (PST) Received: by mail-pj1-x1035.google.com with SMTP id l10-20020a17090a384a00b001b22190e075so21382002pjf.3 for ; Fri, 14 Jan 2022 01:17:54 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sifive.com; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=95yOM2oPjDW4I8teUQkYRlUXa8kIk+GmIx7gO72jBTY=; b=YPEZ7ukMzI2cN/31vBowmfQTiXMWclpljDXP5gx0881agK7JAmHUVY9q42xB0ig2sz G+JyRiZ6CP9KFEzGsvCZTn+9VGV7e3bS76bD7Mrkyu1blZVp4jGMillm7mL8+h0/9Uuw UAH3zINjhF1GKPTpYEoelai6zo6X3Mg4G4ymZHOqyAmxnygG3BdqsAkX4yR87t7RGODz IRHxnTz8fFK3SyL+f8ExbfdTi2FOpmMiW0kplgbiJ2gLFUMwBgKD9YXT848RdGbVbCzH p/ih7UBtp26Hxy3VATbG+fbJuJeBXFTcVxcKRM+ukRA9rjqxgp0CkMZGM+h1UQ6Y0BKG u4GA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=95yOM2oPjDW4I8teUQkYRlUXa8kIk+GmIx7gO72jBTY=; b=0VPLsJzuR/pDYFhxeSev7fYEhGdDMB8eyGUN6b7kx6w1e6aEu0894xAQcbh9hXoHdI gvmN2A22ZVo9DOr/Cu5WsXZPyXIhnK7w0V3Zjzn5V5cf+OCGi/uqAnzePqUtHOE9xdue IZZPMMpUbOKKSsXRXecwZGzNvR3rwa0jQM/PjPdccoxuiY9njMsxTMwZ2zvXgZSelpOt 4/djLeVbTHygURTdWbjbQXsCkt3L4c8Lvzdc2bu1mHOmh1wLcOdq0/XAIT0eA6cP3Ofy 6kq01fqgHacSsVrMQ6spo/Nba/jbiTMv/bExRHGmo97p1TfyH3BjdzkLFTa6GlfVe+Zi uZCw== X-Gm-Message-State: AOAM532d7nvfOx9az2SQw4hCURaGPQG6J34djJZOuHMUmWR9SI/E0frZ QxuvauFGXyLsha5FEN9sGNJ7kQ== X-Google-Smtp-Source: ABdhPJwT/nt0sujPYxFREq4ukryghTeohQvw9hI58l80zXnLp1SZJVKh4R2Mb5hKDbfGttEkklp60A== X-Received: by 2002:a17:90b:4a8e:: with SMTP id lp14mr5351158pjb.6.1642151874394; Fri, 14 Jan 2022 01:17:54 -0800 (PST) Received: from hsinchu16.internal.sifive.com (59-124-168-89.hinet-ip.hinet.net. [59.124.168.89]) by smtp.gmail.com with ESMTPSA id z3sm4237179pgc.45.2022.01.14.01.17.51 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 14 Jan 2022 01:17:53 -0800 (PST) From: Zong Li To: robh+dt@kernel.org, paul.walmsley@sifive.com, palmer@dabbelt.com, aou@eecs.berkeley.edu, krzysztof.kozlowski@canonical.com, conor.dooley@microchip.com, geert@linux-m68k.org, bin.meng@windriver.com, green.wan@sifive.com, vkoul@kernel.org, dmaengine@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org Cc: Zong Li Subject: [PATCH v3 2/3] dt-bindings: Add dma-channels for pdma device node Date: Fri, 14 Jan 2022 17:17:40 +0800 Message-Id: <5db314b798cd9cfcb5cb61bc56515220b7d50315.1642151791.git.zong.li@sifive.com> X-Mailer: git-send-email 2.31.1 In-Reply-To: References: MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add dma-channels property, then we can determine how many channels there by device tree, rather than statically defines it in PDMA driver Signed-off-by: Zong Li --- .../devicetree/bindings/dma/sifive,fu540-c000-pdma.yaml | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/Documentation/devicetree/bindings/dma/sifive,fu540-c000-pdma.yaml b/Documentation/devicetree/bindings/dma/sifive,fu540-c000-pdma.yaml index d32a71b975fe..3dbb8caefc17 100644 --- a/Documentation/devicetree/bindings/dma/sifive,fu540-c000-pdma.yaml +++ b/Documentation/devicetree/bindings/dma/sifive,fu540-c000-pdma.yaml @@ -34,6 +34,12 @@ properties: minItems: 1 maxItems: 8 + dma-channels: + description: For backwards-compatible, the default value is 4 + minimum: 1 + maximum: 4 + default: 4 + '#dma-cells': const: 1 @@ -50,6 +56,7 @@ examples: dma@3000000 { compatible = "sifive,fu540-c000-pdma"; reg = <0x3000000 0x8000>; + dma-channels = <4>; interrupts = <23 24 25 26 27 28 29 30>; #dma-cells = <1>; }; From patchwork Fri Jan 14 09:17:41 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Zong Li X-Patchwork-Id: 532128 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4E923C433FE for ; Fri, 14 Jan 2022 09:18:00 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S239751AbiANJR7 (ORCPT ); Fri, 14 Jan 2022 04:17:59 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:35488 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S239784AbiANJR6 (ORCPT ); Fri, 14 Jan 2022 04:17:58 -0500 Received: from mail-pj1-x102e.google.com (mail-pj1-x102e.google.com [IPv6:2607:f8b0:4864:20::102e]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 0DFECC06173E for ; Fri, 14 Jan 2022 01:17:58 -0800 (PST) Received: by mail-pj1-x102e.google.com with SMTP id o3so12885872pjs.1 for ; Fri, 14 Jan 2022 01:17:58 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sifive.com; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=UnDHOgPgHxrpEfq7DGKwHo/JXpf5Q25m6hL15BhwKxo=; b=niPVQetGLY/pUlNg30eKEQ/IYzZi4OmcTVvIzI0ERhmfvbGC8tWx782CbK2myBiWXh dmzulVUdZMrKW47do7EuMg6wUDNXv71UCjEbNTFKIO7SdOeIfCSjmqWv4+plJOE/2Nki 1tOU3eImAfPdcEO1IzToFlneunoUKpMmvlBmlJ7dgLSJH7kcJhSac2WMRzTksKJuDVX2 xUP74Td3sketHGJhWiqo4o6+yymg+fw4M+AqLdaPMbqrD33oyirXdSaROio6fM7YpQJm Q27snM7DzwdyrU632YbM8zvumymhdPZ1W/tiNff6HxXyn/bKh0VlSM1XUyb7673CULw7 FSMA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=UnDHOgPgHxrpEfq7DGKwHo/JXpf5Q25m6hL15BhwKxo=; b=dTEfXb4cLb8+rUZg9g53Rc2VHGfwi6ZAgkomHVJqaL2S9CHq3Ry60FfgX1jV4gBiOw 09u9B39lqfVtmqbWWy8qAeBIVV8HgaZeug34kzA5VCQoAGEshW4Ip72Mhq2yVIO3GJIo eVCg+aZDIGakbSKAEXGhqpIKe6A3ZGakoV7Cc0K34s+DVnx+x9qHEiVYduDLolYPDL0d hiWfWk5VO9vexEZq+nWyZlAJREjdt4r9Lb4XC3biu/MK+Guo6eRSGecM0BcmLOseD7D7 91JixHuQlUwTH4Wm8RGemp0QtobmGz5xKB+zAZ7dvPp/Z1sXg5w9wo3wcIDnF0RHaSlM e/vA== X-Gm-Message-State: AOAM5304ZuJzrNUHMAwJfW/IEHA9JM7Y2j52fJjKs9BQxlb6SwILTS5r uKd4/BnofOdGNNL8OKLkD/4ScA== X-Google-Smtp-Source: ABdhPJyzg2ZT4GxwLjdse984P77qAjIRC7yU7HACLQpYCuRh79FQtcfOgBxIrntqjqdoRZkaHFHl3Q== X-Received: by 2002:a17:90a:3846:: with SMTP id l6mr19256262pjf.7.1642151877575; Fri, 14 Jan 2022 01:17:57 -0800 (PST) Received: from hsinchu16.internal.sifive.com (59-124-168-89.hinet-ip.hinet.net. [59.124.168.89]) by smtp.gmail.com with ESMTPSA id z3sm4237179pgc.45.2022.01.14.01.17.54 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 14 Jan 2022 01:17:57 -0800 (PST) From: Zong Li To: robh+dt@kernel.org, paul.walmsley@sifive.com, palmer@dabbelt.com, aou@eecs.berkeley.edu, krzysztof.kozlowski@canonical.com, conor.dooley@microchip.com, geert@linux-m68k.org, bin.meng@windriver.com, green.wan@sifive.com, vkoul@kernel.org, dmaengine@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org Cc: Zong Li Subject: [PATCH v3 3/3] dmaengine: sf-pdma: Get number of channel by device tree Date: Fri, 14 Jan 2022 17:17:41 +0800 Message-Id: <91a8fb6dff811b36db951ee98d955ad14a2a30eb.1642151791.git.zong.li@sifive.com> X-Mailer: git-send-email 2.31.1 In-Reply-To: References: MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org It currently assumes that there are always four channels, it would cause the error if there is actually less than four channels. Change that by getting number of channel from device tree. For backwards-compatible, it uses the default value (i.e. 4) when there is no 'dma-channels' information in dts. Signed-off-by: Zong Li --- drivers/dma/sf-pdma/Makefile | 2 ++ drivers/dma/sf-pdma/sf-pdma.c | 20 +++++++++++++------- drivers/dma/sf-pdma/sf-pdma.h | 8 ++------ 3 files changed, 17 insertions(+), 13 deletions(-) diff --git a/drivers/dma/sf-pdma/Makefile b/drivers/dma/sf-pdma/Makefile index 764552ab8d0a..cf1daff7e445 100644 --- a/drivers/dma/sf-pdma/Makefile +++ b/drivers/dma/sf-pdma/Makefile @@ -1 +1,3 @@ obj-$(CONFIG_SF_PDMA) += sf-pdma.o + +CFLAGS_sf-pdma.o += -O0 diff --git a/drivers/dma/sf-pdma/sf-pdma.c b/drivers/dma/sf-pdma/sf-pdma.c index f12606aeff87..1264add9897e 100644 --- a/drivers/dma/sf-pdma/sf-pdma.c +++ b/drivers/dma/sf-pdma/sf-pdma.c @@ -482,9 +482,7 @@ static void sf_pdma_setup_chans(struct sf_pdma *pdma) static int sf_pdma_probe(struct platform_device *pdev) { struct sf_pdma *pdma; - struct sf_pdma_chan *chan; struct resource *res; - int len, chans; int ret; const enum dma_slave_buswidth widths = DMA_SLAVE_BUSWIDTH_1_BYTE | DMA_SLAVE_BUSWIDTH_2_BYTES | @@ -492,13 +490,21 @@ static int sf_pdma_probe(struct platform_device *pdev) DMA_SLAVE_BUSWIDTH_16_BYTES | DMA_SLAVE_BUSWIDTH_32_BYTES | DMA_SLAVE_BUSWIDTH_64_BYTES; - chans = PDMA_NR_CH; - len = sizeof(*pdma) + sizeof(*chan) * chans; - pdma = devm_kzalloc(&pdev->dev, len, GFP_KERNEL); + pdma = devm_kzalloc(&pdev->dev, sizeof(*pdma), GFP_KERNEL); if (!pdma) return -ENOMEM; - pdma->n_chans = chans; + ret = of_property_read_u32(pdev->dev.of_node, "dma-channels", + &pdma->n_chans); + if (ret) { + dev_notice(&pdev->dev, "set number of channels to default value: 4\n"); + pdma->n_chans = PDMA_MAX_NR_CH; + } + + if (pdma->n_chans > PDMA_MAX_NR_CH) { + dev_err(&pdev->dev, "the number of channels exceeds the maximum\n"); + return -EINVAL; + } res = platform_get_resource(pdev, IORESOURCE_MEM, 0); pdma->membase = devm_ioremap_resource(&pdev->dev, res); @@ -556,7 +562,7 @@ static int sf_pdma_remove(struct platform_device *pdev) struct sf_pdma_chan *ch; int i; - for (i = 0; i < PDMA_NR_CH; i++) { + for (i = 0; i < pdma->n_chans; i++) { ch = &pdma->chans[i]; devm_free_irq(&pdev->dev, ch->txirq, ch); diff --git a/drivers/dma/sf-pdma/sf-pdma.h b/drivers/dma/sf-pdma/sf-pdma.h index 0c20167b097d..8127d792f639 100644 --- a/drivers/dma/sf-pdma/sf-pdma.h +++ b/drivers/dma/sf-pdma/sf-pdma.h @@ -22,11 +22,7 @@ #include "../dmaengine.h" #include "../virt-dma.h" -#define PDMA_NR_CH 4 - -#if (PDMA_NR_CH != 4) -#error "Please define PDMA_NR_CH to 4" -#endif +#define PDMA_MAX_NR_CH 4 #define PDMA_BASE_ADDR 0x3000000 #define PDMA_CHAN_OFFSET 0x1000 @@ -118,7 +114,7 @@ struct sf_pdma { void __iomem *membase; void __iomem *mappedbase; u32 n_chans; - struct sf_pdma_chan chans[PDMA_NR_CH]; + struct sf_pdma_chan chans[PDMA_MAX_NR_CH]; }; #endif /* _SF_PDMA_H */