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Use the pclk-sample property to reflect this feature in the device tree. Signed-off-by: Michael Riesch --- .../devicetree/bindings/media/video-interfaces.yaml | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/media/video-interfaces.yaml b/Documentation/devicetree/bindings/media/video-interfaces.yaml index 4391dce2caee..b7f77a255778 100644 --- a/Documentation/devicetree/bindings/media/video-interfaces.yaml +++ b/Documentation/devicetree/bindings/media/video-interfaces.yaml @@ -144,9 +144,10 @@ properties: pclk-sample: $ref: /schemas/types.yaml#/definitions/uint32 - enum: [ 0, 1 ] + enum: [ 0, 1, 2 ] description: - Sample data on rising (1) or falling (0) edge of the pixel clock signal. + Sample data on falling (0), rising (1) or both (2) edges of the pixel + clock signal. sync-on-green-active: $ref: /schemas/types.yaml#/definitions/uint32 From patchwork Fri Jan 14 10:57:55 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michael Riesch X-Patchwork-Id: 532349 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 70ABEC433EF for ; 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Add a mediabus flag that represents this feature. Signed-off-by: Michael Riesch --- drivers/media/v4l2-core/v4l2-fwnode.c | 23 +++++++++++++++++++---- include/media/v4l2-mediabus.h | 17 +++++++++-------- 2 files changed, 28 insertions(+), 12 deletions(-) diff --git a/drivers/media/v4l2-core/v4l2-fwnode.c b/drivers/media/v4l2-core/v4l2-fwnode.c index 00457e1e93f6..70adf6549f5b 100644 --- a/drivers/media/v4l2-core/v4l2-fwnode.c +++ b/drivers/media/v4l2-core/v4l2-fwnode.c @@ -296,10 +296,25 @@ v4l2_fwnode_endpoint_parse_parallel_bus(struct fwnode_handle *fwnode, if (!fwnode_property_read_u32(fwnode, "pclk-sample", &v)) { flags &= ~(V4L2_MBUS_PCLK_SAMPLE_RISING | - V4L2_MBUS_PCLK_SAMPLE_FALLING); - flags |= v ? V4L2_MBUS_PCLK_SAMPLE_RISING : - V4L2_MBUS_PCLK_SAMPLE_FALLING; - pr_debug("pclk-sample %s\n", v ? "high" : "low"); + V4L2_MBUS_PCLK_SAMPLE_FALLING | + V4L2_MBUS_PCLK_SAMPLE_DUALEDGE); + switch (v) { + case 0: + flags |= V4L2_MBUS_PCLK_SAMPLE_FALLING; + pr_debug("pclk-sample low\n"); + break; + case 1: + flags |= V4L2_MBUS_PCLK_SAMPLE_RISING; + pr_debug("pclk-sample high\n"); + break; + case 2: + flags |= V4L2_MBUS_PCLK_SAMPLE_DUALEDGE; + pr_debug("pclk-sample dual edge\n"); + break; + default: + pr_warn("invalid argument for pclk-sample"); + break; + } } if (!fwnode_property_read_u32(fwnode, "data-active", &v)) { diff --git a/include/media/v4l2-mediabus.h b/include/media/v4l2-mediabus.h index 841e190aedd9..c98f956ef586 100644 --- a/include/media/v4l2-mediabus.h +++ b/include/media/v4l2-mediabus.h @@ -57,17 +57,18 @@ #define V4L2_MBUS_VSYNC_ACTIVE_LOW BIT(5) #define V4L2_MBUS_PCLK_SAMPLE_RISING BIT(6) #define V4L2_MBUS_PCLK_SAMPLE_FALLING BIT(7) -#define V4L2_MBUS_DATA_ACTIVE_HIGH BIT(8) -#define V4L2_MBUS_DATA_ACTIVE_LOW BIT(9) +#define V4L2_MBUS_PCLK_SAMPLE_DUALEDGE BIT(8) +#define V4L2_MBUS_DATA_ACTIVE_HIGH BIT(9) +#define V4L2_MBUS_DATA_ACTIVE_LOW BIT(10) /* FIELD = 0/1 - Field1 (odd)/Field2 (even) */ -#define V4L2_MBUS_FIELD_EVEN_HIGH BIT(10) +#define V4L2_MBUS_FIELD_EVEN_HIGH BIT(11) /* FIELD = 1/0 - Field1 (odd)/Field2 (even) */ -#define V4L2_MBUS_FIELD_EVEN_LOW BIT(11) +#define V4L2_MBUS_FIELD_EVEN_LOW BIT(12) /* Active state of Sync-on-green (SoG) signal, 0/1 for LOW/HIGH respectively. */ -#define V4L2_MBUS_VIDEO_SOG_ACTIVE_HIGH BIT(12) -#define V4L2_MBUS_VIDEO_SOG_ACTIVE_LOW BIT(13) -#define V4L2_MBUS_DATA_ENABLE_HIGH BIT(14) -#define V4L2_MBUS_DATA_ENABLE_LOW BIT(15) +#define V4L2_MBUS_VIDEO_SOG_ACTIVE_HIGH BIT(13) +#define V4L2_MBUS_VIDEO_SOG_ACTIVE_LOW BIT(14) +#define V4L2_MBUS_DATA_ENABLE_HIGH BIT(15) +#define V4L2_MBUS_DATA_ENABLE_LOW BIT(16) /* Serial flags */ /* CSI-2 D-PHY number of data lanes. */