From patchwork Fri Jan 14 14:14:57 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marcel Ziswiler X-Patchwork-Id: 532121 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 57119C433EF for ; Fri, 14 Jan 2022 14:16:01 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S241458AbiANOP7 (ORCPT ); Fri, 14 Jan 2022 09:15:59 -0500 Received: from mout.perfora.net ([74.208.4.194]:38213 "EHLO mout.perfora.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S241444AbiANOP7 (ORCPT ); Fri, 14 Jan 2022 09:15:59 -0500 Received: from localhost.localdomain ([81.221.144.115]) by mrelay.perfora.net (mreueus002 [74.208.5.2]) with ESMTPSA (Nemesis) id 0Lkw9T-1mZrMM1Gx3-00apy9; Fri, 14 Jan 2022 15:15:31 +0100 From: Marcel Ziswiler To: linux-arm-kernel@lists.infradead.org Cc: Marek Vasut , Marcel Ziswiler , Laurent Pinchart , Arnd Bergmann , Fabio Estevam , Frank Rowand , NXP Linux Team , =?utf-8?q?Oliver_St=C3=A4bler?= , Olof Johansson , Pengutronix Kernel Team , Rob Herring , Sascha Hauer , Shawn Guo , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 01/11] arm64: dts: imx8mm: fix strange hex notation Date: Fri, 14 Jan 2022 15:14:57 +0100 Message-Id: <20220114141507.395271-2-marcel@ziswiler.com> X-Mailer: git-send-email 2.33.1 In-Reply-To: <20220114141507.395271-1-marcel@ziswiler.com> References: <20220114141507.395271-1-marcel@ziswiler.com> MIME-Version: 1.0 X-Provags-ID: V03:K1:oESOtOPuWo8sPx81MeeTQKrPBLqUe0dN4Uy33o5E5eZu8mHV/LN 1www8ErKZBd1DAjr/DflEkvkrA9HXV9NveOMa/3NQq8WVagTw8DqGFtoheRpv+t1AKY6b7x sW1jxEkIcmCnXWdTE0SHR7bZkvu/8KpXB9iRDdUKuqYJQMkhxM1CPJmoolCbeskU1exTVUq M/u+qPjxOXc50R7/iGw3A== X-UI-Out-Filterresults: notjunk:1;V03:K0:UkNeJRe/hQs=:HYIfJ6MdDX+fslLPC6fnfn qmIimZEiO/UoWZrSPRFMFMS+oGhzxDu733V6z2BMkvvd0+swtipGfBupD6Kk4FgmsjPEp3cj8 8pcLBgnviYlIGmWVX6Tdoc5oapu1r3eRK23fzDyNezncV0TvpQuV9vv7a8JFrVWwkmEuckI3R AypiidV9jCv1C4cHESAcia1lWtghQ+n8PlAZ/UWZH264azRftZ2jCBVsrDoFhC/n9DmEZkzGs UYrPgqMVnyK1hwNB8ehTY8el4iwvsgcjt3DSbFd2qENOQLoUPTUAjKHgv50FhVb7g0rjrWK1G iEz6cHv9+e73ckHJ8EiP+V48g1zz6tM3thGGKOldNfwNIhMapuP35wtG9LpwGjNiOkDzFJOLc 2wdX2rFPtj3WF3AZicQ6uXKintkuk/pAwApDuGs6uAznpRxNCjK8dy02bOugfN/FRlPFzi+MZ UOcMPC+2hfLdLr0Q1/aChEhyvUoYyXWlMSMTQ7PC94ct74CqnSyW/UHPkz9k9JmWQrG5+2YfA OVXi4ba7EpgG2UKjXNekmcWjJ1SWyXf+6cpd3wA03PGCzHm33abbLBLMNCaviLPL0bPQnbq7E 2qML+g+sc9rc3qCtGPChcfJ75ze1GTP2J+R6wswv4Oe3XNEjC0Vqim53G9n+DoBCvp7z8cS/J Sl5vjS1tBH2xdoTSma5yYOZsTggQKA8c500a5Vb0CzI0khnysVSQLQoZJ6gXZHWWl/Zs= Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Marcel Ziswiler Fix strange hex notation with mixed lower-case and upper-case letters. Signed-off-by: Marcel Ziswiler Reviewed-by: Laurent Pinchart --- Changes in v2: - Added Laurent's reviewed-by tag. arch/arm64/boot/dts/freescale/imx8mm-pinfunc.h | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/arch/arm64/boot/dts/freescale/imx8mm-pinfunc.h b/arch/arm64/boot/dts/freescale/imx8mm-pinfunc.h index a003e6af3353..c68a5e456025 100644 --- a/arch/arm64/boot/dts/freescale/imx8mm-pinfunc.h +++ b/arch/arm64/boot/dts/freescale/imx8mm-pinfunc.h @@ -279,7 +279,7 @@ #define MX8MM_IOMUXC_SAI5_RXD2_SAI1_TX_DATA4 0x150 0x3B8 0x000 0x1 0x0 #define MX8MM_IOMUXC_SAI5_RXD2_SAI1_TX_SYNC 0x150 0x3B8 0x4CC 0x2 0x1 #define MX8MM_IOMUXC_SAI5_RXD2_SAI5_TX_BCLK 0x150 0x3B8 0x4E8 0x3 0x0 -#define MX8MM_IOMUXC_SAI5_RXD2_PDM_DATA2 0x150 0x3B8 0x53c 0x4 0x0 +#define MX8MM_IOMUXC_SAI5_RXD2_PDM_DATA2 0x150 0x3B8 0x53C 0x4 0x0 #define MX8MM_IOMUXC_SAI5_RXD2_GPIO3_IO23 0x150 0x3B8 0x000 0x5 0x0 #define MX8MM_IOMUXC_SAI5_RXD3_SAI5_RX_DATA3 0x154 0x3BC 0x4E0 0x0 0x0 #define MX8MM_IOMUXC_SAI5_RXD3_SAI1_TX_DATA5 0x154 0x3BC 0x000 0x1 0x0 @@ -486,7 +486,7 @@ #define MX8MM_IOMUXC_SAI3_TXFS_SAI3_TX_SYNC 0x1D8 0x440 0x000 0x0 0x0 #define MX8MM_IOMUXC_SAI3_TXFS_GPT1_CAPTURE2 0x1D8 0x440 0x000 0x1 0x0 #define MX8MM_IOMUXC_SAI3_TXFS_SAI5_RX_DATA1 0x1D8 0x440 0x4D8 0x2 0x2 -#define MX8MM_IOMUXC_SAI3_TXFS_UART2_DCE_RX 0x1D8 0x440 0x4Fc 0x4 0x2 +#define MX8MM_IOMUXC_SAI3_TXFS_UART2_DCE_RX 0x1D8 0x440 0x4FC 0x4 0x2 #define MX8MM_IOMUXC_SAI3_TXFS_UART2_DTE_TX 0x1D8 0x440 0x000 0x4 0x0 #define MX8MM_IOMUXC_SAI3_TXFS_GPIO4_IO31 0x1D8 0x440 0x000 0x5 0x0 #define MX8MM_IOMUXC_SAI3_TXFS_TPSMP_HDATA1 0x1D8 0x440 0x000 0x7 0x0 @@ -494,7 +494,7 @@ #define MX8MM_IOMUXC_SAI3_TXC_GPT1_COMPARE2 0x1DC 0x444 0x000 0x1 0x0 #define MX8MM_IOMUXC_SAI3_TXC_SAI5_RX_DATA2 0x1DC 0x444 0x4DC 0x2 0x2 #define MX8MM_IOMUXC_SAI3_TXC_UART2_DCE_TX 0x1DC 0x444 0x000 0x4 0x0 -#define MX8MM_IOMUXC_SAI3_TXC_UART2_DTE_RX 0x1DC 0x444 0x4Fc 0x4 0x3 +#define MX8MM_IOMUXC_SAI3_TXC_UART2_DTE_RX 0x1DC 0x444 0x4FC 0x4 0x3 #define MX8MM_IOMUXC_SAI3_TXC_GPIO5_IO0 0x1DC 0x444 0x000 0x5 0x0 #define MX8MM_IOMUXC_SAI3_TXC_TPSMP_HDATA2 0x1DC 0x444 0x000 0x7 0x0 #define MX8MM_IOMUXC_SAI3_TXD_SAI3_TX_DATA0 0x1E0 0x448 0x000 0x0 0x0 From patchwork Fri Jan 14 14:14:58 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marcel Ziswiler X-Patchwork-Id: 532345 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 29F3FC433EF for ; Fri, 14 Jan 2022 14:15:51 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S241446AbiANOPu (ORCPT ); Fri, 14 Jan 2022 09:15:50 -0500 Received: from mout.perfora.net ([74.208.4.197]:59577 "EHLO mout.perfora.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S241444AbiANOPu (ORCPT ); Fri, 14 Jan 2022 09:15:50 -0500 Received: from localhost.localdomain ([81.221.144.115]) by mrelay.perfora.net (mreueus002 [74.208.5.2]) with ESMTPSA (Nemesis) id 0MA82J-1n1XkS28s5-00BN6P; Fri, 14 Jan 2022 15:15:33 +0100 From: Marcel Ziswiler To: linux-arm-kernel@lists.infradead.org Cc: Marek Vasut , Marcel Ziswiler , Rob Herring , Bartosz Golaszewski , Frank Rowand , Linus Walleij , Rob Herring , devicetree@vger.kernel.org, linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 02/11] dt-bindings: gpio: fix gpio-hog example Date: Fri, 14 Jan 2022 15:14:58 +0100 Message-Id: <20220114141507.395271-3-marcel@ziswiler.com> X-Mailer: git-send-email 2.33.1 In-Reply-To: <20220114141507.395271-1-marcel@ziswiler.com> References: <20220114141507.395271-1-marcel@ziswiler.com> MIME-Version: 1.0 X-Provags-ID: V03:K1:xFK4LGuItNGSNTma0SMQ7RSr3e4uAb9RyHyRiJaV7Rm55JquVNP 4H9TEkjq/YFvBUEIxp5kqPwnuY8/qU0WbXmx3+sUhycuV6X3m2Ic0C64aKxHnNAbaDSoXC6 MS9QFMRnWtq6qJo6JjnVOsMug2bya63AyKq/QppzD8xoixp24CiqpTGgh1ab6q4RzTmRMwp lLHSaS3JDfd0AwV2g1/2Q== X-UI-Out-Filterresults: notjunk:1;V03:K0:4ekKvrQAY8Y=:aDvkCu0gy8aAhHqnEsoYgN qUum0Q4W9Q8mgfL/EzUZljc3z715TVPC3aP5c2nC5AbAM8VNnklGvDSsqmVkvjAU/GJk+Qbhc DmydSLuuhcThG4w8/tOSQsT/3x4SPFVyNlVpRcTQRnl70a9Mq8CfznXAbv8qreRTRLcSPb68T k/rpqfp/60mXFQA6ZElppgLuiR6qMNL9Iuf6/CfFhf+H3vDkY0Hsniwlvg5bDubywynsbcKzY 6EDJ5eVbuFSWOG+9vwP6GaPcMRFV9uk3Ojx2QR3d0aDCfXFNzLUQCCvMs4sIKRPXE6KDbL2rl BIbwCJ60WMef0/uvRGmgrd4/+042dirkBfq1nqeHWekJwo99hnYom69mMfTDIUAUDfuRMIMXS 2Ih4/dlq/CZ7DyEjAfJFTJN3vTgs5QEcC/LcaTyojJ/99sTPEAQi7at46etuAphjFCw7c6H6g PjeHwC4Rwghd/xR/68NH92Is7mTQWNX7eTtxtLGISeyKuoRUX9tf+244ea4uwDM3aajnJdGbC PO5PZ/I2IaYwR1C/Ab3H/BdhTP5xKzAg2JLXrkiDP0DU5zx/Nr20N6szMBcCsNdowt7AjfM0B kIX7ELuywRdmta2kR4Fmz1grm9EJ4G6CEge4nxON+h0iH5WdkUGECkVsGPPmmcQNnYeccuyr6 n14OCB99focr6zD/zpDi9kTWeINN0nS5Zl6zYKWPOpfoXrJBCq97z0xgwUCt4koa1wcA= Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Marcel Ziswiler Even if this is no yaml yet at least fix the example to be compliant to later schema as e.g. found in gpio-pca95xx.yaml, fairchild,74hc595.yaml and gpio/fsl-imx-gpio.yaml. Signed-off-by: Marcel Ziswiler Acked-by: Rob Herring Reviewed-by: Linus Walleij --- Changes in v2: - Added Rob's ack. Documentation/devicetree/bindings/gpio/gpio.txt | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/gpio/gpio.txt b/Documentation/devicetree/bindings/gpio/gpio.txt index a8895d339bfe..5663e71b751f 100644 --- a/Documentation/devicetree/bindings/gpio/gpio.txt +++ b/Documentation/devicetree/bindings/gpio/gpio.txt @@ -213,7 +213,7 @@ Example of two SOC GPIO banks defined as gpio-controller nodes: gpio-controller; #gpio-cells = <2>; - line_b { + line_b-hog { gpio-hog; gpios = <6 0>; output-low; From patchwork Fri Jan 14 14:15:06 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marcel Ziswiler X-Patchwork-Id: 532120 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id CA380C433F5 for ; Fri, 14 Jan 2022 14:16:49 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S241492AbiANOQs (ORCPT ); Fri, 14 Jan 2022 09:16:48 -0500 Received: from mout.perfora.net ([74.208.4.196]:45893 "EHLO mout.perfora.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S241497AbiANOQe (ORCPT ); Fri, 14 Jan 2022 09:16:34 -0500 Received: from localhost.localdomain ([81.221.144.115]) by mrelay.perfora.net (mreueus002 [74.208.5.2]) with ESMTPSA (Nemesis) id 0LzuPF-1mDREb2D3L-014xUh; Fri, 14 Jan 2022 15:15:59 +0100 From: Marcel Ziswiler To: linux-arm-kernel@lists.infradead.org Cc: Marek Vasut , Marcel Ziswiler , Rob Herring , Alexander Stein , Christoph Niedermaier , Fabio Estevam , Frank Rowand , Krzysztof Kozlowski , Li Yang , Lucas Stach , Matthias Schiffer , Oleksij Rempel , Rob Herring , Russell King , Sascha Hauer , Shawn Guo , Tim Harvey , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 10/11] dt-bindings: arm: fsl: add toradex, verdin-imx8mm et al. Date: Fri, 14 Jan 2022 15:15:06 +0100 Message-Id: <20220114141507.395271-11-marcel@ziswiler.com> X-Mailer: git-send-email 2.33.1 In-Reply-To: <20220114141507.395271-1-marcel@ziswiler.com> References: <20220114141507.395271-1-marcel@ziswiler.com> MIME-Version: 1.0 X-Provags-ID: V03:K1:OR+boG3aUywor6tgQJXpB0l5ojyLb5iPHOorQkSo8FvWDbyOza3 /QgTrZPTBVykZpWQnHQ9bAWr+m1FlhQTf7VbNd2FWYK3XPG2JIqq0m/RTs3LOitBkW2IngI jOQYD0RUEZzvcIg1x+rCRN6DSTtyR62JUPVPeIt9F7KaFhbkJcVQjuDkOd0p6RMFouSahyb 1lU8qNUQU4R5ubzOe9nXg== X-UI-Out-Filterresults: notjunk:1;V03:K0:wTj6mcIvAn4=:DtFxquz8oVvjN7NCGZOHpV qvjBmKkuUwQv41QnjIv3lFz0LjO/JDnmHYih748gilh3g/UyZrJ+XxP3BNupw2HyGa7/MVasm 0WkxBUScazsruqTJfLwq80edltDkZGjFty6TLNsmcA0LlIootmvqaIHgq8HbXPfidnKrVfEbb knwCXL59rZnd3AhoVXIrniHbS0okTUfWMfnZCWijQjhUj7tC11bGUfrBPoRSChmj6L85pey1O v+NLurkt3Ha+D33FBT9TfICNw49BS2d9N/vWXNpk3qldcNFAC6sGZB/ztgvxEHrHkuLlbm13u Z2KaI42mXFlKD607Gyo6IMYsp01wmqn6cTZeMuHdj5d2JMfCXovI5/LFH5lX/+7ZkQBqrgARZ yXCsvNBjcmWX3Dr9lu5DBpulXiiHReHRmqrKYsL1Yi24tOAdQMZ2LCA27O2EPoT/GW7rx90zA YPots7hfMmz/FYU5s9PbPX32o0ZjH5i4QEfy9pK3CT6nbkgNthG47RW6/sIrjbNsurTV9u7hn uBadzYVTs7WIYqCyiwpJcNfub8X+HTijHNjGmAsywJ2VzNmslihCoLz2sxWK9BTWMfwRoNqdx ZF2zx6sSfeo0DWJldg5QOguL3Oodg5VV/aAULZS9fN80/ntx/RUQzgg1JkfYeUOWDOfkIScLN ajUsigXntXK0PZMROCZoew9B6/ns5B983/jgwhUWkV2ZZ7gmqOPgV7qjItwKSPpMjndjy4cB7 lxhJFeyTkA/AIaxK Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Marcel Ziswiler Add toradex,verdin-imx8mm for our new Verdin iMX8M Mini modules, its nonwifi and wifi variants and the carrier boards (both Dahlia and the Verdin Development Board) they may be mated in. Signed-off-by: Marcel Ziswiler Acked-by: Rob Herring --- Changes in v2: - Add Rob's acked-by tag. - Fix Colibri vs. Verdin copy/paste mistake. Thanks to Francesco Dolcini for pointing that out to me. .../devicetree/bindings/arm/fsl.yaml | 21 +++++++++++++++++++ 1 file changed, 21 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/fsl.yaml b/Documentation/devicetree/bindings/arm/fsl.yaml index 97f6eebad76a..7b7b6d3aa16f 100644 --- a/Documentation/devicetree/bindings/arm/fsl.yaml +++ b/Documentation/devicetree/bindings/arm/fsl.yaml @@ -770,6 +770,9 @@ properties: - gw,imx8mm-gw7901 # i.MX8MM Gateworks Board - gw,imx8mm-gw7902 # i.MX8MM Gateworks Board - kontron,imx8mm-n801x-som # i.MX8MM Kontron SL (N801X) SOM + - toradex,verdin-imx8mm # Verdin iMX8M Mini Modules + - toradex,verdin-imx8mm-nonwifi # Verdin iMX8M Mini Modules without Wi-Fi / BT + - toradex,verdin-imx8mm-wifi # Verdin iMX8M Mini Wi-Fi / BT Modules - variscite,var-som-mx8mm # i.MX8MM Variscite VAR-SOM-MX8MM module - const: fsl,imx8mm @@ -787,6 +790,24 @@ properties: - const: kontron,imx8mm-n801x-som - const: fsl,imx8mm + - description: Toradex Boards with Verdin iMX8M Mini Modules + items: + - enum: + - toradex,verdin-imx8mm-nonwifi-dahlia # Verdin iMX8M Mini Module on Dahlia + - toradex,verdin-imx8mm-nonwifi-dev # Verdin iMX8M Mini Module on Verdin Development Board + - const: toradex,verdin-imx8mm-nonwifi # Verdin iMX8M Mini Module without Wi-Fi / BT + - const: toradex,verdin-imx8mm # Verdin iMX8M Mini Module + - const: fsl,imx8mm + + - description: Toradex Boards with Verdin iMX8M Mini Wi-Fi / BT Modules + items: + - enum: + - toradex,verdin-imx8mm-wifi-dahlia # Verdin iMX8M Mini Wi-Fi / BT Module on Dahlia + - toradex,verdin-imx8mm-wifi-dev # Verdin iMX8M Mini Wi-Fi / BT M. on Verdin Development B. + - const: toradex,verdin-imx8mm-wifi # Verdin iMX8M Mini Wi-Fi / BT Module + - const: toradex,verdin-imx8mm # Verdin iMX8M Mini Module + - const: fsl,imx8mm + - description: Variscite VAR-SOM-MX8MM based boards items: - const: variscite,var-som-mx8mm-symphony From patchwork Fri Jan 14 14:15:07 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marcel Ziswiler X-Patchwork-Id: 532344 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 14F32C433F5 for ; Fri, 14 Jan 2022 14:16:37 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S241525AbiANOQf (ORCPT ); Fri, 14 Jan 2022 09:16:35 -0500 Received: from mout.perfora.net ([74.208.4.196]:45755 "EHLO mout.perfora.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S241489AbiANOQe (ORCPT ); Fri, 14 Jan 2022 09:16:34 -0500 Received: from localhost.localdomain ([81.221.144.115]) by mrelay.perfora.net (mreueus002 [74.208.5.2]) with ESMTPSA (Nemesis) id 0MYQD9-1mmDoZ2QGv-00V4mH; Fri, 14 Jan 2022 15:16:03 +0100 From: Marcel Ziswiler To: linux-arm-kernel@lists.infradead.org Cc: Marek Vasut , Marcel Ziswiler , Alex Marginean , Alexander Stein , Arnd Bergmann , Chester Lin , Dong Aisheng , Fabio Estevam , Frank Rowand , Jagan Teki , Krzysztof Kozlowski , Michael Walle , NXP Linux Team , Olof Johansson , Pengutronix Kernel Team , Rob Herring , Sascha Hauer , Shawn Guo , Tim Harvey , Vladimir Oltean , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 11/11] arm64: dts: freescale: add initial support for verdin imx8m mini Date: Fri, 14 Jan 2022 15:15:07 +0100 Message-Id: <20220114141507.395271-12-marcel@ziswiler.com> X-Mailer: git-send-email 2.33.1 In-Reply-To: <20220114141507.395271-1-marcel@ziswiler.com> References: <20220114141507.395271-1-marcel@ziswiler.com> MIME-Version: 1.0 X-Provags-ID: V03:K1:OSO+u4dOmQyCDtejil27HgAI7xg41KyC2MjepEvw0HGeR4bSFm0 hmctKoxOPEy5khbRX2AdfavRVmW6hFBS1Etm/NlQu3KqCNq08s9rilI3vXLT081lFn+1ivj J9BE4qrQ/qJpMV+nkjw/Zi0/tg1Tc7WBl2DlvrD1/Oxtp6Ntwk/hb2q2dpu9i56px7EGoct SKc//If41erP/fhQWSimg== X-UI-Out-Filterresults: notjunk:1;V03:K0:a7AxaQmqQpc=:y5o4QrDXgGiHMfiPosSzKD ePLM4O5zXDPwbUsnf0/Re/jzP4Rvt4GPMLc9wO7POM5pshXTCblU/QvX1Cr0KP5p+gi+Zi0xY lOA3jbQXL6dbOZlblpeXm9An/HtnY3ZhtGQj3GbFvyVpqzFIViybop0TxGfObZlDOLLYc9i8L vEPDjKwTaGj3sg4xFl0Bvb0n8RDKZTfj4/Y5r5B66WlMF7ZBdtYxJGAJSz/Fa17zsNyGd70AZ eFHUFIcIqqO7G1aAmItcbZK3Heavv1oSE9aURyFufjTcwIba6D4sZ4aMSJy3Lr27KWGDqYxR6 hm+lekfJJXXKJJlRDAd6V8uJ3Lqh3Ed1TsBQPWS9cGf0HaGdjcsgnomss7r5m0yuWNr80Xiil EdkajMaM88Zw8RAEJd3YP6h+wRCwcNQ/0sgdac5OfB8fQLMG1m2j27MZdqcd4RFDb267SMX+o fR6I2gONq7ut4eNNdx5yxk3Wz4id/ZN5vrVkq45lEmGMtRc01g0+Rl8YP1IfEMiC9KqH9TYof YYprGIwgvyxhTgxWjAEfrjTfN1nAyWKP7Jwp9X+GeFm1iZcbgfkFO37S/nbLreBTjchAtQdHm AEaKAPxuIAN2rMm6npll34/rffqDdUXVKRPVcwucK7S0SbTXwZXZqybu/FQ/4D6bHsfGrZtxS Zm5TUdx5CG8Iwem6y7pe6N+bkDCEZxrVxIay6bERfB5wS6Oiaulj+te/G8dsDMNOqZ8CifTtf LRM1karhAIUw4HDy Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Marcel Ziswiler This patch adds the device tree to support Toradex Verdin iMX8M Mini a computer on module which can be used on different carrier boards. The module consists of an NXP i.MX 8M Mini family SoC (either i.MX 8M Mini Quad or 8M Mini DualLite), a PCA9450A PMIC, a Gigabit Ethernet PHY, 1 or 2 GB of LPDDR4 RAM, an eMMC, a TLA2024 ADC, an I2C EEPROM, an RX8130 RTC, an optional SPI CAN controller plus an optional Bluetooth/ Wi-Fi module. Anything that is not self-contained on the module is disabled by default. The device tree for the Dahlia includes the module's device tree and enables the supported peripherals of the carrier board. The device tree for the Verdin Development Board includes the module's device tree as well as the Dahlia one as it is a superset and supports almost all peripherals available. So far there is no display functionality supported at all but basic console UART, USB host, eMMC and Ethernet and PCIe functionality work fine. Signed-off-by: Marcel Ziswiler --- Changes in v2: - Remove bootargs which will be filled in by the bootloader as requested by Krzysztof. - Remove the previously #ifdefed-out spi-nor as requested by Krzysztof. - Fix capitalisation in cover-letter. arch/arm64/boot/dts/freescale/Makefile | 4 + .../dts/freescale/imx8mm-verdin-dahlia.dtsi | 143 ++ .../boot/dts/freescale/imx8mm-verdin-dev.dtsi | 67 + .../imx8mm-verdin-nonwifi-dahlia.dts | 18 + .../freescale/imx8mm-verdin-nonwifi-dev.dts | 18 + .../dts/freescale/imx8mm-verdin-nonwifi.dtsi | 75 + .../freescale/imx8mm-verdin-wifi-dahlia.dts | 18 + .../dts/freescale/imx8mm-verdin-wifi-dev.dts | 18 + .../dts/freescale/imx8mm-verdin-wifi.dtsi | 95 ++ .../boot/dts/freescale/imx8mm-verdin.dtsi | 1267 +++++++++++++++++ 10 files changed, 1723 insertions(+) create mode 100644 arch/arm64/boot/dts/freescale/imx8mm-verdin-dahlia.dtsi create mode 100644 arch/arm64/boot/dts/freescale/imx8mm-verdin-dev.dtsi create mode 100644 arch/arm64/boot/dts/freescale/imx8mm-verdin-nonwifi-dahlia.dts create mode 100644 arch/arm64/boot/dts/freescale/imx8mm-verdin-nonwifi-dev.dts create mode 100644 arch/arm64/boot/dts/freescale/imx8mm-verdin-nonwifi.dtsi create mode 100644 arch/arm64/boot/dts/freescale/imx8mm-verdin-wifi-dahlia.dts create mode 100644 arch/arm64/boot/dts/freescale/imx8mm-verdin-wifi-dev.dts create mode 100644 arch/arm64/boot/dts/freescale/imx8mm-verdin-wifi.dtsi create mode 100644 arch/arm64/boot/dts/freescale/imx8mm-verdin.dtsi diff --git a/arch/arm64/boot/dts/freescale/Makefile b/arch/arm64/boot/dts/freescale/Makefile index 6d8f0a532587..04380f2e44a2 100644 --- a/arch/arm64/boot/dts/freescale/Makefile +++ b/arch/arm64/boot/dts/freescale/Makefile @@ -63,6 +63,10 @@ dtb-$(CONFIG_ARCH_MXC) += imx8mm-venice-gw72xx-0x.dtb dtb-$(CONFIG_ARCH_MXC) += imx8mm-venice-gw73xx-0x.dtb dtb-$(CONFIG_ARCH_MXC) += imx8mm-venice-gw7901.dtb dtb-$(CONFIG_ARCH_MXC) += imx8mm-venice-gw7902.dtb +dtb-$(CONFIG_ARCH_MXC) += imx8mm-verdin-nonwifi-dahlia.dtb +dtb-$(CONFIG_ARCH_MXC) += imx8mm-verdin-nonwifi-dev.dtb +dtb-$(CONFIG_ARCH_MXC) += imx8mm-verdin-wifi-dahlia.dtb +dtb-$(CONFIG_ARCH_MXC) += imx8mm-verdin-wifi-dev.dtb dtb-$(CONFIG_ARCH_MXC) += imx8mn-beacon-kit.dtb dtb-$(CONFIG_ARCH_MXC) += imx8mn-bsh-smm-s2.dtb dtb-$(CONFIG_ARCH_MXC) += imx8mn-bsh-smm-s2pro.dtb diff --git a/arch/arm64/boot/dts/freescale/imx8mm-verdin-dahlia.dtsi b/arch/arm64/boot/dts/freescale/imx8mm-verdin-dahlia.dtsi new file mode 100644 index 000000000000..b5bf025c74a2 --- /dev/null +++ b/arch/arm64/boot/dts/freescale/imx8mm-verdin-dahlia.dtsi @@ -0,0 +1,143 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +/* + * Copyright 2022 Toradex + */ + +/ { + sound_card: sound-card { + compatible = "simple-audio-card"; + simple-audio-card,bitclock-master = <&dailink_master>; + simple-audio-card,format = "i2s"; + simple-audio-card,frame-master = <&dailink_master>; + simple-audio-card,name = "imx8mm-wm8904"; + simple-audio-card,routing = + "Headphone Jack", "HPOUTL", + "Headphone Jack", "HPOUTR", + "IN2L", "Line In Jack", + "IN2R", "Line In Jack", + "Headphone Jack", "MICBIAS", + "IN1L", "Headphone Jack"; + simple-audio-card,widgets = + "Microphone", "Headphone Jack", + "Headphone", "Headphone Jack", + "Line", "Line In Jack"; + + dailink_master: simple-audio-card,codec { + clocks = <&clk IMX8MM_CLK_SAI2_ROOT>; + sound-dai = <&wm8904_1a>; + }; + + simple-audio-card,cpu { + sound-dai = <&sai2>; + }; + }; +}; + +/* Verdin SPI_1 */ +&ecspi2 { + status = "okay"; +}; + +/* EEPROM on display adapter boards */ +&eeprom_display_adapter { + status = "okay"; +}; + +/* EEPROM on Verdin Development board */ +&eeprom_carrier_board { + status = "okay"; +}; + +&fec1 { + status = "okay"; +}; + +/* Verdin QSPI_1 */ +&flexspi { + status = "okay"; +}; + +/* Current measurement into module VCC */ +&hwmon { + status = "okay"; +}; + +&hwmon_temp { + vs-supply = <®_1p8v>; + status = "okay"; +}; + +&i2c3 { + status = "okay"; +}; + +/* Verdin I2C_1 */ +&i2c4 { + status = "okay"; + + /* Audio Codec */ + wm8904_1a: codec@1a { + compatible = "wlf,wm8904"; + AVDD-supply = <®_3p3v>; + clocks = <&clk IMX8MM_CLK_SAI2_ROOT>; + clock-names = "mclk"; + CPVDD-supply = <®_3p3v>; + DBVDD-supply = <®_3p3v>; + DCVDD-supply = <®_3p3v>; + MICVDD-supply = <®_3p3v>; + reg = <0x1a>; + #sound-dai-cells = <0>; + }; +}; + +/* Verdin PCIE_1 */ + +/* Verdin PWM_3_DSI */ +&pwm1 { + status = "okay"; +}; + +/* Verdin PWM_1 */ +&pwm2 { + status = "okay"; +}; + +/* Verdin PWM_2 */ +&pwm3 { + status = "okay"; +}; + +/* VERDIN I2S_1 */ +&sai2 { + status = "okay"; +}; + +/* Verdin UART_3 */ +&uart1 { + status = "okay"; +}; + +/* Verdin UART_1 */ +&uart2 { + status = "okay"; +}; + +/* Verdin UART_2 */ +&uart3 { + status = "okay"; +}; + +/* Verdin USB_1 */ +&usbotg1 { + status = "okay"; +}; + +/* Verdin USB_2 */ +&usbotg2 { + status = "okay"; +}; + +/* Verdin SD_1 */ +&usdhc2 { + status = "okay"; +}; diff --git a/arch/arm64/boot/dts/freescale/imx8mm-verdin-dev.dtsi b/arch/arm64/boot/dts/freescale/imx8mm-verdin-dev.dtsi new file mode 100644 index 000000000000..f35d22dc546b --- /dev/null +++ b/arch/arm64/boot/dts/freescale/imx8mm-verdin-dev.dtsi @@ -0,0 +1,67 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +/* + * Copyright 2022 Toradex + */ + +#include "imx8mm-verdin-dahlia.dtsi" + +/ { + sound_card: sound-card { + compatible = "simple-audio-card"; + simple-audio-card,bitclock-master = <&dailink_master>; + simple-audio-card,format = "i2s"; + simple-audio-card,frame-master = <&dailink_master>; + simple-audio-card,name = "imx8mm-nau8822"; + simple-audio-card,routing = + "Headphones", "LHP", + "Headphones", "RHP", + "Speaker", "LSPK", + "Speaker", "RSPK", + "Line Out", "AUXOUT1", + "Line Out", "AUXOUT2", + "LAUX", "Line In", + "RAUX", "Line In", + "LMICP", "Mic In", + "RMICP", "Mic In"; + simple-audio-card,widgets = + "Headphones", "Headphones", + "Line Out", "Line Out", + "Speaker", "Speaker", + "Microphone", "Mic In", + "Line", "Line In"; + + dailink_master: simple-audio-card,codec { + clocks = <&clk IMX8MM_CLK_SAI2_ROOT>; + sound-dai = <&nau8822_1a>; + }; + + simple-audio-card,cpu { + sound-dai = <&sai2>; + }; + }; +}; + +&gpio_expander_21 { + status = "okay"; +}; + +/* Verdin I2C_1 */ +&i2c4 { + /* Audio Codec */ + nau8822_1a: codec@1a { + compatible = "nuvoton,nau8822"; + reg = <0x1a>; + }; +}; + +/* Verdin UART_1, connector X50 through RS485 transceiver */ +&uart2 { + linux,rs485-enabled-at-boot-time; + rs485-rts-active-low; + rs485-rx-during-tx; +}; + +/* Limit frequency on dev board due to long traces and bad signal integrity */ +&usdhc2 { + max-frequency = <100000000>; +}; diff --git a/arch/arm64/boot/dts/freescale/imx8mm-verdin-nonwifi-dahlia.dts b/arch/arm64/boot/dts/freescale/imx8mm-verdin-nonwifi-dahlia.dts new file mode 100644 index 000000000000..d64ff378a152 --- /dev/null +++ b/arch/arm64/boot/dts/freescale/imx8mm-verdin-nonwifi-dahlia.dts @@ -0,0 +1,18 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +/* + * Copyright 2022 Toradex + */ + +/dts-v1/; + +#include "imx8mm-verdin.dtsi" +#include "imx8mm-verdin-nonwifi.dtsi" +#include "imx8mm-verdin-dahlia.dtsi" + +/ { + model = "Toradex Verdin iMX8M Mini on Dahlia Board"; + compatible = "toradex,verdin-imx8mm-nonwifi-dahlia", + "toradex,verdin-imx8mm-nonwifi", + "toradex,verdin-imx8mm", + "fsl,imx8mm"; +}; diff --git a/arch/arm64/boot/dts/freescale/imx8mm-verdin-nonwifi-dev.dts b/arch/arm64/boot/dts/freescale/imx8mm-verdin-nonwifi-dev.dts new file mode 100644 index 000000000000..6ae71ecac8de --- /dev/null +++ b/arch/arm64/boot/dts/freescale/imx8mm-verdin-nonwifi-dev.dts @@ -0,0 +1,18 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +/* + * Copyright 2022 Toradex + */ + +/dts-v1/; + +#include "imx8mm-verdin.dtsi" +#include "imx8mm-verdin-nonwifi.dtsi" +#include "imx8mm-verdin-dev.dtsi" + +/ { + model = "Toradex Verdin iMX8M Mini on Verdin Development Board"; + compatible = "toradex,verdin-imx8mm-nonwifi-dev", + "toradex,verdin-imx8mm-nonwifi", + "toradex,verdin-imx8mm", + "fsl,imx8mm"; +}; diff --git a/arch/arm64/boot/dts/freescale/imx8mm-verdin-nonwifi.dtsi b/arch/arm64/boot/dts/freescale/imx8mm-verdin-nonwifi.dtsi new file mode 100644 index 000000000000..9aff9dde1a02 --- /dev/null +++ b/arch/arm64/boot/dts/freescale/imx8mm-verdin-nonwifi.dtsi @@ -0,0 +1,75 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +/* + * Copyright 2022 Toradex + */ + +&gpio3 { + gpio-line-names = "SODIMM_52", + "SODIMM_54", + "SODIMM_64", + "SODIMM_21", + "SODIMM_206", + "SODIMM_76", + "SODIMM_56", + "SODIMM_58", + "SODIMM_60", + "SODIMM_62", + "SODIMM_162", + "SODIMM_164", + "SODIMM_166", + "SODIMM_168", + "SODIMM_66", + "SODIMM_17", + "", + "SODIMM_156", + "SODIMM_160", + "SODIMM_244", + "SODIMM_250", + "SODIMM_48", + "SODIMM_44", + "SODIMM_42", + "SODIMM_46"; +}; + +&gpio4 { + gpio-line-names = "SODIMM_102", + "SODIMM_90", + "SODIMM_92", + "SODIMM_94", + "SODIMM_96", + "SODIMM_100", + "SODIMM_148", + "SODIMM_152", + "SODIMM_154", + "SODIMM_174", + "SODIMM_120", + "SODIMM_104", + "SODIMM_106", + "SODIMM_108", + "SODIMM_112", + "SODIMM_114", + "SODIMM_116", + "SODIMM_150", + "SODIMM_118", + "", + "SODIMM_88", + "SODIMM_149", + "SODIMM_147", + "SODIMM_36", + "SODIMM_32", + "SODIMM_30", + "SODIMM_34", + "SODIMM_38", + "SODIMM_252", + "SODIMM_133", + "SODIMM_135", + "SODIMM_129"; +}; + +&usdhc3 { + bus-width = <4>; + pinctrl-names = "default", "state_100mhz", "state_200mhz"; + pinctrl-0 = <&pinctrl_usdhc3>; + pinctrl-1 = <&pinctrl_usdhc3_100mhz>; + pinctrl-2 = <&pinctrl_usdhc3_200mhz>; +}; diff --git a/arch/arm64/boot/dts/freescale/imx8mm-verdin-wifi-dahlia.dts b/arch/arm64/boot/dts/freescale/imx8mm-verdin-wifi-dahlia.dts new file mode 100644 index 000000000000..d424c475cba1 --- /dev/null +++ b/arch/arm64/boot/dts/freescale/imx8mm-verdin-wifi-dahlia.dts @@ -0,0 +1,18 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +/* + * Copyright 2022 Toradex + */ + +/dts-v1/; + +#include "imx8mm-verdin.dtsi" +#include "imx8mm-verdin-wifi.dtsi" +#include "imx8mm-verdin-dahlia.dtsi" + +/ { + model = "Toradex Verdin iMX8M Mini WB on Dahlia Board"; + compatible = "toradex,verdin-imx8mm-wifi-dahlia", + "toradex,verdin-imx8mm-wifi", + "toradex,verdin-imx8mm", + "fsl,imx8mm"; +}; diff --git a/arch/arm64/boot/dts/freescale/imx8mm-verdin-wifi-dev.dts b/arch/arm64/boot/dts/freescale/imx8mm-verdin-wifi-dev.dts new file mode 100644 index 000000000000..ef952021832e --- /dev/null +++ b/arch/arm64/boot/dts/freescale/imx8mm-verdin-wifi-dev.dts @@ -0,0 +1,18 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +/* + * Copyright 2022 Toradex + */ + +/dts-v1/; + +#include "imx8mm-verdin.dtsi" +#include "imx8mm-verdin-wifi.dtsi" +#include "imx8mm-verdin-dev.dtsi" + +/ { + model = "Toradex Verdin iMX8M Mini WB on Verdin Development Board"; + compatible = "toradex,verdin-imx8mm-wifi-dev", + "toradex,verdin-imx8mm-wifi", + "toradex,verdin-imx8mm", + "fsl,imx8mm"; +}; diff --git a/arch/arm64/boot/dts/freescale/imx8mm-verdin-wifi.dtsi b/arch/arm64/boot/dts/freescale/imx8mm-verdin-wifi.dtsi new file mode 100644 index 000000000000..c400770c1df5 --- /dev/null +++ b/arch/arm64/boot/dts/freescale/imx8mm-verdin-wifi.dtsi @@ -0,0 +1,95 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +/* + * Copyright 2022 Toradex + */ + +/ { + reg_wifi_en: regulator-wifi-en { + compatible = "regulator-fixed"; + enable-active-high; + gpio = <&gpio3 25 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_wifi_pwr_en>; + regulator-max-microvolt = <3300000>; + regulator-min-microvolt = <3300000>; + regulator-name = "PDn_AW-CM276NF"; + startup-delay-us = <2000>; + }; +}; + +/* On-module Wi-Fi */ +&usdhc3 { + bus-width = <4>; + keep-power-in-suspend; + non-removable; + pinctrl-names = "default", "state_100mhz", "state_200mhz"; + pinctrl-0 = <&pinctrl_usdhc3>, <&pinctrl_wifi_ctrl>; + pinctrl-1 = <&pinctrl_usdhc3_100mhz>, <&pinctrl_wifi_ctrl>; + pinctrl-2 = <&pinctrl_usdhc3_200mhz>, <&pinctrl_wifi_ctrl>; + vmmc-supply = <®_wifi_en>; + wifi-host; + status = "okay"; +}; + +&gpio3 { + gpio-line-names = "SODIMM_52", + "SODIMM_54", + "SODIMM_64", + "SODIMM_21", + "SODIMM_206", + "SODIMM_76", + "SODIMM_56", + "SODIMM_58", + "SODIMM_60", + "SODIMM_62", + "", + "", + "", + "", + "SODIMM_66", + "SODIMM_17", + "", + "", + "", + "SODIMM_244", + "SODIMM_250", + "SODIMM_48", + "SODIMM_44", + "SODIMM_42", + "SODIMM_46"; +}; + +&gpio4 { + gpio-line-names = "SODIMM_102", + "SODIMM_90", + "SODIMM_92", + "SODIMM_94", + "SODIMM_96", + "SODIMM_100", + "", + "", + "", + "SODIMM_174", + "SODIMM_120", + "SODIMM_104", + "SODIMM_106", + "SODIMM_108", + "SODIMM_112", + "SODIMM_114", + "SODIMM_116", + "", + "SODIMM_118", + "", + "SODIMM_88", + "SODIMM_149", + "SODIMM_147", + "SODIMM_36", + "SODIMM_32", + "SODIMM_30", + "SODIMM_34", + "SODIMM_38", + "SODIMM_252", + "SODIMM_133", + "SODIMM_135", + "SODIMM_129"; +}; diff --git a/arch/arm64/boot/dts/freescale/imx8mm-verdin.dtsi b/arch/arm64/boot/dts/freescale/imx8mm-verdin.dtsi new file mode 100644 index 000000000000..2fa9dc3dd92b --- /dev/null +++ b/arch/arm64/boot/dts/freescale/imx8mm-verdin.dtsi @@ -0,0 +1,1267 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +/* + * Copyright 2022 Toradex + */ + +#include "dt-bindings/pwm/pwm.h" +#include "imx8mm.dtsi" + +/ { + chosen { + stdout-path = &uart1; + }; + + aliases { + rtc0 = &rtc_i2c; + rtc1 = &snvs_rtc; + }; + + backlight: backlight { + compatible = "pwm-backlight"; + brightness-levels = <0 45 63 88 119 158 203 255>; + default-brightness-level = <4>; + /* Verdin I2S_2_D_OUT (DSI_1_BKL_EN/DSI_1_BKL_EN_LVDS, SODIMM 46) */ + enable-gpios = <&gpio3 24 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2s_2_d_out_dsi_1_bkl_en>; + power-supply = <®_3p3v>; + /* Verdin PWM_3_DSI/PWM_3_DSI_LVDS (SODIMM 19) */ + pwms = <&pwm1 0 6666667 PWM_POLARITY_INVERTED>; + status = "disabled"; + }; + + /* Fixed clock dedicated to SPI CAN controller */ + clk20m: oscillator { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <20000000>; + }; + + gpio-keys { + compatible = "gpio-keys"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_gpio_keys>; + + wakeup { + debounce-interval = <10>; + /* Verdin CTRL_WAKE1_MICO# (SODIMM 252) */ + gpios = <&gpio4 28 GPIO_ACTIVE_LOW>; + label = "Wake-Up"; + linux,code = ; + wakeup-source; + }; + }; + + /* Carrier Board Supplies */ + reg_1p8v: regulator-1p8v { + compatible = "regulator-fixed"; + regulator-max-microvolt = <1800000>; + regulator-min-microvolt = <1800000>; + regulator-name = "+V1.8_SW"; + }; + + reg_3p3v: regulator-3p3v { + compatible = "regulator-fixed"; + regulator-max-microvolt = <3300000>; + regulator-min-microvolt = <3300000>; + regulator-name = "+V3.3_SW"; + }; + + reg_5p0v: regulator-5p0v { + compatible = "regulator-fixed"; + regulator-max-microvolt = <5000000>; + regulator-min-microvolt = <5000000>; + regulator-name = "+V5_SW"; + }; + + /* Non PMIC On-module Supplies */ + reg_ethphy: regulator-ethphy { + compatible = "regulator-fixed"; + enable-active-high; + gpio = <&gpio2 20 GPIO_ACTIVE_HIGH>; /* PMIC_EN_ETH */ + off-on-delay = <500000>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_reg_eth>; + regulator-boot-on; + regulator-max-microvolt = <3300000>; + regulator-min-microvolt = <3300000>; + regulator-name = "+V3.3_ETH"; + startup-delay-us = <200000>; + }; + + reg_usb_otg1_vbus: regulator-usb-otg1 { + compatible = "regulator-fixed"; + enable-active-high; + /* Verdin USB_1_EN (SODIMM 155) */ + gpio = <&gpio1 12 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_reg_usb1_en>; + regulator-max-microvolt = <5000000>; + regulator-min-microvolt = <5000000>; + regulator-name = "usb_otg1_vbus"; + }; + + reg_usb_otg2_vbus: regulator-usb-otg2 { + compatible = "regulator-fixed"; + enable-active-high; + /* Verdin USB_2_EN (SODIMM 185) */ + gpio = <&gpio1 14 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_reg_usb2_en>; + regulator-max-microvolt = <5000000>; + regulator-min-microvolt = <5000000>; + regulator-name = "usb_otg2_vbus"; + }; + + reg_usdhc2_vmmc: regulator-usdhc2 { + compatible = "regulator-fixed"; + enable-active-high; + /* Verdin SD_1_PWR_EN (SODIMM 76) */ + gpio = <&gpio3 5 GPIO_ACTIVE_HIGH>; + off-on-delay = <100000>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usdhc2_pwr_en>; + regulator-max-microvolt = <3300000>; + regulator-min-microvolt = <3300000>; + regulator-name = "+V3.3_SD"; + startup-delay-us = <2000>; + }; + + reserved-memory { + #address-cells = <2>; + #size-cells = <2>; + ranges; + + /* Use the kernel configuration settings instead */ + /delete-node/ linux,cma; + + rpmsg_reserved: rpmsg@b8000000 { + no-map; + reg = <0 0xb8000000 0 0x400000>; + }; + }; +}; + +&A53_0 { + cpu-supply = <®_vdd_arm>; +}; + +&A53_1 { + cpu-supply = <®_vdd_arm>; +}; + +&A53_2 { + cpu-supply = <®_vdd_arm>; +}; + +&A53_3 { + cpu-supply = <®_vdd_arm>; +}; + +&ddrc { + operating-points-v2 = <&ddrc_opp_table>; + + ddrc_opp_table: opp-table { + compatible = "operating-points-v2"; + + opp-25M { + opp-hz = /bits/ 64 <25000000>; + }; + + opp-100M { + opp-hz = /bits/ 64 <100000000>; + }; + + opp-750M { + opp-hz = /bits/ 64 <750000000>; + }; + }; +}; + +/* Verdin SPI_1 */ +&ecspi2 { + #address-cells = <1>; + #size-cells = <0>; + cs-gpios = <&gpio5 13 GPIO_ACTIVE_LOW>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_ecspi2>; +}; + +/* Verdin CAN_1 and CAN_2 (On-module) */ +&ecspi3 { + #address-cells = <1>; + #size-cells = <0>; + cs-gpios = <&gpio5 25 GPIO_ACTIVE_LOW>, + <&gpio1 5 GPIO_ACTIVE_LOW>; + spi-num-chipselects = <2>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_ecspi3>; + status = "okay"; + + can1: can@0 { + compatible = "microchip,mcp251xfd"; + clocks = <&clk20m>; + interrupts-extended = <&gpio1 6 IRQ_TYPE_EDGE_FALLING>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_can1_int>; + reg = <0>; + spi-max-frequency = <8500000>; + }; + + can2: can@1 { + compatible = "microchip,mcp251xfd"; + clocks = <&clk20m>; + interrupts-extended = <&gpio1 7 IRQ_TYPE_EDGE_FALLING>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_can2_int>; + reg = <1>; + spi-max-frequency = <8500000>; + /* Not assembled on regular SKUs */ + status = "disabled"; + }; +}; + +/* Verdin ETH_1 (On-module PHY) */ +&fec1 { + fsl,magic-packet; + phy-handle = <ðphy0>; + phy-mode = "rgmii-id"; + phy-supply = <®_ethphy>; + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&pinctrl_fec1>; + pinctrl-1 = <&pinctrl_fec1_sleep>; + + mdio { + #address-cells = <1>; + #size-cells = <0>; + + ethphy0: ethernet-phy@7 { + compatible = "ethernet-phy-ieee802.3-c22"; + interrupt-parent = <&gpio1>; + interrupts = <10 IRQ_TYPE_LEVEL_LOW>; + micrel,led-mode = <0>; + reg = <7>; + }; + }; +}; + +/* Verdin QSPI_1 */ +&flexspi { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_flexspi0>; +}; + +&gpio1 { + gpio-line-names = "SODIMM_216", + "SODIMM_19", + "", + "", + "", + "", + "", + "", + "SODIMM_220", + "SODIMM_222", + "", + "SODIMM_218", + "SODIMM_155", + "SODIMM_157", + "SODIMM_185", + "SODIMM_187"; +}; + +&gpio2 { + gpio-line-names = "", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "SODIMM_84", + "SODIMM_78", + "SODIMM_74", + "SODIMM_80", + "SODIMM_82", + "SODIMM_70", + "SODIMM_72"; +}; + +&gpio5 { + gpio-line-names = "SODIMM_131", + "", + "SODIMM_91", + "SODIMM_16", + "SODIMM_15", + "SODIMM_208", + "SODIMM_137", + "SODIMM_139", + "SODIMM_141", + "SODIMM_143", + "SODIMM_196", + "SODIMM_200", + "SODIMM_198", + "SODIMM_202", + "", + "", + "SODIMM_55", + "SODIMM_53", + "SODIMM_95", + "SODIMM_93", + "SODIMM_14", + "SODIMM_12", + "", + "", + "", + "", + "SODIMM_210", + "SODIMM_212", + "SODIMM_151", + "SODIMM_153"; + + ctrl_sleep_moci-hog { + gpio-hog; + /* Verdin CTRL_SLEEP_MOCI# (SODIMM 256) */ + gpios = <1 GPIO_ACTIVE_HIGH>; + line-name = "CTRL_SLEEP_MOCI#"; + output-high; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_ctrl_sleep_moci>; + }; +}; + +/* On-module I2C */ +&i2c1 { + clock-frequency = <400000>; + pinctrl-names = "default", "gpio"; + pinctrl-0 = <&pinctrl_i2c1>; + pinctrl-1 = <&pinctrl_i2c1_gpio>; + scl-gpios = <&gpio5 14 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; + sda-gpios = <&gpio5 15 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; + status = "okay"; + + pca9450: pmic@25 { + compatible = "nxp,pca9450a"; + interrupt-parent = <&gpio1>; + /* PMIC PCA9450 PMIC_nINT GPIO1_IO3 */ + interrupts = <3 IRQ_TYPE_LEVEL_LOW>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_pmic>; + reg = <0x25>; + sd-vsel-gpios = <&gpio1 4 GPIO_ACTIVE_HIGH>; + + regulators { + reg_vdd_soc: BUCK1 { + nxp,dvs-run-voltage = <850000>; + nxp,dvs-standby-voltage = <800000>; + regulator-always-on; + regulator-boot-on; + regulator-max-microvolt = <850000>; + regulator-min-microvolt = <800000>; + regulator-name = "+VDD_SOC"; + regulator-ramp-delay = <3125>; + }; + + reg_vdd_arm: BUCK2 { + nxp,dvs-run-voltage = <950000>; + nxp,dvs-standby-voltage = <850000>; + regulator-always-on; + regulator-boot-on; + regulator-max-microvolt = <950000>; + regulator-min-microvolt = <850000>; + regulator-name = "+VDD_ARM"; + regulator-ramp-delay = <3125>; + }; + + reg_vdd_dram: BUCK3 { + regulator-always-on; + regulator-boot-on; + regulator-max-microvolt = <950000>; + regulator-min-microvolt = <850000>; + regulator-name = "+VDD_GPU_VPU_DDR"; + }; + + reg_vdd_3v3: BUCK4 { + regulator-always-on; + regulator-boot-on; + regulator-max-microvolt = <3300000>; + regulator-min-microvolt = <3300000>; + regulator-name = "+V3.3"; + }; + + reg_vdd_1v8: BUCK5 { + regulator-always-on; + regulator-boot-on; + regulator-max-microvolt = <1800000>; + regulator-min-microvolt = <1800000>; + regulator-name = "PWR_1V8_MOCI"; + }; + + reg_nvcc_dram: BUCK6 { + regulator-always-on; + regulator-boot-on; + regulator-max-microvolt = <1100000>; + regulator-min-microvolt = <1100000>; + regulator-name = "+VDD_DDR"; + }; + + reg_nvcc_snvs: LDO1 { + regulator-always-on; + regulator-boot-on; + regulator-max-microvolt = <1800000>; + regulator-min-microvolt = <1800000>; + regulator-name = "+V1.8_SNVS"; + }; + + reg_vdd_snvs: LDO2 { + regulator-always-on; + regulator-boot-on; + regulator-max-microvolt = <900000>; + regulator-min-microvolt = <800000>; + regulator-name = "+V0.8_SNVS"; + }; + + reg_vdda: LDO3 { + regulator-always-on; + regulator-boot-on; + regulator-max-microvolt = <1800000>; + regulator-min-microvolt = <1800000>; + regulator-name = "+V1.8A"; + }; + + reg_vdd_phy: LDO4 { + regulator-always-on; + regulator-boot-on; + regulator-max-microvolt = <900000>; + regulator-min-microvolt = <900000>; + regulator-name = "+V0.9_MIPI"; + }; + + reg_nvcc_sd: LDO5 { + regulator-max-microvolt = <3300000>; + regulator-min-microvolt = <1800000>; + regulator-name = "+V3.3_1.8_SD"; + }; + }; + }; + + rtc_i2c: rtc@32 { + compatible = "epson,rx8130"; + reg = <0x32>; + }; + + adc@49 { + compatible = "ti,ads1015"; + reg = <0x49>; + #address-cells = <1>; + #size-cells = <0>; + + /* Verdin I2C_1 (ADC_4 - ADC_3) */ + channel@0 { + reg = <0>; + ti,datarate = <4>; + ti,gain = <2>; + }; + + /* Verdin I2C_1 (ADC_4 - ADC_1) */ + channel@1 { + reg = <1>; + ti,datarate = <4>; + ti,gain = <2>; + }; + + /* Verdin I2C_1 (ADC_3 - ADC_1) */ + channel@2 { + reg = <2>; + ti,datarate = <4>; + ti,gain = <2>; + }; + + /* Verdin I2C_1 (ADC_2 - ADC_1) */ + channel@3 { + reg = <3>; + ti,datarate = <4>; + ti,gain = <2>; + }; + + /* Verdin I2C_1 ADC_4 */ + channel@4 { + reg = <4>; + ti,datarate = <4>; + ti,gain = <2>; + }; + + /* Verdin I2C_1 ADC_3 */ + channel@5 { + reg = <5>; + ti,datarate = <4>; + ti,gain = <2>; + }; + + /* Verdin I2C_1 ADC_2 */ + channel@6 { + reg = <6>; + ti,datarate = <4>; + ti,gain = <2>; + }; + + /* Verdin I2C_1 ADC_1 */ + channel@7 { + reg = <7>; + ti,datarate = <4>; + ti,gain = <2>; + }; + }; + + eeprom@50 { + compatible = "st,24c02"; + pagesize = <16>; + reg = <0x50>; + }; +}; + +/* Verdin I2C_2_DSI */ +&i2c2 { + clock-frequency = <10000>; + pinctrl-names = "default", "gpio"; + pinctrl-0 = <&pinctrl_i2c2>; + pinctrl-1 = <&pinctrl_i2c2_gpio>; + scl-gpios = <&gpio5 16 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; + sda-gpios = <&gpio5 17 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; + status = "disabled"; +}; + +/* Verdin I2C_3_HDMI N/A */ + +/* Verdin I2C_4_CSI */ +&i2c3 { + clock-frequency = <400000>; + pinctrl-names = "default", "gpio"; + pinctrl-0 = <&pinctrl_i2c3>; + pinctrl-1 = <&pinctrl_i2c3_gpio>; + scl-gpios = <&gpio5 18 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; + sda-gpios = <&gpio5 19 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; +}; + +/* Verdin I2C_1 */ +&i2c4 { + clock-frequency = <400000>; + pinctrl-names = "default", "gpio"; + pinctrl-0 = <&pinctrl_i2c4>; + pinctrl-1 = <&pinctrl_i2c4_gpio>; + scl-gpios = <&gpio5 20 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; + sda-gpios = <&gpio5 21 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; + + gpio_expander_21: gpio-expander@21 { + compatible = "nxp,pcal6416"; + #gpio-cells = <2>; + gpio-controller; + reg = <0x21>; + status = "disabled"; + vcc-supply = <®_3p3v>; + }; + + lvds_ti_sn65dsi83: bridge@2c { + compatible = "ti,sn65dsi83"; + /* Verdin GPIO_9_DSI (SN65DSI84 IRQ, SODIMM 17, unused) */ + /* Verdin GPIO_10_DSI (SODIMM 21) */ + enable-gpios = <&gpio3 3 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_gpio_10_dsi>; + reg = <0x2c>; + status = "disabled"; + }; + + /* Current measurement into module VCC */ + hwmon: hwmon@40 { + compatible = "ti,ina219"; + reg = <0x40>; + shunt-resistor = <10000>; + status = "disabled"; + }; + + hdmi_lontium_lt8912: hdmi@48 { + compatible = "lontium,lt8912b"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_gpio_10_dsi>, <&pinctrl_pwm_3_dsi_hpd_gpio>; + reg = <0x48>; + /* Verdin GPIO_9_DSI (LT8912 INT, SODIMM 17, unused) */ + /* Verdin GPIO_10_DSI (SODIMM 21) */ + reset-gpios = <&gpio3 3 GPIO_ACTIVE_LOW>; + status = "disabled"; + }; + + atmel_mxt_ts: touch@4a { + compatible = "atmel,maxtouch"; + /* Verdin GPIO_9_DSI */ + /* (TOUCH_INT#, SODIMM 17, also routed to SN65dsi83 IRQ albeit currently unused) */ + interrupt-parent = <&gpio3>; + interrupts = <15 IRQ_TYPE_EDGE_FALLING>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_gpio_9_dsi>, <&pinctrl_i2s_2_bclk_touch_reset>; + reg = <0x4a>; + /* Verdin I2S_2_BCLK (TOUCH_RESET#, SODIMM 42) */ + reset-gpios = <&gpio3 23 GPIO_ACTIVE_HIGH>; + status = "disabled"; + }; + + /* Temperature sensor on carrier board */ + hwmon_temp: sensor@4f { + compatible = "ti,tmp75c"; + reg = <0x4f>; + status = "disabled"; + }; + + /* EEPROM on display adapter (MIPI DSI Display Adapter) */ + eeprom_display_adapter: eeprom@50 { + compatible = "st,24c02"; + pagesize = <16>; + reg = <0x50>; + status = "disabled"; + }; + + /* EEPROM on carrier board */ + eeprom_carrier_board: eeprom@57 { + compatible = "st,24c02"; + pagesize = <16>; + reg = <0x57>; + status = "disabled"; + }; +}; + +/* Verdin PWM_3_DSI */ +&pwm1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_pwm_1>; + #pwm-cells = <3>; +}; + +/* Verdin PWM_1 */ +&pwm2 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_pwm_2>; + #pwm-cells = <3>; +}; + +/* Verdin PWM_2 */ +&pwm3 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_pwm_3>; + #pwm-cells = <3>; +}; + +/* VERDIN I2S_1 */ +&sai2 { + #sound-dai-cells = <0>; + assigned-clock-parents = <&clk IMX8MM_AUDIO_PLL1_OUT>; + assigned-clock-rates = <24576000>; + assigned-clocks = <&clk IMX8MM_CLK_SAI2>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_sai2>; +}; + +&snvs_pwrkey { + status = "okay"; +}; + +/* Verdin UART_3, used as the Linux console */ +&uart1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart1>; +}; + +/* Verdin UART_1 */ +&uart2 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart2>; + uart-has-rtscts; +}; + +/* Verdin UART_2 */ +&uart3 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart3>; + uart-has-rtscts; +}; + +/* Verdin UART_4 */ +/* + * Resource allocated to M4 by default, must not be accessed from Cortex-A35 or you get an OOPS + */ +&uart4 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart4>; +}; + +&usbmisc1 { + vbus-wakeup-supply = <®_vdd_3v3>; +}; + +&usbmisc2 { + vbus-wakeup-supply = <®_vdd_3v3>; +}; + +/* Verdin USB_1 */ +&usbotg1 { + adp-disable; + dr_mode = "otg"; + hnp-disable; + over-current-active-low; + picophy,dc-vol-level-adjust = <7>; + picophy,pre-emp-curr-control = <3>; + srp-disable; + vbus-supply = <®_usb_otg1_vbus>; +}; + +/* Verdin USB_2 */ +&usbotg2 { + dr_mode = "host"; + over-current-active-low; + picophy,dc-vol-level-adjust = <7>; + picophy,pre-emp-curr-control = <3>; + vbus-supply = <®_usb_otg2_vbus>; +}; + +&usbphynop1 { + vcc-supply = <®_vdd_3v3>; +}; + +&usbphynop2 { + vcc-supply = <®_vdd_3v3>; +}; + +/* On-module eMMC */ +&usdhc1 { + bus-width = <8>; + keep-power-in-suspend; + non-removable; + pinctrl-names = "default", "state_100mhz", "state_200mhz"; + pinctrl-0 = <&pinctrl_usdhc1>; + pinctrl-1 = <&pinctrl_usdhc1_100mhz>; + pinctrl-2 = <&pinctrl_usdhc1_200mhz>; + pm-ignore-notify; + status = "okay"; +}; + +/* Verdin SD_1 */ +&usdhc2 { + bus-width = <4>; + cd-gpios = <&gpio2 12 GPIO_ACTIVE_LOW>; + disable-wp; + pinctrl-names = "default", "state_100mhz", "state_200mhz"; + pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_cd>; + pinctrl-1 = <&pinctrl_usdhc2_100mhz>, <&pinctrl_usdhc2_cd>; + pinctrl-2 = <&pinctrl_usdhc2_200mhz>, <&pinctrl_usdhc2_cd>; + vmmc-supply = <®_usdhc2_vmmc>; +}; + +&wdog1 { + fsl,ext-reset-output; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_wdog>; + status = "okay"; +}; + +&iomuxc { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_gpio1>, <&pinctrl_gpio2>, + <&pinctrl_gpio3>, <&pinctrl_gpio4>, + <&pinctrl_gpio7>, <&pinctrl_gpio8>, + <&pinctrl_gpio_hog1>, <&pinctrl_gpio_hog2>, <&pinctrl_gpio_hog3>, + <&pinctrl_pmic_tpm_ena>; + + pinctrl_can1_int: can1intgrp { + fsl,pins = + ; /* CAN_1_SPI_INT#_1.8V */ + }; + + pinctrl_can2_int: can2intgrp { + fsl,pins = + ; /* CAN_2_SPI_INT#_1.8V */ + }; + + pinctrl_ctrl_sleep_moci: ctrlsleepmocigrp { + fsl,pins = + ; /* SODIMM 256 */ + }; + + pinctrl_ecspi2: ecspi2grp { + fsl,pins = + , /* SODIMM 196 */ + , /* SODIMM 200 */ + , /* SODIMM 198 */ + ; /* SODIMM 202 */ + }; + + pinctrl_ecspi3: ecspi3grp { + fsl,pins = + , /* CAN_SPI_SCK_1.8V */ + , /* CAN_SPI_MOSI_1.8V */ + , /* CAN_SPI_MISO_1.8V */ + , /* CAN_1_SPI_CS_1.8V# */ + ; /* CAN_2_SPI_CS#_1.8V */ + }; + + pinctrl_fec1: fec1grp { + fsl,pins = + , + , + , + , + , + , + , + , + , + , + , + , + , + , + ; + }; + + pinctrl_fec1_sleep: fec1-sleepgrp { + fsl,pins = + , + , + , + , + , + , + , + , + , + , + , + , + , + , + ; + }; + + pinctrl_flexspi0: flexspi0grp { + fsl,pins = + , /* SODIMM 52 */ + , /* SODIMM 54 */ + , /* SODIMM 64 */ + , /* SODIMM 66 */ + , /* SODIMM 56 */ + , /* SODIMM 58 */ + , /* SODIMM 60 */ + ; /* SODIMM 62 */ + }; + + pinctrl_gpio1: gpio1grp { + fsl,pins = + ; /* SODIMM 206 */ + }; + + pinctrl_gpio2: gpio2grp { + fsl,pins = + ; /* SODIMM 208 */ + }; + + pinctrl_gpio3: gpio3grp { + fsl,pins = + ; /* SODIMM 210 */ + }; + + pinctrl_gpio4: gpio4grp { + fsl,pins = + ; /* SODIMM 212 */ + }; + + pinctrl_gpio5: gpio5grp { + fsl,pins = + ; /* SODIMM 216 */ + }; + + pinctrl_gpio6: gpio6grp { + fsl,pins = + ; /* SODIMM 218 */ + }; + + pinctrl_gpio7: gpio7grp { + fsl,pins = + ; /* SODIMM 220 */ + }; + + pinctrl_gpio8: gpio8grp { + fsl,pins = + ; /* SODIMM 222 */ + }; + + /* Verdin GPIO_9_DSI (pulled-up as active-low) */ + pinctrl_gpio_9_dsi: gpio9dsigrp { + fsl,pins = + ; /* SODIMM 17 */ + }; + + /* Verdin GPIO_10_DSI */ + pinctrl_gpio_10_dsi: gpio10dsigrp { + fsl,pins = + ; /* SODIMM 21 */ + }; + + pinctrl_gpio_hog1: gpiohog1grp { + fsl,pins = + , /* SODIMM 88 */ + , /* SODIMM 90 */ + , /* SODIMM 92 */ + , /* SODIMM 94 */ + , /* SODIMM 96 */ + , /* SODIMM 100 */ + , /* SODIMM 102 */ + , /* SODIMM 104 */ + , /* SODIMM 106 */ + , /* SODIMM 108 */ + , /* SODIMM 112 */ + , /* SODIMM 114 */ + , /* SODIMM 116 */ + , /* SODIMM 118 */ + ; /* SODIMM 120 */ + }; + + pinctrl_gpio_hog2: gpiohog2grp { + fsl,pins = + ; /* SODIMM 91 */ + }; + + pinctrl_gpio_hog3: gpiohog3grp { + fsl,pins = + , /* SODIMM 157 */ + ; /* SODIMM 187 */ + }; + + pinctrl_gpio_keys: gpiokeysgrp { + fsl,pins = + ; /* SODIMM 252 */ + }; + + /* On-module I2C */ + pinctrl_i2c1: i2c1grp { + fsl,pins = + , /* PMIC_I2C_SCL */ + ; /* PMIC_I2C_SDA */ + }; + + pinctrl_i2c1_gpio: i2c1gpiogrp { + fsl,pins = + , /* PMIC_I2C_SCL */ + ; /* PMIC_I2C_SDA */ + }; + + /* Verdin I2C_4_CSI */ + pinctrl_i2c2: i2c2grp { + fsl,pins = + , /* SODIMM 55 */ + ; /* SODIMM 53 */ + }; + + pinctrl_i2c2_gpio: i2c2gpiogrp { + fsl,pins = + , /* SODIMM 55 */ + ; /* SODIMM 53 */ + }; + + /* Verdin I2C_2_DSI */ + pinctrl_i2c3: i2c3grp { + fsl,pins = + , /* SODIMM 95 */ + ; /* SODIMM 93 */ + }; + + pinctrl_i2c3_gpio: i2c3gpiogrp { + fsl,pins = + , /* SODIMM 95 */ + ; /* SODIMM 93 */ + }; + + /* Verdin I2C_1 */ + pinctrl_i2c4: i2c4grp { + fsl,pins = + , /* SODIMM 14 */ + ; /* SODIMM 12 */ + }; + + pinctrl_i2c4_gpio: i2c4gpiogrp { + fsl,pins = + , /* SODIMM 14 */ + ; /* SODIMM 12 */ + }; + + /* Verdin I2S_2_BCLK (TOUCH_RESET#) */ + pinctrl_i2s_2_bclk_touch_reset: i2s2bclktouchresetgrp { + fsl,pins = + ; /* SODIMM 42 */ + }; + + /* Verdin I2S_2_D_OUT shared with SAI5 */ + pinctrl_i2s_2_d_out_dsi_1_bkl_en: i2s2doutdsi1bklengrp { + fsl,pins = + ; /* SODIMM 46 */ + }; + + pinctrl_pcie0: pcie0grp { + fsl,pins = + , /* SODIMM 244 */ + /* PMIC_EN_PCIe_CLK, unused */ + ; + }; + + pinctrl_pmic: pmicirqgrp { + fsl,pins = + ; /* PMIC_INT# */ + }; + + /* Verdin PWM_3_DSI shared with GPIO1_IO1 */ + pinctrl_pwm_1: pwm1grp { + fsl,pins = + ; /* SODIMM 19 */ + }; + + pinctrl_pwm_2: pwm2grp { + fsl,pins = + ; /* SODIMM 15 */ + }; + + pinctrl_pwm_3: pwm3grp { + fsl,pins = + ; /* SODIMM 16 */ + }; + + /* Verdin PWM_3_DSI (pulled-down as active-high) shared with PWM1_OUT */ + pinctrl_pwm_3_dsi_hpd_gpio: pwm3dsihpdgpiogrp { + fsl,pins = + ; /* SODIMM 19 */ + }; + + pinctrl_reg_eth: regethgrp { + fsl,pins = + ; /* PMIC_EN_ETH */ + }; + + pinctrl_reg_usb1_en: regusb1engrp { + fsl,pins = + ; /* SODIMM 155 */ + }; + + pinctrl_reg_usb2_en: regusb2engrp { + fsl,pins = + ; /* SODIMM 185 */ + }; + + pinctrl_sai2: sai2grp { + fsl,pins = + , /* SODIMM 32 */ + , /* SODIMM 30 */ + , /* SODIMM 38 */ + , /* SODIMM 36 */ + ; /* SODIMM 34 */ + }; + + pinctrl_sai5: sai5grp { + fsl,pins = + , /* SODIMM 48 */ + , /* SODIMM 44 */ + , /* SODIMM 42 */ + ; /* SODIMM 46 */ + }; + + /* control signal for optional ATTPM20P or SE050 */ + pinctrl_pmic_tpm_ena: pmictpmenagrp { + fsl,pins = + ; /* PMIC_TPM_ENA */ + }; + + pinctrl_tsp: tspgrp { + fsl,pins = + , /* SODIMM 148 */ + , /* SODIMM 152 */ + , /* SODIMM 154 */ + , /* SODIMM 179 */ + ; /* SODIMM 150 */ + }; + + pinctrl_uart1: uart1grp { + fsl,pins = + , /* SODIMM 149 */ + ; /* SODIMM 147 */ + }; + + pinctrl_uart2: uart2grp { + fsl,pins = + , /* SODIMM 129 */ + , /* SODIMM 131 */ + , /* SODIMM 133 */ + ; /* SODIMM 135 */ + }; + + pinctrl_uart3: uart3grp { + fsl,pins = + , /* SODIMM 137 */ + , /* SODIMM 139 */ + , /* SODIMM 141 */ + ; /* SODIMM 143 */ + }; + + pinctrl_uart4: uart4grp { + fsl,pins = + , /* SODIMM 151 */ + ; /* SODIMM 153 */ + }; + + pinctrl_usdhc1: usdhc1grp { + fsl,pins = + , + , + , + , + , + , + , + , + , + , + , + ; + }; + + pinctrl_usdhc1_100mhz: usdhc1-100mhzgrp { + fsl,pins = + , + , + , + , + , + , + , + , + , + , + , + ; + }; + + pinctrl_usdhc1_200mhz: usdhc1-200mhzgrp { + fsl,pins = + , + , + , + , + , + , + , + , + , + , + , + ; + }; + + pinctrl_usdhc2_cd: usdhc2cdgrp { + fsl,pins = + ; /* SODIMM 84 */ + }; + + pinctrl_usdhc2_pwr_en: usdhc2pwrengrp { + fsl,pins = + ; /* SODIMM 76 */ + }; + + pinctrl_usdhc2: usdhc2grp { + fsl,pins = + , /* SODIMM 78 */ + , /* SODIMM 74 */ + , /* SODIMM 80 */ + , /* SODIMM 82 */ + , /* SODIMM 70 */ + , /* SODIMM 72 */ + ; + }; + + pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp { + fsl,pins = + , + , + , + , + , + , + ; + }; + + pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp { + fsl,pins = + , + , + , + , + , + , + ; + }; + + /* On-module Wi-Fi/BT or type specific SDHC interface */ + /* (e.g. on X52 extension slot of Verdin Development Board) */ + pinctrl_usdhc3: usdhc3grp { + fsl,pins = + , + , + , + , + , + ; + }; + + pinctrl_usdhc3_100mhz: usdhc3-100mhzgrp { + fsl,pins = + , + , + , + , + , + ; + }; + + pinctrl_usdhc3_200mhz: usdhc3-200mhzgrp { + fsl,pins = + , + , + , + , + , + ; + }; + + pinctrl_wdog: wdoggrp { + fsl,pins = + ; /* PMIC_WDI */ + }; + + pinctrl_wifi_ctrl: wifictrlgrp { + fsl,pins = + , /* WIFI_WKUP_BT */ + , /* WIFI_W_WKUP_HOST */ + ; /* WIFI_WKUP_WLAN */ + }; + + pinctrl_wifi_i2s: bti2sgrp { + fsl,pins = + , /* WIFI_TX_BCLK */ + , /* WIFI_TX_DATA0 */ + , /* WIFI_TX_SYNC */ + ; /* WIFI_RX_DATA0 */ + }; + + pinctrl_wifi_pwr_en: wifipwrengrp { + fsl,pins = + ; /* PMIC_EN_WIFI */ + }; +};