From patchwork Thu Jan 13 14:48:51 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Claudiu Beznea X-Patchwork-Id: 531832 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 179B8C433FE for ; Thu, 13 Jan 2022 14:48:03 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235775AbiAMOsB (ORCPT ); Thu, 13 Jan 2022 09:48:01 -0500 Received: from esa.microchip.iphmx.com ([68.232.153.233]:19844 "EHLO esa.microchip.iphmx.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235772AbiAMOsB (ORCPT ); Thu, 13 Jan 2022 09:48:01 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1642085281; x=1673621281; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=Cn32FVsFXj7kfAuzJ2kdL23yH/APr88N4Syy5Ekn8OM=; b=zZRlmmwYzMH00kshQxD9Tb5uPnMV3qN92552dOqPr4ehw/mCzdg6I4j2 rFgyCyE4o2T/HH2orVEARIdO33m4Bdb+wuE/XZvenDkpeBkBMZoSPAsI5 g95Oj6Wbw3oLzU2qgAUMl2euCJgmJRvq/CcSRDNr1Nz8iCSlzBGKfwo72 27wUehWQPTRKQgSJ2Rj4TGFQ5xP+QeRF/0Cg1zY8ZKQEKYHn3QvAZ1PQV kaZxxIHFFjxIR7yAzJrVaE44x+8ppKPY551Z78ojbQUC+0OIDRAZ0uW+9 el6Av4neyJluM8ltvEaoz+BtO/dnmw2GyxNtRn5qVj/cc/nJ4Je08Mvo7 w==; IronPort-SDR: fhquOLUgqGAvIcJkV2498oPQ6QQ7zP3v7mekOLklhyq1LekwwggcAVs0+xjrfgZ6mukC52xtSf vSLQ5bY0A6mJnx7mcyHhrSTUllwlY1EYJJZ6FjHLyNEJCT1EBcv2/uSgX8RVBGO/dgdGeDXX96 nHws1Rz7K0Ysj32+GLRHD7HkFOt08poGmDqCct+cmnyf+CcHaqL33a9jzcykTAiNm7uPsumKCQ EVplH+y2VqRHIWP8I0LsGMorosP3wJbF/FasQZ306vOxfG0EfYnMrJ7OXpNdSmC+5uVGNBxnsJ bJZhRVV61vMUFPcucJ2E8tPq X-IronPort-AV: E=Sophos;i="5.88,286,1635231600"; d="scan'208";a="150108166" Received: from smtpout.microchip.com (HELO email.microchip.com) ([198.175.253.82]) by esa3.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 13 Jan 2022 07:47:59 -0700 Received: from chn-vm-ex03.mchp-main.com (10.10.85.151) by chn-vm-ex03.mchp-main.com (10.10.85.151) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2375.17; Thu, 13 Jan 2022 07:47:58 -0700 Received: from localhost.localdomain (10.10.115.15) by chn-vm-ex03.mchp-main.com (10.10.85.151) with Microsoft SMTP Server id 15.1.2375.17 via Frontend Transport; Thu, 13 Jan 2022 07:47:55 -0700 From: Claudiu Beznea To: , , , , , , CC: , , , , Claudiu Beznea Subject: [PATCH v2 01/10] ARM: at91: ddr: remove CONFIG_SOC_SAMA7 dependency Date: Thu, 13 Jan 2022 16:48:51 +0200 Message-ID: <20220113144900.906370-2-claudiu.beznea@microchip.com> X-Mailer: git-send-email 2.33.0 In-Reply-To: <20220113144900.906370-1-claudiu.beznea@microchip.com> References: <20220113144900.906370-1-claudiu.beznea@microchip.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Remove CONFIG_SOC_SAMA7 dependency to avoid having #ifdef preprocessor directives in driver code (arch/arm/mach-at91/pm.c). This prepares the code for next commits. Signed-off-by: Claudiu Beznea --- include/soc/at91/sama7-ddr.h | 4 ---- 1 file changed, 4 deletions(-) diff --git a/include/soc/at91/sama7-ddr.h b/include/soc/at91/sama7-ddr.h index f6542584ca13..13b47e26cdbe 100644 --- a/include/soc/at91/sama7-ddr.h +++ b/include/soc/at91/sama7-ddr.h @@ -11,8 +11,6 @@ #ifndef __SAMA7_DDR_H__ #define __SAMA7_DDR_H__ -#ifdef CONFIG_SOC_SAMA7 - /* DDR3PHY */ #define DDR3PHY_PIR (0x04) /* DDR3PHY PHY Initialization Register */ #define DDR3PHY_PIR_DLLBYP (1 << 17) /* DLL Bypass */ @@ -75,6 +73,4 @@ #define UDDRC_PCTRL_3 (0x6A0) /* UDDRC Port 3 Control Register */ #define UDDRC_PCTRL_4 (0x750) /* UDDRC Port 4 Control Register */ -#endif /* CONFIG_SOC_SAMA7 */ - #endif /* __SAMA7_DDR_H__ */ From patchwork Thu Jan 13 14:48:53 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Claudiu Beznea X-Patchwork-Id: 531831 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0FFB4C433EF for ; Thu, 13 Jan 2022 14:48:10 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235799AbiAMOsI (ORCPT ); Thu, 13 Jan 2022 09:48:08 -0500 Received: from esa.microchip.iphmx.com ([68.232.153.233]:31589 "EHLO esa.microchip.iphmx.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235800AbiAMOsF (ORCPT ); Thu, 13 Jan 2022 09:48:05 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1642085285; x=1673621285; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=8B+mjGEHiWRvOo09WcjQMA43OD+N7/Tq2fPJzC7/86M=; b=QVs41uZG8auz1+IFt1uF+8xoERLZB51H3OmjBXfdmQvxTyoquz4Uwy8p A2HlxetBt3eDfkpynPLoUNtG2iFBUNBJGWtY1QdZvTi4YgMmuUge+3L6Q +dOaFf1AeRjNB0JN+H2WEcnPpLD8QUsKaO6MbcxvziqvMu+zuv5zdHxsO FLOqCTcl7uldpvX+1wm2NuUddU2uF9FBHtVqz3B0ESLp9YbixD8TdOTx3 sUuJ/DazXScOh5YrFr55ZoiSBftZzNwJUn1p1p+qhncid6Vu1GlcbIl3t d2kyQzGVuQBSaDPCEQm7TD4w1XyqMT340GhDItBXDvCUviOf8+CKwJF3Y A==; IronPort-SDR: x5fH9fXkDlx/sXNG4ZpdDTYwDS6Je59q4Tu3bZITHBYf86MfWCalZcTv97QA90DW9pSdw0ctPV 0ZHmWspbloYi6m9cGbAub9oQz8OYCpcy1YNhMykZSm/noZuu2P8r5vqeMY5/VqFxp4sAOCojBP YHfQe54NS24//kf7r+ykoDTzdjHaPAFwgyoVEmUAFTTohDzFoI4q6Ag4OAmjzzInw8ld0jBFym 32Lp7AB1v36lyP4CVkAxtfWV02AA/DOYylpP1MDjdw+czk9F5EDDyRcFO06pryfIjYQ+JwPa7e 0uwQPYAeCVVf7Npt6DF6VVGl X-IronPort-AV: E=Sophos;i="5.88,286,1635231600"; d="scan'208";a="158557508" Received: from smtpout.microchip.com (HELO email.microchip.com) ([198.175.253.82]) by esa1.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 13 Jan 2022 07:48:04 -0700 Received: from chn-vm-ex03.mchp-main.com (10.10.85.151) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2375.17; Thu, 13 Jan 2022 07:48:04 -0700 Received: from localhost.localdomain (10.10.115.15) by chn-vm-ex03.mchp-main.com (10.10.85.151) with Microsoft SMTP Server id 15.1.2375.17 via Frontend Transport; Thu, 13 Jan 2022 07:48:02 -0700 From: Claudiu Beznea To: , , , , , , CC: , , , , Claudiu Beznea Subject: [PATCH v2 03/10] ARM: at91: ddr: fix typo to align with datasheet naming Date: Thu, 13 Jan 2022 16:48:53 +0200 Message-ID: <20220113144900.906370-4-claudiu.beznea@microchip.com> X-Mailer: git-send-email 2.33.0 In-Reply-To: <20220113144900.906370-1-claudiu.beznea@microchip.com> References: <20220113144900.906370-1-claudiu.beznea@microchip.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Fix typo on UDDRC_PWRCTL.SELFREF_SW bitmask to align with datasheet naming. Signed-off-by: Claudiu Beznea --- arch/arm/mach-at91/pm_suspend.S | 4 ++-- include/soc/at91/sama7-ddr.h | 2 +- 2 files changed, 3 insertions(+), 3 deletions(-) diff --git a/arch/arm/mach-at91/pm_suspend.S b/arch/arm/mach-at91/pm_suspend.S index fdb4f63ecde4..abe4ced33eda 100644 --- a/arch/arm/mach-at91/pm_suspend.S +++ b/arch/arm/mach-at91/pm_suspend.S @@ -159,7 +159,7 @@ sr_ena_1: /* Switch to self-refresh. */ ldr tmp1, [r2, #UDDRC_PWRCTL] - orr tmp1, tmp1, #UDDRC_PWRCTRL_SELFREF_SW + orr tmp1, tmp1, #UDDRC_PWRCTL_SELFREF_SW str tmp1, [r2, #UDDRC_PWRCTL] sr_ena_2: @@ -276,7 +276,7 @@ sr_dis_5: /* Trigger self-refresh exit. */ ldr tmp1, [r2, #UDDRC_PWRCTL] - bic tmp1, tmp1, #UDDRC_PWRCTRL_SELFREF_SW + bic tmp1, tmp1, #UDDRC_PWRCTL_SELFREF_SW str tmp1, [r2, #UDDRC_PWRCTL] sr_dis_6: diff --git a/include/soc/at91/sama7-ddr.h b/include/soc/at91/sama7-ddr.h index 817b360efbb8..fee1b11bddca 100644 --- a/include/soc/at91/sama7-ddr.h +++ b/include/soc/at91/sama7-ddr.h @@ -53,7 +53,7 @@ #define UDDRC_STAT_OPMODE_MSK (0x7 << 0) /* Operating mode mask */ #define UDDRC_PWRCTL (0x30) /* UDDRC Low Power Control Register */ -#define UDDRC_PWRCTRL_SELFREF_SW (1 << 5) /* Software self-refresh */ +#define UDDRC_PWRCTL_SELFREF_SW (1 << 5) /* Software self-refresh */ #define UDDRC_DFIMISC (0x1B0) /* UDDRC DFI Miscellaneous Control Register */ #define UDDRC_DFIMISC_DFI_INIT_COMPLETE_EN (1 << 0) /* PHY initialization complete enable signal */ From patchwork Thu Jan 13 14:48:56 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Claudiu Beznea X-Patchwork-Id: 531830 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id E55D6C4332F for ; Thu, 13 Jan 2022 14:48:18 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235808AbiAMOsR (ORCPT ); Thu, 13 Jan 2022 09:48:17 -0500 Received: from esa.microchip.iphmx.com ([68.232.153.233]:19880 "EHLO esa.microchip.iphmx.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235801AbiAMOsO (ORCPT ); Thu, 13 Jan 2022 09:48:14 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1642085294; x=1673621294; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=qzxL53+xCwUlzzE+c5h3xp0iY0GwHksZEGL+kIYmI/c=; b=tlJt+YYE5Nto4VakTfacNyrIfIR1bZMpO9bEG11al8bShyEOMY/YL2IJ Kb6P94o4Jwsx4Vjqylbk0Ngpt/hn92age4Xzr6g3kooYc7953lRgDYr5b 1EKFeLhTqzEPvWP1iKo/a7/oAXaFfp7V1pdeVBClOKK05iK81167APFz6 JYoL3tY5n4QljfAuSWE1+uSDlLELD0O7aRegqd5svqYiwUi2+WuLCHFgn BnIlSYVyQGC2cLM8kP3g3YB/TEPBhbNzEffzT8DYS1FcwxOTIn8NFund4 KWUV5/ZwaXC0o8leE8ZA8D5YEidt7KruTzwUtYhbYjXwVz7ZKnA/NnUi5 A==; IronPort-SDR: BPtLW3vol1O10wBtDTdU/osMfjW67K7iAB5k1pKez50+5jPucwUS0EZrWSckGbBNjqy/jFfq2N 2j5GaDyRCRyD9xRGlOvi+B4s1AHd3vERmEq+eS0mcZLGO+9SfkS6z5cKlAqwOGTjEDvsFAZ+AG P6d6gaoG9thkSHQXVo/NSWpvtiVEhoYt/CAC5xAKkwbvuZtFYK7szGF36s+AHrfOXu2C8IXgnc XUS5bnGaasttb+DJb+JMqoCnmupYmd94ZUDW8ufY1xW2d1WSX6Zp3wLGmmL/SrIpuxju90tKPk vrpC7eLj1FSanHBjxIuvEtV2 X-IronPort-AV: E=Sophos;i="5.88,286,1635231600"; d="scan'208";a="150108218" Received: from smtpout.microchip.com (HELO email.microchip.com) ([198.175.253.82]) by esa3.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 13 Jan 2022 07:48:14 -0700 Received: from chn-vm-ex03.mchp-main.com (10.10.85.151) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2375.17; Thu, 13 Jan 2022 07:48:14 -0700 Received: from localhost.localdomain (10.10.115.15) by chn-vm-ex03.mchp-main.com (10.10.85.151) with Microsoft SMTP Server id 15.1.2375.17 via Frontend Transport; Thu, 13 Jan 2022 07:48:11 -0700 From: Claudiu Beznea To: , , , , , , CC: , , , , Claudiu Beznea Subject: [PATCH v2 06/10] ARM: dts: at91: fix low limit for CPU regulator Date: Thu, 13 Jan 2022 16:48:56 +0200 Message-ID: <20220113144900.906370-7-claudiu.beznea@microchip.com> X-Mailer: git-send-email 2.33.0 In-Reply-To: <20220113144900.906370-1-claudiu.beznea@microchip.com> References: <20220113144900.906370-1-claudiu.beznea@microchip.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Fix low limit for CPU regulator. Otherwise setting voltages lower than 1.125V will not be allowed (CPUFreq will not be allowed to set proper voltages on proper frequencies). Signed-off-by: Claudiu Beznea --- arch/arm/boot/dts/at91-sama7g5ek.dts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/at91-sama7g5ek.dts b/arch/arm/boot/dts/at91-sama7g5ek.dts index 0e1975c6812e..50f0fc3064cc 100644 --- a/arch/arm/boot/dts/at91-sama7g5ek.dts +++ b/arch/arm/boot/dts/at91-sama7g5ek.dts @@ -236,7 +236,7 @@ regulator-state-mem { vddcpu: VDD_OTHER { regulator-name = "VDD_OTHER"; - regulator-min-microvolt = <1125000>; + regulator-min-microvolt = <1050000>; regulator-max-microvolt = <1850000>; regulator-initial-mode = <2>; regulator-allowed-modes = <2>, <4>; From patchwork Thu Jan 13 14:48:57 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Claudiu Beznea X-Patchwork-Id: 531829 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 32380C433F5 for ; Thu, 13 Jan 2022 14:48:24 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235846AbiAMOsV (ORCPT ); Thu, 13 Jan 2022 09:48:21 -0500 Received: from esa.microchip.iphmx.com ([68.232.153.233]:31616 "EHLO esa.microchip.iphmx.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235842AbiAMOsS (ORCPT ); Thu, 13 Jan 2022 09:48:18 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1642085298; x=1673621298; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=e/cwdosIfY/Ui806k1VNdWFJdNXS6zlz9aSSIH3faKE=; b=GLIh9KgRuduoXDG5kSXfyQacrvAO6XI0UVXb37MArRQIxK+bbYdIckIO f1kkq+8otZ5hkkzSVL+jtLRKFK3f3aokXOPrKdv9C36UwOLiNhuxNebqa xP/aLOfV2N6aJWILDoUwi2O9zF1ptn97rFPOv0aUonnWD+OMSpLnw8Ant GHtWLXZl8eTcLRJNuGJfFHVqsbXu/1lvtO/czarPhMtJ7a+S6yzYQL4fj zNFlQI9QGzFnCmVUj6O9JMP3/sYReeN5OAbn41cLsgDHyjRUYHoP5gw3+ rtT1Qyz+5ecrVF7MwcV/LmUUtCwNLTX1Dt2SNS4aYSaO3EtIa7lFYFSl9 w==; IronPort-SDR: 47nOygoVvRVtF5FQl/YUZhdAz+JeUn+1Tlh7BvNuUto9F4AOlwiUM+KrJQaoBfqa4+77IyFnyC /t4vuFslxy25BY0cLcxlyln5wiCXwZWNahaIIKr0eFLjKsSNfim+tlSda4BdsZIwI/a7BJg+C7 Va4CorZvCgUgu/ziugvXJJJW4C7/siVs6DUMjVlcexUAxq3oQH6gYSnWPWiT0GnzYqnxvtWMqX psjIe8qUN+lAsH9vN1QsCfrFXEBwM/07PPFhBuw9C9bmGAPgE/LLG+VnwFiYojOmL5bpQ+v96h FRXGKPoG97pl7EbpDm565hWb X-IronPort-AV: E=Sophos;i="5.88,286,1635231600"; d="scan'208";a="158557547" Received: from smtpout.microchip.com (HELO email.microchip.com) ([198.175.253.82]) by esa1.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 13 Jan 2022 07:48:17 -0700 Received: from chn-vm-ex03.mchp-main.com (10.10.85.151) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2375.17; Thu, 13 Jan 2022 07:48:17 -0700 Received: from localhost.localdomain (10.10.115.15) by chn-vm-ex03.mchp-main.com (10.10.85.151) with Microsoft SMTP Server id 15.1.2375.17 via Frontend Transport; Thu, 13 Jan 2022 07:48:14 -0700 From: Claudiu Beznea To: , , , , , , CC: , , , , Claudiu Beznea Subject: [PATCH v2 07/10] ARM: dts: at91: sama7g5ek: set regulator voltages for standby state Date: Thu, 13 Jan 2022 16:48:57 +0200 Message-ID: <20220113144900.906370-8-claudiu.beznea@microchip.com> X-Mailer: git-send-email 2.33.0 In-Reply-To: <20220113144900.906370-1-claudiu.beznea@microchip.com> References: <20220113144900.906370-1-claudiu.beznea@microchip.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Set regulator voltages for standby state to avoid wrong behavior of system while in standby. The CPU voltage has been chosen as being the one corresponding to OPP=600MHz. Next commit will set the 600MHz OPP as the suspend OPP. Signed-off-by: Claudiu Beznea --- arch/arm/boot/dts/at91-sama7g5ek.dts | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/arch/arm/boot/dts/at91-sama7g5ek.dts b/arch/arm/boot/dts/at91-sama7g5ek.dts index 50f0fc3064cc..e48da0a053ec 100644 --- a/arch/arm/boot/dts/at91-sama7g5ek.dts +++ b/arch/arm/boot/dts/at91-sama7g5ek.dts @@ -185,6 +185,7 @@ vdd_3v3: VDD_IO { regulator-state-standby { regulator-on-in-suspend; + regulator-suspend-microvolt = <3300000>; regulator-mode = <4>; }; @@ -225,6 +226,7 @@ vddcore: VDD_CORE { regulator-state-standby { regulator-on-in-suspend; + regulator-suspend-voltage = <1150000>; regulator-mode = <4>; }; @@ -245,6 +247,7 @@ vddcpu: VDD_OTHER { regulator-state-standby { regulator-on-in-suspend; + regulator-suspend-voltage = <1050000>; regulator-mode = <4>; }; @@ -261,6 +264,7 @@ vldo1: LDO1 { regulator-always-on; regulator-state-standby { + regulator-suspend-voltage = <1800000>; regulator-on-in-suspend; }; @@ -275,6 +279,7 @@ vldo2: LDO2 { regulator-max-microvolt = <3700000>; regulator-state-standby { + regulator-suspend-voltage = <1800000>; regulator-on-in-suspend; }; From patchwork Thu Jan 13 14:48:59 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Claudiu Beznea X-Patchwork-Id: 531828 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id E8FEEC433EF for ; Thu, 13 Jan 2022 14:48:29 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235829AbiAMOs3 (ORCPT ); Thu, 13 Jan 2022 09:48:29 -0500 Received: from esa.microchip.iphmx.com ([68.232.153.233]:19904 "EHLO esa.microchip.iphmx.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235791AbiAMOsY (ORCPT ); Thu, 13 Jan 2022 09:48:24 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1642085304; x=1673621304; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=bDlilDU1skIyaD7A5u8m29rcVwAwQx5M9HD/l01CDFo=; b=2h3Xvd3rWyUy7KoezCN/kRBWE9Y624W7UwktKK6xRPoTCEHc+xJ4jjdJ Jf7bXDwcEkCP4X4xzf38XaxLXDNFtqd+drUpt0nKmRKu87PBaOMuApomJ su5dBTciHS0fTxjA3ZuB2rynQTksMpxrcYRyibd6/9JlDSoimFtaWJGiK AuTHSFTvBPhS9U9hKRfbO9A7gLQ1UZKmg2lF71exUEdEEYmzcAzi5VCyz dqiPYy+15IVvKbtsaS/NrYEU+1KTy8uZ0p480dWl/lL5aRw4d03h2mEcN ClQ90i5dihvgFOAWyh4/1ywJierodsEOQ26nGXZnAwzGdSsnx7jKdvBmz A==; IronPort-SDR: fn1VzKeICIFExi/unB8UW687rfNdm9rrvris/JE4fKrGQ2h79X/rMTiQhD5mb8FBs48oEBs98T M9SAuHTha5uErxTLyMeASAoIeGbsaVL3KbUtVsxtpvNGqNpivXcVn4X5+EcYidSBeC6IlMOh5W SkJKNeVnQlw0ACTJygmVYKBlV8Nh/yD86pcI/xfq0sNflKfUcIqYo71sZIDFnikdOsbkFVKy7m cm80LfhbUEVldqTzHCPBjkMuTK4A5+RsR/1BNUFnIq6ndl/sMNt4wb/egR6R2VUpMqskxMAxM0 Wv4Xc5VUf3qgsSff9P7fp8J5 X-IronPort-AV: E=Sophos;i="5.88,286,1635231600"; d="scan'208";a="150108244" Received: from smtpout.microchip.com (HELO email.microchip.com) ([198.175.253.82]) by esa3.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 13 Jan 2022 07:48:24 -0700 Received: from chn-vm-ex03.mchp-main.com (10.10.85.151) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2375.17; Thu, 13 Jan 2022 07:48:23 -0700 Received: from localhost.localdomain (10.10.115.15) by chn-vm-ex03.mchp-main.com (10.10.85.151) with Microsoft SMTP Server id 15.1.2375.17 via Frontend Transport; Thu, 13 Jan 2022 07:48:20 -0700 From: Claudiu Beznea To: , , , , , , CC: , , , , Claudiu Beznea Subject: [PATCH v2 09/10] ARM: configs: at91: sama7: enable cpu idle Date: Thu, 13 Jan 2022 16:48:59 +0200 Message-ID: <20220113144900.906370-10-claudiu.beznea@microchip.com> X-Mailer: git-send-email 2.33.0 In-Reply-To: <20220113144900.906370-1-claudiu.beznea@microchip.com> References: <20220113144900.906370-1-claudiu.beznea@microchip.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Enable CPU idle support for SAMA7 config. Signed-off-by: Claudiu Beznea --- arch/arm/configs/sama7_defconfig | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/arch/arm/configs/sama7_defconfig b/arch/arm/configs/sama7_defconfig index 938aae4bd80b..95c2a7ed4816 100644 --- a/arch/arm/configs/sama7_defconfig +++ b/arch/arm/configs/sama7_defconfig @@ -26,6 +26,7 @@ CONFIG_FORCE_MAX_ZONEORDER=15 CONFIG_UACCESS_WITH_MEMCPY=y # CONFIG_ATAGS is not set CONFIG_CMDLINE="console=ttyS0,115200 earlyprintk ignore_loglevel" +CONFIG_CPU_IDLE=y CONFIG_VFP=y CONFIG_NEON=y CONFIG_KERNEL_MODE_NEON=y @@ -33,7 +34,6 @@ CONFIG_MODULES=y CONFIG_MODULE_FORCE_LOAD=y CONFIG_MODULE_UNLOAD=y CONFIG_MODULE_FORCE_UNLOAD=y -# CONFIG_BLK_DEV_BSG is not set CONFIG_PARTITION_ADVANCED=y # CONFIG_EFI_PARTITION is not set # CONFIG_COREDUMP is not set @@ -90,6 +90,7 @@ CONFIG_BLK_DEV_RAM_SIZE=8192 CONFIG_EEPROM_AT24=y CONFIG_SCSI=y CONFIG_BLK_DEV_SD=y +# CONFIG_BLK_DEV_BSG is not set CONFIG_NETDEVICES=y CONFIG_MACB=y CONFIG_MICREL_PHY=y