From patchwork Thu Dec 16 16:05:39 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexander Stein X-Patchwork-Id: 524741 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id D771EC433EF for ; Thu, 16 Dec 2021 16:05:52 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S238799AbhLPQFw (ORCPT ); Thu, 16 Dec 2021 11:05:52 -0500 Received: from mx1.tq-group.com ([93.104.207.81]:5073 "EHLO mx1.tq-group.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S238789AbhLPQFw (ORCPT ); Thu, 16 Dec 2021 11:05:52 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=tq-group.com; i=@tq-group.com; q=dns/txt; s=key1; t=1639670752; x=1671206752; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=p5HHJrSYp7xxYPtjPoRgmxeGfWmt/+mPIconMbitaRw=; b=pKVfLVwbSid792IWl6Y9nrGFIp2+5rRMkL1dqE6Rn6dr+V6ve4ei5Exm 3wGleIvtl7fIO2RnVyyAn/XRzHrIb4XuodM3rala88d5KyPODfvKH82iV QFndsKXr5XELjSs0phtrlVXd7+nLGo1wv1v+saYm05oqMiIhpbKtGoyvB Qu7eRp6SdAOAb6KnwfJtMEsZFdttTYEkI4o9FacGFU3vNsArtx5SkcLek 1rdb28dqYZiyv7Qbs6otwsnPKctf3LpIDKab6WrrBeFXsxfpfiRffZa1Y mMoAXdRqFiHQ79HyYnU5IqLtBncBmsYfxPoHvfj8K1jaXXhVLliqU8VbT Q==; X-IronPort-AV: E=Sophos;i="5.88,211,1635199200"; d="scan'208";a="21103119" Received: from unknown (HELO tq-pgp-pr1.tq-net.de) ([192.168.6.15]) by mx1-pgp.tq-group.com with ESMTP; 16 Dec 2021 17:05:50 +0100 Received: from mx1.tq-group.com ([192.168.6.7]) by tq-pgp-pr1.tq-net.de (PGP Universal service); Thu, 16 Dec 2021 17:05:50 +0100 X-PGP-Universal: processed; by tq-pgp-pr1.tq-net.de on Thu, 16 Dec 2021 17:05:50 +0100 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=tq-group.com; i=@tq-group.com; q=dns/txt; s=key1; t=1639670750; x=1671206750; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=p5HHJrSYp7xxYPtjPoRgmxeGfWmt/+mPIconMbitaRw=; b=f47b9sh68caCcc8NOisVj4ILwTT3LSAfRZyDrHH1e+qQgjFvbSZhHAfx xQCH7G2cnpsjy0mYvk/BUbXWfNikW7mgi4tfgEYgLDZRQKM/Yd1J8E7dE wR8dnVtWV8nHhMi21MXLOWvFpzAafSlz5Z1hTGs6v7nMW8VhsWsdkmzSS jCYJncuIIKsPXNiSkuS1V7fkKzRBVBBIUjeIfkH2J+byUKe4IEjb+Vio6 9ONB9waI+ptQGMm90zFo4G8FhO1DVMEH0tR33i4IgeXSmfFdgRVZzahXE n3as5oJbI6v9S8SBkE9xZvbgYHepexc1098UfQyXFO4LzDcti7YFOZi20 A==; X-IronPort-AV: E=Sophos;i="5.88,211,1635199200"; d="scan'208";a="21103118" Received: from vtuxmail01.tq-net.de ([10.115.0.20]) by mx1.tq-group.com with ESMTP; 16 Dec 2021 17:05:50 +0100 Received: from steina-w.tq-net.de (unknown [10.123.49.12]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)) (No client certificate requested) by vtuxmail01.tq-net.de (Postfix) with ESMTPSA id CFDAB280075; Thu, 16 Dec 2021 17:05:49 +0100 (CET) From: Alexander Stein To: Kishon Vijay Abraham I , Vinod Koul , Rob Herring , Shawn Guo , Sascha Hauer , Fabio Estevam Cc: Alexander Stein , NXP Linux Team , linux-phy@lists.infradead.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: [PATCH v2 1/3] dt-bindings: phy: imx8mq-usb-phy: Add imx8mp specific flags Date: Thu, 16 Dec 2021 17:05:39 +0100 Message-Id: <20211216160541.544974-2-alexander.stein@ew.tq-group.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20211216160541.544974-1-alexander.stein@ew.tq-group.com> References: <20211216160541.544974-1-alexander.stein@ew.tq-group.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org This adds bindings for features only available on imx8mp. They allow setting polarity of PWR and OC as well as disabling port power control. Also permanently atteched can be annotated as well. Signed-off-by: Alexander Stein --- Adding properties specific to one compatible globally and disabling them on other compatibles is the way to go? Are there any best practices on the usage of '-' and/or '_' in property names? .../bindings/phy/fsl,imx8mq-usb-phy.yaml | 52 ++++++++++++++++++- 1 file changed, 51 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/phy/fsl,imx8mq-usb-phy.yaml b/Documentation/devicetree/bindings/phy/fsl,imx8mq-usb-phy.yaml index 2936f3510a6a..1d28b7d1c413 100644 --- a/Documentation/devicetree/bindings/phy/fsl,imx8mq-usb-phy.yaml +++ b/Documentation/devicetree/bindings/phy/fsl,imx8mq-usb-phy.yaml @@ -16,7 +16,8 @@ properties: - fsl,imx8mp-usb-phy reg: - maxItems: 1 + minItems: 1 + maxItems: 2 "#phy-cells": const: 0 @@ -32,6 +33,28 @@ properties: description: A phandle to the regulator for USB VBUS. + fsl,permanently-attached: + type: boolean + description: + Indicates if the device atached to a downstream port is + permanently attached. + + fsl,disable-port-power-control: + type: boolean + description: + Indicates whether the host controller implementation includes port + power control. Defines Bit 3 in capability register (HCCPARAMS). + + fsl,over-current-active-low: + type: boolean + description: + Over current signal polarity is active low. + + fsl,power-active-low: + type: boolean + description: + Power pad (PWR) polarity is active low. + required: - compatible - reg @@ -39,6 +62,33 @@ required: - clocks - clock-names +if: + properties: + compatible: + contains: + enum: + - fsl,imx8mp-usb-phy + +then: + properties: + reg: + minItems: 2 + maxItems: 2 + items: + - description: PHY register base address + - description: Glue layer base address + +else: + properties: + reg: + maxItems: 1 + items: + - description: PHY register base address + fsl,permanently-attached: false + fsl,disable-port-power-control: false + fsl,over-current-active-low: false + fsl,power-active-low: false + additionalProperties: false examples: From patchwork Thu Dec 16 16:05:40 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexander Stein X-Patchwork-Id: 524740 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 448F3C433FE for ; Thu, 16 Dec 2021 16:05:53 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S238789AbhLPQFw (ORCPT ); Thu, 16 Dec 2021 11:05:52 -0500 Received: from mx1.tq-group.com ([93.104.207.81]:5080 "EHLO mx1.tq-group.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S238796AbhLPQFw (ORCPT ); Thu, 16 Dec 2021 11:05:52 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=tq-group.com; i=@tq-group.com; q=dns/txt; s=key1; t=1639670752; x=1671206752; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=FZr6u+Xp8JktssxvogNSfYTefAIcEB7LkldXk4m703w=; b=QGVmOWEs0ZvaJY4+zEmOIFhNvNtGN3Ex9Wrc8+T/SmhjQdAP9lO+86rZ QgWvdz16t2KU3nf4XZeQaef3rHlfYbOyauwN7w7kKI7nOi9KJNlfUCKp7 XUod4CvLv8oLVoe4Fn/bIImWEo7VC3YSTR5Kzk+Bhvg2VJw6n2O3DG/8D HD/EGxj1mXk9FPx33xQBhmwwbSDYvmEOkQRwCXf+O3Ms09mVefMtBIY9b bdAKBr9KpOB99hcroSe4JC5lvlm4Ad5kK8VWvvViAA90gzVxS8R4npppJ Wc2QO535hU2gDhJaIbGFLnSt1EUBeTuKXf9bOfBquV1EzNBmN/XNlL+wv A==; X-IronPort-AV: E=Sophos;i="5.88,211,1635199200"; d="scan'208";a="21103121" Received: from unknown (HELO tq-pgp-pr1.tq-net.de) ([192.168.6.15]) by mx1-pgp.tq-group.com with ESMTP; 16 Dec 2021 17:05:50 +0100 Received: from mx1.tq-group.com ([192.168.6.7]) by tq-pgp-pr1.tq-net.de (PGP Universal service); Thu, 16 Dec 2021 17:05:50 +0100 X-PGP-Universal: processed; by tq-pgp-pr1.tq-net.de on Thu, 16 Dec 2021 17:05:50 +0100 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=tq-group.com; i=@tq-group.com; q=dns/txt; s=key1; t=1639670750; x=1671206750; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=FZr6u+Xp8JktssxvogNSfYTefAIcEB7LkldXk4m703w=; b=QyJQekJHD1AnrNHJIV6GFpYdHjDTE75EzOx1S/q4PW43aDchz/drB5yR poqY18ezGtFhMhyA+hZCWfijh1nCFqVt6k9cyKS22UzHFQSLJxJh/O0W4 n7UV4QM5dL6OFxDoQzfmPPgU8P+ZPp2qUDXJrMZ21Fx/ohnLuapuhH8sw VIGJe1FPK+i4r8G4IYbpAHiAA+95DGabW7qJuPZ8oBxagEki0bP2+ClyC ZVoQg7t9QP39Eyix+PBsY/zha6VbgPWS0UUVZJFjyfU1KYGaTXxmLMdFE lezXIN5oSoIr92oS9kSwH9PMkdR4nW+x/p5FsEZPzOHYzEXnyM2C8l6F+ w==; X-IronPort-AV: E=Sophos;i="5.88,211,1635199200"; d="scan'208";a="21103120" Received: from vtuxmail01.tq-net.de ([10.115.0.20]) by mx1.tq-group.com with ESMTP; 16 Dec 2021 17:05:50 +0100 Received: from steina-w.tq-net.de (unknown [10.123.49.12]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)) (No client certificate requested) by vtuxmail01.tq-net.de (Postfix) with ESMTPSA id 0E6A2280065; Thu, 16 Dec 2021 17:05:50 +0100 (CET) From: Alexander Stein To: Kishon Vijay Abraham I , Vinod Koul , Rob Herring , Shawn Guo , Sascha Hauer , Fabio Estevam Cc: Alexander Stein , NXP Linux Team , linux-phy@lists.infradead.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: [PATCH v2 2/3] phy: fsl-imx8mq-usb: Add support for setting fsl specific flags Date: Thu, 16 Dec 2021 17:05:40 +0100 Message-Id: <20211216160541.544974-3-alexander.stein@ew.tq-group.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20211216160541.544974-1-alexander.stein@ew.tq-group.com> References: <20211216160541.544974-1-alexander.stein@ew.tq-group.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org The i.MX8MP glue layer has support for the following flags: * over-current polarity * PWR pad polarity * controlling PPC flag in HCCPARAMS register * parmanent port attach for usb2 & usb3 port Allow setting these flags by supporting specific flags in the glue node. In order to get this to work an additional IORESOURCE_MEM is necessary actually pointing to the glue layer. For backward compatibility this is purely optional. Signed-off-by: Alexander Stein --- drivers/phy/freescale/phy-fsl-imx8mq-usb.c | 61 ++++++++++++++++++++++ 1 file changed, 61 insertions(+) diff --git a/drivers/phy/freescale/phy-fsl-imx8mq-usb.c b/drivers/phy/freescale/phy-fsl-imx8mq-usb.c index a29b4a6f7c24..86b61af6a949 100644 --- a/drivers/phy/freescale/phy-fsl-imx8mq-usb.c +++ b/drivers/phy/freescale/phy-fsl-imx8mq-usb.c @@ -11,6 +11,18 @@ #include #include +/* USB glue registers */ +#define USB_CTRL0 0x00 +#define USB_CTRL1 0x04 + +#define USB_CTRL0_PORTPWR_EN BIT(12) /* 1 - PPC enabled (default) */ +#define USB_CTRL0_USB3_FIXED BIT(22) /* 1 - USB3 permanent attached */ +#define USB_CTRL0_USB2_FIXED BIT(23) /* 1 - USB2 permanent attached */ + +#define USB_CTRL1_OC_POLARITY BIT(16) /* 0 - HIGH / 1 - LOW */ +#define USB_CTRL1_PWR_POLARITY BIT(17) /* 0 - HIGH / 1 - LOW */ + +/* USB phy registers */ #define PHY_CTRL0 0x0 #define PHY_CTRL0_REF_SSP_EN BIT(2) #define PHY_CTRL0_FSEL_MASK GENMASK(10, 5) @@ -35,9 +47,46 @@ struct imx8mq_usb_phy { struct phy *phy; struct clk *clk; void __iomem *base; + void __iomem *glue_base; struct regulator *vbus; }; +static void imx8mp_configure_glue(struct imx8mq_usb_phy *dwc3_imx) +{ + struct device *dev = &dwc3_imx->phy->dev; + u32 value; + + if (!dwc3_imx->glue_base) + return; + + value = readl(dwc3_imx->glue_base + USB_CTRL0); + + if (device_property_read_bool(dev, "fsl,permanently-attached")) + value |= (USB_CTRL0_USB2_FIXED | USB_CTRL0_USB3_FIXED); + else + value &= ~(USB_CTRL0_USB2_FIXED | USB_CTRL0_USB3_FIXED); + + if (device_property_read_bool(dev, "fsl,disable-port-power-control")) + value &= ~(USB_CTRL0_PORTPWR_EN); + else + value |= USB_CTRL0_PORTPWR_EN; + + writel(value, dwc3_imx->glue_base + USB_CTRL0); + + value = readl(dwc3_imx->glue_base + USB_CTRL1); + if (device_property_read_bool(dev, "fsl,over-current-active-low")) + value |= USB_CTRL1_OC_POLARITY; + else + value &= ~USB_CTRL1_OC_POLARITY; + + if (device_property_read_bool(dev, "fsl,power-active-low")) + value |= USB_CTRL1_PWR_POLARITY; + else + value &= ~USB_CTRL1_PWR_POLARITY; + + writel(value, dwc3_imx->glue_base + USB_CTRL1); +} + static int imx8mq_usb_phy_init(struct phy *phy) { struct imx8mq_usb_phy *imx_phy = phy_get_drvdata(phy); @@ -69,6 +118,8 @@ static int imx8mp_usb_phy_init(struct phy *phy) struct imx8mq_usb_phy *imx_phy = phy_get_drvdata(phy); u32 value; + imx8mp_configure_glue(imx_phy); + /* USB3.0 PHY signal fsel for 24M ref */ value = readl(imx_phy->base + PHY_CTRL0); value &= ~PHY_CTRL0_FSEL_MASK; @@ -153,6 +204,7 @@ static int imx8mq_usb_phy_probe(struct platform_device *pdev) struct device *dev = &pdev->dev; struct imx8mq_usb_phy *imx_phy; const struct phy_ops *phy_ops; + struct resource *res; imx_phy = devm_kzalloc(dev, sizeof(*imx_phy), GFP_KERNEL); if (!imx_phy) @@ -168,6 +220,15 @@ static int imx8mq_usb_phy_probe(struct platform_device *pdev) if (IS_ERR(imx_phy->base)) return PTR_ERR(imx_phy->base); + res = platform_get_resource(pdev, IORESOURCE_MEM, 1); + if (!res) { + dev_warn(dev, "Base address for glue layer missing. Continuing without, some features are missing though."); + } else { + imx_phy->glue_base = devm_ioremap_resource(dev, res); + if (IS_ERR(imx_phy->glue_base)) + return PTR_ERR(imx_phy->glue_base); + } + phy_ops = of_device_get_match_data(dev); if (!phy_ops) return -EINVAL;