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[209.132.180.67]) by mx.google.com with ESMTP id v5-v6si9605830plg.99.2018.11.09.15.49.17; Fri, 09 Nov 2018 15:49:17 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=If3lM9ou; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728998AbeKJJb7 (ORCPT + 32 others); Sat, 10 Nov 2018 04:31:59 -0500 Received: from lelv0143.ext.ti.com ([198.47.23.248]:43982 "EHLO lelv0143.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727730AbeKJJb6 (ORCPT ); Sat, 10 Nov 2018 04:31:58 -0500 Received: from fllv0034.itg.ti.com ([10.64.40.246]) by lelv0143.ext.ti.com (8.15.2/8.15.2) with ESMTP id wA9NlvT7063586; Fri, 9 Nov 2018 17:47:57 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1541807277; bh=ixyPsTpRAJGHW5zZVGShukwyPCLSPcIyWlRs3uhI8k4=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=If3lM9ouRKMri82f2/It/lcm7N1LHsZg7KyW4l0UPhU6NnPajKjpumMG9wcME48Q+ QYNPYfvDxRmfGyu6GFIBIqauVbXqrRkBPZ96Ei5i1JBbqIDhk4SJO8FC7JHC69GpHD 2s1iQAhFq4KwyXmDRMjCaV/KBrdq3BgAitQGOtCM= Received: from DLEE108.ent.ti.com (dlee108.ent.ti.com [157.170.170.38]) by fllv0034.itg.ti.com (8.15.2/8.15.2) with ESMTPS id wA9NlvmL089771 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Fri, 9 Nov 2018 17:47:57 -0600 Received: from DLEE112.ent.ti.com (157.170.170.23) by DLEE108.ent.ti.com (157.170.170.38) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1466.3; Fri, 9 Nov 2018 17:47:57 -0600 Received: from dlep33.itg.ti.com (157.170.170.75) by DLEE112.ent.ti.com (157.170.170.23) with Microsoft SMTP Server (version=TLS1_0, cipher=TLS_RSA_WITH_AES_256_CBC_SHA) id 15.1.1466.3 via Frontend Transport; Fri, 9 Nov 2018 17:47:57 -0600 Received: from legion.dal.design.ti.com (legion.dal.design.ti.com [128.247.22.53]) by dlep33.itg.ti.com (8.14.3/8.13.8) with ESMTP id wA9Nlvq3019489; Fri, 9 Nov 2018 17:47:57 -0600 Received: from localhost (uda0226610.dhcp.ti.com [128.247.59.147]) by legion.dal.design.ti.com (8.11.7p1+Sun/8.11.7) with ESMTP id wA9Nlux26436; Fri, 9 Nov 2018 17:47:56 -0600 (CST) From: Grygorii Strashko To: "David S. Miller" , Kishon Vijay Abraham I , Russell King - ARM Linux CC: , Sekhar Nori , , , Tony Lindgren , , , Alexandre Belloni , Antoine Tenart , Quentin Schulz , Vivek Gautam , Maxime Ripard , Chen-Yu Tsai , Carlo Caione , Chunfeng Yun , Matthias Brugger , Manu Gautam , Grygorii Strashko Subject: [PATCH v2 1/5] phy: core: rework phy_set_mode to accept phy mode and submode Date: Fri, 9 Nov 2018 17:47:51 -0600 Message-ID: <20181109234755.21687-2-grygorii.strashko@ti.com> X-Mailer: git-send-email 2.10.5 In-Reply-To: <20181109234755.21687-1-grygorii.strashko@ti.com> References: <20181109234755.21687-1-grygorii.strashko@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Currently the attempt to add support for Ethernet interface mode PHY (MII/GMII/RGMII) will lead to the necessity of extending enum phy_mode and duplicate there values from phy_interface_t enum (or introduce more PHY callbacks) [1]. Both approaches are ineffective and would lead to fast bloating of enum phy_mode or struct phy_ops in the process of adding more PHYs for different subsystems which will make them unmaintainable. As discussed in [1] the solution could be to introduce dual level PHYs mode configuration - PHY mode and PHY submode. The PHY mode will define generic PHY type (subsystem - PCIE/ETHERNET/USB_) while the PHY submode - subsystem specific interface mode. The last is usually already defined in corresponding subsystem headers (phy_interface_t for Ethernet, enum usb_device_speed for USB). This patch is cumulative change which refactors PHY framework code to support dual level PHYs mode configuration - PHY mode and PHY submode. It extends .set_mode() callback to support additional parameter "int submode" and converts all corresponding PHY drivers to support new .set_mode() callback declaration. The new extended PHY API int phy_set_mode_ext(struct phy *phy, enum phy_mode mode, int submode) is introduced to support dual level PHYs mode configuration and existing phy_set_mode() API is converted to macros, so PHY framework consumers do not need to be changed (~21 matches). [1] https://lkml.org/lkml/2018/10/25/366 Signed-off-by: Grygorii Strashko --- drivers/phy/allwinner/phy-sun4i-usb.c | 3 ++- drivers/phy/amlogic/phy-meson-gxl-usb2.c | 5 +++-- drivers/phy/amlogic/phy-meson-gxl-usb3.c | 5 +++-- drivers/phy/marvell/phy-mvebu-cp110-comphy.c | 3 ++- drivers/phy/mediatek/phy-mtk-tphy.c | 2 +- drivers/phy/mediatek/phy-mtk-xsphy.c | 2 +- drivers/phy/mscc/phy-ocelot-serdes.c | 2 +- drivers/phy/phy-core.c | 6 +++--- drivers/phy/qualcomm/phy-qcom-qmp.c | 3 ++- drivers/phy/qualcomm/phy-qcom-qusb2.c | 3 ++- drivers/phy/qualcomm/phy-qcom-ufs-qmp-14nm.c | 3 ++- drivers/phy/qualcomm/phy-qcom-ufs-qmp-20nm.c | 3 ++- drivers/phy/qualcomm/phy-qcom-usb-hs.c | 3 ++- drivers/phy/ti/phy-da8xx-usb.c | 3 ++- drivers/phy/ti/phy-tusb1210.c | 2 +- include/linux/phy/phy.h | 13 ++++++++++--- 16 files changed, 39 insertions(+), 22 deletions(-) -- 2.10.5 diff --git a/drivers/phy/allwinner/phy-sun4i-usb.c b/drivers/phy/allwinner/phy-sun4i-usb.c index d4dcd39..1acdd73 100644 --- a/drivers/phy/allwinner/phy-sun4i-usb.c +++ b/drivers/phy/allwinner/phy-sun4i-usb.c @@ -474,7 +474,8 @@ static int sun4i_usb_phy_power_off(struct phy *_phy) return 0; } -static int sun4i_usb_phy_set_mode(struct phy *_phy, enum phy_mode mode) +static int sun4i_usb_phy_set_mode(struct phy *_phy, + enum phy_mode mode, int submode) { struct sun4i_usb_phy *phy = phy_get_drvdata(_phy); struct sun4i_usb_phy_data *data = to_sun4i_usb_phy_data(phy); diff --git a/drivers/phy/amlogic/phy-meson-gxl-usb2.c b/drivers/phy/amlogic/phy-meson-gxl-usb2.c index 9f9b541..148ef0b 100644 --- a/drivers/phy/amlogic/phy-meson-gxl-usb2.c +++ b/drivers/phy/amlogic/phy-meson-gxl-usb2.c @@ -152,7 +152,8 @@ static int phy_meson_gxl_usb2_reset(struct phy *phy) return 0; } -static int phy_meson_gxl_usb2_set_mode(struct phy *phy, enum phy_mode mode) +static int phy_meson_gxl_usb2_set_mode(struct phy *phy, + enum phy_mode mode, int submode) { struct phy_meson_gxl_usb2_priv *priv = phy_get_drvdata(phy); @@ -209,7 +210,7 @@ static int phy_meson_gxl_usb2_power_on(struct phy *phy) /* power on the PHY by taking it out of reset mode */ regmap_update_bits(priv->regmap, U2P_R0, U2P_R0_POWER_ON_RESET, 0); - ret = phy_meson_gxl_usb2_set_mode(phy, priv->mode); + ret = phy_meson_gxl_usb2_set_mode(phy, priv->mode, 0); if (ret) { phy_meson_gxl_usb2_power_off(phy); diff --git a/drivers/phy/amlogic/phy-meson-gxl-usb3.c b/drivers/phy/amlogic/phy-meson-gxl-usb3.c index d37d94d..c0e9e4c 100644 --- a/drivers/phy/amlogic/phy-meson-gxl-usb3.c +++ b/drivers/phy/amlogic/phy-meson-gxl-usb3.c @@ -119,7 +119,8 @@ static int phy_meson_gxl_usb3_power_off(struct phy *phy) return 0; } -static int phy_meson_gxl_usb3_set_mode(struct phy *phy, enum phy_mode mode) +static int phy_meson_gxl_usb3_set_mode(struct phy *phy, + enum phy_mode mode, int submode) { struct phy_meson_gxl_usb3_priv *priv = phy_get_drvdata(phy); @@ -164,7 +165,7 @@ static int phy_meson_gxl_usb3_init(struct phy *phy) if (ret) goto err_disable_clk_phy; - ret = phy_meson_gxl_usb3_set_mode(phy, priv->mode); + ret = phy_meson_gxl_usb3_set_mode(phy, priv->mode, 0); if (ret) goto err_disable_clk_peripheral; diff --git a/drivers/phy/marvell/phy-mvebu-cp110-comphy.c b/drivers/phy/marvell/phy-mvebu-cp110-comphy.c index 86a5f7b..79b52c3 100644 --- a/drivers/phy/marvell/phy-mvebu-cp110-comphy.c +++ b/drivers/phy/marvell/phy-mvebu-cp110-comphy.c @@ -512,7 +512,8 @@ static int mvebu_comphy_power_on(struct phy *phy) return ret; } -static int mvebu_comphy_set_mode(struct phy *phy, enum phy_mode mode) +static int mvebu_comphy_set_mode(struct phy *phy, + enum phy_mode mode, int submode) { struct mvebu_comphy_lane *lane = phy_get_drvdata(phy); diff --git a/drivers/phy/mediatek/phy-mtk-tphy.c b/drivers/phy/mediatek/phy-mtk-tphy.c index 3eb8e1b..5b6a470 100644 --- a/drivers/phy/mediatek/phy-mtk-tphy.c +++ b/drivers/phy/mediatek/phy-mtk-tphy.c @@ -971,7 +971,7 @@ static int mtk_phy_exit(struct phy *phy) return 0; } -static int mtk_phy_set_mode(struct phy *phy, enum phy_mode mode) +static int mtk_phy_set_mode(struct phy *phy, enum phy_mode mode, int submode) { struct mtk_phy_instance *instance = phy_get_drvdata(phy); struct mtk_tphy *tphy = dev_get_drvdata(phy->dev.parent); diff --git a/drivers/phy/mediatek/phy-mtk-xsphy.c b/drivers/phy/mediatek/phy-mtk-xsphy.c index 020cd02..8c51131 100644 --- a/drivers/phy/mediatek/phy-mtk-xsphy.c +++ b/drivers/phy/mediatek/phy-mtk-xsphy.c @@ -426,7 +426,7 @@ static int mtk_phy_exit(struct phy *phy) return 0; } -static int mtk_phy_set_mode(struct phy *phy, enum phy_mode mode) +static int mtk_phy_set_mode(struct phy *phy, enum phy_mode mode, int submode) { struct xsphy_instance *inst = phy_get_drvdata(phy); struct mtk_xsphy *xsphy = dev_get_drvdata(phy->dev.parent); diff --git a/drivers/phy/mscc/phy-ocelot-serdes.c b/drivers/phy/mscc/phy-ocelot-serdes.c index cbb49d9..c61a9890 100644 --- a/drivers/phy/mscc/phy-ocelot-serdes.c +++ b/drivers/phy/mscc/phy-ocelot-serdes.c @@ -158,7 +158,7 @@ static const struct serdes_mux ocelot_serdes_muxes[] = { HSIO_HW_CFG_PCIE_ENA), }; -static int serdes_set_mode(struct phy *phy, enum phy_mode mode) +static int serdes_set_mode(struct phy *phy, enum phy_mode mode, int submode) { struct serdes_macro *macro = phy_get_drvdata(phy); unsigned int i; diff --git a/drivers/phy/phy-core.c b/drivers/phy/phy-core.c index 35fd38c..df3d4ba 100644 --- a/drivers/phy/phy-core.c +++ b/drivers/phy/phy-core.c @@ -360,7 +360,7 @@ int phy_power_off(struct phy *phy) } EXPORT_SYMBOL_GPL(phy_power_off); -int phy_set_mode(struct phy *phy, enum phy_mode mode) +int phy_set_mode_ext(struct phy *phy, enum phy_mode mode, int submode) { int ret; @@ -368,14 +368,14 @@ int phy_set_mode(struct phy *phy, enum phy_mode mode) return 0; mutex_lock(&phy->mutex); - ret = phy->ops->set_mode(phy, mode); + ret = phy->ops->set_mode(phy, mode, submode); if (!ret) phy->attrs.mode = mode; mutex_unlock(&phy->mutex); return ret; } -EXPORT_SYMBOL_GPL(phy_set_mode); +EXPORT_SYMBOL_GPL(phy_set_mode_ext); int phy_reset(struct phy *phy) { diff --git a/drivers/phy/qualcomm/phy-qcom-qmp.c b/drivers/phy/qualcomm/phy-qcom-qmp.c index a833324..514db72 100644 --- a/drivers/phy/qualcomm/phy-qcom-qmp.c +++ b/drivers/phy/qualcomm/phy-qcom-qmp.c @@ -1365,7 +1365,8 @@ static int qcom_qmp_phy_poweron(struct phy *phy) return ret; } -static int qcom_qmp_phy_set_mode(struct phy *phy, enum phy_mode mode) +static int qcom_qmp_phy_set_mode(struct phy *phy, + enum phy_mode mode, int submode) { struct qmp_phy *qphy = phy_get_drvdata(phy); struct qcom_qmp *qmp = qphy->qmp; diff --git a/drivers/phy/qualcomm/phy-qcom-qusb2.c b/drivers/phy/qualcomm/phy-qcom-qusb2.c index 9ce5311..098d793 100644 --- a/drivers/phy/qualcomm/phy-qcom-qusb2.c +++ b/drivers/phy/qualcomm/phy-qcom-qusb2.c @@ -423,7 +423,8 @@ static void qusb2_phy_set_tune2_param(struct qusb2_phy *qphy) } -static int qusb2_phy_set_mode(struct phy *phy, enum phy_mode mode) +static int qusb2_phy_set_mode(struct phy *phy, + enum phy_mode mode, int submode) { struct qusb2_phy *qphy = phy_get_drvdata(phy); diff --git a/drivers/phy/qualcomm/phy-qcom-ufs-qmp-14nm.c b/drivers/phy/qualcomm/phy-qcom-ufs-qmp-14nm.c index ba1895b..1e0d4f2 100644 --- a/drivers/phy/qualcomm/phy-qcom-ufs-qmp-14nm.c +++ b/drivers/phy/qualcomm/phy-qcom-ufs-qmp-14nm.c @@ -65,7 +65,8 @@ static int ufs_qcom_phy_qmp_14nm_exit(struct phy *generic_phy) } static -int ufs_qcom_phy_qmp_14nm_set_mode(struct phy *generic_phy, enum phy_mode mode) +int ufs_qcom_phy_qmp_14nm_set_mode(struct phy *generic_phy, + enum phy_mode mode, int submode) { struct ufs_qcom_phy *phy_common = get_ufs_qcom_phy(generic_phy); diff --git a/drivers/phy/qualcomm/phy-qcom-ufs-qmp-20nm.c b/drivers/phy/qualcomm/phy-qcom-ufs-qmp-20nm.c index 49f435c..aef40f7 100644 --- a/drivers/phy/qualcomm/phy-qcom-ufs-qmp-20nm.c +++ b/drivers/phy/qualcomm/phy-qcom-ufs-qmp-20nm.c @@ -84,7 +84,8 @@ static int ufs_qcom_phy_qmp_20nm_exit(struct phy *generic_phy) } static -int ufs_qcom_phy_qmp_20nm_set_mode(struct phy *generic_phy, enum phy_mode mode) +int ufs_qcom_phy_qmp_20nm_set_mode(struct phy *generic_phy, + enum phy_mode mode, int submode) { struct ufs_qcom_phy *phy_common = get_ufs_qcom_phy(generic_phy); diff --git a/drivers/phy/qualcomm/phy-qcom-usb-hs.c b/drivers/phy/qualcomm/phy-qcom-usb-hs.c index abbbe75..04934f8 100644 --- a/drivers/phy/qualcomm/phy-qcom-usb-hs.c +++ b/drivers/phy/qualcomm/phy-qcom-usb-hs.c @@ -42,7 +42,8 @@ struct qcom_usb_hs_phy { struct notifier_block vbus_notify; }; -static int qcom_usb_hs_phy_set_mode(struct phy *phy, enum phy_mode mode) +static int qcom_usb_hs_phy_set_mode(struct phy *phy, + enum phy_mode mode, int submode) { struct qcom_usb_hs_phy *uphy = phy_get_drvdata(phy); u8 addr; diff --git a/drivers/phy/ti/phy-da8xx-usb.c b/drivers/phy/ti/phy-da8xx-usb.c index befb886..d5f4fbc 100644 --- a/drivers/phy/ti/phy-da8xx-usb.c +++ b/drivers/phy/ti/phy-da8xx-usb.c @@ -93,7 +93,8 @@ static int da8xx_usb20_phy_power_off(struct phy *phy) return 0; } -static int da8xx_usb20_phy_set_mode(struct phy *phy, enum phy_mode mode) +static int da8xx_usb20_phy_set_mode(struct phy *phy, + enum phy_mode mode, int submode) { struct da8xx_usb_phy *d_phy = phy_get_drvdata(phy); u32 val; diff --git a/drivers/phy/ti/phy-tusb1210.c b/drivers/phy/ti/phy-tusb1210.c index b8ec39a..329fb93 100644 --- a/drivers/phy/ti/phy-tusb1210.c +++ b/drivers/phy/ti/phy-tusb1210.c @@ -53,7 +53,7 @@ static int tusb1210_power_off(struct phy *phy) return 0; } -static int tusb1210_set_mode(struct phy *phy, enum phy_mode mode) +static int tusb1210_set_mode(struct phy *phy, enum phy_mode mode, int submode) { struct tusb1210 *tusb = phy_get_drvdata(phy); int ret; diff --git a/include/linux/phy/phy.h b/include/linux/phy/phy.h index 03b319f..b17e770 100644 --- a/include/linux/phy/phy.h +++ b/include/linux/phy/phy.h @@ -60,7 +60,7 @@ struct phy_ops { int (*exit)(struct phy *phy); int (*power_on)(struct phy *phy); int (*power_off)(struct phy *phy); - int (*set_mode)(struct phy *phy, enum phy_mode mode); + int (*set_mode)(struct phy *phy, enum phy_mode mode, int submode); int (*reset)(struct phy *phy); int (*calibrate)(struct phy *phy); struct module *owner; @@ -164,7 +164,10 @@ int phy_init(struct phy *phy); int phy_exit(struct phy *phy); int phy_power_on(struct phy *phy); int phy_power_off(struct phy *phy); -int phy_set_mode(struct phy *phy, enum phy_mode mode); +int phy_set_mode_ext(struct phy *phy, enum phy_mode mode, int submode); +#define phy_set_mode(phy, mode) \ + phy_set_mode_ext(phy, mode, 0) + static inline enum phy_mode phy_get_mode(struct phy *phy) { return phy->attrs.mode; @@ -278,13 +281,17 @@ static inline int phy_power_off(struct phy *phy) return -ENOSYS; } -static inline int phy_set_mode(struct phy *phy, enum phy_mode mode) +static inline int phy_set_mode_ext(struct phy *phy, enum phy_mode mode, + int submode) { if (!phy) return 0; return -ENOSYS; } +#define phy_set_mode(phy, mode) \ + phy_set_mode_ext(phy, mode, 0) + static inline enum phy_mode phy_get_mode(struct phy *phy) { return PHY_MODE_INVALID; From patchwork Fri Nov 9 23:47:52 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Grygorii Strashko X-Patchwork-Id: 150704 Delivered-To: patch@linaro.org Received: by 2002:a2e:299d:0:0:0:0:0 with SMTP id p29-v6csp473199ljp; Fri, 9 Nov 2018 15:49:08 -0800 (PST) X-Google-Smtp-Source: AJdET5dxWpNBWyer9XTgP5F8ZXV2/9IATGibXmemSZrqBD/eLDC+PVr3A7B7yWsMtN90DNVfyYEK X-Received: by 2002:a63:ef0b:: with SMTP id u11-v6mr9289273pgh.283.1541807348436; Fri, 09 Nov 2018 15:49:08 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1541807348; cv=none; d=google.com; s=arc-20160816; b=GxVZnnCrtYMHyiytXE1g+PbTLolTQzU+Y4EodA/zGMqNWqW+oECkepmndTlnMU8PIT Xf//hjDP6ulhlb00qXm0sZ3mseGoD7iN825y/8ZdNc5k0tw9AaoHIFKPAIiPumd54DZ7 WXVyQAOnfY643muePlr4Pqzw0B91LHYem7Wmpl+MeaQb6nzUPUd9OCzURkSoUwdDsW+U DIVCvNvirf50K0lPlpLLvN8BmqEdH8CIkZFWfnwx7ntZxAn4LksUkBHP8ZCzUit56f87 tDXHMEZNn5itNT5OaRGd1JLMjECyUqPxBw0QKWqdaDcd/kIlMQtYRif5KcUYGzn+qJMR 0klw== ARC-Message-Signature: i=1; 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[209.132.180.67]) by mx.google.com with ESMTP id v1-v6si8773263plp.85.2018.11.09.15.49.07; Fri, 09 Nov 2018 15:49:08 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728776AbeKJJb6 (ORCPT + 32 others); Sat, 10 Nov 2018 04:31:58 -0500 Received: from lelv0142.ext.ti.com ([198.47.23.249]:60328 "EHLO lelv0142.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727210AbeKJJb6 (ORCPT ); Sat, 10 Nov 2018 04:31:58 -0500 Received: from lelv0266.itg.ti.com ([10.180.67.225]) by lelv0142.ext.ti.com (8.15.2/8.15.2) with ESMTP id wA9NlwB8010910; Fri, 9 Nov 2018 17:47:58 -0600 Received: from DLEE107.ent.ti.com (dlee107.ent.ti.com [157.170.170.37]) by lelv0266.itg.ti.com (8.15.2/8.15.2) with ESMTPS id wA9NlwR4032113 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Fri, 9 Nov 2018 17:47:58 -0600 Received: from DLEE102.ent.ti.com (157.170.170.32) by DLEE107.ent.ti.com (157.170.170.37) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1466.3; Fri, 9 Nov 2018 17:47:57 -0600 Received: from dflp32.itg.ti.com (10.64.6.15) by DLEE102.ent.ti.com (157.170.170.32) with Microsoft SMTP Server (version=TLS1_0, cipher=TLS_RSA_WITH_AES_256_CBC_SHA) id 15.1.1466.3 via Frontend Transport; Fri, 9 Nov 2018 17:47:57 -0600 Received: from legion.dal.design.ti.com (legion.dal.design.ti.com [128.247.22.53]) by dflp32.itg.ti.com (8.14.3/8.13.8) with ESMTP id wA9Nlvpo012819; Fri, 9 Nov 2018 17:47:57 -0600 Received: from localhost (uda0226610.dhcp.ti.com [128.247.59.147]) by legion.dal.design.ti.com (8.11.7p1+Sun/8.11.7) with ESMTP id wA9Nlvx26440; Fri, 9 Nov 2018 17:47:57 -0600 (CST) From: Grygorii Strashko To: "David S. Miller" , Kishon Vijay Abraham I , Russell King - ARM Linux CC: , Sekhar Nori , , , Tony Lindgren , , , Alexandre Belloni , Antoine Tenart , Quentin Schulz , Vivek Gautam , Maxime Ripard , Chen-Yu Tsai , Carlo Caione , Chunfeng Yun , Matthias Brugger , Manu Gautam , Grygorii Strashko Subject: [PATCH v2 2/5] phy: core: add PHY_MODE_ETHERNET Date: Fri, 9 Nov 2018 17:47:52 -0600 Message-ID: <20181109234755.21687-3-grygorii.strashko@ti.com> X-Mailer: git-send-email 2.10.5 In-Reply-To: <20181109234755.21687-1-grygorii.strashko@ti.com> References: <20181109234755.21687-1-grygorii.strashko@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add new PHY's mode to be used by Ethernet PHY interface drivers or multipurpose PHYs like serdes. It will be reused in further changes. Signed-off-by: Grygorii Strashko --- include/linux/phy/phy.h | 1 + 1 file changed, 1 insertion(+) -- 2.10.5 diff --git a/include/linux/phy/phy.h b/include/linux/phy/phy.h index b17e770..02c9ef0 100644 --- a/include/linux/phy/phy.h +++ b/include/linux/phy/phy.h @@ -42,6 +42,7 @@ enum phy_mode { PHY_MODE_UFS_HS_A, PHY_MODE_UFS_HS_B, PHY_MODE_PCIE, + PHY_MODE_ETHERNET, }; /** From patchwork Fri Nov 9 23:47:53 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Grygorii Strashko X-Patchwork-Id: 150709 Delivered-To: patch@linaro.org Received: by 2002:a2e:299d:0:0:0:0:0 with SMTP id p29-v6csp473657ljp; Fri, 9 Nov 2018 15:49:41 -0800 (PST) X-Google-Smtp-Source: AJdET5eNkibTqY1XYktOL7r0XOA+qPz8tuwFTgZUfpHkMNfODD8GKBpSShOin/Xdb+4C9noWNigJ X-Received: by 2002:a63:26c1:: with SMTP id m184mr8733756pgm.367.1541807381646; Fri, 09 Nov 2018 15:49:41 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1541807381; cv=none; d=google.com; s=arc-20160816; b=W69rt6pr6rrKOak3KPUK7zs4/wF7QeRQPEjhPcPruGylp1zLU0pQffIOYnA5moNaGX GHdR/iigkYsgoKPyJr9SLsIIDgjbMsnEDK2OTpHVweEbEMzCGHOfnITI1Z+krPZjcJ6U ml/Q6li/HJT7HhL7ca5JRmmtbr2zYOoYjeecVWsQKy6Op/PgCBF7L6OqiuTFYElM9cn2 WFFlOPxxS8P8obIru1RR61rGiCzfOQSGKGQW6tigCCX052GO5S1djuFEb8iUXdKMXY95 ycKBAE9ovbTB0S6HRf+hfgk3dN/J8IrEc8Njdfedftyn39T/rfBJR2GDjQn5qUjbfzlK fm4w== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:dkim-signature; bh=wAoXWWgNJlphbxo9jBvLHX39ICCAouj0KQbEd5GdbPw=; b=HE36PLakp2zgmDVXrUqr93YGIDLFr8kB/wvZxK/2aDgdaqnXzIbnUaQy+/tViftzuV BXq1corZQL7IwQGg9TkBhDqpg/0mpP8jcs5/RIjDap8a7sS+BaDmcPJhFEREwKxdufbj DYC/zopKlyeObSOoPMWZ+5eAlPxID4Xx3QrHltc/swq95Myxg9JC7UkY18IhETpBnzcb +KxP/0KLrcW//HmqXLURiCpY3BTNn8mPBs+p/fIRLrqhoUOXF7d8mnFuhOrOPsNmp6pD VKsNztEyUDBySvPHNShUzZnPE3qwz0ycYQZ7OvZqeR5IytELNZB3ASQMFtDHCFqiAIiu 5BLg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=ZZBVNgUE; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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Miller" , Kishon Vijay Abraham I , Russell King - ARM Linux CC: , Sekhar Nori , , , Tony Lindgren , , , Alexandre Belloni , Antoine Tenart , Quentin Schulz , Vivek Gautam , Maxime Ripard , Chen-Yu Tsai , Carlo Caione , Chunfeng Yun , Matthias Brugger , Manu Gautam , Grygorii Strashko Subject: [PATCH v2 3/5] phy: ocelot-serdes: convert to use eth phy mode and submode Date: Fri, 9 Nov 2018 17:47:53 -0600 Message-ID: <20181109234755.21687-4-grygorii.strashko@ti.com> X-Mailer: git-send-email 2.10.5 In-Reply-To: <20181109234755.21687-1-grygorii.strashko@ti.com> References: <20181109234755.21687-1-grygorii.strashko@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Convert ocelot-serdes PHY driver to use recently introduced PHY_MODE_ETHERNET and phy_set_mode_ext(). Signed-off-by: Grygorii Strashko --- drivers/net/ethernet/mscc/ocelot.c | 9 ++------- drivers/phy/mscc/phy-ocelot-serdes.c | 14 ++++++++++---- 2 files changed, 12 insertions(+), 11 deletions(-) -- 2.10.5 diff --git a/drivers/net/ethernet/mscc/ocelot.c b/drivers/net/ethernet/mscc/ocelot.c index 3238b9e..3edb608 100644 --- a/drivers/net/ethernet/mscc/ocelot.c +++ b/drivers/net/ethernet/mscc/ocelot.c @@ -472,7 +472,6 @@ static int ocelot_port_open(struct net_device *dev) { struct ocelot_port *port = netdev_priv(dev); struct ocelot *ocelot = port->ocelot; - enum phy_mode phy_mode; int err; /* Enable receiving frames on the port, and activate auto-learning of @@ -484,12 +483,8 @@ static int ocelot_port_open(struct net_device *dev) ANA_PORT_PORT_CFG, port->chip_port); if (port->serdes) { - if (port->phy_mode == PHY_INTERFACE_MODE_SGMII) - phy_mode = PHY_MODE_SGMII; - else - phy_mode = PHY_MODE_QSGMII; - - err = phy_set_mode(port->serdes, phy_mode); + err = phy_set_mode_ext(port->serdes, PHY_MODE_ETHERNET, + port->phy_mode); if (err) { netdev_err(dev, "Could not set mode of SerDes\n"); return err; diff --git a/drivers/phy/mscc/phy-ocelot-serdes.c b/drivers/phy/mscc/phy-ocelot-serdes.c index c61a9890..f525a21 100644 --- a/drivers/phy/mscc/phy-ocelot-serdes.c +++ b/drivers/phy/mscc/phy-ocelot-serdes.c @@ -11,6 +11,7 @@ #include #include #include +#include #include #include #include @@ -116,8 +117,10 @@ struct serdes_mux { .mux = _mux, \ } -#define SERDES_MUX_SGMII(i, p, m, c) SERDES_MUX(i, p, PHY_MODE_SGMII, m, c) -#define SERDES_MUX_QSGMII(i, p, m, c) SERDES_MUX(i, p, PHY_MODE_QSGMII, m, c) +#define SERDES_MUX_SGMII(i, p, m, c) \ + SERDES_MUX(i, p, PHY_INTERFACE_MODE_SGMII, m, c) +#define SERDES_MUX_QSGMII(i, p, m, c) \ + SERDES_MUX(i, p, PHY_INTERFACE_MODE_QSGMII, m, c) static const struct serdes_mux ocelot_serdes_muxes[] = { SERDES_MUX_SGMII(SERDES1G(0), 0, 0, 0), @@ -164,12 +167,15 @@ static int serdes_set_mode(struct phy *phy, enum phy_mode mode, int submode) unsigned int i; int ret; + if (mode != PHY_MODE_ETHERNET) + return -EINVAL; + for (i = 0; i < ARRAY_SIZE(ocelot_serdes_muxes); i++) { if (macro->idx != ocelot_serdes_muxes[i].idx || - mode != ocelot_serdes_muxes[i].mode) + submode != ocelot_serdes_muxes[i].mode) continue; - if (mode != PHY_MODE_QSGMII && + if (submode != PHY_INTERFACE_MODE_QSGMII && macro->port != ocelot_serdes_muxes[i].port) continue; From patchwork Fri Nov 9 23:47:54 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Grygorii Strashko X-Patchwork-Id: 150705 Delivered-To: patch@linaro.org Received: by 2002:a2e:299d:0:0:0:0:0 with SMTP id p29-v6csp473221ljp; Fri, 9 Nov 2018 15:49:10 -0800 (PST) X-Google-Smtp-Source: AJdET5fcEDaz952q34FwuvcjkYdtfGSDw7Yu4pXcFwncDMLogNmQDk9ZUFwev4HoNNdBlO7+6Dhc X-Received: by 2002:a62:22c3:: with SMTP id p64-v6mr11316017pfj.9.1541807350261; Fri, 09 Nov 2018 15:49:10 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1541807350; cv=none; d=google.com; s=arc-20160816; b=wna+PDuTtniYLwP+NECn4rPl85uYsLn9koJc3qEyqeWNW0MCOD8B170e7bBZJx3IFX zZ4GZkwXfUo7qAPMp6tKq6Go78HB9Ey/oyL0yBUDkzGRYbsD/jFYzqh+Dq5DPXNt4w0f qVT2KvHlO0fdIyvzolE1vd/UabGsa8DReS8xETFAW3/AfLbWBgb18of9PWHzxIQ97uDu y2mRQFlfiaJ0SkZz/s9JC5O7ECWmmDXjXcYYU+frmJ0rkdLKd/b97axrl6HZnaNOOsDn 5LeOSfgYE716usjJ4mo8dm6UL11FhLhPbgEMSJVeiSHTcrhJW9yCYAxVyJE/hmLhk5kb cxcw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:dkim-signature; bh=/DiMdl0KwC0+vZ15fvyL+1CNQ8ClhuedeWTWVTUQ0DE=; b=UIsdhXLC5a1J4o4lZZzpxLT7MmuUBNYtFGZ6iMOO5p7Jtuol/G+8Smc9V7gZGl0gBE XG4sPMCgvypiSXfj3DT1M4rNvwVYEao/FF7GL/xV0KlLAuD5mqSf7FxpsxVlq8Ru0o5F uzLm0OKgTtpEJnGC6NCjTkJeaGvOxXPetaCRDI6U8QGC1GuJJSpa5EEWLeBRSUmw3K4K sICXKzJsgt44jzaVEeqGod8SzUZU2ensYq3L56y1Oam3eDJ1hiN5SZOwVy+AJE2caT+6 +J7dq0Zc5fjPc6uQQri98ZvW6TTrYESDpgxzdRqEeihw5V04HVv5jUoZ8TT2NS/2w5xX wYkg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=Za6i8lC7; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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Miller" , Kishon Vijay Abraham I , Russell King - ARM Linux CC: , Sekhar Nori , , , Tony Lindgren , , , Alexandre Belloni , Antoine Tenart , Quentin Schulz , Vivek Gautam , Maxime Ripard , Chen-Yu Tsai , Carlo Caione , Chunfeng Yun , Matthias Brugger , Manu Gautam , Grygorii Strashko Subject: [PATCH v2 4/5] phy: mvebu-cp110-comphy: convert to use eth phy mode and submode Date: Fri, 9 Nov 2018 17:47:54 -0600 Message-ID: <20181109234755.21687-5-grygorii.strashko@ti.com> X-Mailer: git-send-email 2.10.5 In-Reply-To: <20181109234755.21687-1-grygorii.strashko@ti.com> References: <20181109234755.21687-1-grygorii.strashko@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Convert mvebu-cp110-comphy PHY driver to use recently introduced PHY_MODE_ETHERNET and phy_set_mode_ext(). Signed-off-by: Grygorii Strashko --- drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c | 19 +----- drivers/phy/marvell/phy-mvebu-cp110-comphy.c | 83 ++++++++++++++----------- 2 files changed, 48 insertions(+), 54 deletions(-) -- 2.10.5 Tested-by: Maxime Chevallier Acked-by: Antoine Tenart diff --git a/drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c b/drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c index 7a37a37..731793a 100644 --- a/drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c +++ b/drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c @@ -1165,28 +1165,13 @@ static void mvpp22_gop_setup_irq(struct mvpp2_port *port) */ static int mvpp22_comphy_init(struct mvpp2_port *port) { - enum phy_mode mode; int ret; if (!port->comphy) return 0; - switch (port->phy_interface) { - case PHY_INTERFACE_MODE_SGMII: - case PHY_INTERFACE_MODE_1000BASEX: - mode = PHY_MODE_SGMII; - break; - case PHY_INTERFACE_MODE_2500BASEX: - mode = PHY_MODE_2500SGMII; - break; - case PHY_INTERFACE_MODE_10GKR: - mode = PHY_MODE_10GKR; - break; - default: - return -EINVAL; - } - - ret = phy_set_mode(port->comphy, mode); + ret = phy_set_mode_ext(port->comphy, PHY_MODE_ETHERNET, + port->phy_interface); if (ret) return ret; diff --git a/drivers/phy/marvell/phy-mvebu-cp110-comphy.c b/drivers/phy/marvell/phy-mvebu-cp110-comphy.c index 79b52c3..7dee72b 100644 --- a/drivers/phy/marvell/phy-mvebu-cp110-comphy.c +++ b/drivers/phy/marvell/phy-mvebu-cp110-comphy.c @@ -9,6 +9,7 @@ #include #include #include +#include #include #include #include @@ -131,26 +132,26 @@ struct mvebu_comhy_conf { static const struct mvebu_comhy_conf mvebu_comphy_cp110_modes[] = { /* lane 0 */ - MVEBU_COMPHY_CONF(0, 1, PHY_MODE_SGMII, 0x1), - MVEBU_COMPHY_CONF(0, 1, PHY_MODE_2500SGMII, 0x1), + MVEBU_COMPHY_CONF(0, 1, PHY_INTERFACE_MODE_SGMII, 0x1), + MVEBU_COMPHY_CONF(0, 1, PHY_INTERFACE_MODE_2500BASEX, 0x1), /* lane 1 */ - MVEBU_COMPHY_CONF(1, 2, PHY_MODE_SGMII, 0x1), - MVEBU_COMPHY_CONF(1, 2, PHY_MODE_2500SGMII, 0x1), + MVEBU_COMPHY_CONF(1, 2, PHY_INTERFACE_MODE_SGMII, 0x1), + MVEBU_COMPHY_CONF(1, 2, PHY_INTERFACE_MODE_2500BASEX, 0x1), /* lane 2 */ - MVEBU_COMPHY_CONF(2, 0, PHY_MODE_SGMII, 0x1), - MVEBU_COMPHY_CONF(2, 0, PHY_MODE_2500SGMII, 0x1), - MVEBU_COMPHY_CONF(2, 0, PHY_MODE_10GKR, 0x1), + MVEBU_COMPHY_CONF(2, 0, PHY_INTERFACE_MODE_SGMII, 0x1), + MVEBU_COMPHY_CONF(2, 0, PHY_INTERFACE_MODE_2500BASEX, 0x1), + MVEBU_COMPHY_CONF(2, 0, PHY_INTERFACE_MODE_10GKR, 0x1), /* lane 3 */ - MVEBU_COMPHY_CONF(3, 1, PHY_MODE_SGMII, 0x2), - MVEBU_COMPHY_CONF(3, 1, PHY_MODE_2500SGMII, 0x2), + MVEBU_COMPHY_CONF(3, 1, PHY_INTERFACE_MODE_SGMII, 0x2), + MVEBU_COMPHY_CONF(3, 1, PHY_INTERFACE_MODE_2500BASEX, 0x2), /* lane 4 */ - MVEBU_COMPHY_CONF(4, 0, PHY_MODE_SGMII, 0x2), - MVEBU_COMPHY_CONF(4, 0, PHY_MODE_2500SGMII, 0x2), - MVEBU_COMPHY_CONF(4, 0, PHY_MODE_10GKR, 0x2), - MVEBU_COMPHY_CONF(4, 1, PHY_MODE_SGMII, 0x1), + MVEBU_COMPHY_CONF(4, 0, PHY_INTERFACE_MODE_SGMII, 0x2), + MVEBU_COMPHY_CONF(4, 0, PHY_INTERFACE_MODE_2500BASEX, 0x2), + MVEBU_COMPHY_CONF(4, 0, PHY_INTERFACE_MODE_10GKR, 0x2), + MVEBU_COMPHY_CONF(4, 1, PHY_INTERFACE_MODE_SGMII, 0x1), /* lane 5 */ - MVEBU_COMPHY_CONF(5, 2, PHY_MODE_SGMII, 0x1), - MVEBU_COMPHY_CONF(5, 2, PHY_MODE_2500SGMII, 0x1), + MVEBU_COMPHY_CONF(5, 2, PHY_INTERFACE_MODE_SGMII, 0x1), + MVEBU_COMPHY_CONF(5, 2, PHY_INTERFACE_MODE_2500BASEX, 0x1), }; struct mvebu_comphy_priv { @@ -163,10 +164,12 @@ struct mvebu_comphy_lane { struct mvebu_comphy_priv *priv; unsigned id; enum phy_mode mode; + int submode; int port; }; -static int mvebu_comphy_get_mux(int lane, int port, enum phy_mode mode) +static int mvebu_comphy_get_mux(int lane, int port, + enum phy_mode mode, int submode) { int i, n = ARRAY_SIZE(mvebu_comphy_cp110_modes); @@ -177,7 +180,7 @@ static int mvebu_comphy_get_mux(int lane, int port, enum phy_mode mode) for (i = 0; i < n; i++) { if (mvebu_comphy_cp110_modes[i].lane == lane && mvebu_comphy_cp110_modes[i].port == port && - mvebu_comphy_cp110_modes[i].mode == mode) + mvebu_comphy_cp110_modes[i].mode == submode) break; } @@ -187,8 +190,7 @@ static int mvebu_comphy_get_mux(int lane, int port, enum phy_mode mode) return mvebu_comphy_cp110_modes[i].mux; } -static void mvebu_comphy_ethernet_init_reset(struct mvebu_comphy_lane *lane, - enum phy_mode mode) +static void mvebu_comphy_ethernet_init_reset(struct mvebu_comphy_lane *lane) { struct mvebu_comphy_priv *priv = lane->priv; u32 val; @@ -206,14 +208,14 @@ static void mvebu_comphy_ethernet_init_reset(struct mvebu_comphy_lane *lane, MVEBU_COMPHY_SERDES_CFG0_HALF_BUS | MVEBU_COMPHY_SERDES_CFG0_GEN_RX(0xf) | MVEBU_COMPHY_SERDES_CFG0_GEN_TX(0xf)); - if (mode == PHY_MODE_10GKR) + if (lane->submode == PHY_INTERFACE_MODE_10GKR) val |= MVEBU_COMPHY_SERDES_CFG0_GEN_RX(0xe) | MVEBU_COMPHY_SERDES_CFG0_GEN_TX(0xe); - else if (mode == PHY_MODE_2500SGMII) + else if (lane->submode == PHY_INTERFACE_MODE_2500BASEX) val |= MVEBU_COMPHY_SERDES_CFG0_GEN_RX(0x8) | MVEBU_COMPHY_SERDES_CFG0_GEN_TX(0x8) | MVEBU_COMPHY_SERDES_CFG0_HALF_BUS; - else if (mode == PHY_MODE_SGMII) + else if (lane->submode == PHY_INTERFACE_MODE_SGMII) val |= MVEBU_COMPHY_SERDES_CFG0_GEN_RX(0x6) | MVEBU_COMPHY_SERDES_CFG0_GEN_TX(0x6) | MVEBU_COMPHY_SERDES_CFG0_HALF_BUS; @@ -243,7 +245,7 @@ static void mvebu_comphy_ethernet_init_reset(struct mvebu_comphy_lane *lane, /* refclk selection */ val = readl(priv->base + MVEBU_COMPHY_MISC_CTRL0(lane->id)); val &= ~MVEBU_COMPHY_MISC_CTRL0_REFCLK_SEL; - if (mode == PHY_MODE_10GKR) + if (lane->submode == PHY_INTERFACE_MODE_10GKR) val |= MVEBU_COMPHY_MISC_CTRL0_ICP_FORCE; writel(val, priv->base + MVEBU_COMPHY_MISC_CTRL0(lane->id)); @@ -261,8 +263,7 @@ static void mvebu_comphy_ethernet_init_reset(struct mvebu_comphy_lane *lane, writel(val, priv->base + MVEBU_COMPHY_LOOPBACK(lane->id)); } -static int mvebu_comphy_init_plls(struct mvebu_comphy_lane *lane, - enum phy_mode mode) +static int mvebu_comphy_init_plls(struct mvebu_comphy_lane *lane) { struct mvebu_comphy_priv *priv = lane->priv; u32 val; @@ -303,13 +304,13 @@ static int mvebu_comphy_init_plls(struct mvebu_comphy_lane *lane, return 0; } -static int mvebu_comphy_set_mode_sgmii(struct phy *phy, enum phy_mode mode) +static int mvebu_comphy_set_mode_sgmii(struct phy *phy) { struct mvebu_comphy_lane *lane = phy_get_drvdata(phy); struct mvebu_comphy_priv *priv = lane->priv; u32 val; - mvebu_comphy_ethernet_init_reset(lane, mode); + mvebu_comphy_ethernet_init_reset(lane); val = readl(priv->base + MVEBU_COMPHY_RX_CTRL1(lane->id)); val &= ~MVEBU_COMPHY_RX_CTRL1_CLK8T_EN; @@ -330,7 +331,7 @@ static int mvebu_comphy_set_mode_sgmii(struct phy *phy, enum phy_mode mode) val |= MVEBU_COMPHY_GEN1_S0_TX_EMPH(0x1); writel(val, priv->base + MVEBU_COMPHY_GEN1_S0(lane->id)); - return mvebu_comphy_init_plls(lane, PHY_MODE_SGMII); + return mvebu_comphy_init_plls(lane); } static int mvebu_comphy_set_mode_10gkr(struct phy *phy) @@ -339,7 +340,7 @@ static int mvebu_comphy_set_mode_10gkr(struct phy *phy) struct mvebu_comphy_priv *priv = lane->priv; u32 val; - mvebu_comphy_ethernet_init_reset(lane, PHY_MODE_10GKR); + mvebu_comphy_ethernet_init_reset(lane); val = readl(priv->base + MVEBU_COMPHY_RX_CTRL1(lane->id)); val |= MVEBU_COMPHY_RX_CTRL1_RXCLK2X_SEL | @@ -469,7 +470,7 @@ static int mvebu_comphy_set_mode_10gkr(struct phy *phy) val |= MVEBU_COMPHY_EXT_SELV_RX_SAMPL(0x1a); writel(val, priv->base + MVEBU_COMPHY_EXT_SELV(lane->id)); - return mvebu_comphy_init_plls(lane, PHY_MODE_10GKR); + return mvebu_comphy_init_plls(lane); } static int mvebu_comphy_power_on(struct phy *phy) @@ -479,7 +480,8 @@ static int mvebu_comphy_power_on(struct phy *phy) int ret, mux; u32 val; - mux = mvebu_comphy_get_mux(lane->id, lane->port, lane->mode); + mux = mvebu_comphy_get_mux(lane->id, lane->port, + lane->mode, lane->submode); if (mux < 0) return -ENOTSUPP; @@ -492,12 +494,12 @@ static int mvebu_comphy_power_on(struct phy *phy) val |= mux << MVEBU_COMPHY_SELECTOR_PHY(lane->id); regmap_write(priv->regmap, MVEBU_COMPHY_SELECTOR, val); - switch (lane->mode) { - case PHY_MODE_SGMII: - case PHY_MODE_2500SGMII: - ret = mvebu_comphy_set_mode_sgmii(phy, lane->mode); + switch (lane->submode) { + case PHY_INTERFACE_MODE_SGMII: + case PHY_INTERFACE_MODE_2500BASEX: + ret = mvebu_comphy_set_mode_sgmii(phy); break; - case PHY_MODE_10GKR: + case PHY_INTERFACE_MODE_10GKR: ret = mvebu_comphy_set_mode_10gkr(phy); break; default: @@ -517,10 +519,17 @@ static int mvebu_comphy_set_mode(struct phy *phy, { struct mvebu_comphy_lane *lane = phy_get_drvdata(phy); - if (mvebu_comphy_get_mux(lane->id, lane->port, mode) < 0) + if (mode != PHY_MODE_ETHERNET) + return -EINVAL; + + if (submode == PHY_INTERFACE_MODE_1000BASEX) + submode = PHY_INTERFACE_MODE_SGMII; + + if (mvebu_comphy_get_mux(lane->id, lane->port, mode, submode) < 0) return -EINVAL; lane->mode = mode; + lane->submode = submode; return 0; } From patchwork Fri Nov 9 23:47:55 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Grygorii Strashko X-Patchwork-Id: 150707 Delivered-To: patch@linaro.org Received: by 2002:a2e:299d:0:0:0:0:0 with SMTP id p29-v6csp473452ljp; Fri, 9 Nov 2018 15:49:26 -0800 (PST) X-Google-Smtp-Source: AJdET5ehdkLzdjzfxF3yiPyKowoTw8pm8COSn5XMXPR/2vmWsdhT71g7kTpmlhuiS1wx8Ds5X7Vr X-Received: by 2002:a62:7893:: with SMTP id t141-v6mr10990702pfc.259.1541807366379; Fri, 09 Nov 2018 15:49:26 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1541807366; cv=none; d=google.com; s=arc-20160816; b=T5EF5GaXmG/vks3vgJWXW8wjPMw7Dm8qIMJr12esTaN6XYV/VsqyTcmdtYmRv6jAkc suI74+clbTFDdi7xJwAK7GFVgvbS4tH0nZKsHI+r1onYvtGTfgPjhSuYTHDuSa25lDI7 n/eteOwSfjEPRyRVuPMOlwAlVSfGGYVteo+X1BYPjh41a+Z97nzz7786UKb3PI3SVK7U +nPFqbrmDGlDKoJZw+mNQPW/W+GhpAuwSDhnjWrjZ3hZ8EesptfgieCsgpwMvlIQicjX x+7DJ1JuBNFdozNGDoAdMl/x8rjWMnA7sCVwtUI1xKJJ0tn6szCaeYcyimILa52bUwNj oLEA== ARC-Message-Signature: i=1; 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Miller" , Kishon Vijay Abraham I , Russell King - ARM Linux CC: , Sekhar Nori , , , Tony Lindgren , , , Alexandre Belloni , Antoine Tenart , Quentin Schulz , Vivek Gautam , Maxime Ripard , Chen-Yu Tsai , Carlo Caione , Chunfeng Yun , Matthias Brugger , Manu Gautam , Grygorii Strashko Subject: [PATCH v2 5/5] phy: core: clean up unused ethernet specific phy modes Date: Fri, 9 Nov 2018 17:47:55 -0600 Message-ID: <20181109234755.21687-6-grygorii.strashko@ti.com> X-Mailer: git-send-email 2.10.5 In-Reply-To: <20181109234755.21687-1-grygorii.strashko@ti.com> References: <20181109234755.21687-1-grygorii.strashko@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org After recent changes PHY_MODE_SGMII, PHY_MODE_2500SGMII, PHY_MODE_QSGMII, PHY_MODE_10GKR are not used any more and can be removed. Hence - remove them. Signed-off-by: Grygorii Strashko --- include/linux/phy/phy.h | 4 ---- 1 file changed, 4 deletions(-) -- 2.10.5 diff --git a/include/linux/phy/phy.h b/include/linux/phy/phy.h index 02c9ef0..79da05a 100644 --- a/include/linux/phy/phy.h +++ b/include/linux/phy/phy.h @@ -35,10 +35,6 @@ enum phy_mode { PHY_MODE_USB_DEVICE_HS, PHY_MODE_USB_DEVICE_SS, PHY_MODE_USB_OTG, - PHY_MODE_SGMII, - PHY_MODE_2500SGMII, - PHY_MODE_QSGMII, - PHY_MODE_10GKR, PHY_MODE_UFS_HS_A, PHY_MODE_UFS_HS_B, PHY_MODE_PCIE,