From patchwork Fri Nov 9 14:04:42 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jerome Brunet X-Patchwork-Id: 150654 Delivered-To: patch@linaro.org Received: by 2002:a2e:299d:0:0:0:0:0 with SMTP id p29-v6csp213318ljp; Fri, 9 Nov 2018 06:07:49 -0800 (PST) X-Google-Smtp-Source: AJdET5f883rhqVfyf9CKa+uWt0CnHLQba4RpQmmumn26ywjXjSmyPT+0KpP2TefEttWOYBWF4CJH X-Received: by 2002:a17:902:b401:: with SMTP id x1-v6mr9204420plr.237.1541772466306; Fri, 09 Nov 2018 06:07:46 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1541772466; cv=none; d=google.com; s=arc-20160816; b=AFwupW8tVV82ufTuvDXU4WoOqtlWzZNNtHBrkj+jtHxaaPfvyhy1JKIdUMfHBL0DvY glmLVw4ZYyUX1B23iviP6EroUGQFzh0a0U/CT7vdvYXu3OA1/EouNhXhNzj3MEZWbEKN L32iAmN6FBe4oz/dP5fMePHHgU8/KY1liMi6iqjqpLErh0loWvWBxPcX2H3oPbOKdz6o 7okqt5YbWtU3tVISyNkM92RdxRlEwEC4xpK7HXssH2TlIx2ZuliqmJ2vtPgdFr9O82dG uI5Js5CmjNMeNQhzCBO3qHmik2FpA+ECOpR4w00yB5Kdte6GjGsusaJgcOvO3opA/Q5s 7tTg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=5sBBc5EvtxV7NFthSUI3pE8N+JW8dWzJOFUjmWOYU4c=; b=DXmwJUBz3u2AgQIzbddleYrWQu02ZAKxolV3eA5qSt6XOai1NToqMCfmAAlfOlTGh1 O1p/xpfCvnCnPqc4mHyO7TBSMocKU7Jz1OzXPQH8O6lPqMA9IRsE6Gj0Zep78BZy8/nC 19w5LNMsxkuFvQrGpb7aYcjgwF67+iFe+7Hm7Q54jjFAs+yErldbSnQkTq1WvijoH1UU 8hukl5qf7ByUzu6vctzI8DzMNTDVDy1kMjoCfcN7kkg5vJZ04fxpAzdlWdhYuaIJZyoM Ob31SuYIg/5n7KYrpr0Eutw6Ivh7eP2r4EofWhzjxImXrEEzCZDzUmLaGXIAR9nTSl+T lKvw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@baylibre-com.20150623.gappssmtp.com header.s=20150623 header.b=w2vePZqw; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id l184si6806759pgd.523.2018.11.09.06.07.43; Fri, 09 Nov 2018 06:07:46 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@baylibre-com.20150623.gappssmtp.com header.s=20150623 header.b=w2vePZqw; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728398AbeKIXqn (ORCPT + 32 others); Fri, 9 Nov 2018 18:46:43 -0500 Received: from mail-wr1-f68.google.com ([209.85.221.68]:32980 "EHLO mail-wr1-f68.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728094AbeKIXpn (ORCPT ); Fri, 9 Nov 2018 18:45:43 -0500 Received: by mail-wr1-f68.google.com with SMTP id u9-v6so2042607wrr.0 for ; Fri, 09 Nov 2018 06:04:58 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=baylibre-com.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=5sBBc5EvtxV7NFthSUI3pE8N+JW8dWzJOFUjmWOYU4c=; b=w2vePZqwP/S8ctG411E/KBaYLGU/zQhtamb+ciUS7vGB1KCo87xuSEYeCys+BJki1P 14+za2fF3+MPFgM+U9A6n23UZCPVmaG1/OkbpGgdcd6NI69ZvaXEVYNQfZFo2Gc3ct5H IfU/rFHo1y4QgsLlD6fSIsuA83YdF/ef82zY//ThUZWW4T49hcRSbx7gLVONwrYfXHEP 0qH9NaiK/CdUlO65rDv6vpsVGcAGJQ0fBpS+nCiOrIMqi618sh9Pol8EoVqBbeSrpXx5 VhsvZ0kO7Umhiet2PfdaIYh5/KeAuRhroYQIyJcexAV+XafvpvEk91ipsVjQVz7fTbvz px8A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=5sBBc5EvtxV7NFthSUI3pE8N+JW8dWzJOFUjmWOYU4c=; b=GqUwkZSEmBkKfCY1YAkYaBF8tHjuhQ2+ehXAFVProgsUx7EwvUDAK28KbI7W/9NHzt Djw2cTL+5jNf3DQPVUTr0WM1HW5E5i4uIWpDs9sWJg5uQyV3mF4s48eONH+GX5nemb1E jQu8TmvNp61LVQriKZ/GtMOxO325pm/Q54yt2Bw2akBiPTaPlqkPdZm1ysHG/qsA/+mZ aQcc/VDBvOF8uT8h8t00Udia2tI1B63ExfeEWPF5rnI/f7nle30XdFUq2SJk9+ljL1ad V0kZU/AZBcmTsqdLZmxKH2BocjgsgzbYllWbUoxgo8cCruH6Esu80FIb2XSocgscNV+3 OPVQ== X-Gm-Message-State: AGRZ1gITdTdIWnR+WcUwmQmsm+M9sayj2r4ewEAgYpWWwu2/nqoyuXv6 nVJoux8lJNFVw4qN51ZvonRzJA== X-Received: by 2002:adf:ba52:: with SMTP id t18-v6mr7612292wrg.325.1541772297448; Fri, 09 Nov 2018 06:04:57 -0800 (PST) Received: from boomer.baylibre.com ([2a01:e34:eeb6:4690:106b:bae3:31ed:7561]) by smtp.googlemail.com with ESMTPSA id w18-v6sm15964987wrn.66.2018.11.09.06.04.55 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Fri, 09 Nov 2018 06:04:56 -0800 (PST) From: Jerome Brunet To: Kevin Hilman , Carlo Caione Cc: Jerome Brunet , devicetree@vger.kernel.org, linux-amlogic@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 1/4] arm64: dts: meson: remove extra subnode in mmc clk_gate pinmux Date: Fri, 9 Nov 2018 15:04:42 +0100 Message-Id: <20181109140445.17795-2-jbrunet@baylibre.com> X-Mailer: git-send-email 2.19.1 In-Reply-To: <20181109140445.17795-1-jbrunet@baylibre.com> References: <20181109140445.17795-1-jbrunet@baylibre.com> MIME-Version: 1.0 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org In the pinmux of the mmc clk_gate nodes, we define 2 subnodes. One for the function definition, the other for the bias. This is not necessary since we can define the function and the bias in the same subnode. Signed-off-by: Jerome Brunet --- arch/arm64/boot/dts/amlogic/meson-axg.dtsi | 6 ------ arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi | 9 --------- arch/arm64/boot/dts/amlogic/meson-gxl.dtsi | 9 --------- 3 files changed, 24 deletions(-) -- 2.19.1 diff --git a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi index eb46db001ce0..e86f5f721f8f 100644 --- a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi @@ -280,9 +280,6 @@ mux { groups = "BOOT_8"; function = "gpio_periphs"; - }; - cfg-pull-down { - pins = "BOOT_8"; bias-pull-down; }; }; @@ -513,9 +510,6 @@ mux { groups = "GPIOX_4"; function = "gpio_periphs"; - }; - cfg-pull-down { - pins = "GPIOX_4"; bias-pull-down; }; }; diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi index 524f533e41d4..1cb8e7e0d0da 100644 --- a/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi @@ -377,9 +377,6 @@ mux { groups = "BOOT_8"; function = "gpio_periphs"; - }; - cfg-pull-down { - pins = "BOOT_8"; bias-pull-down; }; }; @@ -426,9 +423,6 @@ mux { groups = "CARD_2"; function = "gpio_periphs"; - }; - cfg-pull-down { - pins = "CARD_2"; bias-pull-down; }; }; @@ -449,9 +443,6 @@ mux { groups = "GPIOX_4"; function = "gpio_periphs"; - }; - cfg-pull-down { - pins = "GPIOX_4"; bias-pull-down; }; }; diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi index 8ccab9a1ebcc..7cfee40d89e9 100644 --- a/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi @@ -324,9 +324,6 @@ mux { groups = "BOOT_8"; function = "gpio_periphs"; - }; - cfg-pull-down { - pins = "BOOT_8"; bias-pull-down; }; }; @@ -373,9 +370,6 @@ mux { groups = "CARD_2"; function = "gpio_periphs"; - }; - cfg-pull-down { - pins = "CARD_2"; bias-pull-down; }; }; @@ -396,9 +390,6 @@ mux { groups = "GPIOX_4"; function = "gpio_periphs"; - }; - cfg-pull-down { - pins = "GPIOX_4"; bias-pull-down; }; }; From patchwork Fri Nov 9 14:04:43 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jerome Brunet X-Patchwork-Id: 150645 Delivered-To: patch@linaro.org Received: by 2002:a2e:299d:0:0:0:0:0 with SMTP id p29-v6csp209589ljp; Fri, 9 Nov 2018 06:05:22 -0800 (PST) X-Google-Smtp-Source: AJdET5fYSIj6S7Fk35+m/0tIv8S0GoN6BxrEgZ1Klel7r/5WQqUCOvBDQnhIzZYue9SfFJYmbSyh X-Received: by 2002:a62:f541:: with SMTP id n62-v6mr9113879pfh.59.1541772322811; Fri, 09 Nov 2018 06:05:22 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1541772322; cv=none; d=google.com; s=arc-20160816; b=PEXzcmdBH94ksMPIyjqnfPw5AOFxvRR4+cKnOvU2LvCOXdQOjmfZwejDyWhhCqUzih eVrvTXs/EnmW5KhknUykKJpVDmAYwxiMIMnulbNRbMxLHkksx8V6dzQcynGqD4UiTfRp yKMvuaYajaofhAOR2X5STNy7eeu51VdSb+UdNK4n4VIUs4d34Klmw9fH8F66Pl3ZdWe1 UvOp8Hi660GDZVDwJuBOvY0dC273eQ7cSRPInCFxH+EqVIK8WKruq+YHyJnQXcu8FQrg GA505lQjGlYMNm7FK18dNtHlS0SfAE/p8vg5TqXeeM4CJF+AcGmYk4iyWPv1nE971ppW /6HA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=/0smNNuQStEDVjeoyozdvGvGeLKrZskOlohutZmWEJk=; b=w8AtUJjS35FU2ys5wTl0KeLhgV11KNZhnH1DEPceS2Yl1mR9Jkosw630lsnVN+Ry3Y mIt0cp1xj/OKMkbXxTTFU7xHuoy6xxyvEuowjmeSfKB2POMG83powpgG8Yb/1psJpgDv cQJUdqGYM4IuBdbe19aAGp4MXnbpalUWILtFUo+nh7SEQpJngk5TQwr7+NHDrnn7eB/n zRLICLakNfatzhqIMLFz26hAQl8QC0DQmJtz/kYwiYUw09oqaBo8gxOKzNwobaBt0p7C tk87ykoovZ3/SxypbGayFAtS8QdPXmevLtPnQIKQeEvkpUmpsZjfjolML7xQ1sDLpT3b MDrQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@baylibre-com.20150623.gappssmtp.com header.s=20150623 header.b=f+mSw5cp; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id l184si6806759pgd.523.2018.11.09.06.05.16; Fri, 09 Nov 2018 06:05:22 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@baylibre-com.20150623.gappssmtp.com header.s=20150623 header.b=f+mSw5cp; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728167AbeKIXpq (ORCPT + 32 others); Fri, 9 Nov 2018 18:45:46 -0500 Received: from mail-wm1-f68.google.com ([209.85.128.68]:36247 "EHLO mail-wm1-f68.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728054AbeKIXpp (ORCPT ); Fri, 9 Nov 2018 18:45:45 -0500 Received: by mail-wm1-f68.google.com with SMTP id v70-v6so1612130wmd.1 for ; Fri, 09 Nov 2018 06:04:59 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=baylibre-com.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=/0smNNuQStEDVjeoyozdvGvGeLKrZskOlohutZmWEJk=; b=f+mSw5cpUaZcnpAq2GahJvGFTV0HHsWqEo3+scU7rhlulqlm+RgWgTsrIoUumxjtwJ BL835mB9Z3wcjUdARRVKEhU/ad8gPzgQ5WHiM7JpxUxKEzTYrefrjWJ0+31+V4+NXByI D9AWo9f1DgmdORxhd+5zRfFyRZPyXDLuG5l/9wuDvUeXpWebD7Yi/dpRswmq60NYTdYQ yff8hQdStJW0TTFuIk6TI2+wQC41fMtldAEZtwLjadENw/In3kHmZPZFUS6w+e/llg1o LR/mao8vIVdIoKkv0hY/WvxFgf84FEjEchkr2itYrD4tGsWPOywHQotzp2si8h58Q6JM thjg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=/0smNNuQStEDVjeoyozdvGvGeLKrZskOlohutZmWEJk=; b=gZCb+bj5FuT/wVxiHLedZwE4bxQZEysDYO8NXADAYikgdRgniTWut3wiJDQ1KXXgFw 3rBGgPe02WEAb0eqfFO4QJIxyqTvvsv1agrjwAG7czpJZ4qwpHJcDGdE95009PtSxlBa W+8q/8183RT+qGLldF6ylv4UACosTFOOkiZf39Pniko/lpUYlHThJ0WB7DaESIigSYk8 VIdTJjKDzmWccENfkmem7ZpY1SGJfkWabt/wnp4BqkJ6rLXQUp2BVyADLD+b7SJVI7ML 4HIlnu/2sBn/BPf07q8igrOyvNKQntkPzoBE35XMeDEu8waPSvMEpN2x85xT0BVhLEsN yHiQ== X-Gm-Message-State: AGRZ1gIp3s3QstluPhJYY4Va8Xi1FTiB3yx+LaE8N+I8r2kWCStOxG6D HmNcL679rl+qAdmGEBWljiIsIg== X-Received: by 2002:a1c:e088:: with SMTP id x130-v6mr4720487wmg.6.1541772298896; Fri, 09 Nov 2018 06:04:58 -0800 (PST) Received: from boomer.baylibre.com ([2a01:e34:eeb6:4690:106b:bae3:31ed:7561]) by smtp.googlemail.com with ESMTPSA id w18-v6sm15964987wrn.66.2018.11.09.06.04.57 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Fri, 09 Nov 2018 06:04:58 -0800 (PST) From: Jerome Brunet To: Kevin Hilman , Carlo Caione Cc: Jerome Brunet , devicetree@vger.kernel.org, linux-amlogic@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 2/4] arm64: dts: meson: disable pad bias for mmc pinmuxes Date: Fri, 9 Nov 2018 15:04:43 +0100 Message-Id: <20181109140445.17795-3-jbrunet@baylibre.com> X-Mailer: git-send-email 2.19.1 In-Reply-To: <20181109140445.17795-1-jbrunet@baylibre.com> References: <20181109140445.17795-1-jbrunet@baylibre.com> MIME-Version: 1.0 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org In some cases (such as a boot from SPI) the bootloader or the ROM code may leave a bias pull-down on the mmc pins. If so the MMC will fail during the initialisation. Explicitly disabling the pinmux solves the problem. Signed-off-by: Jerome Brunet --- arch/arm64/boot/dts/amlogic/meson-axg.dtsi | 2 ++ arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi | 4 ++++ arch/arm64/boot/dts/amlogic/meson-gxl.dtsi | 4 ++++ 3 files changed, 10 insertions(+) -- 2.19.1 diff --git a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi index e86f5f721f8f..bc427b9d3e13 100644 --- a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi @@ -273,6 +273,7 @@ "emmc_cmd", "emmc_ds"; function = "emmc"; + bias-disable; }; }; @@ -503,6 +504,7 @@ "sdio_cmd", "sdio_clk"; function = "sdio"; + bias-disable; }; }; diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi index 1cb8e7e0d0da..32ef82321340 100644 --- a/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi @@ -363,6 +363,7 @@ "emmc_cmd", "emmc_clk"; function = "emmc"; + bias-disable; }; }; @@ -370,6 +371,7 @@ mux { groups = "emmc_ds"; function = "emmc"; + bias-disable; }; }; @@ -416,6 +418,7 @@ "sdcard_cmd", "sdcard_clk"; function = "sdcard"; + bias-disable; }; }; @@ -436,6 +439,7 @@ "sdio_cmd", "sdio_clk"; function = "sdio"; + bias-disable; }; }; diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi index 7cfee40d89e9..cfeec5579726 100644 --- a/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi @@ -310,6 +310,7 @@ "emmc_cmd", "emmc_clk"; function = "emmc"; + bias-disable; }; }; @@ -317,6 +318,7 @@ mux { groups = "emmc_ds"; function = "emmc"; + bias-disable; }; }; @@ -363,6 +365,7 @@ "sdcard_cmd", "sdcard_clk"; function = "sdcard"; + bias-disable; }; }; @@ -383,6 +386,7 @@ "sdio_cmd", "sdio_clk"; function = "sdio"; + bias-disable; }; }; From patchwork Fri Nov 9 14:04:44 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jerome Brunet X-Patchwork-Id: 150647 Delivered-To: patch@linaro.org Received: by 2002:a2e:299d:0:0:0:0:0 with SMTP id p29-v6csp210600ljp; Fri, 9 Nov 2018 06:05:59 -0800 (PST) X-Google-Smtp-Source: AJdET5fJ99ficvz/9eeHpoXwQCUFBKLpqWRuJ5pjwPEu1FNooM001TyiRB7cscEkomgOFdyag7VZ X-Received: by 2002:a63:5ec6:: with SMTP id s189mr7297861pgb.357.1541772359552; Fri, 09 Nov 2018 06:05:59 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1541772359; cv=none; d=google.com; s=arc-20160816; b=uWyE1IVXr7JKXpQTaM/Qah7Wo1xmTki4ATF5O9IJX9/xjoin8YYF1iiXwwF7sX0aaJ NqbFaVfnYRCv16Wu0+41iYK5e1eHFVE85JfAR0YAgNF1Btct8+qD6f8Sf8YszVR7JYBe Is+V9MD4qOWXvSgc9lpYyfj+Jo0HS8rJx0DJ0/rI3/E1dDWqPm5lKfx4SCQC+7zx66X1 4+dsUAe2XORL6kfDU0ROGgf2IhO/dkMAbJgVO9pJELL2gzUpErO8Ire+LaXZtAIGY2Mb L5wTVxZzya6EddJZtm3OXbzKS3uTBJ6G3EPAxQHIkBkzA/tRjZ/x+uBL+CRSIGb5NRAK dzlQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=92pszNN5RdjoBtGHWr3+HOv6XkVAsZVgMAIyJbe9F7o=; b=hDdeXuD16TZS2qe1ZOhbMqLGCg2nwsWv3zYZKvBcbfU9/QWSJeehBkr9x4eid8S0aT k2QHTW4Hpl18moUHwVgP5R/RSlZCqmInI+GvHxvvTaoSl12lUddnfqCWEXDb4DHiHCsn /ZsCuiFdbcgrP0QA91nks/MXOZ6Ecde9x9UBVQAwasGiRJ/DnvHSKHKFo2sPwgT1XaxO xo9XPEjgGjLduy8pTmPs6P4IVspcS32np01EXFpVrFca6XPq27NgbEq4Jvaq11ZafBiS qA6Ki2Et7MB1XMu27nirLAVC6uaAGoR+gUcmqRdq8VLFkm6PCu/Oa3Jghlhz32teB2Mg XySA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@baylibre-com.20150623.gappssmtp.com header.s=20150623 header.b=fanEEaKu; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id l184si6806759pgd.523.2018.11.09.06.05.29; Fri, 09 Nov 2018 06:05:59 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@baylibre-com.20150623.gappssmtp.com header.s=20150623 header.b=fanEEaKu; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728234AbeKIXpu (ORCPT + 32 others); Fri, 9 Nov 2018 18:45:50 -0500 Received: from mail-wm1-f67.google.com ([209.85.128.67]:37803 "EHLO mail-wm1-f67.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727988AbeKIXpt (ORCPT ); Fri, 9 Nov 2018 18:45:49 -0500 Received: by mail-wm1-f67.google.com with SMTP id p2-v6so2039443wmc.2 for ; Fri, 09 Nov 2018 06:05:03 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=baylibre-com.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=92pszNN5RdjoBtGHWr3+HOv6XkVAsZVgMAIyJbe9F7o=; b=fanEEaKungZfQmz14elXCjp5D8yp31Z8yUWn7gg8PtLuKJXRQIJxLIBExAW+bKLB3j 2YY/p3u3r2q3Gi1hPDLdaoAZL6LPfH4fz0fO/E3hQzgiPogiAqLbtc9qNFhz4Y+3L1Ob 5+0Jvqln34sAFqeAR8TnTbjiNvgKIohVL0JRIoLBKmZNIYADW2SiFn2CdDpyLKDk9IVP dezbkIj/UNwiwNz73Va6x7Dv1n1USkJbeJy3F+lm8qAy+Hb3QOIuA2lkRgV2H6m+moKk Al7DiXhSocIu0s2+tyC3np8tRPzNm0VKyGvkbxWGC9vrCRENi4TG4KAe2VaLBWUdh+L/ mC8A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=92pszNN5RdjoBtGHWr3+HOv6XkVAsZVgMAIyJbe9F7o=; b=JCXfrD95ZtNlJTBvQ9UsUh2O3HS1rAYJy6QXtSsLp9SHrW1pQbx2K6fUbu0K7yoIhm LxmyUwqIRE5mYlrjrdu8FGTVH4GTlI0IIOs/6EAj4dEiRZLOHqNql3tHS8XJgEPrBT2j H5lL5ptWgwGZAGZ3uW438qAJIGgIYJzd9do+2HqXq3WtnHFB2V9ls+V63p0BKyKXtlS+ uNmi5hyVvoXyRXwgVELiALTFxdmIAi9WP3nIXlAYHNFMXBLckta+kTVXkA4iAle2JCwW EPr0nPMChEgLkRnQAUoZDunnOQpSVMiL384DOJG8O1ycxCquFJFGvDge8rFHRZ+z3kOj GBUA== X-Gm-Message-State: AGRZ1gJWCcSrbnRTneowJOt0L3OftZ5U629grOVnd7zT4Ph6i/gL5d1P DB2tMVxgirDZhLAcEx0OHTKn9A== X-Received: by 2002:a1c:f008:: with SMTP id a8-v6mr4605215wmb.5.1541772301737; Fri, 09 Nov 2018 06:05:01 -0800 (PST) Received: from boomer.baylibre.com ([2a01:e34:eeb6:4690:106b:bae3:31ed:7561]) by smtp.googlemail.com with ESMTPSA id w18-v6sm15964987wrn.66.2018.11.09.06.04.59 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Fri, 09 Nov 2018 06:05:01 -0800 (PST) From: Jerome Brunet To: Kevin Hilman , Carlo Caione Cc: Jerome Brunet , devicetree@vger.kernel.org, linux-amlogic@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 3/4] arm64: dts: meson: consistently disable pin bias Date: Fri, 9 Nov 2018 15:04:44 +0100 Message-Id: <20181109140445.17795-4-jbrunet@baylibre.com> X-Mailer: git-send-email 2.19.1 In-Reply-To: <20181109140445.17795-1-jbrunet@baylibre.com> References: <20181109140445.17795-1-jbrunet@baylibre.com> MIME-Version: 1.0 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Amlogic chipsets, the bias set through pinconf applies to the pad itself, not only the GPIO function. This means that even when we change the function of the pad from GPIO to anything else, the bias previously set still applies. As we have seen with the eMMC, depending on the bias type and the function, it may trigger problems. The underlying issue is that we inherit whatever was left by previous user of the pad (pinconf, u-boot or the ROM code). As a consequence, the actual setup we will get is undefined. There is nothing mentioned in the documentation about pad bias and pinmux function, however leaving it undefined is not an option. This change consistently disable the pad bias for every pinmux functions. It seems to work well, we can only assume that the necessary bias (if any) is already provided by the pin function itself. Signed-off-by: Jerome Brunet --- arch/arm64/boot/dts/amlogic/meson-axg.dtsi | 103 ++++++++++++++++++++ arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi | 47 +++++++++ arch/arm64/boot/dts/amlogic/meson-gxl.dtsi | 49 ++++++++++ 3 files changed, 199 insertions(+) -- 2.19.1 diff --git a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi index bc427b9d3e13..e0139f174726 100644 --- a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi @@ -200,6 +200,7 @@ groups = "i2c0_sck", "i2c0_sda"; function = "i2c0"; + bias-disable; }; }; @@ -208,6 +209,7 @@ groups = "i2c1_sck_x", "i2c1_sda_x"; function = "i2c1"; + bias-disable; }; }; @@ -216,6 +218,7 @@ groups = "i2c1_sck_z", "i2c1_sda_z"; function = "i2c1"; + bias-disable; }; }; @@ -224,6 +227,7 @@ groups = "i2c2_sck_a", "i2c2_sda_a"; function = "i2c2"; + bias-disable; }; }; @@ -232,6 +236,7 @@ groups = "i2c2_sck_x", "i2c2_sda_x"; function = "i2c2"; + bias-disable; }; }; @@ -240,6 +245,7 @@ groups = "i2c3_sda_a6", "i2c3_sck_a7"; function = "i2c3"; + bias-disable; }; }; @@ -248,6 +254,7 @@ groups = "i2c3_sda_a12", "i2c3_sck_a13"; function = "i2c3"; + bias-disable; }; }; @@ -256,6 +263,7 @@ groups = "i2c3_sda_a19", "i2c3_sck_a20"; function = "i2c3"; + bias-disable; }; }; @@ -302,6 +310,7 @@ "eth_txd2_rgmii", "eth_txd3_rgmii"; function = "eth"; + bias-disable; }; }; @@ -322,6 +331,7 @@ "eth_txd2_rgmii", "eth_txd3_rgmii"; function = "eth"; + bias-disable; }; }; @@ -337,6 +347,7 @@ "eth_txd0_x", "eth_txd1_x"; function = "eth"; + bias-disable; }; }; @@ -352,6 +363,7 @@ "eth_txd0_y", "eth_txd1_y"; function = "eth"; + bias-disable; }; }; @@ -359,6 +371,7 @@ mux { groups = "mclk_b"; function = "mclk_b"; + bias-disable; }; }; @@ -366,6 +379,7 @@ mux { groups = "mclk_c"; function = "mclk_c"; + bias-disable; }; }; @@ -373,6 +387,7 @@ mux { groups = "pdm_dclk_a14"; function = "pdm"; + bias-disable; }; }; @@ -380,6 +395,7 @@ mux { groups = "pdm_dclk_a19"; function = "pdm"; + bias-disable; }; }; @@ -387,6 +403,7 @@ mux { groups = "pdm_din0"; function = "pdm"; + bias-disable; }; }; @@ -394,6 +411,7 @@ mux { groups = "pdm_din1"; function = "pdm"; + bias-disable; }; }; @@ -401,6 +419,7 @@ mux { groups = "pdm_din2"; function = "pdm"; + bias-disable; }; }; @@ -408,6 +427,7 @@ mux { groups = "pdm_din3"; function = "pdm"; + bias-disable; }; }; @@ -415,6 +435,7 @@ mux { groups = "pwm_a_a"; function = "pwm_a"; + bias-disable; }; }; @@ -422,6 +443,7 @@ mux { groups = "pwm_a_x18"; function = "pwm_a"; + bias-disable; }; }; @@ -429,6 +451,7 @@ mux { groups = "pwm_a_x20"; function = "pwm_a"; + bias-disable; }; }; @@ -436,6 +459,7 @@ mux { groups = "pwm_a_z"; function = "pwm_a"; + bias-disable; }; }; @@ -443,6 +467,7 @@ mux { groups = "pwm_b_a"; function = "pwm_b"; + bias-disable; }; }; @@ -450,6 +475,7 @@ mux { groups = "pwm_b_x"; function = "pwm_b"; + bias-disable; }; }; @@ -457,6 +483,7 @@ mux { groups = "pwm_b_z"; function = "pwm_b"; + bias-disable; }; }; @@ -464,6 +491,7 @@ mux { groups = "pwm_c_a"; function = "pwm_c"; + bias-disable; }; }; @@ -471,6 +499,7 @@ mux { groups = "pwm_c_x10"; function = "pwm_c"; + bias-disable; }; }; @@ -478,6 +507,7 @@ mux { groups = "pwm_c_x17"; function = "pwm_c"; + bias-disable; }; }; @@ -485,6 +515,7 @@ mux { groups = "pwm_d_x11"; function = "pwm_d"; + bias-disable; }; }; @@ -492,6 +523,7 @@ mux { groups = "pwm_d_x16"; function = "pwm_d"; + bias-disable; }; }; @@ -520,6 +552,7 @@ mux { groups = "spdif_in_z"; function = "spdif_in"; + bias-disable; }; }; @@ -527,6 +560,7 @@ mux { groups = "spdif_in_a1"; function = "spdif_in"; + bias-disable; }; }; @@ -534,6 +568,7 @@ mux { groups = "spdif_in_a7"; function = "spdif_in"; + bias-disable; }; }; @@ -541,6 +576,7 @@ mux { groups = "spdif_in_a19"; function = "spdif_in"; + bias-disable; }; }; @@ -548,6 +584,7 @@ mux { groups = "spdif_in_a20"; function = "spdif_in"; + bias-disable; }; }; @@ -555,6 +592,7 @@ mux { groups = "spdif_out_a1"; function = "spdif_out"; + bias-disable; }; }; @@ -562,6 +600,7 @@ mux { groups = "spdif_out_a11"; function = "spdif_out"; + bias-disable; }; }; @@ -569,6 +608,7 @@ mux { groups = "spdif_out_a19"; function = "spdif_out"; + bias-disable; }; }; @@ -576,6 +616,7 @@ mux { groups = "spdif_out_a20"; function = "spdif_out"; + bias-disable; }; }; @@ -583,6 +624,7 @@ mux { groups = "spdif_out_z"; function = "spdif_out"; + bias-disable; }; }; @@ -592,6 +634,7 @@ "spi0_mosi", "spi0_clk"; function = "spi0"; + bias-disable; }; }; @@ -599,6 +642,7 @@ mux { groups = "spi0_ss0"; function = "spi0"; + bias-disable; }; }; @@ -606,6 +650,7 @@ mux { groups = "spi0_ss1"; function = "spi0"; + bias-disable; }; }; @@ -613,6 +658,7 @@ mux { groups = "spi0_ss2"; function = "spi0"; + bias-disable; }; }; @@ -622,6 +668,7 @@ "spi1_mosi_a", "spi1_clk_a"; function = "spi1"; + bias-disable; }; }; @@ -629,6 +676,7 @@ mux { groups = "spi1_ss0_a"; function = "spi1"; + bias-disable; }; }; @@ -636,6 +684,7 @@ mux { groups = "spi1_ss1"; function = "spi1"; + bias-disable; }; }; @@ -645,6 +694,7 @@ "spi1_mosi_x", "spi1_clk_x"; function = "spi1"; + bias-disable; }; }; @@ -652,6 +702,7 @@ mux { groups = "spi1_ss0_x"; function = "spi1"; + bias-disable; }; }; @@ -659,6 +710,7 @@ mux { groups = "tdma_din0"; function = "tdma"; + bias-disable; }; }; @@ -666,6 +718,7 @@ mux { groups = "tdma_dout0_x14"; function = "tdma"; + bias-disable; }; }; @@ -673,6 +726,7 @@ mux { groups = "tdma_dout0_x15"; function = "tdma"; + bias-disable; }; }; @@ -680,6 +734,7 @@ mux { groups = "tdma_dout1"; function = "tdma"; + bias-disable; }; }; @@ -687,6 +742,7 @@ mux { groups = "tdma_din1"; function = "tdma"; + bias-disable; }; }; @@ -694,6 +750,7 @@ mux { groups = "tdma_fs"; function = "tdma"; + bias-disable; }; }; @@ -701,6 +758,7 @@ mux { groups = "tdma_fs_slv"; function = "tdma"; + bias-disable; }; }; @@ -708,6 +766,7 @@ mux { groups = "tdma_sclk"; function = "tdma"; + bias-disable; }; }; @@ -715,6 +774,7 @@ mux { groups = "tdma_sclk_slv"; function = "tdma"; + bias-disable; }; }; @@ -722,6 +782,7 @@ mux { groups = "tdmb_din0"; function = "tdmb"; + bias-disable; }; }; @@ -729,6 +790,7 @@ mux { groups = "tdmb_din1"; function = "tdmb"; + bias-disable; }; }; @@ -736,6 +798,7 @@ mux { groups = "tdmb_din2"; function = "tdmb"; + bias-disable; }; }; @@ -743,6 +806,7 @@ mux { groups = "tdmb_din3"; function = "tdmb"; + bias-disable; }; }; @@ -750,6 +814,7 @@ mux { groups = "tdmb_dout0"; function = "tdmb"; + bias-disable; }; }; @@ -757,6 +822,7 @@ mux { groups = "tdmb_dout1"; function = "tdmb"; + bias-disable; }; }; @@ -764,6 +830,7 @@ mux { groups = "tdmb_dout2"; function = "tdmb"; + bias-disable; }; }; @@ -771,6 +838,7 @@ mux { groups = "tdmb_dout3"; function = "tdmb"; + bias-disable; }; }; @@ -778,6 +846,7 @@ mux { groups = "tdmb_fs"; function = "tdmb"; + bias-disable; }; }; @@ -785,6 +854,7 @@ mux { groups = "tdmb_fs_slv"; function = "tdmb"; + bias-disable; }; }; @@ -792,6 +862,7 @@ mux { groups = "tdmb_sclk"; function = "tdmb"; + bias-disable; }; }; @@ -799,6 +870,7 @@ mux { groups = "tdmb_sclk_slv"; function = "tdmb"; + bias-disable; }; }; @@ -806,6 +878,7 @@ mux { groups = "tdmc_fs"; function = "tdmc"; + bias-disable; }; }; @@ -813,6 +886,7 @@ mux { groups = "tdmc_fs_slv"; function = "tdmc"; + bias-disable; }; }; @@ -820,6 +894,7 @@ mux { groups = "tdmc_sclk"; function = "tdmc"; + bias-disable; }; }; @@ -827,6 +902,7 @@ mux { groups = "tdmc_sclk_slv"; function = "tdmc"; + bias-disable; }; }; @@ -834,6 +910,7 @@ mux { groups = "tdmc_din0"; function = "tdmc"; + bias-disable; }; }; @@ -841,6 +918,7 @@ mux { groups = "tdmc_din1"; function = "tdmc"; + bias-disable; }; }; @@ -848,6 +926,7 @@ mux { groups = "tdmc_din2"; function = "tdmc"; + bias-disable; }; }; @@ -855,6 +934,7 @@ mux { groups = "tdmc_din3"; function = "tdmc"; + bias-disable; }; }; @@ -862,6 +942,7 @@ mux { groups = "tdmc_dout0"; function = "tdmc"; + bias-disable; }; }; @@ -869,6 +950,7 @@ mux { groups = "tdmc_dout1"; function = "tdmc"; + bias-disable; }; }; @@ -876,6 +958,7 @@ mux { groups = "tdmc_dout2"; function = "tdmc"; + bias-disable; }; }; @@ -883,6 +966,7 @@ mux { groups = "tdmc_dout3"; function = "tdmc"; + bias-disable; }; }; @@ -891,6 +975,7 @@ groups = "uart_tx_a", "uart_rx_a"; function = "uart_a"; + bias-disable; }; }; @@ -899,6 +984,7 @@ groups = "uart_cts_a", "uart_rts_a"; function = "uart_a"; + bias-disable; }; }; @@ -907,6 +993,7 @@ groups = "uart_tx_b_x", "uart_rx_b_x"; function = "uart_b"; + bias-disable; }; }; @@ -915,6 +1002,7 @@ groups = "uart_cts_b_x", "uart_rts_b_x"; function = "uart_b"; + bias-disable; }; }; @@ -923,6 +1011,7 @@ groups = "uart_tx_b_z", "uart_rx_b_z"; function = "uart_b"; + bias-disable; }; }; @@ -931,6 +1020,7 @@ groups = "uart_cts_b_z", "uart_rts_b_z"; function = "uart_b"; + bias-disable; }; }; @@ -939,6 +1029,7 @@ groups = "uart_ao_tx_b_z", "uart_ao_rx_b_z"; function = "uart_ao_b_z"; + bias-disable; }; }; @@ -947,6 +1038,7 @@ groups = "uart_ao_cts_b_z", "uart_ao_rts_b_z"; function = "uart_ao_b_z"; + bias-disable; }; }; }; @@ -1235,6 +1327,7 @@ mux { groups = "i2c_ao_sck_4"; function = "i2c_ao"; + bias-disable; }; }; @@ -1242,6 +1335,7 @@ mux { groups = "i2c_ao_sck_8"; function = "i2c_ao"; + bias-disable; }; }; @@ -1249,6 +1343,7 @@ mux { groups = "i2c_ao_sck_10"; function = "i2c_ao"; + bias-disable; }; }; @@ -1256,6 +1351,7 @@ mux { groups = "i2c_ao_sda_5"; function = "i2c_ao"; + bias-disable; }; }; @@ -1263,6 +1359,7 @@ mux { groups = "i2c_ao_sda_9"; function = "i2c_ao"; + bias-disable; }; }; @@ -1270,6 +1367,7 @@ mux { groups = "i2c_ao_sda_11"; function = "i2c_ao"; + bias-disable; }; }; @@ -1277,6 +1375,7 @@ mux { groups = "remote_input_ao"; function = "remote_input_ao"; + bias-disable; }; }; @@ -1285,6 +1384,7 @@ groups = "uart_ao_tx_a", "uart_ao_rx_a"; function = "uart_ao_a"; + bias-disable; }; }; @@ -1293,6 +1393,7 @@ groups = "uart_ao_cts_a", "uart_ao_rts_a"; function = "uart_ao_a"; + bias-disable; }; }; @@ -1301,6 +1402,7 @@ groups = "uart_ao_tx_b", "uart_ao_rx_b"; function = "uart_ao_b"; + bias-disable; }; }; @@ -1309,6 +1411,7 @@ groups = "uart_ao_cts_b", "uart_ao_rts_b"; function = "uart_ao_b"; + bias-disable; }; }; }; diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi index 32ef82321340..6796d250985a 100644 --- a/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi @@ -81,6 +81,7 @@ mux { groups = "uart_tx_ao_a", "uart_rx_ao_a"; function = "uart_ao"; + bias-disable; }; }; @@ -89,6 +90,7 @@ groups = "uart_cts_ao_a", "uart_rts_ao_a"; function = "uart_ao"; + bias-disable; }; }; @@ -96,6 +98,7 @@ mux { groups = "uart_tx_ao_b", "uart_rx_ao_b"; function = "uart_ao_b"; + bias-disable; }; }; @@ -104,6 +107,7 @@ groups = "uart_cts_ao_b", "uart_rts_ao_b"; function = "uart_ao_b"; + bias-disable; }; }; @@ -111,6 +115,7 @@ mux { groups = "remote_input_ao"; function = "remote_input_ao"; + bias-disable; }; }; @@ -119,6 +124,7 @@ groups = "i2c_sck_ao", "i2c_sda_ao"; function = "i2c_ao"; + bias-disable; }; }; @@ -126,6 +132,7 @@ mux { groups = "pwm_ao_a_3"; function = "pwm_ao_a_3"; + bias-disable; }; }; @@ -133,6 +140,7 @@ mux { groups = "pwm_ao_a_6"; function = "pwm_ao_a_6"; + bias-disable; }; }; @@ -140,6 +148,7 @@ mux { groups = "pwm_ao_a_12"; function = "pwm_ao_a_12"; + bias-disable; }; }; @@ -147,6 +156,7 @@ mux { groups = "pwm_ao_b"; function = "pwm_ao_b"; + bias-disable; }; }; @@ -154,6 +164,7 @@ mux { groups = "i2s_am_clk"; function = "i2s_out_ao"; + bias-disable; }; }; @@ -161,6 +172,7 @@ mux { groups = "i2s_out_ao_clk"; function = "i2s_out_ao"; + bias-disable; }; }; @@ -168,6 +180,7 @@ mux { groups = "i2s_out_lr_clk"; function = "i2s_out_ao"; + bias-disable; }; }; @@ -175,6 +188,7 @@ mux { groups = "i2s_out_ch01_ao"; function = "i2s_out_ao"; + bias-disable; }; }; @@ -182,6 +196,7 @@ mux { groups = "i2s_out_ch23_ao"; function = "i2s_out_ao"; + bias-disable; }; }; @@ -189,6 +204,7 @@ mux { groups = "i2s_out_ch45_ao"; function = "i2s_out_ao"; + bias-disable; }; }; @@ -203,6 +219,7 @@ mux { groups = "spdif_out_ao_13"; function = "spdif_out_ao"; + bias-disable; }; }; @@ -210,6 +227,7 @@ mux { groups = "ao_cec"; function = "cec_ao"; + bias-disable; }; }; @@ -217,6 +235,7 @@ mux { groups = "ee_cec"; function = "cec_ao"; + bias-disable; }; }; }; @@ -390,6 +409,7 @@ "nor_c", "nor_cs"; function = "nor"; + bias-disable; }; }; @@ -399,6 +419,7 @@ "spi_mosi", "spi_sclk"; function = "spi"; + bias-disable; }; }; @@ -406,6 +427,7 @@ mux { groups = "spi_ss0"; function = "spi"; + bias-disable; }; }; @@ -455,6 +477,7 @@ mux { groups = "sdio_irq"; function = "sdio"; + bias-disable; }; }; @@ -463,6 +486,7 @@ groups = "uart_tx_a", "uart_rx_a"; function = "uart_a"; + bias-disable; }; }; @@ -471,6 +495,7 @@ groups = "uart_cts_a", "uart_rts_a"; function = "uart_a"; + bias-disable; }; }; @@ -479,6 +504,7 @@ groups = "uart_tx_b", "uart_rx_b"; function = "uart_b"; + bias-disable; }; }; @@ -487,6 +513,7 @@ groups = "uart_cts_b", "uart_rts_b"; function = "uart_b"; + bias-disable; }; }; @@ -495,6 +522,7 @@ groups = "uart_tx_c", "uart_rx_c"; function = "uart_c"; + bias-disable; }; }; @@ -503,6 +531,7 @@ groups = "uart_cts_c", "uart_rts_c"; function = "uart_c"; + bias-disable; }; }; @@ -511,6 +540,7 @@ groups = "i2c_sck_a", "i2c_sda_a"; function = "i2c_a"; + bias-disable; }; }; @@ -519,6 +549,7 @@ groups = "i2c_sck_b", "i2c_sda_b"; function = "i2c_b"; + bias-disable; }; }; @@ -527,6 +558,7 @@ groups = "i2c_sck_c", "i2c_sda_c"; function = "i2c_c"; + bias-disable; }; }; @@ -547,6 +579,7 @@ "eth_txd2", "eth_txd3"; function = "eth"; + bias-disable; }; }; @@ -562,6 +595,7 @@ "eth_txd0", "eth_txd1"; function = "eth"; + bias-disable; }; }; @@ -569,6 +603,7 @@ mux { groups = "pwm_a_x"; function = "pwm_a_x"; + bias-disable; }; }; @@ -576,6 +611,7 @@ mux { groups = "pwm_a_y"; function = "pwm_a_y"; + bias-disable; }; }; @@ -583,6 +619,7 @@ mux { groups = "pwm_b"; function = "pwm_b"; + bias-disable; }; }; @@ -590,6 +627,7 @@ mux { groups = "pwm_d"; function = "pwm_d"; + bias-disable; }; }; @@ -597,6 +635,7 @@ mux { groups = "pwm_e"; function = "pwm_e"; + bias-disable; }; }; @@ -604,6 +643,7 @@ mux { groups = "pwm_f_x"; function = "pwm_f_x"; + bias-disable; }; }; @@ -611,6 +651,7 @@ mux { groups = "pwm_f_y"; function = "pwm_f_y"; + bias-disable; }; }; @@ -618,6 +659,7 @@ mux { groups = "hdmi_hpd"; function = "hdmi_hpd"; + bias-disable; }; }; @@ -625,6 +667,7 @@ mux { groups = "hdmi_sda", "hdmi_scl"; function = "hdmi_i2c"; + bias-disable; }; }; @@ -632,6 +675,7 @@ mux { groups = "i2sout_ch23_y"; function = "i2s_out"; + bias-disable; }; }; @@ -639,6 +683,7 @@ mux { groups = "i2sout_ch45_y"; function = "i2s_out"; + bias-disable; }; }; @@ -646,6 +691,7 @@ mux { groups = "i2sout_ch67_y"; function = "i2s_out"; + bias-disable; }; }; @@ -653,6 +699,7 @@ mux { groups = "spdif_out_y"; function = "spdif_out"; + bias-disable; }; }; }; diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi index cfeec5579726..ed278097825b 100644 --- a/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi @@ -116,6 +116,7 @@ mux { groups = "uart_tx_ao_a", "uart_rx_ao_a"; function = "uart_ao"; + bias-disable; }; }; @@ -124,6 +125,7 @@ groups = "uart_cts_ao_a", "uart_rts_ao_a"; function = "uart_ao"; + bias-disable; }; }; @@ -131,6 +133,7 @@ mux { groups = "uart_tx_ao_b", "uart_rx_ao_b"; function = "uart_ao_b"; + bias-disable; }; }; @@ -138,6 +141,7 @@ mux { groups = "uart_tx_ao_b_0", "uart_rx_ao_b_1"; function = "uart_ao_b"; + bias-disable; }; }; @@ -146,6 +150,7 @@ groups = "uart_cts_ao_b", "uart_rts_ao_b"; function = "uart_ao_b"; + bias-disable; }; }; @@ -153,6 +158,7 @@ mux { groups = "remote_input_ao"; function = "remote_input_ao"; + bias-disable; }; }; @@ -161,6 +167,7 @@ groups = "i2c_sck_ao", "i2c_sda_ao"; function = "i2c_ao"; + bias-disable; }; }; @@ -168,6 +175,7 @@ mux { groups = "pwm_ao_a_3"; function = "pwm_ao_a"; + bias-disable; }; }; @@ -175,6 +183,7 @@ mux { groups = "pwm_ao_a_8"; function = "pwm_ao_a"; + bias-disable; }; }; @@ -182,6 +191,7 @@ mux { groups = "pwm_ao_b"; function = "pwm_ao_b"; + bias-disable; }; }; @@ -189,6 +199,7 @@ mux { groups = "pwm_ao_b_6"; function = "pwm_ao_b"; + bias-disable; }; }; @@ -196,6 +207,7 @@ mux { groups = "i2s_out_ch23_ao"; function = "i2s_out_ao"; + bias-disable; }; }; @@ -203,6 +215,7 @@ mux { groups = "i2s_out_ch45_ao"; function = "i2s_out_ao"; + bias-disable; }; }; @@ -210,6 +223,7 @@ mux { groups = "spdif_out_ao_6"; function = "spdif_out_ao"; + bias-disable; }; }; @@ -217,6 +231,7 @@ mux { groups = "spdif_out_ao_9"; function = "spdif_out_ao"; + bias-disable; }; }; @@ -224,6 +239,7 @@ mux { groups = "ao_cec"; function = "cec_ao"; + bias-disable; }; }; @@ -231,6 +247,7 @@ mux { groups = "ee_cec"; function = "cec_ao"; + bias-disable; }; }; }; @@ -337,6 +354,7 @@ "nor_c", "nor_cs"; function = "nor"; + bias-disable; }; }; @@ -346,6 +364,7 @@ "spi_mosi", "spi_sclk"; function = "spi"; + bias-disable; }; }; @@ -353,6 +372,7 @@ mux { groups = "spi_ss0"; function = "spi"; + bias-disable; }; }; @@ -402,6 +422,7 @@ mux { groups = "sdio_irq"; function = "sdio"; + bias-disable; }; }; @@ -410,6 +431,7 @@ groups = "uart_tx_a", "uart_rx_a"; function = "uart_a"; + bias-disable; }; }; @@ -418,6 +440,7 @@ groups = "uart_cts_a", "uart_rts_a"; function = "uart_a"; + bias-disable; }; }; @@ -426,6 +449,7 @@ groups = "uart_tx_b", "uart_rx_b"; function = "uart_b"; + bias-disable; }; }; @@ -434,6 +458,7 @@ groups = "uart_cts_b", "uart_rts_b"; function = "uart_b"; + bias-disable; }; }; @@ -442,6 +467,7 @@ groups = "uart_tx_c", "uart_rx_c"; function = "uart_c"; + bias-disable; }; }; @@ -450,6 +476,7 @@ groups = "uart_cts_c", "uart_rts_c"; function = "uart_c"; + bias-disable; }; }; @@ -458,6 +485,7 @@ groups = "i2c_sck_a", "i2c_sda_a"; function = "i2c_a"; + bias-disable; }; }; @@ -466,6 +494,7 @@ groups = "i2c_sck_b", "i2c_sda_b"; function = "i2c_b"; + bias-disable; }; }; @@ -474,6 +503,7 @@ groups = "i2c_sck_c", "i2c_sda_c"; function = "i2c_c"; + bias-disable; }; }; @@ -494,6 +524,7 @@ "eth_txd2", "eth_txd3"; function = "eth"; + bias-disable; }; }; @@ -501,6 +532,7 @@ mux { groups = "eth_link_led"; function = "eth_led"; + bias-disable; }; }; @@ -515,6 +547,7 @@ mux { groups = "pwm_a"; function = "pwm_a"; + bias-disable; }; }; @@ -522,6 +555,7 @@ mux { groups = "pwm_b"; function = "pwm_b"; + bias-disable; }; }; @@ -529,6 +563,7 @@ mux { groups = "pwm_c"; function = "pwm_c"; + bias-disable; }; }; @@ -536,6 +571,7 @@ mux { groups = "pwm_d"; function = "pwm_d"; + bias-disable; }; }; @@ -543,6 +579,7 @@ mux { groups = "pwm_e"; function = "pwm_e"; + bias-disable; }; }; @@ -550,6 +587,7 @@ mux { groups = "pwm_f_clk"; function = "pwm_f"; + bias-disable; }; }; @@ -557,6 +595,7 @@ mux { groups = "pwm_f_x"; function = "pwm_f"; + bias-disable; }; }; @@ -564,6 +603,7 @@ mux { groups = "hdmi_hpd"; function = "hdmi_hpd"; + bias-disable; }; }; @@ -571,6 +611,7 @@ mux { groups = "hdmi_sda", "hdmi_scl"; function = "hdmi_i2c"; + bias-disable; }; }; @@ -578,6 +619,7 @@ mux { groups = "i2s_am_clk"; function = "i2s_out"; + bias-disable; }; }; @@ -585,6 +627,7 @@ mux { groups = "i2s_out_ao_clk"; function = "i2s_out"; + bias-disable; }; }; @@ -592,6 +635,7 @@ mux { groups = "i2s_out_lr_clk"; function = "i2s_out"; + bias-disable; }; }; @@ -599,12 +643,14 @@ mux { groups = "i2s_out_ch01"; function = "i2s_out"; + bias-disable; }; }; i2sout_ch23_z_pins: i2sout_ch23_z { mux { groups = "i2sout_ch23_z"; function = "i2s_out"; + bias-disable; }; }; @@ -612,6 +658,7 @@ mux { groups = "i2sout_ch45_z"; function = "i2s_out"; + bias-disable; }; }; @@ -619,6 +666,7 @@ mux { groups = "i2sout_ch67_z"; function = "i2s_out"; + bias-disable; }; }; @@ -626,6 +674,7 @@ mux { groups = "spdif_out_h"; function = "spdif_out"; + bias-disable; }; }; }; From patchwork Fri Nov 9 14:04:45 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jerome Brunet X-Patchwork-Id: 150653 Delivered-To: patch@linaro.org Received: by 2002:a2e:299d:0:0:0:0:0 with SMTP id p29-v6csp213116ljp; Fri, 9 Nov 2018 06:07:39 -0800 (PST) X-Google-Smtp-Source: AJdET5ceU7sb7NUFDjk3QSvodCzIgp63t7o9kdmZ2RzCYOPxPMcfsekN3GWydJ/010K8LNwVg86g X-Received: by 2002:a63:b709:: with SMTP id t9-v6mr7323097pgf.366.1541772458831; Fri, 09 Nov 2018 06:07:38 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1541772458; cv=none; d=google.com; s=arc-20160816; b=cBEBWKvbPum+EoQ+qPua3dxJ/nrwzj3ST8Z7NF6Jwp4fiAk5cLMBu+E322A5rs2Qtk waBODxxObKD/c5jH+zQxyQE6pC9VzFEdmwXk5w0qTJjN0duck9BkP9aHH61cpdZ5AOou QcK/nRB2hkTToxD4FAVZmpO1Rtkdrz795620TEif4mgG6jhkT30dDXOIzpb9+tEsRIlh bSG8gifRJ0ZVOThhkc23Qgf+w9AcoepwljuVdej0Y2zoiknS+H25jQepABsUeymtD93S N8jbCo/u/kmY9DR46FWzNwyLhL1I6juQ/jxnRVrHjkVrgX+cUuh7rbpp5Zf0INdSARWK SMAg== ARC-Message-Signature: i=1; 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[209.132.180.67]) by mx.google.com with ESMTP id l184si6806759pgd.523.2018.11.09.06.07.33; Fri, 09 Nov 2018 06:07:38 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@baylibre-com.20150623.gappssmtp.com header.s=20150623 header.b=nOm2ynYW; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728213AbeKIXpu (ORCPT + 32 others); Fri, 9 Nov 2018 18:45:50 -0500 Received: from mail-wr1-f65.google.com ([209.85.221.65]:40966 "EHLO mail-wr1-f65.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728045AbeKIXpt (ORCPT ); Fri, 9 Nov 2018 18:45:49 -0500 Received: by mail-wr1-f65.google.com with SMTP id v18-v6so2018826wrt.8 for ; Fri, 09 Nov 2018 06:05:04 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=baylibre-com.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=5/+LTD+fuRT1vJpsOEDqaSSNT5CxZ1kKqaaiFemNQAc=; b=nOm2ynYWRy8mJ+DrTVG5b378frSIZWIq+mzRqi1werHbbBd2ouk2kmiA60ndUbxOr1 8fsx9BokSGX4hyc4xU9N14uWHo/FmTflKqlSsSmQKb07VsD5xgcFu6RZanFE9YiI22NX 9jJakJuKo+2wYc4ZdDmOhl6lDT8tJ6W6CsQq1E0WkcHmwmMtDc3SUkrhxXR2iqNQ+zwY m74KCVcP4uNRJH5uQe6mNCQNNAm8Aj0iE2E36mRV72DasuQEeICeHt06PWjiCSR+dR5c Fu6o0VlF01l86iBqtxwHlBrYTPh3KyRCe1MHHSPVj9HEa/MqXiB07tSHTtxZ4okNzg5C Y4HQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=5/+LTD+fuRT1vJpsOEDqaSSNT5CxZ1kKqaaiFemNQAc=; b=dKMNT6aDYPaN3ar1lh9STh2psw5bbGJGoDNlBmx9KEWGUqC1sxOsm6AvfJfP/BDal7 5fZhaBZx6Ge/44SxJPT4vuALM6R/qpLjvGqXHBkuhPI16YGzBGRD8KX4xdtb9TKufZdP Sy+NmmajMktju9roVLXVN9IRD8KEX6lRv8cuOnN2mLM/SYGK3OZ9Zsz+OPm3de+2Q0vS lNNC2mveLkS+15nFTDvxuPOPkDLk9pN0iBRACjXp9mUrTVAdLPNWEjc4ThAPOHlkojL0 VTVHp6VE2Z7jcbwdlj4+aDXqTD44A0D04QIblKAlvikinTlGQ3G0ehEMG1JOgxt0Wdma q1XA== X-Gm-Message-State: AGRZ1gIsj5CLvrr7YTeFbdkbmiHRVbneP73sHJSD/TQRkeVzgifqAh4J CJ+PKsmD0bD2SH6OOvP+UI+RWw== X-Received: by 2002:adf:f24d:: with SMTP id b13-v6mr7646460wrp.142.1541772303455; Fri, 09 Nov 2018 06:05:03 -0800 (PST) Received: from boomer.baylibre.com ([2a01:e34:eeb6:4690:106b:bae3:31ed:7561]) by smtp.googlemail.com with ESMTPSA id w18-v6sm15964987wrn.66.2018.11.09.06.05.01 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Fri, 09 Nov 2018 06:05:02 -0800 (PST) From: Jerome Brunet To: Kevin Hilman , Carlo Caione Cc: Jerome Brunet , devicetree@vger.kernel.org, linux-amlogic@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 4/4] ARM: dts: meson: consistently disable pin bias Date: Fri, 9 Nov 2018 15:04:45 +0100 Message-Id: <20181109140445.17795-5-jbrunet@baylibre.com> X-Mailer: git-send-email 2.19.1 In-Reply-To: <20181109140445.17795-1-jbrunet@baylibre.com> References: <20181109140445.17795-1-jbrunet@baylibre.com> MIME-Version: 1.0 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Amlogic chipsets, the bias set through pinconf applies to the pad itself, not only the GPIO function. This means that even when we change the function of the pad from GPIO to anything else, the bias previously set still applies. As we have seen with the eMMC, depending on the bias type and the function, it may trigger problems. The underlying issue is that we inherit whatever was left by previous user of the pad (pinconf, u-boot or the ROM code). As a consequence, the actual setup we will get is undefined. There is nothing mentioned in the documentation about pad bias and pinmux function, however leaving it undefined is not an option. This change consistently disable the pad bias for every pinmux functions. It seems to work well, we can only assume that the necessary bias (if any) is already provided by the pin function itself. Signed-off-by: Jerome Brunet --- arch/arm/boot/dts/meson8.dtsi | 12 ++++++++++++ arch/arm/boot/dts/meson8b.dtsi | 9 +++++++++ arch/arm/boot/dts/meson8m2.dtsi | 1 + 3 files changed, 22 insertions(+) -- 2.19.1 diff --git a/arch/arm/boot/dts/meson8.dtsi b/arch/arm/boot/dts/meson8.dtsi index 7162e0ca05b0..08c54cf5420a 100644 --- a/arch/arm/boot/dts/meson8.dtsi +++ b/arch/arm/boot/dts/meson8.dtsi @@ -163,6 +163,7 @@ mux { groups = "uart_tx_ao_a", "uart_rx_ao_a"; function = "uart_ao"; + bias-disable; }; }; @@ -170,6 +171,7 @@ mux { groups = "i2c_mst_sck_ao", "i2c_mst_sda_ao"; function = "i2c_mst_ao"; + bias-disable; }; }; @@ -177,6 +179,7 @@ mux { groups = "remote_input"; function = "remote"; + bias-disable; }; }; @@ -184,6 +187,7 @@ mux { groups = "pwm_f_ao"; function = "pwm_f_ao"; + bias-disable; }; }; }; @@ -238,6 +242,7 @@ groups = "sd_d0_a", "sd_d1_a", "sd_d2_a", "sd_d3_a", "sd_clk_a", "sd_cmd_a"; function = "sd_a"; + bias-disable; }; }; @@ -246,6 +251,7 @@ groups = "sd_d0_b", "sd_d1_b", "sd_d2_b", "sd_d3_b", "sd_clk_b", "sd_cmd_b"; function = "sd_b"; + bias-disable; }; }; @@ -254,6 +260,7 @@ groups = "sd_d0_c", "sd_d1_c", "sd_d2_c", "sd_d3_c", "sd_clk_c", "sd_cmd_c"; function = "sd_c"; + bias-disable; }; }; @@ -261,6 +268,7 @@ mux { groups = "nor_d", "nor_q", "nor_c", "nor_cs"; function = "nor"; + bias-disable; }; }; @@ -272,6 +280,7 @@ "eth_rxd1", "eth_rxd0", "eth_mdio", "eth_mdc"; function = "ethernet"; + bias-disable; }; }; @@ -279,6 +288,7 @@ mux { groups = "pwm_e"; function = "pwm_e"; + bias-disable; }; }; @@ -287,6 +297,7 @@ groups = "uart_tx_a1", "uart_rx_a1"; function = "uart_a"; + bias-disable; }; }; @@ -295,6 +306,7 @@ groups = "uart_cts_a1", "uart_rts_a1"; function = "uart_a"; + bias-disable; }; }; }; diff --git a/arch/arm/boot/dts/meson8b.dtsi b/arch/arm/boot/dts/meson8b.dtsi index cd1ca9dda126..46b3564a6536 100644 --- a/arch/arm/boot/dts/meson8b.dtsi +++ b/arch/arm/boot/dts/meson8b.dtsi @@ -146,6 +146,7 @@ mux { groups = "uart_tx_ao_a", "uart_rx_ao_a"; function = "uart_ao"; + bias-disable; }; }; @@ -153,6 +154,7 @@ mux { groups = "remote_input"; function = "remote"; + bias-disable; }; }; }; @@ -220,6 +222,7 @@ "eth_txd2", "eth_txd3"; function = "ethernet"; + bias-disable; }; }; @@ -235,6 +238,7 @@ "eth_mdio_en", "eth_mdc"; function = "ethernet"; + bias-disable; }; }; @@ -242,6 +246,7 @@ mux { groups = "i2c_sda_a", "i2c_sck_a"; function = "i2c_a"; + bias-disable; }; }; @@ -250,6 +255,7 @@ groups = "sd_d0_b", "sd_d1_b", "sd_d2_b", "sd_d3_b", "sd_clk_b", "sd_cmd_b"; function = "sd_b"; + bias-disable; }; }; @@ -257,6 +263,7 @@ mux { groups = "pwm_c1"; function = "pwm_c"; + bias-disable; }; }; @@ -265,6 +272,7 @@ groups = "uart_tx_b0", "uart_rx_b0"; function = "uart_b"; + bias-disable; }; }; @@ -273,6 +281,7 @@ groups = "uart_cts_b0", "uart_rts_b0"; function = "uart_b"; + bias-disable; }; }; }; diff --git a/arch/arm/boot/dts/meson8m2.dtsi b/arch/arm/boot/dts/meson8m2.dtsi index 3e1f92273d7b..d1a28c2adac5 100644 --- a/arch/arm/boot/dts/meson8m2.dtsi +++ b/arch/arm/boot/dts/meson8m2.dtsi @@ -45,6 +45,7 @@ "eth_rxd1", "eth_rxd0", "eth_mdio", "eth_mdc"; function = "ethernet"; + bias-disable; }; }; };