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[209.132.180.67]) by mx.google.com with ESMTP id x142si3201249pgx.202.2018.11.08.02.44.56; Thu, 08 Nov 2018 02:44:56 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@baylibre-com.20150623.gappssmtp.com header.s=20150623 header.b=S44hyV6o; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727024AbeKHUTq (ORCPT + 32 others); Thu, 8 Nov 2018 15:19:46 -0500 Received: from mail-wm1-f67.google.com ([209.85.128.67]:50803 "EHLO mail-wm1-f67.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726145AbeKHUTo (ORCPT ); Thu, 8 Nov 2018 15:19:44 -0500 Received: by mail-wm1-f67.google.com with SMTP id 124-v6so768301wmw.0 for ; Thu, 08 Nov 2018 02:44:51 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=baylibre-com.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=5sBBc5EvtxV7NFthSUI3pE8N+JW8dWzJOFUjmWOYU4c=; b=S44hyV6oX2gQqDevXVlPEM0uThd19akWHw7+rGLYEKPtKHJ6y+G+OlZ39dLp84D6GQ vwun83B+KrwgFri+7ShmDgbwzQKMtRDjK5AwP9yfFQAZLSv0wRlJx756FJ88i+bwOrBg fNuG2lUJmOdMKkQTFeLyXWcK8dB/ZTeVKHdq9Lqjg9NCIl1Emi5qqYZh1r3MXklCjr4J 2GbhyyVQwOr8+vgHAoCLVgpbwo9bnS0pzMof7LgTdx9vr3z27T2FlJVtCDzwYhTA/g6B RbHyB8TDaAH1CrddCJkXU+licY+1wACBLZXIUpizE6MmMbsv4uSeWZ0ywHrUyGWzy5L3 44FA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=5sBBc5EvtxV7NFthSUI3pE8N+JW8dWzJOFUjmWOYU4c=; b=Zhb9LHDZV6fA0qtZ79qw8nlhP5nniEM5ViBTB9nHtzp/w+vty/YYMeLo58sSsvQWLi sLhpD0aO43+0pHRZJDNc/YC65mIsqBApAczy8mGEJZZuZm1GddnEYuXtUTE6RM8OrgxW TPvcV4yb9vDZvOT6/PYgzeOEi21eDYCwael3YjuyaCakJljIyVPMpUme2colILQJQXWh gRtGg86/IL7uotdPlZf95ttf32msl9ZxGoWqOrazJv0OjmL8fsT1oBrTSQEP8urVSLcB c/vF06auolexFjWuoWwddpjxNyv8FDwXOrjgRk2t+5B+wsSVeMd3kJH/rD9gSPnSejq5 +iWw== X-Gm-Message-State: AGRZ1gKm2TBD4TenP43q0FYg6Epro9Kz86TCtQi8HinciRFTAGH6QNSD IPuRyZS+3Hz8oxiA+ePuXi67bg== X-Received: by 2002:a1c:98ce:: with SMTP id a197-v6mr752717wme.135.1541673891104; Thu, 08 Nov 2018 02:44:51 -0800 (PST) Received: from boomer.local ([90.63.244.31]) by smtp.googlemail.com with ESMTPSA id o130-v6sm5884800wmd.11.2018.11.08.02.44.49 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Thu, 08 Nov 2018 02:44:50 -0800 (PST) From: Jerome Brunet To: Kevin Hilman , Carlo Caione Cc: Jerome Brunet , devicetree@vger.kernel.org, linux-amlogic@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH 1/4] arm64: dts: meson: remove extra subnode in mmc clk_gate pinmux Date: Thu, 8 Nov 2018 11:44:23 +0100 Message-Id: <20181108104426.1877-2-jbrunet@baylibre.com> X-Mailer: git-send-email 2.19.1 In-Reply-To: <20181108104426.1877-1-jbrunet@baylibre.com> References: <20181108104426.1877-1-jbrunet@baylibre.com> MIME-Version: 1.0 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org In the pinmux of the mmc clk_gate nodes, we define 2 subnodes. One for the function definition, the other for the bias. This is not necessary since we can define the function and the bias in the same subnode. Signed-off-by: Jerome Brunet --- arch/arm64/boot/dts/amlogic/meson-axg.dtsi | 6 ------ arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi | 9 --------- arch/arm64/boot/dts/amlogic/meson-gxl.dtsi | 9 --------- 3 files changed, 24 deletions(-) -- 2.19.1 diff --git a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi index eb46db001ce0..e86f5f721f8f 100644 --- a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi @@ -280,9 +280,6 @@ mux { groups = "BOOT_8"; function = "gpio_periphs"; - }; - cfg-pull-down { - pins = "BOOT_8"; bias-pull-down; }; }; @@ -513,9 +510,6 @@ mux { groups = "GPIOX_4"; function = "gpio_periphs"; - }; - cfg-pull-down { - pins = "GPIOX_4"; bias-pull-down; }; }; diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi index 524f533e41d4..1cb8e7e0d0da 100644 --- a/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi @@ -377,9 +377,6 @@ mux { groups = "BOOT_8"; function = "gpio_periphs"; - }; - cfg-pull-down { - pins = "BOOT_8"; bias-pull-down; }; }; @@ -426,9 +423,6 @@ mux { groups = "CARD_2"; function = "gpio_periphs"; - }; - cfg-pull-down { - pins = "CARD_2"; bias-pull-down; }; }; @@ -449,9 +443,6 @@ mux { groups = "GPIOX_4"; function = "gpio_periphs"; - }; - cfg-pull-down { - pins = "GPIOX_4"; bias-pull-down; }; }; diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi index 8ccab9a1ebcc..7cfee40d89e9 100644 --- a/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi @@ -324,9 +324,6 @@ mux { groups = "BOOT_8"; function = "gpio_periphs"; - }; - cfg-pull-down { - pins = "BOOT_8"; bias-pull-down; }; }; @@ -373,9 +370,6 @@ mux { groups = "CARD_2"; function = "gpio_periphs"; - }; - cfg-pull-down { - pins = "CARD_2"; bias-pull-down; }; }; @@ -396,9 +390,6 @@ mux { groups = "GPIOX_4"; function = "gpio_periphs"; - }; - cfg-pull-down { - pins = "GPIOX_4"; bias-pull-down; }; }; From patchwork Thu Nov 8 10:44:26 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jerome Brunet X-Patchwork-Id: 150497 Delivered-To: patch@linaro.org Received: by 2002:a2e:299d:0:0:0:0:0 with SMTP id p29-v6csp664042ljp; Thu, 8 Nov 2018 02:44:58 -0800 (PST) X-Google-Smtp-Source: AJdET5do7LNPEJK+gabvsJGPHoTlYAj3HrpB8xCPCzyL8WVrazajZSuUIlesOOgUJIXqQDoJu0Vt X-Received: by 2002:a62:1a55:: with SMTP id a82-v6mr3921151pfa.133.1541673898471; Thu, 08 Nov 2018 02:44:58 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1541673898; cv=none; d=google.com; s=arc-20160816; b=oTSQnFu/liHUHZ+JKpWK0BhJG1scTQgjHaliGKfPoRylNGXp331Maff0cB2UPv4Z+Z bHkgQ3FDuGq0/wpi2dKaALY1c1e+ObZpmbVz20oxPDq5G92nAVhf61ULeqYQUNmTSgb3 cH0HscJjDO0XEdrTRrcvI1dA0KQsm0C8kcR/mgN/USivEptTf59rCOwmUV3pUSJ+z57q vdAfHM2q2el/4RYLPrfLddo/YHpmLU3C0+tyda+/VgXMgThM0GMSoY5ooAfmXNYONieH G6TC59OkD5OhMxy0JD+1uDbH62BC4wFd7b3EFzdhpRHdr0MZeWKx/zN2+JBfCymsDXTi XYPA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=Ej2YST9rdgBvI/3S+E/v4xZNuOxlt8n1LsFdJ1JaCwE=; b=NnEoUGLgxqQKeUnOdFFOH4wYjdjt/fnxoZGIoijAgZiTYSTxLcBXzOtsAOPBo/RXlG pmYRseRbCgAZS+9p2eT6w4P3pAfY6Q84U6eSguFvy5ncfVnt9EUcRuDWbXirLnlrnRKN Gn9k+Q1jLT9SqTqgO9YA/KJotPu4OJaxxaknUvBOwx93gWpiUuErvIVSVxU670/w6OWN bh42AgvfVLns8lotwil2zJxtAWn1YBPPQAbHRiDzeWqdlUf3PWGsuQGWOpyY7JjX6AVB tDRKMZMaLxbNHAJlKzwj6k+qW/mOal4nxmPiQGoBtHL0h+1e/0U7r4pdZdA0DXixUjWM 1KUw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@baylibre-com.20150623.gappssmtp.com header.s=20150623 header.b=kVaPTjce; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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This means that even when we change the function of the pad from GPIO to anything else, the bias previously set still applies. As we have seen with the eMMC, depending on the bias type and the function, it may trigger problems. The underlying issue is that we inherit whatever was left by previous user of the pad (pinconf, u-boot or the ROM code). As a consequence, the actual setup we will get is undefined. There is nothing mentioned in the documentation about pad bias and pinmux function, however leaving it undefined is not an option. This change consistently disable the pad bias for every pinmux functions. It seems to work well, we can only assume that the necessary bias (if any) is already provided by the pin function itself. Signed-off-by: Jerome Brunet --- arch/arm/boot/dts/meson8.dtsi | 12 ++++++++++++ arch/arm/boot/dts/meson8b.dtsi | 9 +++++++++ arch/arm/boot/dts/meson8m2.dtsi | 1 + 3 files changed, 22 insertions(+) -- 2.19.1 diff --git a/arch/arm/boot/dts/meson8.dtsi b/arch/arm/boot/dts/meson8.dtsi index 7162e0ca05b0..1e735c0d92e3 100644 --- a/arch/arm/boot/dts/meson8.dtsi +++ b/arch/arm/boot/dts/meson8.dtsi @@ -164,6 +164,7 @@ groups = "uart_tx_ao_a", "uart_rx_ao_a"; function = "uart_ao"; }; + bias-disable; }; i2c_ao_pins: i2c_mst_ao { @@ -171,6 +172,7 @@ groups = "i2c_mst_sck_ao", "i2c_mst_sda_ao"; function = "i2c_mst_ao"; }; + bias-disable; }; ir_recv_pins: remote { @@ -178,6 +180,7 @@ groups = "remote_input"; function = "remote"; }; + bias-disable; }; pwm_f_ao_pins: pwm-f-ao { @@ -185,6 +188,7 @@ groups = "pwm_f_ao"; function = "pwm_f_ao"; }; + bias-disable; }; }; }; @@ -239,6 +243,7 @@ "sd_d3_a", "sd_clk_a", "sd_cmd_a"; function = "sd_a"; }; + bias-disable; }; sd_b_pins: sd-b { @@ -247,6 +252,7 @@ "sd_d3_b", "sd_clk_b", "sd_cmd_b"; function = "sd_b"; }; + bias-disable; }; sd_c_pins: sd-c { @@ -255,6 +261,7 @@ "sd_d3_c", "sd_clk_c", "sd_cmd_c"; function = "sd_c"; }; + bias-disable; }; spi_nor_pins: nor { @@ -262,6 +269,7 @@ groups = "nor_d", "nor_q", "nor_c", "nor_cs"; function = "nor"; }; + bias-disable; }; eth_pins: ethernet { @@ -273,6 +281,7 @@ "eth_mdc"; function = "ethernet"; }; + bias-disable; }; pwm_e_pins: pwm-e { @@ -280,6 +289,7 @@ groups = "pwm_e"; function = "pwm_e"; }; + bias-disable; }; uart_a1_pins: uart-a1 { @@ -288,6 +298,7 @@ "uart_rx_a1"; function = "uart_a"; }; + bias-disable; }; uart_a1_cts_rts_pins: uart-a1-cts-rts { @@ -296,6 +307,7 @@ "uart_rts_a1"; function = "uart_a"; }; + bias-disable; }; }; }; diff --git a/arch/arm/boot/dts/meson8b.dtsi b/arch/arm/boot/dts/meson8b.dtsi index cd1ca9dda126..6fc129ab4453 100644 --- a/arch/arm/boot/dts/meson8b.dtsi +++ b/arch/arm/boot/dts/meson8b.dtsi @@ -147,6 +147,7 @@ groups = "uart_tx_ao_a", "uart_rx_ao_a"; function = "uart_ao"; }; + bias-disable; }; ir_recv_pins: remote { @@ -154,6 +155,7 @@ groups = "remote_input"; function = "remote"; }; + bias-disable; }; }; }; @@ -220,6 +222,7 @@ "eth_txd2", "eth_txd3"; function = "ethernet"; + bias-disable; }; }; @@ -235,6 +238,7 @@ "eth_mdio_en", "eth_mdc"; function = "ethernet"; + bias-disable; }; }; @@ -242,6 +246,7 @@ mux { groups = "i2c_sda_a", "i2c_sck_a"; function = "i2c_a"; + bias-disable; }; }; @@ -250,6 +255,7 @@ groups = "sd_d0_b", "sd_d1_b", "sd_d2_b", "sd_d3_b", "sd_clk_b", "sd_cmd_b"; function = "sd_b"; + bias-disable; }; }; @@ -257,6 +263,7 @@ mux { groups = "pwm_c1"; function = "pwm_c"; + bias-disable; }; }; @@ -265,6 +272,7 @@ groups = "uart_tx_b0", "uart_rx_b0"; function = "uart_b"; + bias-disable; }; }; @@ -273,6 +281,7 @@ groups = "uart_cts_b0", "uart_rts_b0"; function = "uart_b"; + bias-disable; }; }; }; diff --git a/arch/arm/boot/dts/meson8m2.dtsi b/arch/arm/boot/dts/meson8m2.dtsi index 3e1f92273d7b..d1a28c2adac5 100644 --- a/arch/arm/boot/dts/meson8m2.dtsi +++ b/arch/arm/boot/dts/meson8m2.dtsi @@ -45,6 +45,7 @@ "eth_rxd1", "eth_rxd0", "eth_mdio", "eth_mdc"; function = "ethernet"; + bias-disable; }; }; };