From patchwork Wed Dec 1 22:26:26 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 519882 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2B3B9C4332F for ; Wed, 1 Dec 2021 22:26:49 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1353523AbhLAWaJ (ORCPT ); Wed, 1 Dec 2021 17:30:09 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:44162 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1353609AbhLAWaA (ORCPT ); Wed, 1 Dec 2021 17:30:00 -0500 Received: from mail-lj1-x235.google.com (mail-lj1-x235.google.com [IPv6:2a00:1450:4864:20::235]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 3062AC061748 for ; Wed, 1 Dec 2021 14:26:39 -0800 (PST) Received: by mail-lj1-x235.google.com with SMTP id l7so51074331lja.2 for ; Wed, 01 Dec 2021 14:26:39 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=0qHFC39MMQLTtRc5sw1zcOnT/8/n0zap/VYN85e7NQY=; b=xQyZ/T3V3d+B4MyJooZjnOvbi3IkbJ/m6Tdy99ST4t37kGSiJQ7wVmPxPLQvfKg9q3 aXAZZvwuAJ7VKVNgBRmx8U4eIgcT7h7+rYRM5UrzZLcmfun4Po+6yWdA6qGFhb91rQsA MnwmrXVmBqlIeYp+uBhTOpmArpG9mOsLO4+LD0IFB2l8JJ4s2TZ1ukvCNRTx3MxfkzYM QTvDNI2CAwzxeMU/sCJZHzzR3RBQKUTdzDtqIwAt3ZFDfdjp++DY40LKCpRhq0fduTPh DgK37yjhoFA/sm5WasiLNDwWkWNUPOHukhxrkN81g/3LYwxuDtr3+1sulGZfPA1VTRHm QCpw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=0qHFC39MMQLTtRc5sw1zcOnT/8/n0zap/VYN85e7NQY=; b=hs+i/L4LOBvLuEXXy8sinKYTHSgfQkgnxS5guGrBVuYcneEHQ3kAqCeklQj30q70CD GQPMEt/3Wl+MPXWeDCMRorK/aQKUuuecmYTLS6nGJAf7804MP3+XoklIRSXZU9e64wSB xKv1c7nlD+wLDxB72K7SkjBeulFhRWU/AmQ8ewz9xwkcKP6UbjCKGpANR3oMnUYEDowc gQbBat+qnzXuH2ZV0za/KnH5opOQhd8J9Gg5NZKimlVOWkOT6zz1d+K3kFv1Ailzn4CB fMNA2ieaLkGMH97JrZ3lAy5QKbxPWJ5qrbJ3x7ppRNf+iYKLgrD3ZTv43lncBosZhzy5 HGdw== X-Gm-Message-State: AOAM5332Zc0perjScIpgLExyzx7OJg8cg+T03+KwsA6n0Jl7Bdde2of4 Rv0CRJSW7yHMrpZ+wEskK+2mGw== X-Google-Smtp-Source: ABdhPJxRporPuQZC9x+/lx6gh6sO0xKVQU1VPaO1NPOEFoAiAZmNsAxMzFa9ABdlZ6VliIsYF2zr8A== X-Received: by 2002:a2e:3304:: with SMTP id d4mr8026724ljc.377.1638397597359; Wed, 01 Dec 2021 14:26:37 -0800 (PST) Received: from eriador.lan ([37.153.55.125]) by smtp.gmail.com with ESMTPSA id u7sm117004lfs.144.2021.12.01.14.26.36 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 01 Dec 2021 14:26:37 -0800 (PST) From: Dmitry Baryshkov To: Bjorn Andersson , Rob Clark , Sean Paul , Abhinav Kumar Cc: Stephen Boyd , David Airlie , Daniel Vetter , linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org Subject: [PATCH v1 1/8] drm/msm/dpu: move disable_danger out of plane subdir Date: Thu, 2 Dec 2021 01:26:26 +0300 Message-Id: <20211201222633.2476780-2-dmitry.baryshkov@linaro.org> X-Mailer: git-send-email 2.33.0 In-Reply-To: <20211201222633.2476780-1-dmitry.baryshkov@linaro.org> References: <20211201222633.2476780-1-dmitry.baryshkov@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org The disable_danger debugfs file is not related to a single plane. Instead it is used by all registered planes. Move it from plane subtree to the global subtree next to danger_status and safe_status files, so that the new file supplements them. Signed-off-by: Dmitry Baryshkov Reviewed-by: Abhinav Kumar --- drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c | 70 +++++++++++++++++++++ drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c | 74 +---------------------- drivers/gpu/drm/msm/disp/dpu1/dpu_plane.h | 6 ++ 3 files changed, 77 insertions(+), 73 deletions(-) diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c index 6c457c419412..259d438bc6e8 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c @@ -101,6 +101,73 @@ static int dpu_debugfs_safe_stats_show(struct seq_file *s, void *v) } DEFINE_SHOW_ATTRIBUTE(dpu_debugfs_safe_stats); +static ssize_t _dpu_plane_danger_read(struct file *file, + char __user *buff, size_t count, loff_t *ppos) +{ + struct dpu_kms *kms = file->private_data; + int len; + char buf[40]; + + len = scnprintf(buf, sizeof(buf), "%d\n", !kms->has_danger_ctrl); + + return simple_read_from_buffer(buff, count, ppos, buf, len); +} + +static void _dpu_plane_set_danger_state(struct dpu_kms *kms, bool enable) +{ + struct drm_plane *plane; + + drm_for_each_plane(plane, kms->dev) { + if (plane->fb && plane->state) { + dpu_plane_danger_signal_ctrl(plane, enable); + DPU_DEBUG("plane:%d img:%dx%d ", + plane->base.id, plane->fb->width, + plane->fb->height); + DPU_DEBUG("src[%d,%d,%d,%d] dst[%d,%d,%d,%d]\n", + plane->state->src_x >> 16, + plane->state->src_y >> 16, + plane->state->src_w >> 16, + plane->state->src_h >> 16, + plane->state->crtc_x, plane->state->crtc_y, + plane->state->crtc_w, plane->state->crtc_h); + } else { + DPU_DEBUG("Inactive plane:%d\n", plane->base.id); + } + } +} + +static ssize_t _dpu_plane_danger_write(struct file *file, + const char __user *user_buf, size_t count, loff_t *ppos) +{ + struct dpu_kms *kms = file->private_data; + int disable_panic; + int ret; + + ret = kstrtouint_from_user(user_buf, count, 0, &disable_panic); + if (ret) + return ret; + + if (disable_panic) { + /* Disable panic signal for all active pipes */ + DPU_DEBUG("Disabling danger:\n"); + _dpu_plane_set_danger_state(kms, false); + kms->has_danger_ctrl = false; + } else { + /* Enable panic signal for all active pipes */ + DPU_DEBUG("Enabling danger:\n"); + kms->has_danger_ctrl = true; + _dpu_plane_set_danger_state(kms, true); + } + + return count; +} + +static const struct file_operations dpu_plane_danger_enable = { + .open = simple_open, + .read = _dpu_plane_danger_read, + .write = _dpu_plane_danger_write, +}; + static void dpu_debugfs_danger_init(struct dpu_kms *dpu_kms, struct dentry *parent) { @@ -110,6 +177,9 @@ static void dpu_debugfs_danger_init(struct dpu_kms *dpu_kms, dpu_kms, &dpu_debugfs_danger_stats_fops); debugfs_create_file("safe_status", 0600, entry, dpu_kms, &dpu_debugfs_safe_stats_fops); + debugfs_create_file("disable_danger", 0600, entry, + dpu_kms, &dpu_plane_danger_enable); + } static int _dpu_debugfs_show_regset32(struct seq_file *s, void *data) diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c index ca190d92f0d5..6ea4db061c9f 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c @@ -1350,7 +1350,7 @@ static void dpu_plane_reset(struct drm_plane *plane) } #ifdef CONFIG_DEBUG_FS -static void dpu_plane_danger_signal_ctrl(struct drm_plane *plane, bool enable) +void dpu_plane_danger_signal_ctrl(struct drm_plane *plane, bool enable) { struct dpu_plane *pdpu = to_dpu_plane(plane); struct dpu_kms *dpu_kms = _dpu_plane_get_kms(plane); @@ -1363,73 +1363,6 @@ static void dpu_plane_danger_signal_ctrl(struct drm_plane *plane, bool enable) pm_runtime_put_sync(&dpu_kms->pdev->dev); } -static ssize_t _dpu_plane_danger_read(struct file *file, - char __user *buff, size_t count, loff_t *ppos) -{ - struct dpu_kms *kms = file->private_data; - int len; - char buf[40]; - - len = scnprintf(buf, sizeof(buf), "%d\n", !kms->has_danger_ctrl); - - return simple_read_from_buffer(buff, count, ppos, buf, len); -} - -static void _dpu_plane_set_danger_state(struct dpu_kms *kms, bool enable) -{ - struct drm_plane *plane; - - drm_for_each_plane(plane, kms->dev) { - if (plane->fb && plane->state) { - dpu_plane_danger_signal_ctrl(plane, enable); - DPU_DEBUG("plane:%d img:%dx%d ", - plane->base.id, plane->fb->width, - plane->fb->height); - DPU_DEBUG("src[%d,%d,%d,%d] dst[%d,%d,%d,%d]\n", - plane->state->src_x >> 16, - plane->state->src_y >> 16, - plane->state->src_w >> 16, - plane->state->src_h >> 16, - plane->state->crtc_x, plane->state->crtc_y, - plane->state->crtc_w, plane->state->crtc_h); - } else { - DPU_DEBUG("Inactive plane:%d\n", plane->base.id); - } - } -} - -static ssize_t _dpu_plane_danger_write(struct file *file, - const char __user *user_buf, size_t count, loff_t *ppos) -{ - struct dpu_kms *kms = file->private_data; - int disable_panic; - int ret; - - ret = kstrtouint_from_user(user_buf, count, 0, &disable_panic); - if (ret) - return ret; - - if (disable_panic) { - /* Disable panic signal for all active pipes */ - DPU_DEBUG("Disabling danger:\n"); - _dpu_plane_set_danger_state(kms, false); - kms->has_danger_ctrl = false; - } else { - /* Enable panic signal for all active pipes */ - DPU_DEBUG("Enabling danger:\n"); - kms->has_danger_ctrl = true; - _dpu_plane_set_danger_state(kms, true); - } - - return count; -} - -static const struct file_operations dpu_plane_danger_enable = { - .open = simple_open, - .read = _dpu_plane_danger_read, - .write = _dpu_plane_danger_write, -}; - static int _dpu_plane_init_debugfs(struct drm_plane *plane) { struct dpu_plane *pdpu = to_dpu_plane(plane); @@ -1498,11 +1431,6 @@ static int _dpu_plane_init_debugfs(struct drm_plane *plane) pdpu->debugfs_root, (u32 *) &sblk->danger_vblank); - debugfs_create_file("disable_danger", - 0600, - pdpu->debugfs_root, - kms, &dpu_plane_danger_enable); - return 0; } #else diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.h index 52792526e904..7667b1f81bd4 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.h +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.h @@ -132,4 +132,10 @@ void dpu_plane_clear_multirect(const struct drm_plane_state *drm_state); int dpu_plane_color_fill(struct drm_plane *plane, uint32_t color, uint32_t alpha); +#ifdef CONFIG_DEBUG_FS +void dpu_plane_danger_signal_ctrl(struct drm_plane *plane, bool enable); +#else +static inline void dpu_plane_danger_signal_ctrl(struct drm_plane *plane, bool enable) {} +#endif + #endif /* _DPU_PLANE_H_ */ From patchwork Wed Dec 1 22:26:28 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 519883 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id B42E1C433FE for ; Wed, 1 Dec 2021 22:26:49 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235412AbhLAWaJ (ORCPT ); Wed, 1 Dec 2021 17:30:09 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:44172 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1353617AbhLAWaC (ORCPT ); Wed, 1 Dec 2021 17:30:02 -0500 Received: from mail-lj1-x231.google.com (mail-lj1-x231.google.com [IPv6:2a00:1450:4864:20::231]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 7BE25C061748 for ; Wed, 1 Dec 2021 14:26:40 -0800 (PST) Received: by mail-lj1-x231.google.com with SMTP id d11so51081098ljg.8 for ; Wed, 01 Dec 2021 14:26:40 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=fWCoIosLOkr8+Xp5Tky7xqwPwu8pC3ri4jt2sulhCRE=; b=Xb2SvLb1ZZ9tHGymd8d9tmuvelPOGxTOoUuK6Q+FG9Z7F/abPDzE7TWHp5oaeghX1o 4An2eEl8JdsG302stGkaHUsC3nGi2P63gWMK0mpa9/nHbZcm4HAlW9xNEzAxzqurhFW2 wzRu8qBkPI0gInFNlPjNACnxkzc00sxQqGzQvDu9rt50yzoqeKmdaffo7vzjqxEkLAaG mMQ/LqlRPSlq2vFUF+EeSgwh6FkbCcptBR8jHmOd5Vz1+kPQ1aDnM/NkpN8KWoJOolxP sR+kXa31AlkkzO29iSFuo7gkIhOE/+nBlJ4zJoENqYuJDY42NuJqTUjUhOYUZ5C4Ausf fijg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=fWCoIosLOkr8+Xp5Tky7xqwPwu8pC3ri4jt2sulhCRE=; b=AKmKqCjf8JXCD2VOvcX5LTxeiZXcJsGmke7o9kNpj4+VJ6MRJQMlwFVLAYTOTJf8ap CfU2PitzmvTIN1zdyblxsMVXqK1/QOhcbrnKZwRjxaingVWeK243n852lwtRtd6PzxsR NqpUHBlAeLIQYo+xZm+WoDk8eySc0N26IrIEBjs8Re0GX/bVMng6ZkOFayDMwUALioJ6 9obTM0yU5TPpdDPKCzAMDNzYJGwHDjlzapNBURMHG4I/+Kr3Wt8W1eAga3ilm6TC6roj I63IoYlJNCOc0Ps06IBMRXY1h7aldB16K7xzcwR5ORT+CVarGV2lli53M28TrvkmcFib Xm/w== X-Gm-Message-State: AOAM533SmRNX8BROHlmoMBn28XV7kYyEF6Lz/rLHjwO8mx8Ugu6HkgwH +DsF6idfA2kkwPvB8h2no08uxQ== X-Google-Smtp-Source: ABdhPJxtqnDME8ugi6RNS2CRr24FIhayY929Ybdkjjg0tuAthvNZRunt6g/P/cX8aCOWaRL5rkDyVQ== X-Received: by 2002:a2e:9dc8:: with SMTP id x8mr8170843ljj.502.1638397598784; Wed, 01 Dec 2021 14:26:38 -0800 (PST) Received: from eriador.lan ([37.153.55.125]) by smtp.gmail.com with ESMTPSA id u7sm117004lfs.144.2021.12.01.14.26.38 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 01 Dec 2021 14:26:38 -0800 (PST) From: Dmitry Baryshkov To: Bjorn Andersson , Rob Clark , Sean Paul , Abhinav Kumar Cc: Stephen Boyd , David Airlie , Daniel Vetter , linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org Subject: [PATCH v1 3/8] drm/msm/dpu: make danger_status/safe_status readable Date: Thu, 2 Dec 2021 01:26:28 +0300 Message-Id: <20211201222633.2476780-4-dmitry.baryshkov@linaro.org> X-Mailer: git-send-email 2.33.0 In-Reply-To: <20211201222633.2476780-1-dmitry.baryshkov@linaro.org> References: <20211201222633.2476780-1-dmitry.baryshkov@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Change \t to \n in the print format to stop putting all SSPP status in a single line. Splitting it to one SSPP per line is much more readable. Signed-off-by: Dmitry Baryshkov Reviewed-by: Abhinav Kumar --- drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c index e7f0cded2c6b..4c04982c71b2 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c @@ -82,7 +82,7 @@ static int _dpu_danger_signal_status(struct seq_file *s, seq_printf(s, "MDP : 0x%x\n", status.mdp); for (i = SSPP_VIG0; i < SSPP_MAX; i++) - seq_printf(s, "SSPP%d : 0x%x \t", i - SSPP_VIG0, + seq_printf(s, "SSPP%d : 0x%x \n", i - SSPP_VIG0, status.sspp[i]); seq_puts(s, "\n"); From patchwork Wed Dec 1 22:26:29 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 519881 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 612D2C433F5 for ; Wed, 1 Dec 2021 22:26:57 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1353586AbhLAWaL (ORCPT ); Wed, 1 Dec 2021 17:30:11 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:44176 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1353622AbhLAWaC (ORCPT ); Wed, 1 Dec 2021 17:30:02 -0500 Received: from mail-lj1-x235.google.com (mail-lj1-x235.google.com [IPv6:2a00:1450:4864:20::235]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 103DBC061574 for ; Wed, 1 Dec 2021 14:26:41 -0800 (PST) Received: by mail-lj1-x235.google.com with SMTP id d11so51081124ljg.8 for ; Wed, 01 Dec 2021 14:26:40 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=F6F3WPxfyMvxOGFVFzP69ATi4vGo49QVFI+qg3mn8Wg=; b=o7ErKwOInkuJ/TeFfq8CxMf8JeSlpaYibVC+EzB6kuYi1h5PjYv/+Yrrqmv/VC2Phz odHWNsKT6hMpfLMc+RUuoabaabA5QlUU/iOgucmBLoZ7KEAPz0TTkHtlFfhJN+dXZsG8 YHKv4KeSD+tFlotOpoZhRwKoGiLoNPJ/TTekUHIyluUyyLXyXs5msB/Af0QFwp3dUh+g sJPKv0+uBpAhLzPUx960lGn3KJEzkjLzGt9UwxcSRyL2ET4gb4MYEiJIsYpGY+6PGI6z IAuPsfaIsHQruW0pjAH0x/bOr/TDE1llmDiVNrZRLTR8jfYNuq3GN6Lrt6oN+63jxLge plvA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=F6F3WPxfyMvxOGFVFzP69ATi4vGo49QVFI+qg3mn8Wg=; b=f2mJFy84JMFJiMcfNFI9/UL31ki9QmbRh//H1kLcM8kVddQRnayIlF/d4s5IQz6qri fEgjshktLr7YunnPIIgZXVZV/jGlsETNfX7FGitEoBZHK2muqEwr7iHb1/4RlPf8fcYA l8el/HGSLNK52XbnCxS262lUNKB9A8YdhX0oRzc8Y10jkWqJIAKGC6Nz9+Fq3Xstnw9E /f9sIbo4oxZ2QqqlKnk1SC6nXHeEz21CgGRK3lHvKLEXec/+5/mrk93S2+kHyqgi0J0j gRxTbWRCxxx49t+V/yoDlcThRZAHSRSH/SGHWTjS6B7xusRD1N+XeKTHjMc010OvKt/8 Mzkg== X-Gm-Message-State: AOAM5332PXkDFsyZMXUv0LkBGliN38bX87VoYVKevelBlQsTP1UD6Scq KJ6krGrCLpSAHUPqPPFWBs/wfg== X-Google-Smtp-Source: ABdhPJzaqWQVe9yEJqQno/GA6ULFW+0oG9KsRBzz6NDmEuN/UoAvkV7RdkxlLyqlf+MDd7EVPTyYKw== X-Received: by 2002:a2e:b751:: with SMTP id k17mr7950866ljo.467.1638397599403; Wed, 01 Dec 2021 14:26:39 -0800 (PST) Received: from eriador.lan ([37.153.55.125]) by smtp.gmail.com with ESMTPSA id u7sm117004lfs.144.2021.12.01.14.26.38 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 01 Dec 2021 14:26:39 -0800 (PST) From: Dmitry Baryshkov To: Bjorn Andersson , Rob Clark , Sean Paul , Abhinav Kumar Cc: Stephen Boyd , David Airlie , Daniel Vetter , linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org Subject: [PATCH v1 4/8] drm/msm/dpu: drop plane's default_scaling debugfs file Date: Thu, 2 Dec 2021 01:26:29 +0300 Message-Id: <20211201222633.2476780-5-dmitry.baryshkov@linaro.org> X-Mailer: git-send-email 2.33.0 In-Reply-To: <20211201222633.2476780-1-dmitry.baryshkov@linaro.org> References: <20211201222633.2476780-1-dmitry.baryshkov@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Proper support for the 'default_scaling' debugfs file was removed during DPU driver pre-merge cleanup. Remove leftover file. Signed-off-by: Dmitry Baryshkov Reviewed-by: Abhinav Kumar --- drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c | 5 ----- 1 file changed, 5 deletions(-) diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c index 6ea4db061c9f..f80ee3ba9a8a 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c @@ -114,7 +114,6 @@ struct dpu_plane { struct dpu_debugfs_regset32 debugfs_src; struct dpu_debugfs_regset32 debugfs_scaler; struct dpu_debugfs_regset32 debugfs_csc; - bool debugfs_default_scale; }; static const uint64_t supported_format_modifiers[] = { @@ -1398,10 +1397,6 @@ static int _dpu_plane_init_debugfs(struct drm_plane *plane) dpu_debugfs_create_regset32("scaler_blk", 0400, pdpu->debugfs_root, &pdpu->debugfs_scaler); - debugfs_create_bool("default_scaling", - 0600, - pdpu->debugfs_root, - &pdpu->debugfs_default_scale); } if (cfg->features & BIT(DPU_SSPP_CSC) || From patchwork Wed Dec 1 22:26:32 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 519880 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 22C16C433EF for ; Wed, 1 Dec 2021 22:27:06 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1353612AbhLAWaY (ORCPT ); Wed, 1 Dec 2021 17:30:24 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:44194 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1353635AbhLAWaF (ORCPT ); Wed, 1 Dec 2021 17:30:05 -0500 Received: from mail-lj1-x22e.google.com (mail-lj1-x22e.google.com [IPv6:2a00:1450:4864:20::22e]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 77D84C061748 for ; Wed, 1 Dec 2021 14:26:43 -0800 (PST) Received: by mail-lj1-x22e.google.com with SMTP id 13so50997511ljj.11 for ; Wed, 01 Dec 2021 14:26:43 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=notfP1OjEVUqD6diGKORg1DThS/PAwpugZOcLB9s/EA=; b=ZZGVpSp7W4jOs0K9u4b2fTnl5kl7vhEGXXkuvxlVjtCszqbtXjGuFb8vje5A+szfZW FTQgx4ZueemhIKSm3WYUKCTLNGcywo7gcEpvDPR+J5UiGU24IE/j7NP/sxjsCfhu0ZL6 d/0GS708qj78XgC4g7W4oboBS1DHex743wN3IBd6thSSBEljAI7g6pdMag2+4om9qhuz 5CVCPmufGz8yw/b+pq1pbLBEkADlX+A4Xqpd5HScmidKEncpZLDqjqPifUUguSYrh8jW M7XgXPh6T4NVIBEG2U+CsoBclbI7uMmPc7s1mdEhaELXlDgM5I/3EqAOie+HSa4T7kVa /dqw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=notfP1OjEVUqD6diGKORg1DThS/PAwpugZOcLB9s/EA=; b=HcTKxSo7m9EA93nZ0e5Z55WgRIpjFgs2k3BQdyZQNccZhxUfZdZsC79vLubmLIME6W i/B1pBE61KsP7XR/40hwL+zFb70WGhAZqNLv+dJa+NIx4tIqhVxZbl+AtWFbmEZMUKBk 0qTnLAiplAP6hyCD9DOJt0dzQrDkKfluWtPHlOTfo2P5QcWFjFqbqwCl5QDznuSRmirz +rIQEyEdJruN9FqI3qx7VnfCyHwVdjA9xw/RTwD/vmK0O3kkeqqZizzh6E+VArznllUC /2v5VwaNBIQswOqU4dtbdBob9HKixb8sRy58iJsBUc7syt0T/F1BJqCV9QnZAq0Nh/X9 6W2A== X-Gm-Message-State: AOAM533aFwG7lrHHkH4i4R8MIuvqICBWRUeyHPb2jpBMnCzP+X8bGi6M aKNo9+Eg2EaQ9oQw0Zuyz5BLIA== X-Google-Smtp-Source: ABdhPJytnX+M9vOm2nMGuL3tsKyRcli/SIULb4mjqlSF+xtcKtWFR/Yu3z4oSEoJWHgEzhZ3EWFFyA== X-Received: by 2002:a05:651c:210f:: with SMTP id a15mr8000910ljq.486.1638397601658; Wed, 01 Dec 2021 14:26:41 -0800 (PST) Received: from eriador.lan ([37.153.55.125]) by smtp.gmail.com with ESMTPSA id u7sm117004lfs.144.2021.12.01.14.26.40 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 01 Dec 2021 14:26:41 -0800 (PST) From: Dmitry Baryshkov To: Bjorn Andersson , Rob Clark , Sean Paul , Abhinav Kumar Cc: Stephen Boyd , David Airlie , Daniel Vetter , linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org Subject: [PATCH v1 7/8] drm/msm/dpu: simplify DPU's regset32 code Date: Thu, 2 Dec 2021 01:26:32 +0300 Message-Id: <20211201222633.2476780-8-dmitry.baryshkov@linaro.org> X-Mailer: git-send-email 2.33.0 In-Reply-To: <20211201222633.2476780-1-dmitry.baryshkov@linaro.org> References: <20211201222633.2476780-1-dmitry.baryshkov@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Squash dpu_debugfs_setup_regset32() into dpu_debugfs_create_regset32(). it makes little sense to have separate function to just setup the structure. Signed-off-by: Dmitry Baryshkov Reviewed-by: Abhinav Kumar --- drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c | 32 ++++++++++++------- drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h | 38 +++-------------------- drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c | 27 +++++----------- 3 files changed, 33 insertions(+), 64 deletions(-) diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c index 4c04982c71b2..7e7a619769a8 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c @@ -182,6 +182,15 @@ static void dpu_debugfs_danger_init(struct dpu_kms *dpu_kms, } +/* + * Companion structure for dpu_debugfs_create_regset32. + */ +struct dpu_debugfs_regset32 { + uint32_t offset; + uint32_t blk_len; + struct dpu_kms *dpu_kms; +}; + static int _dpu_debugfs_show_regset32(struct seq_file *s, void *data) { struct dpu_debugfs_regset32 *regset = s->private; @@ -229,24 +238,23 @@ static const struct file_operations dpu_fops_regset32 = { .release = single_release, }; -void dpu_debugfs_setup_regset32(struct dpu_debugfs_regset32 *regset, +void dpu_debugfs_create_regset32(const char *name, umode_t mode, + void *parent, uint32_t offset, uint32_t length, struct dpu_kms *dpu_kms) { - if (regset) { - regset->offset = offset; - regset->blk_len = length; - regset->dpu_kms = dpu_kms; - } -} + struct dpu_debugfs_regset32 *regset; -void dpu_debugfs_create_regset32(const char *name, umode_t mode, - void *parent, struct dpu_debugfs_regset32 *regset) -{ - if (!name || !regset || !regset->dpu_kms || !regset->blk_len) + if (WARN_ON(!name || !dpu_kms || !length)) + return; + + regset = devm_kzalloc(&dpu_kms->pdev->dev, sizeof(*regset), GFP_KERNEL); + if (!regset) return; /* make sure offset is a multiple of 4 */ - regset->offset = round_down(regset->offset, 4); + regset->offset = round_down(offset, 4); + regset->blk_len = length; + regset->dpu_kms = dpu_kms; debugfs_create_file(name, mode, parent, regset, &dpu_fops_regset32); } diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h index 775bcbda860f..b53cdeb1b5c4 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h @@ -160,33 +160,9 @@ struct dpu_global_state * * Documentation/filesystems/debugfs.rst * - * @dpu_debugfs_setup_regset32: Initialize data for dpu_debugfs_create_regset32 * @dpu_debugfs_create_regset32: Create 32-bit register dump file - * @dpu_debugfs_get_root: Get root dentry for DPU_KMS's debugfs node */ -/** - * Companion structure for dpu_debugfs_create_regset32. Do not initialize the - * members of this structure explicitly; use dpu_debugfs_setup_regset32 instead. - */ -struct dpu_debugfs_regset32 { - uint32_t offset; - uint32_t blk_len; - struct dpu_kms *dpu_kms; -}; - -/** - * dpu_debugfs_setup_regset32 - Initialize register block definition for debugfs - * This function is meant to initialize dpu_debugfs_regset32 structures for use - * with dpu_debugfs_create_regset32. - * @regset: opaque register definition structure - * @offset: sub-block offset - * @length: sub-block length, in bytes - * @dpu_kms: pointer to dpu kms structure - */ -void dpu_debugfs_setup_regset32(struct dpu_debugfs_regset32 *regset, - uint32_t offset, uint32_t length, struct dpu_kms *dpu_kms); - /** * dpu_debugfs_create_regset32 - Create register read back file for debugfs * @@ -195,20 +171,16 @@ void dpu_debugfs_setup_regset32(struct dpu_debugfs_regset32 *regset, * names/offsets do not need to be provided. The 'read' function simply outputs * sequential register values over a specified range. * - * Similar to the related debugfs_create_regset32 API, the structure pointed to - * by regset needs to persist for the lifetime of the created file. The calling - * code is responsible for initialization/management of this structure. - * - * The structure pointed to by regset is meant to be opaque. Please use - * dpu_debugfs_setup_regset32 to initialize it. - * * @name: File name within debugfs * @mode: File mode within debugfs * @parent: Parent directory entry within debugfs, can be NULL - * @regset: Pointer to persistent register block definition + * @offset: sub-block offset + * @length: sub-block length, in bytes + * @dpu_kms: pointer to dpu kms structure */ void dpu_debugfs_create_regset32(const char *name, umode_t mode, - void *parent, struct dpu_debugfs_regset32 *regset); + void *parent, + uint32_t offset, uint32_t length, struct dpu_kms *dpu_kms); /** * dpu_debugfs_get_root - Return root directory entry for KMS's debugfs diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c index d3176f58708e..ef66af696a40 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c @@ -108,11 +108,6 @@ struct dpu_plane { bool is_virtual; struct list_head mplane_list; struct dpu_mdss_cfg *catalog; - - /* debugfs related stuff */ - struct dpu_debugfs_regset32 debugfs_src; - struct dpu_debugfs_regset32 debugfs_scaler; - struct dpu_debugfs_regset32 debugfs_csc; }; static const uint64_t supported_format_modifiers[] = { @@ -1379,35 +1374,29 @@ static int _dpu_plane_init_debugfs(struct drm_plane *plane) debugfs_root, (unsigned long *)&pdpu->pipe_hw->cap->features); /* add register dump support */ - dpu_debugfs_setup_regset32(&pdpu->debugfs_src, + dpu_debugfs_create_regset32("src_blk", 0400, + debugfs_root, sblk->src_blk.base + cfg->base, sblk->src_blk.len, kms); - dpu_debugfs_create_regset32("src_blk", 0400, - debugfs_root, &pdpu->debugfs_src); if (cfg->features & BIT(DPU_SSPP_SCALER_QSEED3) || cfg->features & BIT(DPU_SSPP_SCALER_QSEED3LITE) || cfg->features & BIT(DPU_SSPP_SCALER_QSEED2) || - cfg->features & BIT(DPU_SSPP_SCALER_QSEED4)) { - dpu_debugfs_setup_regset32(&pdpu->debugfs_scaler, + cfg->features & BIT(DPU_SSPP_SCALER_QSEED4)) + dpu_debugfs_create_regset32("scaler_blk", 0400, + debugfs_root, sblk->scaler_blk.base + cfg->base, sblk->scaler_blk.len, kms); - dpu_debugfs_create_regset32("scaler_blk", 0400, - debugfs_root, - &pdpu->debugfs_scaler); - } if (cfg->features & BIT(DPU_SSPP_CSC) || - cfg->features & BIT(DPU_SSPP_CSC_10BIT)) { - dpu_debugfs_setup_regset32(&pdpu->debugfs_csc, + cfg->features & BIT(DPU_SSPP_CSC_10BIT)) + dpu_debugfs_create_regset32("csc_blk", 0400, + debugfs_root, sblk->csc_blk.base + cfg->base, sblk->csc_blk.len, kms); - dpu_debugfs_create_regset32("csc_blk", 0400, - debugfs_root, &pdpu->debugfs_csc); - } debugfs_create_u32("xin_id", 0400, From patchwork Wed Dec 1 22:26:33 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 519879 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 32F29C4332F for ; Wed, 1 Dec 2021 22:27:06 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1353616AbhLAWaZ (ORCPT ); Wed, 1 Dec 2021 17:30:25 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:44198 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1353637AbhLAWaG (ORCPT ); Wed, 1 Dec 2021 17:30:06 -0500 Received: from mail-lj1-x234.google.com (mail-lj1-x234.google.com [IPv6:2a00:1450:4864:20::234]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 2EA71C061574 for ; Wed, 1 Dec 2021 14:26:44 -0800 (PST) Received: by mail-lj1-x234.google.com with SMTP id j18so37877055ljc.12 for ; Wed, 01 Dec 2021 14:26:44 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=YRqnfrlexYYeGgagIUTamZ7RSQEhaY33J7GOhnJ7GdQ=; b=OKtfr+1I+2gKgILYOWnJ48PN5lG/F4Rc2IJ4v66zyuk4hFgJxpdkEqwsQCxOwM5qu8 BnN01N0TVYd0qPRyHWfQpd7XIg2S2qtZWOW5sZEoVjuFK1OdDu9EeQZFvQWPiLHHX313 tp/2TTEoN02EuT5cKH6Q54fbhbc8sSm98GNXRGuE3iBtulGTyhl1GkeeK4OgBq4X6QMb ReCFPDiRIT6SehCblltg1IThuj4tUTRiBIDh5bZ8pu7RpyLJt6GKt6FUtjMXcB6Xaueo IlJ0lbY9N6ZXOAUm4VR0uvBfLz1DDsAKflwMrGBgtjlvyTgii015kNqLqxFrNl7YvkZN NOmw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=YRqnfrlexYYeGgagIUTamZ7RSQEhaY33J7GOhnJ7GdQ=; b=g+rIXqS25bT0M8ffUqetIrDUWeHnhjN99uOn6EUr6LUobc8h2GdAXD0vDt/GeRi69/ s6UpZxr6PBXqvPLHxuP6Cr7+qkGT2ttFE6ZIMnT1HgwVqMF+K4rohQsN1M40PKgcOQH+ Po9RhF7USMZcPMArrKmu61D0jTtByxqZinLiBgvYhz4kjirbMquL7XgX8iaLOMAxB61s 3H52pBd8L8uoIpROQXpViKv6ncnXKnitGbakXVbPaUaarGt/KiCOGkOo7p5vm3YujMAw Ps7cOClq727lW156uYxJLqdk3KrL2mbEqQe6N+3f3xcxWzwpJX+X/mWJTOJ1nfymYYdY YLsA== X-Gm-Message-State: AOAM53258YxdYzfQgBi9m2qk2967fN9ps64AhhKUsAIeRKSJWMLho9F6 9WOBcolbfV6pnTNBHhFVL8UeMg== X-Google-Smtp-Source: ABdhPJwDw8mg6Ac7jXrYVO26B/DawQwFuWNgo5CGv+bIsSwPjqdbQ0OBdChQBX6va0udGdhEBb2B7A== X-Received: by 2002:a2e:2f1d:: with SMTP id v29mr8333578ljv.439.1638397602469; Wed, 01 Dec 2021 14:26:42 -0800 (PST) Received: from eriador.lan ([37.153.55.125]) by smtp.gmail.com with ESMTPSA id u7sm117004lfs.144.2021.12.01.14.26.41 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 01 Dec 2021 14:26:41 -0800 (PST) From: Dmitry Baryshkov To: Bjorn Andersson , Rob Clark , Sean Paul , Abhinav Kumar Cc: Stephen Boyd , David Airlie , Daniel Vetter , linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org Subject: [PATCH v1 8/8] drm/msm/dpu: move SSPP debugfs support from plane to SSPP code Date: Thu, 2 Dec 2021 01:26:33 +0300 Message-Id: <20211201222633.2476780-9-dmitry.baryshkov@linaro.org> X-Mailer: git-send-email 2.33.0 In-Reply-To: <20211201222633.2476780-1-dmitry.baryshkov@linaro.org> References: <20211201222633.2476780-1-dmitry.baryshkov@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org We are preparing to change DPU plane implementation. Move SSPP debugfs code from dpu_plane.c to dpu_hw_sspp.c, where it belongs. Signed-off-by: Dmitry Baryshkov Reviewed-by: Abhinav Kumar --- drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c | 67 +++++++++++++++++ drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.h | 4 + drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c | 1 + drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c | 82 +++------------------ 4 files changed, 84 insertions(+), 70 deletions(-) diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c index d77eb7da5daf..ae3cf2e4d7d9 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c @@ -8,6 +8,8 @@ #include "dpu_hw_sspp.h" #include "dpu_kms.h" +#include + #define DPU_FETCH_CONFIG_RESET_VALUE 0x00000087 /* DPU_SSPP_SRC */ @@ -686,6 +688,71 @@ static void _setup_layer_ops(struct dpu_hw_pipe *c, c->ops.setup_cdp = dpu_hw_sspp_setup_cdp; } +#ifdef CONFIG_DEBUG_FS +int _dpu_hw_sspp_init_debugfs(struct dpu_hw_pipe *hw_pipe, struct dpu_kms *kms, struct dentry *entry) +{ + const struct dpu_sspp_cfg *cfg = hw_pipe->cap; + const struct dpu_sspp_sub_blks *sblk = cfg->sblk; + struct dentry *debugfs_root; + char sspp_name[32]; + + snprintf(sspp_name, sizeof(sspp_name), "%d", hw_pipe->idx); + + /* create overall sub-directory for the pipe */ + debugfs_root = + debugfs_create_dir(sspp_name, entry); + + /* don't error check these */ + debugfs_create_xul("features", 0600, + debugfs_root, (unsigned long *)&hw_pipe->cap->features); + + /* add register dump support */ + dpu_debugfs_create_regset32("src_blk", 0400, + debugfs_root, + sblk->src_blk.base + cfg->base, + sblk->src_blk.len, + kms); + + if (cfg->features & BIT(DPU_SSPP_SCALER_QSEED3) || + cfg->features & BIT(DPU_SSPP_SCALER_QSEED3LITE) || + cfg->features & BIT(DPU_SSPP_SCALER_QSEED2) || + cfg->features & BIT(DPU_SSPP_SCALER_QSEED4)) + dpu_debugfs_create_regset32("scaler_blk", 0400, + debugfs_root, + sblk->scaler_blk.base + cfg->base, + sblk->scaler_blk.len, + kms); + + if (cfg->features & BIT(DPU_SSPP_CSC) || + cfg->features & BIT(DPU_SSPP_CSC_10BIT)) + dpu_debugfs_create_regset32("csc_blk", 0400, + debugfs_root, + sblk->csc_blk.base + cfg->base, + sblk->csc_blk.len, + kms); + + debugfs_create_u32("xin_id", + 0400, + debugfs_root, + (u32 *) &cfg->xin_id); + debugfs_create_u32("clk_ctrl", + 0400, + debugfs_root, + (u32 *) &cfg->clk_ctrl); + debugfs_create_x32("creq_vblank", + 0600, + debugfs_root, + (u32 *) &sblk->creq_vblank); + debugfs_create_x32("danger_vblank", + 0600, + debugfs_root, + (u32 *) &sblk->danger_vblank); + + return 0; +} +#endif + + static const struct dpu_sspp_cfg *_sspp_offset(enum dpu_sspp sspp, void __iomem *addr, struct dpu_mdss_cfg *catalog, diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.h index e8939d7387cb..cef281687bab 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.h +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.h @@ -381,6 +381,7 @@ struct dpu_hw_pipe { struct dpu_hw_sspp_ops ops; }; +struct dpu_kms; /** * dpu_hw_sspp_init - initializes the sspp hw driver object. * Should be called once before accessing every pipe. @@ -400,5 +401,8 @@ struct dpu_hw_pipe *dpu_hw_sspp_init(enum dpu_sspp idx, */ void dpu_hw_sspp_destroy(struct dpu_hw_pipe *ctx); +void dpu_debugfs_sspp_init(struct dpu_kms *dpu_kms, struct dentry *debugfs_root); +int _dpu_hw_sspp_init_debugfs(struct dpu_hw_pipe *hw_pipe, struct dpu_kms *kms, struct dentry *entry); + #endif /*_DPU_HW_SSPP_H */ diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c index 7e7a619769a8..de9efe6dcf7c 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c @@ -281,6 +281,7 @@ static int dpu_kms_debugfs_init(struct msm_kms *kms, struct drm_minor *minor) dpu_debugfs_danger_init(dpu_kms, entry); dpu_debugfs_vbif_init(dpu_kms, entry); dpu_debugfs_core_irq_init(dpu_kms, entry); + dpu_debugfs_sspp_init(dpu_kms, entry); for (i = 0; i < ARRAY_SIZE(priv->dp); i++) { if (priv->dp[i]) diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c index ef66af696a40..cc7a7eb84fdd 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c @@ -13,7 +13,6 @@ #include #include #include -#include #include #include "msm_drv.h" @@ -1356,78 +1355,22 @@ void dpu_plane_danger_signal_ctrl(struct drm_plane *plane, bool enable) pm_runtime_put_sync(&dpu_kms->pdev->dev); } -static int _dpu_plane_init_debugfs(struct drm_plane *plane) +/* SSPP live inside dpu_plane private data only. Enumerate them here. */ +void dpu_debugfs_sspp_init(struct dpu_kms *dpu_kms, struct dentry *debugfs_root) { - struct dpu_plane *pdpu = to_dpu_plane(plane); - struct dpu_kms *kms = _dpu_plane_get_kms(plane); - const struct dpu_sspp_cfg *cfg = pdpu->pipe_hw->cap; - const struct dpu_sspp_sub_blks *sblk = cfg->sblk; - struct dentry *debugfs_root; - - /* create overall sub-directory for the pipe */ - debugfs_root = - debugfs_create_dir(plane->name, - plane->dev->primary->debugfs_root); - - /* don't error check these */ - debugfs_create_xul("features", 0600, - debugfs_root, (unsigned long *)&pdpu->pipe_hw->cap->features); - - /* add register dump support */ - dpu_debugfs_create_regset32("src_blk", 0400, - debugfs_root, - sblk->src_blk.base + cfg->base, - sblk->src_blk.len, - kms); - - if (cfg->features & BIT(DPU_SSPP_SCALER_QSEED3) || - cfg->features & BIT(DPU_SSPP_SCALER_QSEED3LITE) || - cfg->features & BIT(DPU_SSPP_SCALER_QSEED2) || - cfg->features & BIT(DPU_SSPP_SCALER_QSEED4)) - dpu_debugfs_create_regset32("scaler_blk", 0400, - debugfs_root, - sblk->scaler_blk.base + cfg->base, - sblk->scaler_blk.len, - kms); - - if (cfg->features & BIT(DPU_SSPP_CSC) || - cfg->features & BIT(DPU_SSPP_CSC_10BIT)) - dpu_debugfs_create_regset32("csc_blk", 0400, - debugfs_root, - sblk->csc_blk.base + cfg->base, - sblk->csc_blk.len, - kms); - - debugfs_create_u32("xin_id", - 0400, - debugfs_root, - (u32 *) &cfg->xin_id); - debugfs_create_u32("clk_ctrl", - 0400, - debugfs_root, - (u32 *) &cfg->clk_ctrl); - debugfs_create_x32("creq_vblank", - 0600, - debugfs_root, - (u32 *) &sblk->creq_vblank); - debugfs_create_x32("danger_vblank", - 0600, - debugfs_root, - (u32 *) &sblk->danger_vblank); + struct drm_plane *plane; + struct dentry *entry = debugfs_create_dir("sspp", debugfs_root); - return 0; -} -#else -static int _dpu_plane_init_debugfs(struct drm_plane *plane) -{ - return 0; -} -#endif + if (IS_ERR(entry)) + return; -static int dpu_plane_late_register(struct drm_plane *plane) -{ - return _dpu_plane_init_debugfs(plane); + drm_for_each_plane(plane, dpu_kms->dev) { + struct dpu_plane *pdpu = to_dpu_plane(plane); + + _dpu_hw_sspp_init_debugfs(pdpu->pipe_hw, dpu_kms, entry); + } } +#endif static bool dpu_plane_format_mod_supported(struct drm_plane *plane, uint32_t format, uint64_t modifier) @@ -1453,7 +1396,6 @@ static const struct drm_plane_funcs dpu_plane_funcs = { .reset = dpu_plane_reset, .atomic_duplicate_state = dpu_plane_duplicate_state, .atomic_destroy_state = dpu_plane_destroy_state, - .late_register = dpu_plane_late_register, .format_mod_supported = dpu_plane_format_mod_supported, };