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[174.21.75.75]) by smtp.gmail.com with ESMTPSA id pi17sm3721391pjb.34.2021.12.02.12.49.01 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 02 Dec 2021 12:49:01 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v2 01/15] target/m68k: Raise the TRAPn exception with the correct pc Date: Thu, 2 Dec 2021 12:48:46 -0800 Message-Id: <20211202204900.50973-2-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20211202204900.50973-1-richard.henderson@linaro.org> References: <20211202204900.50973-1-richard.henderson@linaro.org> MIME-Version: 1.0 X-Host-Lookup-Failed: Reverse DNS lookup failed for 2607:f8b0:4864:20::1032 (failed) Received-SPF: pass client-ip=2607:f8b0:4864:20::1032; envelope-from=richard.henderson@linaro.org; helo=mail-pj1-x1032.google.com X-Spam_score_int: -12 X-Spam_score: -1.3 X-Spam_bar: - X-Spam_report: (-1.3 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, PDS_HP_HELO_NORDNS=0.001, RCVD_IN_DNSWL_NONE=-0.0001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: laurent@vivier.eu Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Rather than adjust the PC in all of the consumers, raise the exception with the correct PC in the first place. Signed-off-by: Richard Henderson Reviewed-by: Laurent Vivier --- linux-user/m68k/cpu_loop.c | 1 - target/m68k/op_helper.c | 9 --------- target/m68k/translate.c | 2 +- 3 files changed, 1 insertion(+), 11 deletions(-) diff --git a/linux-user/m68k/cpu_loop.c b/linux-user/m68k/cpu_loop.c index 790bd558c3..287f24cc60 100644 --- a/linux-user/m68k/cpu_loop.c +++ b/linux-user/m68k/cpu_loop.c @@ -70,7 +70,6 @@ void cpu_loop(CPUM68KState *env) { abi_long ret; n = env->dregs[0]; - env->pc += 2; ret = do_syscall(env, n, env->dregs[1], diff --git a/target/m68k/op_helper.c b/target/m68k/op_helper.c index cfbc987ba6..36662de149 100644 --- a/target/m68k/op_helper.c +++ b/target/m68k/op_helper.c @@ -216,11 +216,6 @@ static void cf_interrupt_all(CPUM68KState *env, int is_hw) cpu_loop_exit(cs); return; } - if (cs->exception_index >= EXCP_TRAP0 - && cs->exception_index <= EXCP_TRAP15) { - /* Move the PC after the trap instruction. */ - retaddr += 2; - } } vector = cs->exception_index << 2; @@ -303,10 +298,6 @@ static void m68k_interrupt_all(CPUM68KState *env, int is_hw) /* Return from an exception. */ m68k_rte(env); return; - case EXCP_TRAP0 ... EXCP_TRAP15: - /* Move the PC after the trap instruction. */ - retaddr += 2; - break; } } diff --git a/target/m68k/translate.c b/target/m68k/translate.c index af43c8eab8..af3febdd48 100644 --- a/target/m68k/translate.c +++ b/target/m68k/translate.c @@ -4860,7 +4860,7 @@ DISAS_INSN(wdebug) DISAS_INSN(trap) { - gen_exception(s, s->base.pc_next, EXCP_TRAP0 + (insn & 0xf)); + gen_exception(s, s->pc, EXCP_TRAP0 + (insn & 0xf)); } static void gen_load_fcr(DisasContext *s, TCGv res, int reg) From patchwork Thu Dec 2 20:48:47 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 519762 Delivered-To: patch@linaro.org Received: by 2002:a05:6e04:2287:0:0:0:0 with SMTP id bl7csp1170266imb; Thu, 2 Dec 2021 12:55:34 -0800 (PST) X-Google-Smtp-Source: ABdhPJzsJ4yCjMkxNnJjPk8RyIyNNtnwoS4yQgfI2TR78SNnc/mkiSuL67DeKzJzsTgYJGHDJq3R X-Received: by 2002:a25:45c4:: with SMTP id s187mr17098791yba.440.1638478534102; Thu, 02 Dec 2021 12:55:34 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1638478534; cv=none; d=google.com; s=arc-20160816; b=rs+l1YwPbQXFpb4ohBKyWxfZzkh3enU3oAQ1w0lniepleNtgktEfNseiRqCg0uSsQ3 BKFBT+6eB1kLVisV7MJ1bibUFah9GdMYMFcmO9SjK3oSiINeOJptJauZHQSYI+fkD5lq DoRe2AJ7rMd4gzrRjgwlnUcUE25sihViSW/mVB4aKrdj3ZP5DCRLpS+pzxMpYr7X1yH1 RZGktLTj0+bLMws/l77JDIvPnATUUfYIJ1fy0604ZWXjf+5fLFm1pImZ1SeRVFtH7uuY QihIPn4tzqMnZP/+qNZaIll+5r1v+kPsDzDiHty4TuyKt39OdDdsk4I8S+UBtcMZrbjd L4oQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=4CLF5Cf10tY7ttRY0ouAmhAHzRXoDrzVwZM6NDHKcnI=; b=Mc+ZBq3wnjIoViHY0x8XOWBnX1PyrJqL66lzOUme6olvf9/ylXKV3nVOXeOBFAJyg4 eoLxnMfietrdb3ygQiNlvaRlntvI24JnL9+6uB2KiXu1/MFMp2u32WoMkWsyzQr5ax67 qYYVGoYbCkh01sZbtUtrJ2rfgqV52PLbVVmcZR9VrrsGyeJl0Sms8Ipkn23gyqmBK+D/ VKYsUH62bNO/Yy/Fpyv5HAKfmHiEdLZgMwsEm02qhIwQvvacqa4IPKK5Zyf4VQ/C2NAH ZYKS/3Z4OiYIdlxdn8bSLAZLCGs8i+fv30lQ0Exv6ovkfwFIlf0mNH5CDcB2N/Z/Q9Ck ZBUw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=ay1ku5Wa; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[174.21.75.75]) by smtp.gmail.com with ESMTPSA id pi17sm3721391pjb.34.2021.12.02.12.49.02 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 02 Dec 2021 12:49:02 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v2 02/15] target/m68k: Switch over exception type in m68k_interrupt_all Date: Thu, 2 Dec 2021 12:48:47 -0800 Message-Id: <20211202204900.50973-3-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20211202204900.50973-1-richard.henderson@linaro.org> References: <20211202204900.50973-1-richard.henderson@linaro.org> MIME-Version: 1.0 X-Host-Lookup-Failed: Reverse DNS lookup failed for 2607:f8b0:4864:20::434 (failed) Received-SPF: pass client-ip=2607:f8b0:4864:20::434; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x434.google.com X-Spam_score_int: -12 X-Spam_score: -1.3 X-Spam_bar: - X-Spam_report: (-1.3 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, PDS_HP_HELO_NORDNS=0.001, RCVD_IN_DNSWL_NONE=-0.0001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: laurent@vivier.eu Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Replace an if ladder with a switch for clarity. Signed-off-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Laurent Vivier --- target/m68k/op_helper.c | 45 +++++++++++++++++++++++++---------------- 1 file changed, 28 insertions(+), 17 deletions(-) diff --git a/target/m68k/op_helper.c b/target/m68k/op_helper.c index 36662de149..71176eb3d8 100644 --- a/target/m68k/op_helper.c +++ b/target/m68k/op_helper.c @@ -332,7 +332,8 @@ static void m68k_interrupt_all(CPUM68KState *env, int is_hw) sp &= ~1; } - if (cs->exception_index == EXCP_ACCESS) { + switch (cs->exception_index) { + case EXCP_ACCESS: if (env->mmu.fault) { cpu_abort(cs, "DOUBLE MMU FAULT\n"); } @@ -390,26 +391,36 @@ static void m68k_interrupt_all(CPUM68KState *env, int is_hw) "ssw: %08x ea: %08x sfc: %d dfc: %d\n", env->mmu.ssw, env->mmu.ar, env->sfc, env->dfc); } - } else if (cs->exception_index == EXCP_ADDRESS) { + break; + + case EXCP_ADDRESS: do_stack_frame(env, &sp, 2, oldsr, 0, retaddr); - } else if (cs->exception_index == EXCP_ILLEGAL || - cs->exception_index == EXCP_DIV0 || - cs->exception_index == EXCP_CHK || - cs->exception_index == EXCP_TRAPCC || - cs->exception_index == EXCP_TRACE) { + break; + + case EXCP_ILLEGAL: + case EXCP_DIV0: + case EXCP_CHK: + case EXCP_TRAPCC: + case EXCP_TRACE: /* FIXME: addr is not only env->pc */ do_stack_frame(env, &sp, 2, oldsr, env->pc, retaddr); - } else if (is_hw && oldsr & SR_M && - cs->exception_index >= EXCP_SPURIOUS && - cs->exception_index <= EXCP_INT_LEVEL_7) { - do_stack_frame(env, &sp, 0, oldsr, 0, retaddr); - oldsr = sr; - env->aregs[7] = sp; - cpu_m68k_set_sr(env, sr &= ~SR_M); - sp = env->aregs[7] & ~1; - do_stack_frame(env, &sp, 1, oldsr, 0, retaddr); - } else { + break; + + case EXCP_SPURIOUS ... EXCP_INT_LEVEL_7: + if (is_hw && oldsr & SR_M) { + do_stack_frame(env, &sp, 0, oldsr, 0, retaddr); + oldsr = sr; + env->aregs[7] = sp; + cpu_m68k_set_sr(env, sr &= ~SR_M); + sp = env->aregs[7] & ~1; + do_stack_frame(env, &sp, 1, oldsr, 0, retaddr); + break; + } + /* fall through */ + + default: do_stack_frame(env, &sp, 0, oldsr, 0, retaddr); + break; } env->aregs[7] = sp; From patchwork Thu Dec 2 20:48:48 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 519763 Delivered-To: patch@linaro.org Received: by 2002:a05:6e04:2287:0:0:0:0 with SMTP id bl7csp1170478imb; Thu, 2 Dec 2021 12:55:48 -0800 (PST) X-Google-Smtp-Source: ABdhPJweP85zKp5Q5dUU1FJ72fEVAWG9Bjqtg4nFWLaRS6Cv1kgD3UUkjqMCbJcZ4VFeZDufBnm3 X-Received: by 2002:a05:6122:16a1:: with SMTP id 33mr18718831vkl.5.1638478547897; Thu, 02 Dec 2021 12:55:47 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1638478547; cv=none; d=google.com; s=arc-20160816; b=BmZ5/PMp8apT42um9yc+O3OK7tG9Jj76Va1fLDq65/O1bIrSojDQEecSbrQErTSXup RtuM3YNkFyXqp4BJcyHW7sVmAmrMk4lGSBS06fs5jt3l8r9IpxZBitEZukHcbIAmx1WR zjI8xKEGDUUGAjGq+q8+G3Qm5ht5bd8XvbsWNfbC7+IumEd5dzwo4pKVduvXVUAloF24 hpFC1N6TqwIHgEJjy6wY6LiJ8x82nWqQYyy3S82/7SLH1ePZhJ5W1ga/Ab2SWDgBTe4L ItTW2lU4Gnbl2xPANflQ+NTo9YeALZj15R5C0CQP2rd9Mhmpw/xtS12VEtY31sWi1Z7w V3Sg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=NxDiG73tsDFhm6pQN7GiRjJDURihgWL49OscOC2ndm4=; b=T+z7WhB2X0dHlIVfeKLYi+QabeXs/fZPotrmduscqHH+mupudYLdQwuYO6SDQ7FzsW l9cqavQ/N46wpBZ51B9b5bRr3N2mlMp5YxMfuJmkbzFMQIZ07p3ks/2jRqnRuoDQGu2E clicdPOQtSbsH1Iv+503li9pa99RqclIL0zM1BoU3WrXTOYwV1/1bHXtLmYMC9ySEv0i eWx+rAEuH5VGVnt0K16sTHxPOrHhPrdL+gbQbSsqVLPKRlICjuN/PwjFf7Jw1xs4R8N4 oS3Qtmz6WDJ9RbnxOH7ou2WM6MBLH3qlDKW1fzk23KkDhYiRIwejXAb+6qQkZX6hSmVY +ZrA== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=T+o6OIOF; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[174.21.75.75]) by smtp.gmail.com with ESMTPSA id pi17sm3721391pjb.34.2021.12.02.12.49.03 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 02 Dec 2021 12:49:03 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v2 03/15] linux-user/m68k: Use force_sig_fault Date: Thu, 2 Dec 2021 12:48:48 -0800 Message-Id: <20211202204900.50973-4-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20211202204900.50973-1-richard.henderson@linaro.org> References: <20211202204900.50973-1-richard.henderson@linaro.org> MIME-Version: 1.0 X-Host-Lookup-Failed: Reverse DNS lookup failed for 2607:f8b0:4864:20::235 (failed) Received-SPF: pass client-ip=2607:f8b0:4864:20::235; envelope-from=richard.henderson@linaro.org; helo=mail-oi1-x235.google.com X-Spam_score_int: -12 X-Spam_score: -1.3 X-Spam_bar: - X-Spam_report: (-1.3 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, PDS_HP_HELO_NORDNS=0.001, RCVD_IN_DNSWL_NONE=-0.0001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , laurent@vivier.eu Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Use the new function instead of setting up a target_siginfo_t and calling queue_signal. Fill in the missing PC for SIGTRAP. Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson --- linux-user/m68k/cpu_loop.c | 24 ++++-------------------- 1 file changed, 4 insertions(+), 20 deletions(-) diff --git a/linux-user/m68k/cpu_loop.c b/linux-user/m68k/cpu_loop.c index 287f24cc60..396f98bd6c 100644 --- a/linux-user/m68k/cpu_loop.c +++ b/linux-user/m68k/cpu_loop.c @@ -29,7 +29,6 @@ void cpu_loop(CPUM68KState *env) CPUState *cs = env_cpu(env); int trapnr; unsigned int n; - target_siginfo_t info; for(;;) { cpu_exec_start(cs); @@ -46,25 +45,13 @@ void cpu_loop(CPUM68KState *env) case EXCP_ILLEGAL: case EXCP_LINEA: case EXCP_LINEF: - info.si_signo = TARGET_SIGILL; - info.si_errno = 0; - info.si_code = TARGET_ILL_ILLOPN; - info._sifields._sigfault._addr = env->pc; - queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info); + force_sig_fault(TARGET_SIGILL, TARGET_ILL_ILLOPN, env->pc); break; case EXCP_CHK: - info.si_signo = TARGET_SIGFPE; - info.si_errno = 0; - info.si_code = TARGET_FPE_INTOVF; - info._sifields._sigfault._addr = env->pc; - queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info); + force_sig_fault(TARGET_SIGFPE, TARGET_FPE_INTOVF, env->pc); break; case EXCP_DIV0: - info.si_signo = TARGET_SIGFPE; - info.si_errno = 0; - info.si_code = TARGET_FPE_INTDIV; - info._sifields._sigfault._addr = env->pc; - queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info); + force_sig_fault(TARGET_SIGFPE, TARGET_FPE_INTDIV, env->pc); break; case EXCP_TRAP0: { @@ -90,10 +77,7 @@ void cpu_loop(CPUM68KState *env) /* just indicate that signals should be handled asap */ break; case EXCP_DEBUG: - info.si_signo = TARGET_SIGTRAP; - info.si_errno = 0; - info.si_code = TARGET_TRAP_BRKPT; - queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info); + force_sig_fault(TARGET_SIGTRAP, TARGET_TRAP_BRKPT, env->pc); break; case EXCP_ATOMIC: cpu_exec_step_atomic(cs); From patchwork Thu Dec 2 20:48:49 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 519754 Delivered-To: patch@linaro.org Received: by 2002:a05:6e04:2287:0:0:0:0 with SMTP id bl7csp1165806imb; Thu, 2 Dec 2021 12:50:31 -0800 (PST) X-Google-Smtp-Source: ABdhPJxi1DU1yQWUIowyr9l+sdDnmwqzfgNBSh2aVfZbmSkxWy6jV7JquZ8z0a+2lLRigvZAw01C X-Received: by 2002:a25:6b46:: with SMTP id o6mr17961255ybm.19.1638478231610; Thu, 02 Dec 2021 12:50:31 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1638478231; cv=none; d=google.com; s=arc-20160816; b=ZV1Jz/YuyyR81sEWMNJ4pOUXr7eHmpgW7LPT3hePS96K1+X3vGofsiAeufDI+VONWs NQoPYjBaygwRwn12vH3ltqx39QU3Y9A+GSWYDkm0Y7qfh2bSuujvGNFDyPg1SSQLvb5q 0ieRbMjUMZAscFfA7CuPoK21QGc6ORMnPuQ68qHzJWSSyR6XXKj3RMwzhW/1UmlFjCDh x3HRX20MRMDFpPDvVDWZmfjM2oYOj1BnqyFb9DjSNYUSxIRsLPUy3WArfZj4PDUwFG1h 7/KcomfjZyfK5h90Pgs6j7UbMV36vrUHoe3C+VB/tGcLmDKNDWB/KhHT+lXFvyRDsNqv hQtg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=0fNsQKzzBZbMkBXxBO24tuTvZHmRZOZnsAlV3uXSDeo=; b=pl+1+5n03DB8ByaEJnqSFMdNAMYLcoQzMjzV6kPznjpzq28bjIzU3mORXMaEBQjivf HBN3vvOAoCuSJyEUXw/wGW15L9KHmblocU1NaEcDQe9xUcf6ytc9MRz2iLTylYSuq6jQ MAlcQMeLFuRiCySnVIUX3IlXh1OLZTqyuay1oMMBMJbLuuQy/nlFyJrAYKhsNTh+QiGd lpIyyh2rndBB53RKpF+v5Qf3frAxu33FR2z0zwkSxEyoyhbqjkzyY+hM1AKLy/0CsBA3 7e1LR6mSqLJ0cIR5ZBHXqGRXpMtFm1kpHpV/8GlkXNMxjT2IV9Yy83XTDMJNUDa1cm5o 78Qw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=jBytbe8b; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[174.21.75.75]) by smtp.gmail.com with ESMTPSA id pi17sm3721391pjb.34.2021.12.02.12.49.04 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 02 Dec 2021 12:49:04 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v2 04/15] linux-user/m68k: Handle EXCP_TRAP1 through EXCP_TRAP15 Date: Thu, 2 Dec 2021 12:48:49 -0800 Message-Id: <20211202204900.50973-5-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20211202204900.50973-1-richard.henderson@linaro.org> References: <20211202204900.50973-1-richard.henderson@linaro.org> MIME-Version: 1.0 X-Host-Lookup-Failed: Reverse DNS lookup failed for 2607:f8b0:4864:20::52d (failed) Received-SPF: pass client-ip=2607:f8b0:4864:20::52d; envelope-from=richard.henderson@linaro.org; helo=mail-pg1-x52d.google.com X-Spam_score_int: -12 X-Spam_score: -1.3 X-Spam_bar: - X-Spam_report: (-1.3 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, PDS_HP_HELO_NORDNS=0.001, RCVD_IN_DNSWL_NONE=-0.0001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: laurent@vivier.eu Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" These are raised by guest instructions, and should not fall through into the default abort case. Signed-off-by: Richard Henderson --- linux-user/m68k/cpu_loop.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/linux-user/m68k/cpu_loop.c b/linux-user/m68k/cpu_loop.c index 396f98bd6c..0de11fb9bf 100644 --- a/linux-user/m68k/cpu_loop.c +++ b/linux-user/m68k/cpu_loop.c @@ -45,6 +45,7 @@ void cpu_loop(CPUM68KState *env) case EXCP_ILLEGAL: case EXCP_LINEA: case EXCP_LINEF: + case EXCP_TRAP0 + 1 ... EXCP_TRAP0 + 14: force_sig_fault(TARGET_SIGILL, TARGET_ILL_ILLOPN, env->pc); break; case EXCP_CHK: @@ -77,6 +78,7 @@ void cpu_loop(CPUM68KState *env) /* just indicate that signals should be handled asap */ break; case EXCP_DEBUG: + case EXCP_TRAP15: force_sig_fault(TARGET_SIGTRAP, TARGET_TRAP_BRKPT, env->pc); break; case EXCP_ATOMIC: From patchwork Thu Dec 2 20:48:50 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 519760 Delivered-To: patch@linaro.org Received: by 2002:a05:6e04:2287:0:0:0:0 with SMTP id bl7csp1168110imb; Thu, 2 Dec 2021 12:53:06 -0800 (PST) X-Google-Smtp-Source: ABdhPJxwHa4QBCL/9LTkM9BuhRz9Lo+Bk4+jTBMsdP1G2gF9OBskccfo7oev0SjieK3BkyaLCpMe X-Received: by 2002:a25:7402:: with SMTP id p2mr18229571ybc.619.1638478386150; Thu, 02 Dec 2021 12:53:06 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1638478386; cv=none; d=google.com; s=arc-20160816; b=CGWnnw3hwtOMagphlgwXdupmsnH8VJL/ktn7WLR2QmCGRAGy9MTiFvBGxMoDRUitxf 1Ivdqx1QFsMwLqRfj8m6e1CZwbRABSWjZzBaMeC5LiS/NyKWDvKuN2oHKSfqt+NFxvSD 9z3pNSsA7OEd4BJ5DTfO8PeqqjSkTR/kOIszUZQGUtNoySiuQxTZOFrxUguJUWMIF0bn XVz0ig9Fk3DCUrSuufXobug4BPofSMJ/Tq/1Hf6X4FG+G+s69xI/aCJHNkMdnjQwBJJI GrvBfZ+3FK3EAgNYGhjzA14Jq5qlURtdYAqh8PMxniROq696fkai83j/bfbAP2IGpp9H cTFA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=nMS++2dwv9z8ou0xgXRFjbkq4F7YRX5rhwWnAtj0BDE=; b=eaiKBg8AKX8UkIH/7jM6uB0GeKTRz9vhlyuhiWzZBA33IvKH2TFyyvjcXSu+rta68R 4CdimMbCrV6XdReYlyCyTuETC8vn495L3SmddSkp4ufcYtqEGiBaF5RwwU10vqrsTgjr M1lbems76yJNiy9aCABwlrCh76vbodwpNMoapX5a1R0Hsfw3ucNE8HE4dgl4Xm+xmYpu DtbtcEzRUZ8/fvCPMQdyUQXHGRyOveLt4dTiLh9C7HIbwq0yLyABvH1m4rCgUnxDFpZF 0ggj9unhWHCBp+BEZ61eEMZctOJYqOG+ILSI1hFk/MKZ9aL0y+d+q3E5oSqmFxx3Cp26 wiEg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=ddXykI0u; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[174.21.75.75]) by smtp.gmail.com with ESMTPSA id pi17sm3721391pjb.34.2021.12.02.12.49.04 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 02 Dec 2021 12:49:04 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v2 05/15] target/m68k: Remove retaddr in m68k_interrupt_all Date: Thu, 2 Dec 2021 12:48:50 -0800 Message-Id: <20211202204900.50973-6-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20211202204900.50973-1-richard.henderson@linaro.org> References: <20211202204900.50973-1-richard.henderson@linaro.org> MIME-Version: 1.0 X-Host-Lookup-Failed: Reverse DNS lookup failed for 2607:f8b0:4864:20::631 (failed) Received-SPF: pass client-ip=2607:f8b0:4864:20::631; envelope-from=richard.henderson@linaro.org; helo=mail-pl1-x631.google.com X-Spam_score_int: -12 X-Spam_score: -1.3 X-Spam_bar: - X-Spam_report: (-1.3 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, PDS_HP_HELO_NORDNS=0.001, RCVD_IN_DNSWL_NONE=-0.0001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: laurent@vivier.eu Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" The only value this variable holds is now env->pc. Signed-off-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Laurent Vivier --- target/m68k/op_helper.c | 15 ++++++--------- 1 file changed, 6 insertions(+), 9 deletions(-) diff --git a/target/m68k/op_helper.c b/target/m68k/op_helper.c index 71176eb3d8..afbbb8b4ca 100644 --- a/target/m68k/op_helper.c +++ b/target/m68k/op_helper.c @@ -286,12 +286,9 @@ static void m68k_interrupt_all(CPUM68KState *env, int is_hw) { CPUState *cs = env_cpu(env); uint32_t sp; - uint32_t retaddr; uint32_t vector; uint16_t sr, oldsr; - retaddr = env->pc; - if (!is_hw) { switch (cs->exception_index) { case EXCP_RTE: @@ -384,7 +381,7 @@ static void m68k_interrupt_all(CPUM68KState *env, int is_hw) sp -= 4; cpu_stl_mmuidx_ra(env, sp, env->mmu.ar, MMU_KERNEL_IDX, 0); - do_stack_frame(env, &sp, 7, oldsr, 0, retaddr); + do_stack_frame(env, &sp, 7, oldsr, 0, env->pc); env->mmu.fault = false; if (qemu_loglevel_mask(CPU_LOG_INT)) { qemu_log(" " @@ -394,7 +391,7 @@ static void m68k_interrupt_all(CPUM68KState *env, int is_hw) break; case EXCP_ADDRESS: - do_stack_frame(env, &sp, 2, oldsr, 0, retaddr); + do_stack_frame(env, &sp, 2, oldsr, 0, env->pc); break; case EXCP_ILLEGAL: @@ -403,23 +400,23 @@ static void m68k_interrupt_all(CPUM68KState *env, int is_hw) case EXCP_TRAPCC: case EXCP_TRACE: /* FIXME: addr is not only env->pc */ - do_stack_frame(env, &sp, 2, oldsr, env->pc, retaddr); + do_stack_frame(env, &sp, 2, oldsr, env->pc, env->pc); break; case EXCP_SPURIOUS ... EXCP_INT_LEVEL_7: if (is_hw && oldsr & SR_M) { - do_stack_frame(env, &sp, 0, oldsr, 0, retaddr); + do_stack_frame(env, &sp, 0, oldsr, 0, env->pc); oldsr = sr; env->aregs[7] = sp; cpu_m68k_set_sr(env, sr &= ~SR_M); sp = env->aregs[7] & ~1; - do_stack_frame(env, &sp, 1, oldsr, 0, retaddr); + do_stack_frame(env, &sp, 1, oldsr, 0, env->pc); break; } /* fall through */ default: - do_stack_frame(env, &sp, 0, oldsr, 0, retaddr); + do_stack_frame(env, &sp, 0, oldsr, 0, env->pc); break; } From patchwork Thu Dec 2 20:48:51 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 519765 Delivered-To: patch@linaro.org Received: by 2002:a05:6e04:2287:0:0:0:0 with SMTP id bl7csp1172544imb; Thu, 2 Dec 2021 12:58:05 -0800 (PST) X-Google-Smtp-Source: ABdhPJyh3P+3LvIofrVQQ/68Fy4HJM1zjU8HPNQVI/h8XPtBgFfTCrynKfg4JALPNkn5IN0DEaGs X-Received: by 2002:a05:6214:1310:: with SMTP id a16mr15167272qvv.117.1638478685048; Thu, 02 Dec 2021 12:58:05 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1638478685; cv=none; d=google.com; s=arc-20160816; b=rroXnzAo/oLaAnLiahR+K4I6nu3ZzHoPMJEZYJvuhLF/WVxe/Np0XT8O/hTWcBWmAe HGgHQX7C1myYzKmz0yN6ikT/YJPRjrVzPGg6XpSA5Y8kHim4VAxsg20zvovRNnSHw4vf RxEedJ4NzG9SqNx1WFWVfGXsRqzyaT4QkCknUAym+AQ35kvtEkO05AG3GJd345ZQmBsa T5ZU7Lo6s/V01oq96PLSmazfCgC93sdyWNC2DgXRxdk0ItPBFEI83ALR7tVk/SEsofUv n7Y/C+p++Nw9NzR2N+YSOC45VGhUwUWlJwt0iK/PKvWZtEjY5Ec7/WBPWMFNc3dskm+M 6CYA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=QB8xOr28M/WUUK5DvBYDr+mSvzOkIVVCrLOmzfGyBww=; b=BSr+OTBbTjReVTQ6A+x0Oj6uB7f/9R2ihNUHQMMIPrHuPpFv5GQZ3Wc9qTICR3X/Dg Arb66hai26fDahSs5sjGdsq6kwAKpvOpTHBSaT0wUfhGtJHHyN5hDc/1iILtgt+ML7tG QypOcZ69U8Smz4gcuWpwz7wy6x3xGwPy5CJYdVh2fo71Iyr4luVmpbO4JnGmGBTD41tx t0qxeZIxKgDngyycz6kpVOmQkXX9tJK0HlsoS9jOlNFULXSjsYeqDInCL5ruGDfk+kCG ytuhQk3NrXf4rwzBOQJT2tRMXCMAqWX0e+Hlgosk7dQdoLp0vniAtGIMgnBGVcqATsnn 16sA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=aTCwxLeS; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[174.21.75.75]) by smtp.gmail.com with ESMTPSA id pi17sm3721391pjb.34.2021.12.02.12.49.05 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 02 Dec 2021 12:49:05 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v2 06/15] target/m68k: Fix address argument for EXCP_CHK Date: Thu, 2 Dec 2021 12:48:51 -0800 Message-Id: <20211202204900.50973-7-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20211202204900.50973-1-richard.henderson@linaro.org> References: <20211202204900.50973-1-richard.henderson@linaro.org> MIME-Version: 1.0 X-Host-Lookup-Failed: Reverse DNS lookup failed for 2607:f8b0:4864:20::430 (failed) Received-SPF: pass client-ip=2607:f8b0:4864:20::430; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x430.google.com X-Spam_score_int: -12 X-Spam_score: -1.3 X-Spam_bar: - X-Spam_report: (-1.3 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, PDS_HP_HELO_NORDNS=0.001, RCVD_IN_DNSWL_NONE=-0.0001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: laurent@vivier.eu Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" According to the M68040 Users Manual, section 8.4.3, Six word stack frame (format 2), CHK, CHK2 (and others) are supposed to record the next insn in PC and the address of the trapping instruction in ADDRESS. Create a raise_exception_format2 function to centralize recording of the trapping pc in mmu.ar, plus advancing to the next insn. Update m68k_interrupt_all to pass mmu.ar to do_stack_frame. Update cpu_loop to pass mmu.ar to siginfo.si_addr, as the kernel does in trap_c(). Signed-off-by: Richard Henderson Reviewed-by: Laurent Vivier --- linux-user/m68k/cpu_loop.c | 2 +- target/m68k/op_helper.c | 54 ++++++++++++++++++++------------------ 2 files changed, 30 insertions(+), 26 deletions(-) diff --git a/linux-user/m68k/cpu_loop.c b/linux-user/m68k/cpu_loop.c index 0de11fb9bf..82b100aa87 100644 --- a/linux-user/m68k/cpu_loop.c +++ b/linux-user/m68k/cpu_loop.c @@ -49,7 +49,7 @@ void cpu_loop(CPUM68KState *env) force_sig_fault(TARGET_SIGILL, TARGET_ILL_ILLOPN, env->pc); break; case EXCP_CHK: - force_sig_fault(TARGET_SIGFPE, TARGET_FPE_INTOVF, env->pc); + force_sig_fault(TARGET_SIGFPE, TARGET_FPE_INTOVF, env->mmu.ar); break; case EXCP_DIV0: force_sig_fault(TARGET_SIGFPE, TARGET_FPE_INTDIV, env->pc); diff --git a/target/m68k/op_helper.c b/target/m68k/op_helper.c index afbbb8b4ca..b549eb077c 100644 --- a/target/m68k/op_helper.c +++ b/target/m68k/op_helper.c @@ -396,13 +396,16 @@ static void m68k_interrupt_all(CPUM68KState *env, int is_hw) case EXCP_ILLEGAL: case EXCP_DIV0: - case EXCP_CHK: case EXCP_TRAPCC: case EXCP_TRACE: /* FIXME: addr is not only env->pc */ do_stack_frame(env, &sp, 2, oldsr, env->pc, env->pc); break; + case EXCP_CHK: + do_stack_frame(env, &sp, 2, oldsr, env->mmu.ar, env->pc); + break; + case EXCP_SPURIOUS ... EXCP_INT_LEVEL_7: if (is_hw && oldsr & SR_M) { do_stack_frame(env, &sp, 0, oldsr, 0, env->pc); @@ -544,6 +547,29 @@ void HELPER(raise_exception)(CPUM68KState *env, uint32_t tt) raise_exception(env, tt); } +static void QEMU_NORETURN +raise_exception_format2(CPUM68KState *env, int tt, int ilen, uintptr_t raddr) +{ + CPUState *cs = env_cpu(env); + + cs->exception_index = tt; + + /* Recover PC and CC_OP for the beginning of the insn. */ + cpu_restore_state(cs, raddr, true); + + /* Flags are current in env->cc_*, or are undefined. */ + env->cc_op = CC_OP_FLAGS; + + /* + * Remember original pc in mmu.ar, for the Format 2 stack frame. + * Adjust PC to end of the insn. + */ + env->mmu.ar = env->pc; + env->pc += ilen; + + cpu_loop_exit(cs); +} + void HELPER(divuw)(CPUM68KState *env, int destr, uint32_t den) { uint32_t num = env->dregs[destr]; @@ -1061,18 +1087,7 @@ void HELPER(chk)(CPUM68KState *env, int32_t val, int32_t ub) env->cc_c = 0 <= ub ? val < 0 || val > ub : val > ub && val < 0; if (val < 0 || val > ub) { - CPUState *cs = env_cpu(env); - - /* Recover PC and CC_OP for the beginning of the insn. */ - cpu_restore_state(cs, GETPC(), true); - - /* flags have been modified by gen_flush_flags() */ - env->cc_op = CC_OP_FLAGS; - /* Adjust PC to end of the insn. */ - env->pc += 2; - - cs->exception_index = EXCP_CHK; - cpu_loop_exit(cs); + raise_exception_format2(env, EXCP_CHK, 2, GETPC()); } } @@ -1093,17 +1108,6 @@ void HELPER(chk2)(CPUM68KState *env, int32_t val, int32_t lb, int32_t ub) env->cc_c = lb <= ub ? val < lb || val > ub : val > ub && val < lb; if (env->cc_c) { - CPUState *cs = env_cpu(env); - - /* Recover PC and CC_OP for the beginning of the insn. */ - cpu_restore_state(cs, GETPC(), true); - - /* flags have been modified by gen_flush_flags() */ - env->cc_op = CC_OP_FLAGS; - /* Adjust PC to end of the insn. */ - env->pc += 4; - - cs->exception_index = EXCP_CHK; - cpu_loop_exit(cs); + raise_exception_format2(env, EXCP_CHK, 4, GETPC()); } } From patchwork Thu Dec 2 20:48:52 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 519757 Delivered-To: patch@linaro.org Received: by 2002:a05:6e04:2287:0:0:0:0 with SMTP id bl7csp1165906imb; Thu, 2 Dec 2021 12:50:37 -0800 (PST) X-Google-Smtp-Source: ABdhPJzRIpwNwJH84GsHckupiEauYJ81M37phoDnzhKm8gTg9apvj1B9RCtfWUhaFpKPEYCN6xFQ X-Received: by 2002:a25:d013:: with SMTP id h19mr14724939ybg.428.1638478236979; Thu, 02 Dec 2021 12:50:36 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1638478236; cv=none; d=google.com; s=arc-20160816; b=iAJM9nHGlg4kYNsV8ZWiE1fNrDt6s6ZTFKzTw6TeR0Iuh3q1m3+xZCPsKw0cKlA9Xv iNPUOrbloIr0u8h5nujQeCvDa+kJBb2S+6/98/ywGNZhTvnuDTbkDGNTvSFX7ey+zxmm EwSeBrJtle96uWKk15ET8Em+I0Cx85Sy5DnSO1NGnaAw10hDXokgROv/UqO0b7WZmE9V +EX09BC7c1rBTokryyIMpcVhiA+5VpE1Fu0cKdAZiPcGWd+v8SkVUHhQOYqKuPWUPZjO KkO04yMwXwOq8IsYMOYFRdeKp+mb8st54Pk43TrEDOfTPzoRGyrlJ29b18oN+SbMKkRi Q/wA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=0njpWOef/yhW+JaBuuR7Z57bvezWQP6HLTeHax2kXiY=; b=WoNrFfpyj2jsY1PlsworfWHrGiGkgkpNOKnWVhTtztDLI5rurEpWDkHOG63QaDbVn/ HLrXjpcAtOpktLpcPrB/qwfppKgBCfNUNumGUK7RNpC6or6Hotfg69CXmr/4GfqH+JO6 vXZadmOYDguieitbMK78m8xIaJRgycAD70QrK2F61vOI0e+XiqWyqMhW4FSWOLYrFYjR dR82FghTGO6TpU3tOAQAJOb7GoRs2iBhTZxVxbWAiXr0CI585H0XK3TqCIQS8ks4X/UE UGvOvcQDuwzW84TSD5aqpPgMJN4vz9wl0os4Jg3qOMiaiJ0IoZ07IOFB6mJWXzT2zhqW RpIA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=BZChWBu8; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[174.21.75.75]) by smtp.gmail.com with ESMTPSA id pi17sm3721391pjb.34.2021.12.02.12.49.06 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 02 Dec 2021 12:49:06 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v2 07/15] target/m68k: Fix pc, c flag, and address argument for EXCP_DIV0 Date: Thu, 2 Dec 2021 12:48:52 -0800 Message-Id: <20211202204900.50973-8-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20211202204900.50973-1-richard.henderson@linaro.org> References: <20211202204900.50973-1-richard.henderson@linaro.org> MIME-Version: 1.0 X-Host-Lookup-Failed: Reverse DNS lookup failed for 2607:f8b0:4864:20::52e (failed) Received-SPF: pass client-ip=2607:f8b0:4864:20::52e; envelope-from=richard.henderson@linaro.org; helo=mail-pg1-x52e.google.com X-Spam_score_int: -12 X-Spam_score: -1.3 X-Spam_bar: - X-Spam_report: (-1.3 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, PDS_HP_HELO_NORDNS=0.001, RCVD_IN_DNSWL_NONE=-0.0001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: laurent@vivier.eu Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" According to the M68040 Users Manual, section 8.4.3, Six word stack frame (format 2), Zero Div (and others) is supposed to record the next insn in PC and the address of the trapping instruction in ADDRESS. While the N, Z and V flags are documented to be undefine on DIV0, the C flag is documented as always cleared. Update helper_div* to take the instruction length as an argument and use raise_exception_format2. Hoist the reset of the C flag above the division by zero check. Update m68k_interrupt_all to pass mmu.ar to do_stack_frame. Update cpu_loop to pass mmu.ar to siginfo.si_addr, as the kernel does in trap_c(). Signed-off-by: Richard Henderson Reviewed-by: Laurent Vivier --- target/m68k/helper.h | 12 +++++----- linux-user/m68k/cpu_loop.c | 2 +- target/m68k/op_helper.c | 48 +++++++++++++++++++++++--------------- target/m68k/translate.c | 33 +++++++++++++------------- 4 files changed, 52 insertions(+), 43 deletions(-) diff --git a/target/m68k/helper.h b/target/m68k/helper.h index 9842eeaa95..813d180dd0 100644 --- a/target/m68k/helper.h +++ b/target/m68k/helper.h @@ -1,12 +1,12 @@ DEF_HELPER_1(bitrev, i32, i32) DEF_HELPER_1(ff1, i32, i32) DEF_HELPER_FLAGS_2(sats, TCG_CALL_NO_RWG_SE, i32, i32, i32) -DEF_HELPER_3(divuw, void, env, int, i32) -DEF_HELPER_3(divsw, void, env, int, s32) -DEF_HELPER_4(divul, void, env, int, int, i32) -DEF_HELPER_4(divsl, void, env, int, int, s32) -DEF_HELPER_4(divull, void, env, int, int, i32) -DEF_HELPER_4(divsll, void, env, int, int, s32) +DEF_HELPER_4(divuw, void, env, int, i32, int) +DEF_HELPER_4(divsw, void, env, int, s32, int) +DEF_HELPER_5(divul, void, env, int, int, i32, int) +DEF_HELPER_5(divsl, void, env, int, int, s32, int) +DEF_HELPER_5(divull, void, env, int, int, i32, int) +DEF_HELPER_5(divsll, void, env, int, int, s32, int) DEF_HELPER_2(set_sr, void, env, i32) DEF_HELPER_3(cf_movec_to, void, env, i32, i32) DEF_HELPER_3(m68k_movec_to, void, env, i32, i32) diff --git a/linux-user/m68k/cpu_loop.c b/linux-user/m68k/cpu_loop.c index 82b100aa87..267df05372 100644 --- a/linux-user/m68k/cpu_loop.c +++ b/linux-user/m68k/cpu_loop.c @@ -52,7 +52,7 @@ void cpu_loop(CPUM68KState *env) force_sig_fault(TARGET_SIGFPE, TARGET_FPE_INTOVF, env->mmu.ar); break; case EXCP_DIV0: - force_sig_fault(TARGET_SIGFPE, TARGET_FPE_INTDIV, env->pc); + force_sig_fault(TARGET_SIGFPE, TARGET_FPE_INTDIV, env->mmu.ar); break; case EXCP_TRAP0: { diff --git a/target/m68k/op_helper.c b/target/m68k/op_helper.c index b549eb077c..a6e4f5719f 100644 --- a/target/m68k/op_helper.c +++ b/target/m68k/op_helper.c @@ -395,7 +395,6 @@ static void m68k_interrupt_all(CPUM68KState *env, int is_hw) break; case EXCP_ILLEGAL: - case EXCP_DIV0: case EXCP_TRAPCC: case EXCP_TRACE: /* FIXME: addr is not only env->pc */ @@ -403,6 +402,7 @@ static void m68k_interrupt_all(CPUM68KState *env, int is_hw) break; case EXCP_CHK: + case EXCP_DIV0: do_stack_frame(env, &sp, 2, oldsr, env->mmu.ar, env->pc); break; @@ -570,18 +570,19 @@ raise_exception_format2(CPUM68KState *env, int tt, int ilen, uintptr_t raddr) cpu_loop_exit(cs); } -void HELPER(divuw)(CPUM68KState *env, int destr, uint32_t den) +void HELPER(divuw)(CPUM68KState *env, int destr, uint32_t den, int ilen) { uint32_t num = env->dregs[destr]; uint32_t quot, rem; + env->cc_c = 0; /* always cleared, even if div0 */ + if (den == 0) { - raise_exception_ra(env, EXCP_DIV0, GETPC()); + raise_exception_format2(env, EXCP_DIV0, ilen, GETPC()); } quot = num / den; rem = num % den; - env->cc_c = 0; /* always cleared, even if overflow */ if (quot > 0xffff) { env->cc_v = -1; /* @@ -597,18 +598,19 @@ void HELPER(divuw)(CPUM68KState *env, int destr, uint32_t den) env->cc_v = 0; } -void HELPER(divsw)(CPUM68KState *env, int destr, int32_t den) +void HELPER(divsw)(CPUM68KState *env, int destr, int32_t den, int ilen) { int32_t num = env->dregs[destr]; uint32_t quot, rem; + env->cc_c = 0; /* always cleared, even if overflow/div0 */ + if (den == 0) { - raise_exception_ra(env, EXCP_DIV0, GETPC()); + raise_exception_format2(env, EXCP_DIV0, ilen, GETPC()); } quot = num / den; rem = num % den; - env->cc_c = 0; /* always cleared, even if overflow */ if (quot != (int16_t)quot) { env->cc_v = -1; /* nothing else is modified */ @@ -625,18 +627,20 @@ void HELPER(divsw)(CPUM68KState *env, int destr, int32_t den) env->cc_v = 0; } -void HELPER(divul)(CPUM68KState *env, int numr, int regr, uint32_t den) +void HELPER(divul)(CPUM68KState *env, int numr, int regr, + uint32_t den, int ilen) { uint32_t num = env->dregs[numr]; uint32_t quot, rem; + env->cc_c = 0; /* always cleared, even if div0 */ + if (den == 0) { - raise_exception_ra(env, EXCP_DIV0, GETPC()); + raise_exception_format2(env, EXCP_DIV0, ilen, GETPC()); } quot = num / den; rem = num % den; - env->cc_c = 0; env->cc_z = quot; env->cc_n = quot; env->cc_v = 0; @@ -653,18 +657,20 @@ void HELPER(divul)(CPUM68KState *env, int numr, int regr, uint32_t den) } } -void HELPER(divsl)(CPUM68KState *env, int numr, int regr, int32_t den) +void HELPER(divsl)(CPUM68KState *env, int numr, int regr, + int32_t den, int ilen) { int32_t num = env->dregs[numr]; int32_t quot, rem; + env->cc_c = 0; /* always cleared, even if overflow/div0 */ + if (den == 0) { - raise_exception_ra(env, EXCP_DIV0, GETPC()); + raise_exception_format2(env, EXCP_DIV0, ilen, GETPC()); } quot = num / den; rem = num % den; - env->cc_c = 0; env->cc_z = quot; env->cc_n = quot; env->cc_v = 0; @@ -681,19 +687,21 @@ void HELPER(divsl)(CPUM68KState *env, int numr, int regr, int32_t den) } } -void HELPER(divull)(CPUM68KState *env, int numr, int regr, uint32_t den) +void HELPER(divull)(CPUM68KState *env, int numr, int regr, + uint32_t den, int ilen) { uint64_t num = deposit64(env->dregs[numr], 32, 32, env->dregs[regr]); uint64_t quot; uint32_t rem; + env->cc_c = 0; /* always cleared, even if overflow/div0 */ + if (den == 0) { - raise_exception_ra(env, EXCP_DIV0, GETPC()); + raise_exception_format2(env, EXCP_DIV0, ilen, GETPC()); } quot = num / den; rem = num % den; - env->cc_c = 0; /* always cleared, even if overflow */ if (quot > 0xffffffffULL) { env->cc_v = -1; /* @@ -716,19 +724,21 @@ void HELPER(divull)(CPUM68KState *env, int numr, int regr, uint32_t den) env->dregs[numr] = quot; } -void HELPER(divsll)(CPUM68KState *env, int numr, int regr, int32_t den) +void HELPER(divsll)(CPUM68KState *env, int numr, int regr, + int32_t den, int ilen) { int64_t num = deposit64(env->dregs[numr], 32, 32, env->dregs[regr]); int64_t quot; int32_t rem; + env->cc_c = 0; /* always cleared, even if overflow/div0 */ + if (den == 0) { - raise_exception_ra(env, EXCP_DIV0, GETPC()); + raise_exception_format2(env, EXCP_DIV0, ilen, GETPC()); } quot = num / den; rem = num % den; - env->cc_c = 0; /* always cleared, even if overflow */ if (quot != (int32_t)quot) { env->cc_v = -1; /* diff --git a/target/m68k/translate.c b/target/m68k/translate.c index af3febdd48..ae9f5a5222 100644 --- a/target/m68k/translate.c +++ b/target/m68k/translate.c @@ -1601,6 +1601,7 @@ DISAS_INSN(divw) int sign; TCGv src; TCGv destr; + TCGv ilen; /* divX.w ,Dn 32/16 -> 16r:16q */ @@ -1609,20 +1610,20 @@ DISAS_INSN(divw) /* dest.l / src.w */ SRC_EA(env, src, OS_WORD, sign, NULL); - destr = tcg_const_i32(REG(insn, 9)); + destr = tcg_constant_i32(REG(insn, 9)); + ilen = tcg_constant_i32(s->pc - s->base.pc_next); if (sign) { - gen_helper_divsw(cpu_env, destr, src); + gen_helper_divsw(cpu_env, destr, src, ilen); } else { - gen_helper_divuw(cpu_env, destr, src); + gen_helper_divuw(cpu_env, destr, src, ilen); } - tcg_temp_free(destr); set_cc_op(s, CC_OP_FLAGS); } DISAS_INSN(divl) { - TCGv num, reg, den; + TCGv num, reg, den, ilen; int sign; uint16_t ext; @@ -1639,15 +1640,14 @@ DISAS_INSN(divl) /* divX.l , Dr:Dq 64/32 -> 32r:32q */ SRC_EA(env, den, OS_LONG, 0, NULL); - num = tcg_const_i32(REG(ext, 12)); - reg = tcg_const_i32(REG(ext, 0)); + num = tcg_constant_i32(REG(ext, 12)); + reg = tcg_constant_i32(REG(ext, 0)); + ilen = tcg_constant_i32(s->pc - s->base.pc_next); if (sign) { - gen_helper_divsll(cpu_env, num, reg, den); + gen_helper_divsll(cpu_env, num, reg, den, ilen); } else { - gen_helper_divull(cpu_env, num, reg, den); + gen_helper_divull(cpu_env, num, reg, den, ilen); } - tcg_temp_free(reg); - tcg_temp_free(num); set_cc_op(s, CC_OP_FLAGS); return; } @@ -1656,15 +1656,14 @@ DISAS_INSN(divl) /* divXl.l , Dr:Dq 32/32 -> 32r:32q */ SRC_EA(env, den, OS_LONG, 0, NULL); - num = tcg_const_i32(REG(ext, 12)); - reg = tcg_const_i32(REG(ext, 0)); + num = tcg_constant_i32(REG(ext, 12)); + reg = tcg_constant_i32(REG(ext, 0)); + ilen = tcg_constant_i32(s->pc - s->base.pc_next); if (sign) { - gen_helper_divsl(cpu_env, num, reg, den); + gen_helper_divsl(cpu_env, num, reg, den, ilen); } else { - gen_helper_divul(cpu_env, num, reg, den); + gen_helper_divul(cpu_env, num, reg, den, ilen); } - tcg_temp_free(reg); - tcg_temp_free(num); set_cc_op(s, CC_OP_FLAGS); } From patchwork Thu Dec 2 20:48:53 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 519756 Delivered-To: patch@linaro.org Received: by 2002:a05:6e04:2287:0:0:0:0 with SMTP id bl7csp1165895imb; Thu, 2 Dec 2021 12:50:36 -0800 (PST) X-Google-Smtp-Source: ABdhPJwKUIY3yJcW+XTnxESsGccVXniZ9GdcDeVHBDBKxSSazb0LhGAz5ygBXPbkxoM5+ZHE2/7P X-Received: by 2002:a25:da10:: with SMTP id n16mr17665878ybf.24.1638478236246; Thu, 02 Dec 2021 12:50:36 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1638478236; cv=none; d=google.com; s=arc-20160816; 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[174.21.75.75]) by smtp.gmail.com with ESMTPSA id pi17sm3721391pjb.34.2021.12.02.12.49.07 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 02 Dec 2021 12:49:07 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v2 08/15] target/m68k: Fix address argument for EXCP_TRACE Date: Thu, 2 Dec 2021 12:48:53 -0800 Message-Id: <20211202204900.50973-9-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20211202204900.50973-1-richard.henderson@linaro.org> References: <20211202204900.50973-1-richard.henderson@linaro.org> MIME-Version: 1.0 X-Host-Lookup-Failed: Reverse DNS lookup failed for 2607:f8b0:4864:20::102a (failed) Received-SPF: pass client-ip=2607:f8b0:4864:20::102a; envelope-from=richard.henderson@linaro.org; helo=mail-pj1-x102a.google.com X-Spam_score_int: -12 X-Spam_score: -1.3 X-Spam_bar: - X-Spam_report: (-1.3 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, PDS_HP_HELO_NORDNS=0.001, RCVD_IN_DNSWL_NONE=-0.0001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: laurent@vivier.eu Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" According to the M68040 Users Manual, section 8.4.3, Six word stack frame (format 2), Trace (and others) is supposed to record the next insn in PC and the address of the trapping instruction in ADDRESS. Create gen_raise_exception_format2 to record the trapping pc in env->mmu.ar. Update m68k_interrupt_all to pass the value to do_stack_frame. Update cpu_loop to handle EXCP_TRACE. Signed-off-by: Richard Henderson --- linux-user/m68k/cpu_loop.c | 3 +++ target/m68k/op_helper.c | 2 +- target/m68k/translate.c | 27 ++++++++++++++++++--------- 3 files changed, 22 insertions(+), 10 deletions(-) diff --git a/linux-user/m68k/cpu_loop.c b/linux-user/m68k/cpu_loop.c index 267df05372..8e2b79550d 100644 --- a/linux-user/m68k/cpu_loop.c +++ b/linux-user/m68k/cpu_loop.c @@ -54,6 +54,9 @@ void cpu_loop(CPUM68KState *env) case EXCP_DIV0: force_sig_fault(TARGET_SIGFPE, TARGET_FPE_INTDIV, env->mmu.ar); break; + case EXCP_TRACE: + force_sig_fault(TARGET_SIGTRAP, TARGET_TRAP_TRACE, env->mmu.ar); + break; case EXCP_TRAP0: { abi_long ret; diff --git a/target/m68k/op_helper.c b/target/m68k/op_helper.c index a6e4f5719f..c9ea28bf68 100644 --- a/target/m68k/op_helper.c +++ b/target/m68k/op_helper.c @@ -396,13 +396,13 @@ static void m68k_interrupt_all(CPUM68KState *env, int is_hw) case EXCP_ILLEGAL: case EXCP_TRAPCC: - case EXCP_TRACE: /* FIXME: addr is not only env->pc */ do_stack_frame(env, &sp, 2, oldsr, env->pc, env->pc); break; case EXCP_CHK: case EXCP_DIV0: + case EXCP_TRACE: do_stack_frame(env, &sp, 2, oldsr, env->mmu.ar, env->pc); break; diff --git a/target/m68k/translate.c b/target/m68k/translate.c index ae9f5a5222..fc2b6a3085 100644 --- a/target/m68k/translate.c +++ b/target/m68k/translate.c @@ -298,6 +298,20 @@ static void gen_raise_exception(int nr) tcg_temp_free_i32(tmp); } +static void gen_raise_exception_format2(DisasContext *s, int nr) +{ + /* + * Pass the address of the insn to the exception handler, + * for recording in the Format $2 (6-word) stack frame. + * Re-use mmu.ar for the purpose, since that's only valid + * after tlb_fill. + */ + tcg_gen_st_i32(tcg_constant_i32(s->base.pc_next), cpu_env, + offsetof(CPUM68KState, mmu.ar)); + gen_raise_exception(nr); + s->base.is_jmp = DISAS_NORETURN; +} + static void gen_exception(DisasContext *s, uint32_t dest, int nr) { update_cc_op(s); @@ -1499,7 +1513,7 @@ static void gen_jmp_tb(DisasContext *s, int n, uint32_t dest) if (unlikely(s->ss_active)) { update_cc_op(s); tcg_gen_movi_i32(QREG_PC, dest); - gen_raise_exception(EXCP_TRACE); + gen_raise_exception_format2(s, EXCP_TRACE); } else if (translator_use_goto_tb(&s->base, dest)) { tcg_gen_goto_tb(n); tcg_gen_movi_i32(QREG_PC, dest); @@ -6225,17 +6239,12 @@ static void m68k_tr_tb_stop(DisasContextBase *dcbase, CPUState *cpu) break; case DISAS_TOO_MANY: update_cc_op(dc); - if (dc->ss_active) { - tcg_gen_movi_i32(QREG_PC, dc->pc); - gen_raise_exception(EXCP_TRACE); - } else { - gen_jmp_tb(dc, 0, dc->pc); - } + gen_jmp_tb(dc, 0, dc->pc); break; case DISAS_JUMP: /* We updated CC_OP and PC in gen_jmp/gen_jmp_im. */ if (dc->ss_active) { - gen_raise_exception(EXCP_TRACE); + gen_raise_exception_format2(dc, EXCP_TRACE); } else { tcg_gen_lookup_and_goto_ptr(); } @@ -6246,7 +6255,7 @@ static void m68k_tr_tb_stop(DisasContextBase *dcbase, CPUState *cpu) * other state that may require returning to the main loop. */ if (dc->ss_active) { - gen_raise_exception(EXCP_TRACE); + gen_raise_exception_format2(dc, EXCP_TRACE); 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[174.21.75.75]) by smtp.gmail.com with ESMTPSA id pi17sm3721391pjb.34.2021.12.02.12.49.07 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 02 Dec 2021 12:49:07 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v2 09/15] target/m68k: Implement TRAPcc Date: Thu, 2 Dec 2021 12:48:54 -0800 Message-Id: <20211202204900.50973-10-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20211202204900.50973-1-richard.henderson@linaro.org> References: <20211202204900.50973-1-richard.henderson@linaro.org> MIME-Version: 1.0 X-Host-Lookup-Failed: Reverse DNS lookup failed for 2607:f8b0:4864:20::433 (failed) Received-SPF: pass client-ip=2607:f8b0:4864:20::433; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x433.google.com X-Spam_score_int: -12 X-Spam_score: -1.3 X-Spam_bar: - X-Spam_report: (-1.3 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, PDS_HP_HELO_NORDNS=0.001, RCVD_IN_DNSWL_NONE=-0.0001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: laurent@vivier.eu Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Signed-off-by: Richard Henderson --- target/m68k/cpu.h | 2 ++ linux-user/m68k/cpu_loop.c | 1 + target/m68k/cpu.c | 1 + target/m68k/op_helper.c | 2 +- target/m68k/translate.c | 41 ++++++++++++++++++++++++++++++++++++++ 5 files changed, 46 insertions(+), 1 deletion(-) diff --git a/target/m68k/cpu.h b/target/m68k/cpu.h index a3423729ef..14e130f400 100644 --- a/target/m68k/cpu.h +++ b/target/m68k/cpu.h @@ -527,6 +527,8 @@ enum m68k_features { M68K_FEATURE_MOVEC, /* Unaligned data accesses (680[2346]0) */ M68K_FEATURE_UNALIGNED_DATA, + /* TRAPcc insn. (680[2346]0, and CPU32) */ + M68K_FEATURE_TRAPCC, }; static inline int m68k_feature(CPUM68KState *env, int feature) diff --git a/linux-user/m68k/cpu_loop.c b/linux-user/m68k/cpu_loop.c index 8e2b79550d..ed366d1645 100644 --- a/linux-user/m68k/cpu_loop.c +++ b/linux-user/m68k/cpu_loop.c @@ -49,6 +49,7 @@ void cpu_loop(CPUM68KState *env) force_sig_fault(TARGET_SIGILL, TARGET_ILL_ILLOPN, env->pc); break; case EXCP_CHK: + case EXCP_TRAPCC: force_sig_fault(TARGET_SIGFPE, TARGET_FPE_INTOVF, env->mmu.ar); break; case EXCP_DIV0: diff --git a/target/m68k/cpu.c b/target/m68k/cpu.c index c7aeb7da9c..5f778773d1 100644 --- a/target/m68k/cpu.c +++ b/target/m68k/cpu.c @@ -162,6 +162,7 @@ static void m68020_cpu_initfn(Object *obj) m68k_set_feature(env, M68K_FEATURE_CHK2); m68k_set_feature(env, M68K_FEATURE_MSP); m68k_set_feature(env, M68K_FEATURE_UNALIGNED_DATA); + m68k_set_feature(env, M68K_FEATURE_TRAPCC); } /* diff --git a/target/m68k/op_helper.c b/target/m68k/op_helper.c index c9ea28bf68..811b8bd117 100644 --- a/target/m68k/op_helper.c +++ b/target/m68k/op_helper.c @@ -395,7 +395,6 @@ static void m68k_interrupt_all(CPUM68KState *env, int is_hw) break; case EXCP_ILLEGAL: - case EXCP_TRAPCC: /* FIXME: addr is not only env->pc */ do_stack_frame(env, &sp, 2, oldsr, env->pc, env->pc); break; @@ -403,6 +402,7 @@ static void m68k_interrupt_all(CPUM68KState *env, int is_hw) case EXCP_CHK: case EXCP_DIV0: case EXCP_TRACE: + case EXCP_TRAPCC: do_stack_frame(env, &sp, 2, oldsr, env->mmu.ar, env->pc); break; diff --git a/target/m68k/translate.c b/target/m68k/translate.c index fc2b6a3085..e5338b50ad 100644 --- a/target/m68k/translate.c +++ b/target/m68k/translate.c @@ -4876,6 +4876,46 @@ DISAS_INSN(trap) gen_exception(s, s->pc, EXCP_TRAP0 + (insn & 0xf)); } +static void do_trapcc(DisasContext *s, DisasCompare *c) +{ + TCGLabel *over = gen_new_label(); + + /* Jump over if !c. */ + update_cc_op(s); + tcg_gen_brcond_i32(tcg_invert_cond(c->tcond), c->v1, c->v2, over); + free_cond(c); + + tcg_gen_movi_i32(QREG_PC, s->pc); + gen_raise_exception_format2(s, EXCP_TRAPCC); + + gen_set_label(over); + s->base.is_jmp = DISAS_NEXT; +} + +DISAS_INSN(trapcc) +{ + DisasCompare c; + + /* Consume and discard the immediate operand. */ + switch (extract32(insn, 0, 3)) { + case 2: /* trapcc.w */ + (void)read_im16(env, s); + break; + case 3: /* trapcc.l */ + (void)read_im32(env, s); + break; + case 4: /* trapcc (no operand) */ + break; + default: + /* Illegal insn */ + disas_undef(env, s, insn); + return; + } + + gen_cc_cond(&c, s, extract32(insn, 8, 4)); + do_trapcc(s, &c); +} + static void gen_load_fcr(DisasContext *s, TCGv res, int reg) { switch (reg) { @@ -6047,6 +6087,7 @@ void register_m68k_insns (CPUM68KState *env) INSN(scc, 50c0, f0f8, CF_ISA_A); /* Scc.B Dx */ INSN(scc, 50c0, f0c0, M68000); /* Scc.B */ INSN(dbcc, 50c8, f0f8, M68000); + INSN(trapcc, 50f8, f0f8, TRAPCC); INSN(tpf, 51f8, fff8, CF_ISA_A); /* Branch instructions. */ From patchwork Thu Dec 2 20:48:55 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 519761 Delivered-To: patch@linaro.org Received: by 2002:a05:6e04:2287:0:0:0:0 with SMTP id bl7csp1169544imb; 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[174.21.75.75]) by smtp.gmail.com with ESMTPSA id pi17sm3721391pjb.34.2021.12.02.12.49.08 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 02 Dec 2021 12:49:08 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v2 10/15] target/m68k: Implement TRAPV Date: Thu, 2 Dec 2021 12:48:55 -0800 Message-Id: <20211202204900.50973-11-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20211202204900.50973-1-richard.henderson@linaro.org> References: <20211202204900.50973-1-richard.henderson@linaro.org> MIME-Version: 1.0 X-Host-Lookup-Failed: Reverse DNS lookup failed for 2607:f8b0:4864:20::435 (failed) Received-SPF: pass client-ip=2607:f8b0:4864:20::435; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x435.google.com X-Spam_score_int: -12 X-Spam_score: -1.3 X-Spam_bar: - X-Spam_report: (-1.3 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, PDS_HP_HELO_NORDNS=0.001, RCVD_IN_DNSWL_NONE=-0.0001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: laurent@vivier.eu Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Signed-off-by: Richard Henderson --- target/m68k/translate.c | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/target/m68k/translate.c b/target/m68k/translate.c index e5338b50ad..cfe292c929 100644 --- a/target/m68k/translate.c +++ b/target/m68k/translate.c @@ -4916,6 +4916,14 @@ DISAS_INSN(trapcc) do_trapcc(s, &c); } +DISAS_INSN(trapv) +{ + DisasCompare c; + + gen_cc_cond(&c, s, 9); /* V set */ + do_trapcc(s, &c); +} + static void gen_load_fcr(DisasContext *s, TCGv res, int reg) { switch (reg) { @@ -6079,6 +6087,7 @@ void register_m68k_insns (CPUM68KState *env) BASE(nop, 4e71, ffff); INSN(rtd, 4e74, ffff, RTD); BASE(rts, 4e75, ffff); + INSN(trapv, 4e76, ffff, M68000); INSN(rtr, 4e77, ffff, M68000); BASE(jump, 4e80, ffc0); BASE(jump, 4ec0, ffc0); From patchwork Thu Dec 2 20:48:56 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 519766 Delivered-To: patch@linaro.org Received: by 2002:a05:6e04:2287:0:0:0:0 with SMTP id bl7csp1172646imb; Thu, 2 Dec 2021 12:58:12 -0800 (PST) X-Google-Smtp-Source: ABdhPJwEKVBsiC9uSWXNOB/TWmpPlNVxK5PJMu4aNRH+ni7gTDjZFWhOtOna/R70h1CZQgL166n0 X-Received: by 2002:a05:622a:1491:: with SMTP id t17mr16393791qtx.402.1638478691990; Thu, 02 Dec 2021 12:58:11 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1638478691; cv=none; d=google.com; s=arc-20160816; b=imcogv1hCutbM/C6rl2nL3xZluh2WL2WgKKGWWm7NSSotRRp8ug5gO9SZ7X7oxm97g o63avZDm5G3dhyjEgKXnFTRvxcwA6JuEgo33MRv+HQME+guOagUwn3gJTM8NAE8LORGA l5+9e5tEiP74lsrKV8hy53MkUHa6Lt6zg3eWzp+B6lLsuBcfnXVmMF0lPV6pi0GHAvK8 zYVVsOEUMUFI8T3s0/4m0aylCxp7HtU5Vhv5bqXLWuqWx8RLdSrXKCuE8Xf2xgmLHCi+ Wh3QiZGVq40oyHIqFJ30XVOUdfxkLyGkqDARhPC+IG+ZFeMvD4lDDEkejvNYuPl8D0qQ mynQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=yAL09uhbua6dPBItU2s08cVfqP4823JoWkfAH5hZ3a4=; b=QO2yW0uLHwLrtEfY3L8ehvusBbg68BlJEIlBjUXtX9yFFj2fwA5kgapHFREaw12auU 7CGyRxfEY2o0u2ildVuHMxDX5YiJy/9IUifWTo8RcIAx+Hor7jQoCQ4FqdTKRPKv8rtZ fLUMW1htJfyEjQvzNTPqbwpHapgceZWV5CalV6qJ0aKPeCn938j4iCQPheFIfK9rUeBA osmaNhoYZTeKpSU5wXQLEtQdR8pG7fJUmzLYENWDWVH2EcjKQe4KfqjNYFk5pI9Pm1KL Pf2FGXTirIfbGmdOKAVhPBhQSbPM0hKo3Jpq41kyLzANj9JoFHq+QOuRsjI3ubRpMVsN a01Q== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=S9QhlB1C; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[174.21.75.75]) by smtp.gmail.com with ESMTPSA id pi17sm3721391pjb.34.2021.12.02.12.49.08 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 02 Dec 2021 12:49:09 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v2 11/15] target/m68k: Implement FTRAPcc Date: Thu, 2 Dec 2021 12:48:56 -0800 Message-Id: <20211202204900.50973-12-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20211202204900.50973-1-richard.henderson@linaro.org> References: <20211202204900.50973-1-richard.henderson@linaro.org> MIME-Version: 1.0 X-Host-Lookup-Failed: Reverse DNS lookup failed for 2607:f8b0:4864:20::22d (failed) Received-SPF: pass client-ip=2607:f8b0:4864:20::22d; envelope-from=richard.henderson@linaro.org; helo=mail-oi1-x22d.google.com X-Spam_score_int: -12 X-Spam_score: -1.3 X-Spam_bar: - X-Spam_report: (-1.3 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, PDS_HP_HELO_NORDNS=0.001, RCVD_IN_DNSWL_NONE=-0.0001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: laurent@vivier.eu Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Signed-off-by: Richard Henderson --- target/m68k/translate.c | 30 ++++++++++++++++++++++++++++++ 1 file changed, 30 insertions(+) diff --git a/target/m68k/translate.c b/target/m68k/translate.c index cfe292c929..641f95ff8a 100644 --- a/target/m68k/translate.c +++ b/target/m68k/translate.c @@ -5572,6 +5572,35 @@ DISAS_INSN(fscc) tcg_temp_free(tmp); } +DISAS_INSN(ftrapcc) +{ + DisasCompare c; + uint16_t ext; + int cond; + + ext = read_im16(env, s); + cond = ext & 0x3f; + + /* Consume and discard the immediate operand. */ + switch (extract32(insn, 0, 3)) { + case 2: /* ftrapcc.w */ + (void)read_im16(env, s); + break; + case 3: /* ftrapcc.l */ + (void)read_im32(env, s); + break; + case 4: /* ftrapcc (no operand) */ + break; + default: + /* Illegal insn */ + disas_undef(env, s, insn); + return; + } + + gen_fcc_cond(&c, s, cond); + do_trapcc(s, &c); +} + #if defined(CONFIG_SOFTMMU) DISAS_INSN(frestore) { @@ -6195,6 +6224,7 @@ void register_m68k_insns (CPUM68KState *env) INSN(fbcc, f280, ffc0, CF_FPU); INSN(fpu, f200, ffc0, FPU); INSN(fscc, f240, ffc0, FPU); + INSN(ftrapcc, f278, fff8, FPU); INSN(fbcc, f280, ff80, FPU); #if defined(CONFIG_SOFTMMU) INSN(frestore, f340, ffc0, CF_FPU); From patchwork Thu Dec 2 20:48:57 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 519769 Delivered-To: patch@linaro.org Received: by 2002:a05:6e04:2287:0:0:0:0 with SMTP id bl7csp1175540imb; Thu, 2 Dec 2021 13:01:23 -0800 (PST) X-Google-Smtp-Source: ABdhPJzRo3cAAh+H/LvRvrIMLE+2RL5T9v4wy4zSNx/H8rlGa2YSQTrQpwzG2X4pWebgR3K8XKRl X-Received: by 2002:a67:c181:: with SMTP id h1mr17276983vsj.3.1638478883389; Thu, 02 Dec 2021 13:01:23 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1638478883; cv=none; d=google.com; s=arc-20160816; b=Zi+YuWAAh2wrdiBhevJpT6rCLG00K96+4bR89UXwjFkc+Q7GZx+WOZq+JDGC4YguaZ Gcnghmy9O+uhOZ0697Lx6o6usa2F2XWMOplU+g2h31LnEOBiCeCQbMXxt/O8PCdZa9Bz 0bxGA0HjV8m16lDgD+kN7iW5FzngsgZ1XKJr/xHfnb2KAhyJ/4FmWmz/qvd/dda6g78h I9UOerAENrFhgTkqP6m+k/fPnIfiPviYLMIuviY4k3AlGoa4XM8iAXzpbA+0BcTNAj5J yg1+I8qsz2YxBSAvKIBVa7RpPPyDueBThizhPSCRyWUlMUqgPRB+wivHBe+raO0tvitP Mv1g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=rTeHp3U3o19QI3ip/iNIsdusFSPguDlUd5JMsIxKTZk=; b=PdcpqNiT23eIa9/HR+Hb5ktnH9OsowBDtloKItqLhYHGWBV5NwNQFCN5hD9//ZrS2h H0tRzzFG06W4qar73g1HKMK/PCrkKK0KRLfumM9DIjoCjT4iv5NrdIJ2hQwuFRtKRdz3 UQQ1GTCAivVGUso3vK1U4Q/pO7QPh3OtQ2z601RD8tUKpHs8sitYGPOzgIhgU9Ff7s7N 7PnW3i4DCbQmCR7DbFcoV/S39IsnPvZoArcnocRB+3twDbKyGWPpcLh1uA0lNAiooWmy Otyzk9REvtzsOdQ86X21sIEAXQss4cblbgm5BnHhgxFcbY1eil36iR3w0LwVD/XdoWgn XiSQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=AHZaDECG; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[174.21.75.75]) by smtp.gmail.com with ESMTPSA id pi17sm3721391pjb.34.2021.12.02.12.49.09 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 02 Dec 2021 12:49:09 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v2 12/15] target/m68k: Fix stack frame for EXCP_ILLEGAL Date: Thu, 2 Dec 2021 12:48:57 -0800 Message-Id: <20211202204900.50973-13-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20211202204900.50973-1-richard.henderson@linaro.org> References: <20211202204900.50973-1-richard.henderson@linaro.org> MIME-Version: 1.0 X-Host-Lookup-Failed: Reverse DNS lookup failed for 2607:f8b0:4864:20::42c (failed) Received-SPF: pass client-ip=2607:f8b0:4864:20::42c; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x42c.google.com X-Spam_score_int: -12 X-Spam_score: -1.3 X-Spam_bar: - X-Spam_report: (-1.3 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, PDS_HP_HELO_NORDNS=0.001, RCVD_IN_DNSWL_NONE=-0.0001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: laurent@vivier.eu Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" According to the M68040 Users Manual, section 8.4.3, Four word stack frame (format 0), includes Illegal Instruction. Use the correct frame format, which does not use the ADDR argument. Signed-off-by: Richard Henderson --- target/m68k/op_helper.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/target/m68k/op_helper.c b/target/m68k/op_helper.c index 811b8bd117..10d459f704 100644 --- a/target/m68k/op_helper.c +++ b/target/m68k/op_helper.c @@ -395,8 +395,7 @@ static void m68k_interrupt_all(CPUM68KState *env, int is_hw) break; case EXCP_ILLEGAL: - /* FIXME: addr is not only env->pc */ - do_stack_frame(env, &sp, 2, oldsr, env->pc, env->pc); + do_stack_frame(env, &sp, 0, oldsr, 0, env->pc); break; case EXCP_CHK: From patchwork Thu Dec 2 20:48:58 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 519767 Delivered-To: patch@linaro.org Received: by 2002:a05:6e04:2287:0:0:0:0 with SMTP id bl7csp1173294imb; Thu, 2 Dec 2021 12:59:03 -0800 (PST) X-Google-Smtp-Source: ABdhPJy1gCvjeYRL2iAY7ekRpwl/T4sXuIz8HXTDL7LlZYsIt3jZEOekaYLyS0ZjH1tVblZZHE2f X-Received: by 2002:ac8:5745:: with SMTP id 5mr16434910qtx.85.1638478743674; Thu, 02 Dec 2021 12:59:03 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1638478743; cv=none; d=google.com; s=arc-20160816; b=TS4n6vI2eRf7+gfGR1mMnjC46dd7jv+pKAylnsTcoeHH1p2Uh40UMhXXCfv0H3/ote iAiCv6dQ4BwQMlHLVx5he9CtVrKZ37di910ta0G2ogO8RNrrGyq/0eq5IvWncghYHbg8 GXupZgPQ9qb8S/9odMU/UjD6E+GRJUakKE9fSQ9BRwEyM2SGQxZiygruUjSTM6slUa5I INhjtf7RFgqmp7VyetkhhbcOsEzxtM6g7qpJlAD9h2J06jRCKIAxtVDfAQFEjoVHMwQh LJsNs8Lj/9pYpvhI/S5GNecb0iPrtdvZIDiFrltr6jqO72gwDkkpwpf8R5nVGpNJqRA2 lldg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=1iKqCq5gnBEuV7yETH5boxm9MvdrrB2fADfIX32vfoE=; b=l9TmaLEdJGqC71HVprQIellO2efniln8QkI2SVp273+3bdRZI43q0f+J+bUEB+n0Uu wQfHGXXCbfrV0oJ4kGT+qAIiRQ9QqQiBadprMuyuJu3/bb4TNjfa4J8IMmCscS32/Xlr ERi/vQ7dq5vt3e0aFyK8xySM7p4GPbJ2tkgqX3+mmOLzP/BOtwun97Ru9f6s0ClTL0aF M+Ha7BLZ1dQYRz/Ph4J9GwiURxFtkPz+A56pXNuzsaBGMSxjVsSriZpjFPzZeuMNFPEs 2NVjzhw0jx+9jHV2KSbY1zWvDPG1yulEMPMOWGZsRCfT/O5dM36ZEYyawy18mWgrmEHD CULw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=B46Qilzq; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[174.21.75.75]) by smtp.gmail.com with ESMTPSA id pi17sm3721391pjb.34.2021.12.02.12.49.10 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 02 Dec 2021 12:49:10 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v2 13/15] tests/tcg/m68k: Add trap.c Date: Thu, 2 Dec 2021 12:48:58 -0800 Message-Id: <20211202204900.50973-14-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20211202204900.50973-1-richard.henderson@linaro.org> References: <20211202204900.50973-1-richard.henderson@linaro.org> MIME-Version: 1.0 X-Host-Lookup-Failed: Reverse DNS lookup failed for 2607:f8b0:4864:20::436 (failed) Received-SPF: pass client-ip=2607:f8b0:4864:20::436; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x436.google.com X-Spam_score_int: -12 X-Spam_score: -1.3 X-Spam_bar: - X-Spam_report: (-1.3 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, PDS_HP_HELO_NORDNS=0.001, RCVD_IN_DNSWL_NONE=-0.0001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: laurent@vivier.eu Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Test various trap instructions: chk, div, trap, trapv, trapcc, ftrapcc, and the signals and addresses that we expect from them. Signed-off-by: Richard Henderson --- tests/tcg/m68k/trap.c | 129 +++++++++++++++++++++++++++++++++ tests/tcg/m68k/Makefile.target | 3 + 2 files changed, 132 insertions(+) create mode 100644 tests/tcg/m68k/trap.c diff --git a/tests/tcg/m68k/trap.c b/tests/tcg/m68k/trap.c new file mode 100644 index 0000000000..08ab56b2ca --- /dev/null +++ b/tests/tcg/m68k/trap.c @@ -0,0 +1,129 @@ +/* + * Test m68k trap addresses. + */ + +#define _GNU_SOURCE 1 +#include +#include +#include + +static int expect_sig; +static int expect_si_code; +static void *expect_si_addr; +static greg_t expect_mc_pc; +static volatile int got_signal; + +static void sig_handler(int sig, siginfo_t *si, void *puc) +{ + ucontext_t *uc = puc; + mcontext_t *mc = &uc->uc_mcontext; + + assert(sig == expect_sig); + assert(si->si_code == expect_si_code); + assert(si->si_addr == expect_si_addr); + assert(mc->gregs[R_PC] == expect_mc_pc); + + got_signal = 1; +} + +#define FMT_INS [ad] "a"(&expect_si_addr), [pc] "a"(&expect_mc_pc) +#define FMT0_STR(S) \ + "move.l #1f, (%[ad])\n\tmove.l #1f, (%[pc])\n" S "\n1:\n" +#define FMT2_STR(S) \ + "move.l #0f, (%[ad])\n\tmove.l #1f, (%[pc])\n" S "\n1:\n" + +#define CHECK_SIG do { assert(got_signal); got_signal = 0; } while (0) + +int main(int argc, char **argv) +{ + struct sigaction act = { + .sa_sigaction = sig_handler, + .sa_flags = SA_SIGINFO + }; + int t0, t1; + + sigaction(SIGILL, &act, NULL); + sigaction(SIGTRAP, &act, NULL); + sigaction(SIGFPE, &act, NULL); + + expect_sig = SIGFPE; + expect_si_code = FPE_INTOVF; + asm volatile(FMT2_STR("0:\tchk %0, %1") : : "d"(0), "d"(-1), FMT_INS); + CHECK_SIG; + +#if 0 + /* FIXME: chk2 not correctly translated. */ + int bounds[2] = { 0, 1 }; + asm volatile(FMT2_STR("0:\tchk2.l %0, %1") + : : "m"(bounds), "d"(2), FMT_INS); + CHECK_SIG; +#endif + + asm volatile(FMT2_STR("cmp.l %0, %1\n0:\ttrapv") + : : "d"(INT_MIN), "d"(1), FMT_INS); + CHECK_SIG; + + asm volatile(FMT2_STR("cmp.l %0, %0\n0:\ttrapeq") + : : "d"(0), FMT_INS); + CHECK_SIG; + + asm volatile(FMT2_STR("cmp.l %0, %0\n0:\ttrapeq.w #0x1234") + : : "d"(0), FMT_INS); + CHECK_SIG; + + asm volatile(FMT2_STR("cmp.l %0, %0\n0:\ttrapeq.l #0x12345678") + : : "d"(0), FMT_INS); + CHECK_SIG; + + asm volatile(FMT2_STR("fcmp.x %0, %0\n0:\tftrapeq") + : : "f"(0.0L), FMT_INS); + CHECK_SIG; + + expect_si_code = FPE_INTDIV; + + asm volatile(FMT2_STR("0:\tdivs.w %1, %0") + : "=d"(t0) : "d"(0), "0"(1), FMT_INS); + CHECK_SIG; + + asm volatile(FMT2_STR("0:\tdivsl.l %2, %1:%0") + : "=d"(t0), "=d"(t1) : "d"(0), "0"(1), FMT_INS); + CHECK_SIG; + + expect_sig = SIGILL; + expect_si_code = ILL_ILLOPN; + asm volatile(FMT0_STR("trap #1") : : FMT_INS); + CHECK_SIG; + asm volatile(FMT0_STR("trap #2") : : FMT_INS); + CHECK_SIG; + asm volatile(FMT0_STR("trap #3") : : FMT_INS); + CHECK_SIG; + asm volatile(FMT0_STR("trap #4") : : FMT_INS); + CHECK_SIG; + asm volatile(FMT0_STR("trap #5") : : FMT_INS); + CHECK_SIG; + asm volatile(FMT0_STR("trap #6") : : FMT_INS); + CHECK_SIG; + asm volatile(FMT0_STR("trap #7") : : FMT_INS); + CHECK_SIG; + asm volatile(FMT0_STR("trap #8") : : FMT_INS); + CHECK_SIG; + asm volatile(FMT0_STR("trap #9") : : FMT_INS); + CHECK_SIG; + asm volatile(FMT0_STR("trap #10") : : FMT_INS); + CHECK_SIG; + asm volatile(FMT0_STR("trap #11") : : FMT_INS); + CHECK_SIG; + asm volatile(FMT0_STR("trap #12") : : FMT_INS); + CHECK_SIG; + asm volatile(FMT0_STR("trap #13") : : FMT_INS); + CHECK_SIG; + asm volatile(FMT0_STR("trap #14") : : FMT_INS); + CHECK_SIG; + + expect_sig = SIGTRAP; + expect_si_code = TRAP_BRKPT; + asm volatile(FMT0_STR("trap #15") : : FMT_INS); + CHECK_SIG; + + return 0; +} diff --git a/tests/tcg/m68k/Makefile.target b/tests/tcg/m68k/Makefile.target index 62f109eef4..1163c7ef03 100644 --- a/tests/tcg/m68k/Makefile.target +++ b/tests/tcg/m68k/Makefile.target @@ -3,5 +3,8 @@ # m68k specific tweaks - specifically masking out broken tests # +VPATH += $(SRC_PATH)/tests/tcg/m68k +TESTS += trap + # On m68k Linux supports 4k and 8k pages (but 8k is currently broken) EXTRA_RUNS+=run-test-mmap-4096 # run-test-mmap-8192 From patchwork Thu Dec 2 20:48:59 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 519764 Delivered-To: patch@linaro.org Received: by 2002:a05:6e04:2287:0:0:0:0 with SMTP id bl7csp1171564imb; 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[174.21.75.75]) by smtp.gmail.com with ESMTPSA id pi17sm3721391pjb.34.2021.12.02.12.49.10 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 02 Dec 2021 12:49:10 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v2 14/15] linux-user/strace: Fix print_syscall_err Date: Thu, 2 Dec 2021 12:48:59 -0800 Message-Id: <20211202204900.50973-15-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20211202204900.50973-1-richard.henderson@linaro.org> References: <20211202204900.50973-1-richard.henderson@linaro.org> MIME-Version: 1.0 X-Host-Lookup-Failed: Reverse DNS lookup failed for 2607:f8b0:4864:20::1036 (failed) Received-SPF: pass client-ip=2607:f8b0:4864:20::1036; envelope-from=richard.henderson@linaro.org; helo=mail-pj1-x1036.google.com X-Spam_score_int: -12 X-Spam_score: -1.3 X-Spam_bar: - X-Spam_report: (-1.3 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, PDS_HP_HELO_NORDNS=0.001, RCVD_IN_DNSWL_NONE=-0.0001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: laurent@vivier.eu Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Errors are not all negative numbers, but only the top 4k. Signed-off-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daudé --- linux-user/strace.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/linux-user/strace.c b/linux-user/strace.c index 2cdbf030ba..f235118fb6 100644 --- a/linux-user/strace.c +++ b/linux-user/strace.c @@ -684,12 +684,12 @@ print_ipc(void *cpu_env, const struct syscallname *name, */ static bool -print_syscall_err(abi_long ret) +print_syscall_err(abi_ulong ret) { const char *errstr; qemu_log(" = "); - if (ret < 0) { + if (ret > -4096) { errstr = target_strerror(-ret); if (errstr) { qemu_log("-1 errno=%d (%s)", (int)-ret, errstr); From patchwork Thu Dec 2 20:49:00 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 519759 Delivered-To: patch@linaro.org Received: by 2002:a05:6e04:2287:0:0:0:0 with SMTP id bl7csp1167578imb; Thu, 2 Dec 2021 12:52:30 -0800 (PST) X-Google-Smtp-Source: ABdhPJzNXgvcGgYMY2bUxQSdsA6p0xsMUKLFXffOGn9pnrZJwOucOibBW0rPJsHEls062Ei46vIE X-Received: by 2002:ab0:2498:: with SMTP id i24mr18671315uan.18.1638478350243; Thu, 02 Dec 2021 12:52:30 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1638478350; cv=none; d=google.com; s=arc-20160816; b=FgjOWcd+b8ahjc/uORg5hCCB3WTTKKhvXheEfwl7lVuJ1+a83+642mneOXm6rIW99E YPVH4qMEM5qkJibtbQ6mqxmVHr7fBpAwn/3AlNwfsaP2J6zCQW86H5old295FbyMYOww 30DX4Q72a0wOKzV1hHe9J523cQMYeE1+nsvLzXEHXiH+ROIj9gkPNBlnlrNfzs6GgGv6 6+ztRgTLsKFdZOpaEVN/gyy1sRvshAWA7XBXbRI7YFk+eV/KRTTYo9el2WFxWmPuVvad mgL4NsrLiMoHe4ROQzn7N3q6g+L0z0FyDS2k7bPiOIUARys5E9E4FJKBFMM6u9hwE+gp Aetw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=z9CNoFSrWjAjukly+g7lYy0zjZhRUxJXZZvZuVjkY44=; b=mVlKUDP/TSkWcY3V7g48ILQ7PiWSLuFXk1W1IVkGkKXj03IcoaAQtWUkGnZd18v01v 4w1MrJTtccHC84iYVpIJDo9L7Oota836pciRKqc0mroosx1nWrmgz8SL3johY/hiHde3 z3LzMhQttm9NQ7rFMMGppb6KZ4CP0SlndV60ajw0uEeJl0WavmF310CKPamrcydmkssd 2IAeIoYnvQlFV1WZi6azYbCpCi6fthjGz3lmZegfR88jZXWv7VX8E+HEx7rSfQtjx/Qd wMZjeWFYmdMYKjcRiepDwcP5fKy9W3ifZ0dNk2SqWmmoD70XnW4RtouJBhX8kzMdg6Dg gOIw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=IppJY0cF; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[174.21.75.75]) by smtp.gmail.com with ESMTPSA id pi17sm3721391pjb.34.2021.12.02.12.49.11 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 02 Dec 2021 12:49:11 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v2 15/15] linux-user/strace: Adjust get_thread_area for m68k Date: Thu, 2 Dec 2021 12:49:00 -0800 Message-Id: <20211202204900.50973-16-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20211202204900.50973-1-richard.henderson@linaro.org> References: <20211202204900.50973-1-richard.henderson@linaro.org> MIME-Version: 1.0 X-Host-Lookup-Failed: Reverse DNS lookup failed for 2607:f8b0:4864:20::1036 (failed) Received-SPF: pass client-ip=2607:f8b0:4864:20::1036; envelope-from=richard.henderson@linaro.org; helo=mail-pj1-x1036.google.com X-Spam_score_int: -12 X-Spam_score: -1.3 X-Spam_bar: - X-Spam_report: (-1.3 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, PDS_HP_HELO_NORDNS=0.001, RCVD_IN_DNSWL_NONE=-0.0001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: laurent@vivier.eu Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Unlike i386, m68k get_thread_area has no arguments. Signed-off-by: Richard Henderson --- linux-user/strace.list | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/linux-user/strace.list b/linux-user/strace.list index 278596acd1..72e17b1acf 100644 --- a/linux-user/strace.list +++ b/linux-user/strace.list @@ -384,8 +384,13 @@ { TARGET_NR_getsockopt, "getsockopt" , NULL, NULL, NULL }, #endif #ifdef TARGET_NR_get_thread_area +#if defined(TARGET_I386) && defined(TARGET_ABI32) { TARGET_NR_get_thread_area, "get_thread_area", "%s(0x"TARGET_ABI_FMT_lx")", NULL, NULL }, +#elif defined(TARGET_M68K) +{ TARGET_NR_get_thread_area, "get_thread_area" , "%s()", + NULL, print_syscall_ret_addr }, +#endif #endif #ifdef TARGET_NR_gettid { TARGET_NR_gettid, "gettid" , "%s()", NULL, NULL },