From patchwork Mon Nov 29 10:19:44 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Allen-KH Cheng X-Patchwork-Id: 518061 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from alsa0.perex.cz (alsa0.perex.cz [77.48.224.243]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 4EB5EC433EF for ; Mon, 29 Nov 2021 10:21:53 +0000 (UTC) Received: from alsa1.perex.cz (alsa1.perex.cz [207.180.221.201]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by alsa0.perex.cz (Postfix) with ESMTPS id 7B3DC1867; Mon, 29 Nov 2021 11:21:01 +0100 (CET) DKIM-Filter: OpenDKIM Filter v2.11.0 alsa0.perex.cz 7B3DC1867 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=alsa-project.org; s=default; t=1638181311; bh=+5B2IG57dl1KYcbnJDl3kcE45TSJkbYBeZ1s/dj5r+c=; h=From:To:Subject:Date:In-Reply-To:References:Cc:List-Id: List-Unsubscribe:List-Archive:List-Post:List-Help:List-Subscribe: From; b=NlhXkx9EG6j2VhFF9e2JRQZcuInOTiKV+yQpR1ZNbwhw1+f6DQ+zCnjK6ZIcTofs3 g/yQis8FG4JGIAOPq9+BK4Qyv/5J5LSW0t2R8oZWL87gdXrntCDai9ViA4GgMfQkBz ZibpclhgHdaTZqBV2Cjl00PX2+FgtL5QRPxXEwH8= Received: from alsa1.perex.cz (localhost.localdomain [127.0.0.1]) by alsa1.perex.cz (Postfix) with ESMTP id B8377F804F3; Mon, 29 Nov 2021 11:20:11 +0100 (CET) Received: by alsa1.perex.cz (Postfix, from userid 50401) id 291BCF8020D; Mon, 29 Nov 2021 11:20:10 +0100 (CET) Received: from mailgw02.mediatek.com (unknown [210.61.82.184]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by alsa1.perex.cz (Postfix) with ESMTPS id D8F1CF8020D; Mon, 29 Nov 2021 11:19:58 +0100 (CET) DKIM-Filter: OpenDKIM Filter v2.11.0 alsa1.perex.cz D8F1CF8020D X-UUID: 75d78f94c0524b22a76a2962f9d71cf1-20211129 X-UUID: 75d78f94c0524b22a76a2962f9d71cf1-20211129 Received: from mtkcas11.mediatek.inc [(172.21.101.40)] by mailgw02.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-SHA384 256/256) with ESMTP id 768400008; Mon, 29 Nov 2021 18:19:50 +0800 Received: from mtkcas11.mediatek.inc (172.21.101.40) by mtkmbs10n1.mediatek.inc (172.21.101.34) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384) id 15.2.792.15; Mon, 29 Nov 2021 18:19:49 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkcas11.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Mon, 29 Nov 2021 18:19:48 +0800 From: allen-kh.cheng To: Mark Brown , Rob Herring , Matthias Brugger , Jassi Brar Subject: [PATCH v8 2/3] firmware: mediatek: add adsp ipc protocol interface Date: Mon, 29 Nov 2021 18:19:44 +0800 Message-ID: <20211129101946.6008-3-allen-kh.cheng@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20211129101946.6008-1-allen-kh.cheng@mediatek.com> References: <20211129101946.6008-1-allen-kh.cheng@mediatek.com> MIME-Version: 1.0 X-MTK: N Cc: devicetree@vger.kernel.org, Linux-ALSA , Allen-KH Cheng , Kai Vehmanen , Liam Girdwood , cujomalainey@google.com, linux-kernel@vger.kernel.org, Takashi Iwai , Ranjani Sridharan , Pierre-Louis Bossart , Project_Global_Chrome_Upstream_Group@mediatek.com, tzungbi@google.com, linux-mediatek@lists.infradead.org, Daniel Baluta , linux-arm-kernel@lists.infradead.org, sound-open-firmware@alsa-project.org X-BeenThere: alsa-devel@alsa-project.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: "Alsa-devel mailing list for ALSA developers - http://www.alsa-project.org" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: alsa-devel-bounces@alsa-project.org Sender: "Alsa-devel" From: Allen-KH Cheng Some of mediatek processors contain the Tensilica HiFix DSP for audio processing. The communication between Host CPU and DSP firmware is taking place using a shared memory area for message passing. ADSP IPC protocol offers (send/recv) interfaces using mediatek-mailbox APIs. We use two mbox channels to implement a request-reply protocol. Reviewed-by: Tzung-Bi Shih Signed-off-by: Allen-KH Cheng --- drivers/firmware/Kconfig | 1 + drivers/firmware/Makefile | 1 + drivers/firmware/mediatek/Kconfig | 9 ++ drivers/firmware/mediatek/Makefile | 2 + drivers/firmware/mediatek/mtk-adsp-ipc.c | 138 ++++++++++++++++++ .../linux/firmware/mediatek/mtk-adsp-ipc.h | 70 +++++++++ 6 files changed, 221 insertions(+) create mode 100644 drivers/firmware/mediatek/Kconfig create mode 100644 drivers/firmware/mediatek/Makefile create mode 100644 drivers/firmware/mediatek/mtk-adsp-ipc.c create mode 100644 include/linux/firmware/mediatek/mtk-adsp-ipc.h diff --git a/drivers/firmware/Kconfig b/drivers/firmware/Kconfig index 220a58cf0a44..005f76a9a31a 100644 --- a/drivers/firmware/Kconfig +++ b/drivers/firmware/Kconfig @@ -301,6 +301,7 @@ source "drivers/firmware/broadcom/Kconfig" source "drivers/firmware/google/Kconfig" source "drivers/firmware/efi/Kconfig" source "drivers/firmware/imx/Kconfig" +source "drivers/firmware/mediatek/Kconfig" source "drivers/firmware/meson/Kconfig" source "drivers/firmware/psci/Kconfig" source "drivers/firmware/smccc/Kconfig" diff --git a/drivers/firmware/Makefile b/drivers/firmware/Makefile index 5ced0673d94b..c0d1f3bdeae4 100644 --- a/drivers/firmware/Makefile +++ b/drivers/firmware/Makefile @@ -33,6 +33,7 @@ obj-$(CONFIG_GOOGLE_FIRMWARE) += google/ obj-$(CONFIG_EFI) += efi/ obj-$(CONFIG_UEFI_CPER) += efi/ obj-y += imx/ +obj-y += mediatek/ obj-y += psci/ obj-y += smccc/ obj-y += tegra/ diff --git a/drivers/firmware/mediatek/Kconfig b/drivers/firmware/mediatek/Kconfig new file mode 100644 index 000000000000..5588af455ad1 --- /dev/null +++ b/drivers/firmware/mediatek/Kconfig @@ -0,0 +1,9 @@ +# SPDX-License-Identifier: GPL-2.0-only +config MTK_ADSP_IPC + tristate "MTK ADSP IPC Protocol driver" + depends on MTK_ADSP_MBOX + help + Say yes here to add support for the MediaTek ADSP IPC protocol + between host AP (Linux) and the firmware running on ADSP. + ADSP exists on some mtk processors. + Client might use shared memory to exchange information with ADSP side. diff --git a/drivers/firmware/mediatek/Makefile b/drivers/firmware/mediatek/Makefile new file mode 100644 index 000000000000..4e840b65650d --- /dev/null +++ b/drivers/firmware/mediatek/Makefile @@ -0,0 +1,2 @@ +# SPDX-License-Identifier: GPL-2.0 +obj-$(CONFIG_MTK_ADSP_IPC) += mtk-adsp-ipc.o diff --git a/drivers/firmware/mediatek/mtk-adsp-ipc.c b/drivers/firmware/mediatek/mtk-adsp-ipc.c new file mode 100644 index 000000000000..f6219043f295 --- /dev/null +++ b/drivers/firmware/mediatek/mtk-adsp-ipc.c @@ -0,0 +1,138 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (c) 2021 MediaTek Corporation. All rights reserved. + * Author: Allen-KH Cheng + */ + +#include +#include +#include +#include +#include +#include +#include + +int mtk_adsp_ipc_send(struct mtk_adsp_ipc *ipc, unsigned int idx, uint32_t op) +{ + struct mtk_adsp_chan *dsp_chan; + struct mtk_adsp_mbox_ch_info *ch_info; + int ret; + + if (idx >= MTK_ADSP_MBOX_NUM) + return -EINVAL; + + dsp_chan = &ipc->chans[idx]; + ch_info = dsp_chan->ch->con_priv; + ch_info->ipc_op_val = op; + ret = mbox_send_message(dsp_chan->ch, NULL); + if (ret < 0) + return ret; + + return 0; +} +EXPORT_SYMBOL(mtk_adsp_ipc_send); + +static void mtk_adsp_ipc_recv(struct mbox_client *c, void *msg) +{ + struct mtk_adsp_chan *chan = container_of(c, struct mtk_adsp_chan, cl); + + switch (chan->idx) { + case MTK_ADSP_MBOX_REPLY: + chan->ipc->ops->handle_reply(chan->ipc); + break; + case MTK_ADSP_MBOX_REQUEST: + chan->ipc->ops->handle_request(chan->ipc); + break; + default: + break; + } +} + +static int mtk_adsp_ipc_probe(struct platform_device *pdev) +{ + struct device *dev = &pdev->dev; + struct mtk_adsp_ipc *dsp_ipc; + struct mtk_adsp_chan *dsp_chan; + struct mbox_client *cl; + char *chan_name; + int ret; + int i, j; + + device_set_of_node_from_dev(&pdev->dev, pdev->dev.parent); + + dsp_ipc = devm_kzalloc(dev, sizeof(*dsp_ipc), GFP_KERNEL); + if (!dsp_ipc) + return -ENOMEM; + + for (i = 0; i < MTK_ADSP_MBOX_NUM; i++) { + chan_name = kasprintf(GFP_KERNEL, "mbox%d", i); + if (!chan_name) { + ret = -ENOMEM; + goto out; + } + + dsp_chan = &dsp_ipc->chans[i]; + cl = &dsp_chan->cl; + cl->dev = dev->parent; + cl->tx_block = false; + cl->knows_txdone = false; + cl->tx_prepare = NULL; + cl->rx_callback = mtk_adsp_ipc_recv; + + dsp_chan->ipc = dsp_ipc; + dsp_chan->idx = i; + dsp_chan->ch = mbox_request_channel_byname(cl, chan_name); + if (IS_ERR(dsp_chan->ch)) { + ret = PTR_ERR(dsp_chan->ch); + if (ret != -EPROBE_DEFER) + dev_err(dev, "Failed to request mbox chan %d ret %d\n", + i, ret); + goto out; + } + + dev_dbg(dev, "request mbox chan %s\n", chan_name); + kfree(chan_name); + } + + dsp_ipc->dev = dev; + dev_set_drvdata(dev, dsp_ipc); + dev_dbg(dev, "MTK ADSP IPC initialized\n"); + + return 0; + +out: + kfree(chan_name); + for (j = 0; j < i; j++) { + dsp_chan = &dsp_ipc->chans[j]; + mbox_free_channel(dsp_chan->ch); + } + + return ret; +} + +static int mtk_adsp_ipc_remove(struct platform_device *pdev) +{ + struct mtk_adsp_ipc *dsp_ipc = dev_get_drvdata(&pdev->dev); + struct mtk_adsp_chan *dsp_chan; + int i; + + for (i = 0; i < MTK_ADSP_MBOX_NUM; i++) { + dsp_chan = &dsp_ipc->chans[i]; + mbox_free_channel(dsp_chan->ch); + } + + return 0; +} + +static struct platform_driver mtk_adsp_ipc_driver = { + .driver = { + .name = "mtk-adsp-ipc", + }, + .probe = mtk_adsp_ipc_probe, + .remove = mtk_adsp_ipc_remove, +}; +builtin_platform_driver(mtk_adsp_ipc_driver); + +MODULE_AUTHOR("Allen-KH Cheng "); +MODULE_DESCRIPTION("MTK ADSP IPC driver"); +MODULE_LICENSE("GPL v2"); diff --git a/include/linux/firmware/mediatek/mtk-adsp-ipc.h b/include/linux/firmware/mediatek/mtk-adsp-ipc.h new file mode 100644 index 000000000000..279bf9700c62 --- /dev/null +++ b/include/linux/firmware/mediatek/mtk-adsp-ipc.h @@ -0,0 +1,70 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Copyright (c) 2021 MediaTek Inc. + */ + +#ifndef MTK_ADSP_IPC_H +#define MTK_ADSP_IPC_H + +#include +#include +#include +#include + +#define MTK_ADSP_IPC_REQ 0 +#define MTK_ADSP_IPC_RSP 1 +#define MTK_ADSP_IPC_OP_REQ 0x1 +#define MTK_ADSP_IPC_OP_RSP 0x2 + +enum { + MTK_ADSP_MBOX_REPLY, + MTK_ADSP_MBOX_REQUEST, + MTK_ADSP_MBOX_NUM, +}; + +struct mtk_adsp_ipc; + +struct mtk_adsp_ipc_ops { + void (*handle_reply)(struct mtk_adsp_ipc *ipc); + void (*handle_request)(struct mtk_adsp_ipc *ipc); +}; + +struct mtk_adsp_chan { + struct mtk_adsp_ipc *ipc; + struct mbox_client cl; + struct mbox_chan *ch; + char *name; + int idx; +}; + +struct mtk_adsp_ipc { + struct mtk_adsp_chan chans[MTK_ADSP_MBOX_NUM]; + struct device *dev; + struct mtk_adsp_ipc_ops *ops; + void *private_data; +}; + +struct mtk_adsp_mbox_ch_info { + u32 ipc_op_val; + void __iomem *va_reg; +}; + +static inline void mtk_adsp_ipc_set_data(struct mtk_adsp_ipc *ipc, void *data) +{ + if (!ipc) + return; + + ipc->private_data = data; +} + +static inline void *mtk_adsp_ipc_get_data(struct mtk_adsp_ipc *ipc) +{ + if (!ipc) + return NULL; + + return ipc->private_data; +} + +int mtk_adsp_ipc_send(struct mtk_adsp_ipc *ipc, unsigned int idx, uint32_t op); + +#endif /* MTK_ADSP_IPC_H */