From patchwork Tue Nov 30 03:21:28 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thinh Nguyen X-Patchwork-Id: 517759 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id E0F07C433EF for ; Tue, 30 Nov 2021 03:21:31 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S237823AbhK3DYt (ORCPT ); Mon, 29 Nov 2021 22:24:49 -0500 Received: from smtprelay-out1.synopsys.com ([149.117.87.133]:54478 "EHLO smtprelay-out1.synopsys.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229721AbhK3DYt (ORCPT ); Mon, 29 Nov 2021 22:24:49 -0500 Received: from mailhost.synopsys.com (sv1-mailhost2.synopsys.com [10.205.2.132]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)) (Client CN "mailhost.synopsys.com", Issuer "SNPSica2" (verified OK)) by smtprelay-out1.synopsys.com (Postfix) with ESMTPS id D7D01C14A7; Tue, 30 Nov 2021 03:21:29 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=synopsys.com; s=mail; t=1638242489; bh=SPGVg0ooeub41A6hmgrWEmpui+7AX/8CHEhCJFPeaxc=; h=Date:From:Subject:To:Cc:From; b=lLIeo3NN/xiR7bTtCmS4jdEqJwsesiloh/hHeSi0SQe0mzynUjSLyGKW6zFeuR3yC Pa5UD34fRVXew5tyH/Kk9+DlWqXCbgPAe2dUeAgXNUF938o9GOBP8HixpUu7XDmkDd v0hM5AIHUixntson3fTk3PbrY+Yo6iWB4Wj3AaOijE5AJRuLp/N+ZvnXqRcHdZ8T2+ G/P5P7os1R3S0yEOuMLcIijBte6VsLcBXT8KTNXkMYjnXVhihX4J3caF52dCPwwUsj /eB1f0AFa5hzsVbBL0ePHRuCSyTcTC6vSL9DTUVuf3mgkmwP8gSAQDVo5YKapYiBA+ GeWgaemvOszGw== Received: from te-lab16-v2 (nanobot.internal.synopsys.com [10.204.48.11]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (Client did not present a certificate) by mailhost.synopsys.com (Postfix) with ESMTPSA id 6FD94A0070; Tue, 30 Nov 2021 03:21:28 +0000 (UTC) Received: by te-lab16-v2 (sSMTP sendmail emulation); Mon, 29 Nov 2021 19:21:28 -0800 Date: Mon, 29 Nov 2021 19:21:28 -0800 Message-Id: X-SNPS-Relay: synopsys.com From: Thinh Nguyen Subject: [PATCH] usb: dwc3: gadget: Support Multi-Stream Transfer To: Felipe Balbi , Greg Kroah-Hartman , linux-usb@vger.kernel.org Cc: John Youn , Thinh Nguyen Precedence: bulk List-ID: X-Mailing-List: linux-usb@vger.kernel.org Synopsys introduced a new enhancement to DWC_usb32 called Multi-Stream Transfer (MST) to improve bulk streams performance for SuperSpeed and SuperSpeed Plus. This enhancement allows the controller to look ahead and process multiple bulk streams. Previously, to initiate a bulk stream transfer, the driver has to issue Start Transfer command and wait for the stream to complete before initiating a new stream. As a result, the controller does not process TRBs beyond a single stream. With the enhancement, as long as there are new requests, the dwc3 driver can keep preparing new TRBs and the controller can keep caching and processing them without waiting for the transfer completion. The programming flow is similar to regular bulk endpoint with a few additional rules: 1) Chained TRBs of the same stream must have a matching stream ID 2) The last TRB of a stream must have CHN=0 3) All the TRBs with LST=0 must have CSP=1 Depends on the application and usage, internal tests show significant performance improvement in UASP transfers with this enhancement. Signed-off-by: Thinh Nguyen --- drivers/usb/dwc3/core.h | 9 +++++++++ drivers/usb/dwc3/gadget.c | 26 +++++++++++++++++++++----- 2 files changed, 30 insertions(+), 5 deletions(-) base-commit: 4d012040161cba054208555300d9fdf2b8925c34 diff --git a/drivers/usb/dwc3/core.h b/drivers/usb/dwc3/core.h index 5c491d0a19d7..e1cc3f7398fb 100644 --- a/drivers/usb/dwc3/core.h +++ b/drivers/usb/dwc3/core.h @@ -153,6 +153,7 @@ #define DWC3_DGCMDPAR 0xc710 #define DWC3_DGCMD 0xc714 #define DWC3_DALEPENA 0xc720 +#define DWC3_DCFG1 0xc740 /* DWC_usb32 only */ #define DWC3_DEP_BASE(n) (0xc800 + ((n) * 0x10)) #define DWC3_DEPCMDPAR2 0x00 @@ -382,6 +383,7 @@ /* Global HWPARAMS9 Register */ #define DWC3_GHWPARAMS9_DEV_TXF_FLUSH_BYPASS BIT(0) +#define DWC3_GHWPARAMS9_DEV_MST BIT(1) /* Global Frame Length Adjustment Register */ #define DWC3_GFLADJ_30MHZ_SDBND_SEL BIT(7) @@ -558,6 +560,9 @@ /* The EP number goes 0..31 so ep0 is always out and ep1 is always in */ #define DWC3_DALEPENA_EP(n) BIT(n) +/* DWC_usb32 DCFG1 config */ +#define DWC3_DCFG1_DIS_MST_ENH BIT(1) + #define DWC3_DEPCMD_TYPE_CONTROL 0 #define DWC3_DEPCMD_TYPE_ISOC 1 #define DWC3_DEPCMD_TYPE_BULK 2 @@ -888,6 +893,10 @@ struct dwc3_hwparams { /* HWPARAMS7 */ #define DWC3_RAM1_DEPTH(n) ((n) & 0xffff) +/* HWPARAMS9 */ +#define DWC3_MST_CAPABLE(p) (!!((p)->hwparams9 & \ + DWC3_GHWPARAMS9_DEV_MST)) + /** * struct dwc3_request - representation of a transfer request * @request: struct usb_request to be transferred diff --git a/drivers/usb/dwc3/gadget.c b/drivers/usb/dwc3/gadget.c index 7e3db00e9759..3c5b60539142 100644 --- a/drivers/usb/dwc3/gadget.c +++ b/drivers/usb/dwc3/gadget.c @@ -1260,12 +1260,17 @@ static void __dwc3_prepare_one_trb(struct dwc3_ep *dep, struct dwc3_trb *trb, trb->ctrl |= DWC3_TRB_CTRL_ISP_IMI; } + /* All TRBs setup for MST must set CSP=1 when LST=0 */ + if (dep->stream_capable && DWC3_MST_CAPABLE(&dwc->hwparams)) + trb->ctrl |= DWC3_TRB_CTRL_CSP; + if ((!no_interrupt && !chain) || must_interrupt) trb->ctrl |= DWC3_TRB_CTRL_IOC; if (chain) trb->ctrl |= DWC3_TRB_CTRL_CHN; - else if (dep->stream_capable && is_last) + else if (dep->stream_capable && is_last && + !DWC3_MST_CAPABLE(&dwc->hwparams)) trb->ctrl |= DWC3_TRB_CTRL_LST; if (usb_endpoint_xfer_bulk(dep->endpoint.desc) && dep->stream_capable) @@ -1513,7 +1518,8 @@ static int dwc3_prepare_trbs(struct dwc3_ep *dep) * burst capability may try to read and use TRBs beyond the * active transfer instead of stopping. */ - if (dep->stream_capable && req->request.is_last) + if (dep->stream_capable && req->request.is_last && + !DWC3_MST_CAPABLE(&dep->dwc->hwparams)) return ret; } @@ -1546,7 +1552,8 @@ static int dwc3_prepare_trbs(struct dwc3_ep *dep) * burst capability may try to read and use TRBs beyond the * active transfer instead of stopping. */ - if (dep->stream_capable && req->request.is_last) + if (dep->stream_capable && req->request.is_last && + !DWC3_MST_CAPABLE(&dwc->hwparams)) return ret; } @@ -1623,7 +1630,8 @@ static int __dwc3_gadget_kick_transfer(struct dwc3_ep *dep) return ret; } - if (dep->stream_capable && req->request.is_last) + if (dep->stream_capable && req->request.is_last && + !DWC3_MST_CAPABLE(&dep->dwc->hwparams)) dep->flags |= DWC3_EP_WAIT_TRANSFER_COMPLETE; return 0; @@ -2638,6 +2646,13 @@ static int __dwc3_gadget_start(struct dwc3 *dwc) reg |= DWC3_DCFG_IGNSTRMPP; dwc3_writel(dwc->regs, DWC3_DCFG, reg); + /* Enable MST by default if the device is capable of MST */ + if (DWC3_MST_CAPABLE(&dwc->hwparams)) { + reg = dwc3_readl(dwc->regs, DWC3_DCFG1); + reg &= ~DWC3_DCFG1_DIS_MST_ENH; + dwc3_writel(dwc->regs, DWC3_DCFG1, reg); + } + /* Start with SuperSpeed Default */ dwc3_gadget_ep0_desc.wMaxPacketSize = cpu_to_le16(512); @@ -3437,7 +3452,8 @@ static void dwc3_gadget_endpoint_stream_event(struct dwc3_ep *dep, case DEPEVT_STREAM_NOSTREAM: if ((dep->flags & DWC3_EP_IGNORE_NEXT_NOSTREAM) || !(dep->flags & DWC3_EP_FORCE_RESTART_STREAM) || - !(dep->flags & DWC3_EP_WAIT_TRANSFER_COMPLETE)) + (!DWC3_MST_CAPABLE(&dwc->hwparams) && + !(dep->flags & DWC3_EP_WAIT_TRANSFER_COMPLETE))) break; /*