From patchwork Thu Nov 25 09:00:18 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tudor Ambarus X-Patchwork-Id: 517565 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3B803C433F5 for ; Thu, 25 Nov 2021 09:02:49 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1353768AbhKYJF6 (ORCPT ); Thu, 25 Nov 2021 04:05:58 -0500 Received: from esa.microchip.iphmx.com ([68.232.154.123]:17363 "EHLO esa.microchip.iphmx.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1353515AbhKYJD5 (ORCPT ); Thu, 25 Nov 2021 04:03:57 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1637830846; x=1669366846; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=CIM45Syj4kYFKQaSN/c1s5pHZ3uPQK0krZOBDew05DM=; b=O46lbanNL958YrKfYF02PQzb2lk7fKRNVprYEyl9RgTQbPvinn/0Sxbf Pqgc7+kqANVnBlDspz8j124LUzNXXT9NZ+V96bSpbVkRnYXfptr9rH6Qv FtVcoOHc87Z7pep5GEwPmwUKAYkKRAFp7vVEUKzltY3CxJ8ZsBqIkyWuD 1s8zzvyFSLF50KRVSP8PoU6zWgELUFEZeo1msUuE965cvQUWF/FnoZAN0 q40VxvYKPvhl4Q6P5horMXuHgl1pCEAImYZ/FsAivUA81I+o0etxRB37D 0w9t5qw16iGyiTzZprE8SJRFaF25vsx4xg58btLm3HVMZ547KEejfeWow g==; IronPort-SDR: Nxij3NzZqEF/71SN6wh8X6Zq5Wz54ngQptptk6TV745XvJ67XxLVRSGtoMWyEBrhn9zO+UKsTj MDXQ5xUbIPhz692e5yi3NGOtFMkEWv66y7S15mqsKUJxciYmusrFm6P0tP9DhA4lzP3EBq6PYP FgKmtAgo5atTQJQy66FuaBli7sTX7sIZL3dvVgTFChBcP6b1xdz/ORMMhzMGqhYVZk2LTX/aqR gTUvpU+Su7wfGrcHT9jB5O8oqyrxV92OKOrlUrQOmWcEYd/JkjdQM/16vGz08zOWL3uO1P1u4x sQBArGZkb8DjD+rZvOTsZCXA X-IronPort-AV: E=Sophos;i="5.87,262,1631602800"; d="scan'208";a="137700238" Received: from smtpout.microchip.com (HELO email.microchip.com) ([198.175.253.82]) by esa4.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 25 Nov 2021 02:00:45 -0700 Received: from chn-vm-ex02.mchp-main.com (10.10.85.144) by chn-vm-ex03.mchp-main.com (10.10.85.151) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2176.14; Thu, 25 Nov 2021 02:00:43 -0700 Received: from ROB-ULT-M18064N.mchp-main.com (10.10.115.15) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server id 15.1.2176.14 via Frontend Transport; Thu, 25 Nov 2021 02:00:40 -0700 From: Tudor Ambarus To: , , , , CC: , , , , , , , Tudor Ambarus Subject: [PATCH v2 03/13] tty: serial: atmel: Call dma_async_issue_pending() Date: Thu, 25 Nov 2021 11:00:18 +0200 Message-ID: <20211125090028.786832-4-tudor.ambarus@microchip.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20211125090028.786832-1-tudor.ambarus@microchip.com> References: <20211125090028.786832-1-tudor.ambarus@microchip.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-serial@vger.kernel.org The driver wrongly assummed that tx_submit() will start the transfer, which is not the case, now that the at_xdmac driver is fixed. tx_submit is supposed to push the current transaction descriptor to a pending queue, waiting for issue_pending to be called. issue_pending must start the transfer, not tx_submit. Fixes: 34df42f59a60 ("serial: at91: add rx dma support") Fixes: 08f738be88bb ("serial: at91: add tx dma support") Signed-off-by: Tudor Ambarus --- drivers/tty/serial/atmel_serial.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/drivers/tty/serial/atmel_serial.c b/drivers/tty/serial/atmel_serial.c index 376f7a9c2868..269b4500e9e7 100644 --- a/drivers/tty/serial/atmel_serial.c +++ b/drivers/tty/serial/atmel_serial.c @@ -1009,6 +1009,8 @@ static void atmel_tx_dma(struct uart_port *port) atmel_port->cookie_tx); return; } + + dma_async_issue_pending(chan); } if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS) @@ -1269,6 +1271,8 @@ static int atmel_prepare_rx_dma(struct uart_port *port) goto chan_err; } + dma_async_issue_pending(atmel_port->chan_rx); + return 0; chan_err: From patchwork Thu Nov 25 09:00:19 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tudor Ambarus X-Patchwork-Id: 517564 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id EA914C433F5 for ; Thu, 25 Nov 2021 09:02:53 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1353825AbhKYJGC (ORCPT ); Thu, 25 Nov 2021 04:06:02 -0500 Received: from esa.microchip.iphmx.com ([68.232.154.123]:25006 "EHLO esa.microchip.iphmx.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1353564AbhKYJEB (ORCPT ); Thu, 25 Nov 2021 04:04:01 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1637830851; x=1669366851; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=tVeVzCqLqbVxX1jH3+OLNjcxNS2IlcvbF+cf1Wql48c=; b=vnbyhKdwQzLOBeGu6tHb2FvRgiXTZthbhqunbnrNJnfeyYU4ESMVxa/l cHc13jKw9TbDlfP7ismVuDFrK4STFJalEnZK3VLHr3RUTWOOx85XrARp7 W55yUpmOmD25pqi4E8UO/sa2F4ZX7QMG3+xpO75/kMFnlR8uStYzx6vOL Pf9gNe7g/4Jxn/VcBV1PY6kh+a8bkGf4iqoGhqPJUV6hKI1WYFo0T8Xoz xQXy9yu4yrI2jTfF8KVvbB9lVP0RVap835DAJSqah03A6j1cZpDMSB0qc eSYNu/d9JWwFijRmW/V6KEKe4flsl3UGercY+VWKk68SXPKg8Zzga7Jfh Q==; IronPort-SDR: wwdNLaSeDwc3uZjrbnVoHjfv6c3saIjn6b2PUPy/Jnh+fPFqY5h0ByCAKWbZCuT5EsXsayUO1I 2GGDGUbInNcUfliVF6ouY3j7BfHii7/GUxarWU7rrSmf4ExD44lLakQQOSLY95oZE03GLN1tTp X9wq/I6V+gWnXfrQF7WagYn3lmKmgYqQpitsIwEn87d7EylYbgMKnWo72FP7vvUmqEFgEQ78Rl KLi/sCU0wEx5BpdnvKPTyjsE7PvE0NaaZEMCqsVSEcMvIHSdYusGV25Qenxw4a4+bD4KHHeYKK pc+Eoq4Gu0+MAgBfipR4aScO X-IronPort-AV: E=Sophos;i="5.87,262,1631602800"; d="scan'208";a="77556049" Received: from smtpout.microchip.com (HELO email.microchip.com) ([198.175.253.82]) by esa6.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 25 Nov 2021 02:00:50 -0700 Received: from chn-vm-ex02.mchp-main.com (10.10.87.72) by chn-vm-ex02.mchp-main.com (10.10.87.72) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2176.14; Thu, 25 Nov 2021 02:00:46 -0700 Received: from ROB-ULT-M18064N.mchp-main.com (10.10.115.15) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server id 15.1.2176.14 via Frontend Transport; Thu, 25 Nov 2021 02:00:43 -0700 From: Tudor Ambarus To: , , , , CC: , , , , , , , Tudor Ambarus Subject: [PATCH v2 04/13] dmaengine: at_xdmac: Start transfer for cyclic channels in issue_pending Date: Thu, 25 Nov 2021 11:00:19 +0200 Message-ID: <20211125090028.786832-5-tudor.ambarus@microchip.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20211125090028.786832-1-tudor.ambarus@microchip.com> References: <20211125090028.786832-1-tudor.ambarus@microchip.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-serial@vger.kernel.org Cyclic channels must too call issue_pending in order to start a transfer. This wrongly worked before, because in the past the transfer was started at tx_submit level when only a desc in the transfer list. Fixes: e1f7c9eee707 ("dmaengine: at_xdmac: creation of the atmel eXtended DMA Controller driver") Signed-off-by: Tudor Ambarus --- drivers/dma/at_xdmac.c | 8 +++----- 1 file changed, 3 insertions(+), 5 deletions(-) diff --git a/drivers/dma/at_xdmac.c b/drivers/dma/at_xdmac.c index ccf796a3b9f3..9a5c68eda801 100644 --- a/drivers/dma/at_xdmac.c +++ b/drivers/dma/at_xdmac.c @@ -1778,11 +1778,9 @@ static void at_xdmac_issue_pending(struct dma_chan *chan) dev_dbg(chan2dev(&atchan->chan), "%s\n", __func__); - if (!at_xdmac_chan_is_cyclic(atchan)) { - spin_lock_irqsave(&atchan->lock, flags); - at_xdmac_advance_work(atchan); - spin_unlock_irqrestore(&atchan->lock, flags); - } + spin_lock_irqsave(&atchan->lock, flags); + at_xdmac_advance_work(atchan); + spin_unlock_irqrestore(&atchan->lock, flags); return; } From patchwork Thu Nov 25 09:00:21 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tudor Ambarus X-Patchwork-Id: 517563 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 89780C43217 for ; Thu, 25 Nov 2021 09:02:58 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1353564AbhKYJGI (ORCPT ); Thu, 25 Nov 2021 04:06:08 -0500 Received: from esa.microchip.iphmx.com ([68.232.154.123]:17379 "EHLO esa.microchip.iphmx.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1353566AbhKYJEH (ORCPT ); Thu, 25 Nov 2021 04:04:07 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1637830856; x=1669366856; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=5xHR1pSMET19iq1R2ORya7V1yqiD9c113vKBUFK5yTw=; b=L4XZg4gAll3zuMPyDJ06ZnHtJxvFEVGjd/WjdWb1a3uz+NLcK2QB2m+Z PfFXPEqdRhXIxPVJc+glmBTg6/RspTiWpVlfzWk6dUhxXxWFuI9xhXQzQ JvhtcOKiougplFy1RLowd0hQQJdze8rnfDEANfSB5yRHNWGqPhcMfnXud zCPYRi8rUw6x2xHqWrypZxDYmzAGUKbmBhR8I6WoyP4l/8Is7K2lYWH5C GC7lR8NlVuEME/QTF3UUTr7Xzz1dzqMsNwXQLQzM0XtCGyI+4EXBYlSB/ yPHgSXFEQTBBDJ4xYe50Tqhg6R3bW8aa2+vPlqyHNSp7PY/sNRXRpN22f w==; IronPort-SDR: dabU9dLW4qKDsvn0Eu1nLS3EMTV2WJ8SGT4eW+YHLq5VlzssreaOrMSiNYjP6itM5nM9hNAHXi EkcIksnJwTGYNEFRpJQrBNJ4fV616j5fx6NFntyZ91Oa81DYvOg3aFn0EO4wRlyMigujI0Z7fN Fj/RqCNwlAJBFyNLaeVNZEPIreAB3tVM7Of/QTzzvBSHfPbx3RsxuwjdOH9ZHYRwdP+TRoYJ5q k4qGHL+3eVYMg5uVi6o/dJeyyqgO1/l2U7PwJHyFnVFgPK1ur6dgc5f9NLEnDE/uKxeMsxwt8K aW/E7pTXPORs5JIfMIA0+Z5R X-IronPort-AV: E=Sophos;i="5.87,262,1631602800"; d="scan'208";a="137700269" Received: from smtpout.microchip.com (HELO email.microchip.com) ([198.175.253.82]) by esa4.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 25 Nov 2021 02:00:52 -0700 Received: from chn-vm-ex02.mchp-main.com (10.10.85.144) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2176.14; Thu, 25 Nov 2021 02:00:53 -0700 Received: from ROB-ULT-M18064N.mchp-main.com (10.10.115.15) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server id 15.1.2176.14 via Frontend Transport; Thu, 25 Nov 2021 02:00:50 -0700 From: Tudor Ambarus To: , , , , CC: , , , , , , , Tudor Ambarus Subject: [PATCH v2 06/13] dmaengine: at_xdmac: Fix concurrency over chan's completed_cookie Date: Thu, 25 Nov 2021 11:00:21 +0200 Message-ID: <20211125090028.786832-7-tudor.ambarus@microchip.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20211125090028.786832-1-tudor.ambarus@microchip.com> References: <20211125090028.786832-1-tudor.ambarus@microchip.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-serial@vger.kernel.org Caller of dma_cookie_complete is expected to hold a lock to prevent concurrency over the channel's completed cookie marker. Fixes: e1f7c9eee707 ("dmaengine: at_xdmac: creation of the atmel eXtended DMA Controller driver") Signed-off-by: Tudor Ambarus --- drivers/dma/at_xdmac.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/drivers/dma/at_xdmac.c b/drivers/dma/at_xdmac.c index b45ae4fee9db..4d8476845c20 100644 --- a/drivers/dma/at_xdmac.c +++ b/drivers/dma/at_xdmac.c @@ -1703,11 +1703,10 @@ static void at_xdmac_tasklet(struct tasklet_struct *t) } txd = &desc->tx_dma_desc; - + dma_cookie_complete(txd); at_xdmac_remove_xfer(atchan, desc); spin_unlock_irq(&atchan->lock); - dma_cookie_complete(txd); if (txd->flags & DMA_PREP_INTERRUPT) dmaengine_desc_get_callback_invoke(txd, NULL); From patchwork Thu Nov 25 09:00:23 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tudor Ambarus X-Patchwork-Id: 517562 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 35ECAC433EF for ; Thu, 25 Nov 2021 09:03:06 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1353939AbhKYJGP (ORCPT ); Thu, 25 Nov 2021 04:06:15 -0500 Received: from esa.microchip.iphmx.com ([68.232.153.233]:62157 "EHLO esa.microchip.iphmx.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1350414AbhKYJEM (ORCPT ); Thu, 25 Nov 2021 04:04:12 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1637830862; x=1669366862; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=nuxqXU7uniwAlyc6jwMoADsVym2af+0HTfirATPA/GM=; b=Fzkz4XNeLfP+d/r+g2+/geonuyzlDwhkJQ02CKJCs2sm8BxNCCKLLoT1 k6hoZt+11Zq+XHsKPCH7hbZIpVHmpDfYyspT9diWJV+pMp0cYZlq016xK A05cLXQkm/gZYbm0rN8HW+dZcYfhamaY/ASAVl799n9y1GvC0cqn761Lh cEKBg58vwWZSfBwyazNQAgBw6Dw998XN+dXnpS779HKFHdiKVxvdf8amP dzn2rOSU11PiTt4SRpeXVs4dP1b2vGhbeLjpbhenJkXwuZra52meeId/8 hwDGGAhh5Xq1TD+zefnC+UVr+iDEI/6r6u9r8/tY+tgb330RhvRTucYw8 g==; IronPort-SDR: +uerOeXV8bj+0gQ+9JOh+w5wh8uzTJguwAtWP/v4VJjgnBqUOQNEgJuBFAvYgHGfX9w9e7d/Mc XniK3hBz6VGEBnTRqrox8c1gYANjZbwJHpfAX6BusXot/8VM7YkiXINOsKjheLyQk5xYjMa0qg hOtONQFp0WIUlm+A98wpPBHkdV1HKR5Z9tAvc703FwxlymWYXLqDfJv6iNdAMFauJhndecyPKc 0BBw+hdOGhMCJiWztIpbe+1gMMPwwySoyOGrqUhKhROtJSeHsrJeW4IkNU8iEf2KW7AKmLEsK4 S9ajYuTp1g2Fg1NaMzxoturi X-IronPort-AV: E=Sophos;i="5.87,262,1631602800"; d="scan'208";a="144534265" Received: from smtpout.microchip.com (HELO email.microchip.com) ([198.175.253.82]) by esa5.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 25 Nov 2021 02:01:01 -0700 Received: from chn-vm-ex02.mchp-main.com (10.10.85.144) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2176.14; Thu, 25 Nov 2021 02:00:59 -0700 Received: from ROB-ULT-M18064N.mchp-main.com (10.10.115.15) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server id 15.1.2176.14 via Frontend Transport; Thu, 25 Nov 2021 02:00:56 -0700 From: Tudor Ambarus To: , , , , CC: , , , , , , , Tudor Ambarus Subject: [PATCH v2 08/13] dmaengine: at_xdmac: Move the free desc to the tail of the desc list Date: Thu, 25 Nov 2021 11:00:23 +0200 Message-ID: <20211125090028.786832-9-tudor.ambarus@microchip.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20211125090028.786832-1-tudor.ambarus@microchip.com> References: <20211125090028.786832-1-tudor.ambarus@microchip.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-serial@vger.kernel.org So that we don't use the same desc over and over again. Signed-off-by: Tudor Ambarus --- drivers/dma/at_xdmac.c | 23 ++++++++++++++--------- 1 file changed, 14 insertions(+), 9 deletions(-) diff --git a/drivers/dma/at_xdmac.c b/drivers/dma/at_xdmac.c index 2cc9af222681..8804a86a9bcc 100644 --- a/drivers/dma/at_xdmac.c +++ b/drivers/dma/at_xdmac.c @@ -729,7 +729,8 @@ at_xdmac_prep_slave_sg(struct dma_chan *chan, struct scatterlist *sgl, if (!desc) { dev_err(chan2dev(chan), "can't get descriptor\n"); if (first) - list_splice_init(&first->descs_list, &atchan->free_descs_list); + list_splice_tail_init(&first->descs_list, + &atchan->free_descs_list); goto spin_unlock; } @@ -817,7 +818,8 @@ at_xdmac_prep_dma_cyclic(struct dma_chan *chan, dma_addr_t buf_addr, if (!desc) { dev_err(chan2dev(chan), "can't get descriptor\n"); if (first) - list_splice_init(&first->descs_list, &atchan->free_descs_list); + list_splice_tail_init(&first->descs_list, + &atchan->free_descs_list); spin_unlock_irqrestore(&atchan->lock, irqflags); return NULL; } @@ -1051,8 +1053,8 @@ at_xdmac_prep_interleaved(struct dma_chan *chan, src_addr, dst_addr, xt, chunk); if (!desc) { - list_splice_init(&first->descs_list, - &atchan->free_descs_list); + list_splice_tail_init(&first->descs_list, + &atchan->free_descs_list); return NULL; } @@ -1132,7 +1134,8 @@ at_xdmac_prep_dma_memcpy(struct dma_chan *chan, dma_addr_t dest, dma_addr_t src, if (!desc) { dev_err(chan2dev(chan), "can't get descriptor\n"); if (first) - list_splice_init(&first->descs_list, &atchan->free_descs_list); + list_splice_tail_init(&first->descs_list, + &atchan->free_descs_list); return NULL; } @@ -1308,8 +1311,8 @@ at_xdmac_prep_dma_memset_sg(struct dma_chan *chan, struct scatterlist *sgl, sg_dma_len(sg), value); if (!desc && first) - list_splice_init(&first->descs_list, - &atchan->free_descs_list); + list_splice_tail_init(&first->descs_list, + &atchan->free_descs_list); if (!first) first = desc; @@ -1701,7 +1704,8 @@ static void at_xdmac_tasklet(struct tasklet_struct *t) spin_lock_irq(&atchan->lock); /* Move the xfer descriptors into the free descriptors list. */ - list_splice_init(&desc->descs_list, &atchan->free_descs_list); + list_splice_tail_init(&desc->descs_list, + &atchan->free_descs_list); at_xdmac_advance_work(atchan); spin_unlock_irq(&atchan->lock); } @@ -1850,7 +1854,8 @@ static int at_xdmac_device_terminate_all(struct dma_chan *chan) /* Cancel all pending transfers. */ list_for_each_entry_safe(desc, _desc, &atchan->xfers_list, xfer_node) { list_del(&desc->xfer_node); - list_splice_init(&desc->descs_list, &atchan->free_descs_list); + list_splice_tail_init(&desc->descs_list, + &atchan->free_descs_list); } clear_bit(AT_XDMAC_CHAN_IS_PAUSED, &atchan->status); From patchwork Thu Nov 25 09:00:25 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tudor Ambarus X-Patchwork-Id: 517560 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6539AC433FE for ; Thu, 25 Nov 2021 09:04:41 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1353714AbhKYJHv (ORCPT ); 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d="scan'208";a="77556153" Received: from smtpout.microchip.com (HELO email.microchip.com) ([198.175.253.82]) by esa6.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 25 Nov 2021 02:01:08 -0700 Received: from chn-vm-ex02.mchp-main.com (10.10.85.144) by chn-vm-ex03.mchp-main.com (10.10.85.151) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2176.14; Thu, 25 Nov 2021 02:01:06 -0700 Received: from ROB-ULT-M18064N.mchp-main.com (10.10.115.15) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server id 15.1.2176.14 via Frontend Transport; Thu, 25 Nov 2021 02:01:03 -0700 From: Tudor Ambarus To: , , , , CC: , , , , , , , Tudor Ambarus Subject: [PATCH v2 10/13] dmaengine: at_xdmac: Remove a level of indentation in at_xdmac_advance_work() Date: Thu, 25 Nov 2021 11:00:25 +0200 Message-ID: <20211125090028.786832-11-tudor.ambarus@microchip.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20211125090028.786832-1-tudor.ambarus@microchip.com> References: <20211125090028.786832-1-tudor.ambarus@microchip.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-serial@vger.kernel.org It's easier to read code with fewer levels of indentation. Signed-off-by: Tudor Ambarus --- drivers/dma/at_xdmac.c | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) diff --git a/drivers/dma/at_xdmac.c b/drivers/dma/at_xdmac.c index 81f6f1357dcb..89d0fc229d68 100644 --- a/drivers/dma/at_xdmac.c +++ b/drivers/dma/at_xdmac.c @@ -1593,14 +1593,14 @@ static void at_xdmac_advance_work(struct at_xdmac_chan *atchan) * If channel is enabled, do nothing, advance_work will be triggered * after the interruption. */ - if (!at_xdmac_chan_is_enabled(atchan) && !list_empty(&atchan->xfers_list)) { - desc = list_first_entry(&atchan->xfers_list, - struct at_xdmac_desc, - xfer_node); - dev_vdbg(chan2dev(&atchan->chan), "%s: desc 0x%p\n", __func__, desc); - if (!desc->active_xfer) - at_xdmac_start_xfer(atchan, desc); - } + if (at_xdmac_chan_is_enabled(atchan) || list_empty(&atchan->xfers_list)) + return; + + desc = list_first_entry(&atchan->xfers_list, struct at_xdmac_desc, + xfer_node); + dev_vdbg(chan2dev(&atchan->chan), "%s: desc 0x%p\n", __func__, desc); + if (!desc->active_xfer) + at_xdmac_start_xfer(atchan, desc); } static void at_xdmac_handle_cyclic(struct at_xdmac_chan *atchan) From patchwork Thu Nov 25 09:00:26 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tudor Ambarus X-Patchwork-Id: 517561 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id E20D9C433F5 for ; Thu, 25 Nov 2021 09:03:18 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1354018AbhKYJG2 (ORCPT ); Thu, 25 Nov 2021 04:06:28 -0500 Received: from esa.microchip.iphmx.com ([68.232.153.233]:62178 "EHLO esa.microchip.iphmx.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1344142AbhKYJE1 (ORCPT ); Thu, 25 Nov 2021 04:04:27 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1637830876; x=1669366876; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=WIpbBPu+LDILnDfRZxv4mO7fUQqnAghfChRhfJnCk4s=; b=iPiRmHIgft2ri8SLuK3BrKZCbxAUW4zNGBfNfRcwJ00x4CErLzrI5cCP NM/nnpyxdcgxqa69b/an5y8fG6O8r3rr+EklnTbPZP/JwGy+w/JCpvm4B Xp5x+Rx3+lIcGI+viNpGXVC9NCSC6GqyiO7qaEnOGHpE/hKXtdSMx4YAl y70wafsT3P1Wyi24Su96JeE++1sBeBlN9qT40xWTx3V9j7Bag7YsrLXZF 9zR8P9T+PYzrd949eNFs+4zjSxZJTSMBz7QY91Jq6iySTtbA35FmTDBa8 0aQIe4hLUngnOQFttu4B0OQQugZERVsvqSrTEqPKfqBA2tu9NMlJUkAgN A==; IronPort-SDR: //kzR0pxn4N+VaD4Z8z0EdlDuYPhJSoF+S51vq0dm61RulaDTUFU4DZ2M3n6uwUkjBLxkuQvrf /SFK4yBtSs9DmwvBjTOk3+iWlDTFnWGmqWqIjxPJ/102XWMRWen4iT2MwGKyGKKGaRKVOYLten kBagW/bMEoQHSPD2oGoHAm3NtEPZSFJ6zFeM4f4a+R8SwiZBasovecpAqyG42HljyaxdgF+Hlm oCWw22YhU98WeUncsC9t6fd/LJOG8UJWNh1Gf+UOg8u8DLwXyhRKRt3aJsPsUQGgeJREEqRILc wS1DPhpoYz/mbhftS3cK6oTc X-IronPort-AV: E=Sophos;i="5.87,262,1631602800"; d="scan'208";a="144534284" Received: from smtpout.microchip.com (HELO email.microchip.com) ([198.175.253.82]) by esa5.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 25 Nov 2021 02:01:16 -0700 Received: from chn-vm-ex02.mchp-main.com (10.10.85.144) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2176.14; Thu, 25 Nov 2021 02:01:09 -0700 Received: from ROB-ULT-M18064N.mchp-main.com (10.10.115.15) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server id 15.1.2176.14 via Frontend Transport; Thu, 25 Nov 2021 02:01:06 -0700 From: Tudor Ambarus To: , , , , CC: , , , , , , , Tudor Ambarus Subject: [PATCH v2 11/13] dmaengine: at_xdmac: Fix lld view setting Date: Thu, 25 Nov 2021 11:00:26 +0200 Message-ID: <20211125090028.786832-12-tudor.ambarus@microchip.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20211125090028.786832-1-tudor.ambarus@microchip.com> References: <20211125090028.786832-1-tudor.ambarus@microchip.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-serial@vger.kernel.org AT_XDMAC_CNDC_NDVIEW_NDV3 was set even for AT_XDMAC_MBR_UBC_NDV2, because of the wrong bit handling. Fix it. Fixes: ee0fe35c8dcd ("dmaengine: xdmac: Handle descriptor's view 3 registers") Signed-off-by: Tudor Ambarus --- drivers/dma/at_xdmac.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/drivers/dma/at_xdmac.c b/drivers/dma/at_xdmac.c index 89d0fc229d68..ba2fe383fa5e 100644 --- a/drivers/dma/at_xdmac.c +++ b/drivers/dma/at_xdmac.c @@ -99,6 +99,7 @@ #define AT_XDMAC_CNDC_NDE (0x1 << 0) /* Channel x Next Descriptor Enable */ #define AT_XDMAC_CNDC_NDSUP (0x1 << 1) /* Channel x Next Descriptor Source Update */ #define AT_XDMAC_CNDC_NDDUP (0x1 << 2) /* Channel x Next Descriptor Destination Update */ +#define AT_XDMAC_CNDC_NDVIEW_MASK GENMASK(28, 27) #define AT_XDMAC_CNDC_NDVIEW_NDV0 (0x0 << 3) /* Channel x Next Descriptor View 0 */ #define AT_XDMAC_CNDC_NDVIEW_NDV1 (0x1 << 3) /* Channel x Next Descriptor View 1 */ #define AT_XDMAC_CNDC_NDVIEW_NDV2 (0x2 << 3) /* Channel x Next Descriptor View 2 */ @@ -402,7 +403,8 @@ static void at_xdmac_start_xfer(struct at_xdmac_chan *atchan, */ if (at_xdmac_chan_is_cyclic(atchan)) reg = AT_XDMAC_CNDC_NDVIEW_NDV1; - else if (first->lld.mbr_ubc & AT_XDMAC_MBR_UBC_NDV3) + else if ((first->lld.mbr_ubc & + AT_XDMAC_CNDC_NDVIEW_MASK) == AT_XDMAC_MBR_UBC_NDV3) reg = AT_XDMAC_CNDC_NDVIEW_NDV3; else reg = AT_XDMAC_CNDC_NDVIEW_NDV2;