From patchwork Mon Nov 29 11:31:35 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rajendra Nayak X-Patchwork-Id: 516912 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id CF532C43219 for ; Mon, 29 Nov 2021 11:34:18 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231928AbhK2Lhe (ORCPT ); Mon, 29 Nov 2021 06:37:34 -0500 Received: from alexa-out-sd-02.qualcomm.com ([199.106.114.39]:22604 "EHLO alexa-out-sd-02.qualcomm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S237081AbhK2Lfe (ORCPT ); Mon, 29 Nov 2021 06:35:34 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; i=@quicinc.com; q=dns/txt; s=qcdkim; t=1638185536; x=1669721536; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version; bh=wbNIFTmUvXdbEqi3JkHLWrmQ8GcsDU5jy7yV62yXM7c=; b=QHmrt7+kdepsprnUgv2eZoN1pyRGE+2CbtXDZdvui/FMgA+SsfEefjC7 DFiY6Fee2sA+DbZoQYjqfWiusF8RbEgidILDtSEjmweo9mMyssbAlw7Kx w+lMLxDnI1L+/jFJ1lAles//ZYkSMVZ3sc+QAW2v1FvugBUiwVXch/j9m w=; Received: from unknown (HELO ironmsg-SD-alpha.qualcomm.com) ([10.53.140.30]) by alexa-out-sd-02.qualcomm.com with ESMTP; 29 Nov 2021 03:32:16 -0800 X-QCInternal: smtphost Received: from nasanex01c.na.qualcomm.com ([10.47.97.222]) by ironmsg-SD-alpha.qualcomm.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 29 Nov 2021 03:32:16 -0800 Received: from nalasex01a.na.qualcomm.com (10.47.209.196) by nasanex01c.na.qualcomm.com (10.47.97.222) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.922.19; Mon, 29 Nov 2021 03:32:16 -0800 Received: from blr-ubuntu-173.qualcomm.com (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.922.19; Mon, 29 Nov 2021 03:32:12 -0800 From: Rajendra Nayak To: , , CC: , , , , , , Rajendra Nayak Subject: [PATCH v2 2/4] arm64: dts: qcom: sc7280-crd: Add device tree files for CRD Date: Mon, 29 Nov 2021 17:01:35 +0530 Message-ID: <1638185497-26477-3-git-send-email-quic_rjendra@quicinc.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1638185497-26477-1-git-send-email-quic_rjendra@quicinc.com> References: <1638185497-26477-1-git-send-email-quic_rjendra@quicinc.com> MIME-Version: 1.0 X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nalasex01a.na.qualcomm.com (10.47.209.196) Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org CRD (Compute Reference Design) is a sc7280 based board, largely derived from the existing IDP board design with some key deltas 1. has EC and H1 over SPI similar to IDP2 2. touchscreen and trackpad support 3. eDP display We just add the barebones dts file here, subsequent patches will add support for EC/H1 and other components. Signed-off-by: Rajendra Nayak --- arch/arm64/boot/dts/qcom/Makefile | 1 + arch/arm64/boot/dts/qcom/sc7280-crd.dts | 31 +++++++++++++++++++++++++++++++ 2 files changed, 32 insertions(+) create mode 100644 arch/arm64/boot/dts/qcom/sc7280-crd.dts diff --git a/arch/arm64/boot/dts/qcom/Makefile b/arch/arm64/boot/dts/qcom/Makefile index 6b816eb..b18708c 100644 --- a/arch/arm64/boot/dts/qcom/Makefile +++ b/arch/arm64/boot/dts/qcom/Makefile @@ -78,6 +78,7 @@ dtb-$(CONFIG_ARCH_QCOM) += sc7180-trogdor-r1-lte.dtb dtb-$(CONFIG_ARCH_QCOM) += sc7280-herobrine.dtb dtb-$(CONFIG_ARCH_QCOM) += sc7280-idp.dtb dtb-$(CONFIG_ARCH_QCOM) += sc7280-idp2.dtb +dtb-$(CONFIG_ARCH_QCOM) += sc7280-crd.dtb dtb-$(CONFIG_ARCH_QCOM) += sdm630-sony-xperia-ganges-kirin.dtb dtb-$(CONFIG_ARCH_QCOM) += sdm630-sony-xperia-nile-discovery.dtb dtb-$(CONFIG_ARCH_QCOM) += sdm630-sony-xperia-nile-pioneer.dtb diff --git a/arch/arm64/boot/dts/qcom/sc7280-crd.dts b/arch/arm64/boot/dts/qcom/sc7280-crd.dts new file mode 100644 index 0000000..2da6603 --- /dev/null +++ b/arch/arm64/boot/dts/qcom/sc7280-crd.dts @@ -0,0 +1,31 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * sc7280 CRD board device tree source + * + * Copyright (c) 2021 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +/dts-v1/; + +#include "sc7280-idp.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. sc7280 CRD platform"; + compatible = "qcom,sc7280-crd", "google,hoglin", "qcom,sc7280"; + + aliases { + serial0 = &uart5; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; +}; + +&nvme_3v3_regulator { + gpio = <&tlmm 51 GPIO_ACTIVE_HIGH>; +}; + +&nvme_pwren { + pins = "gpio51"; +}; From patchwork Mon Nov 29 11:31:37 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rajendra Nayak X-Patchwork-Id: 516911 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9F15CC433FE for ; Mon, 29 Nov 2021 11:34:31 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S243367AbhK2Lhn (ORCPT ); Mon, 29 Nov 2021 06:37:43 -0500 Received: from alexa-out-sd-01.qualcomm.com ([199.106.114.38]:1655 "EHLO alexa-out-sd-01.qualcomm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S239066AbhK2Lfk (ORCPT ); Mon, 29 Nov 2021 06:35:40 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; i=@quicinc.com; q=dns/txt; s=qcdkim; t=1638185543; x=1669721543; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version; bh=fxTxRM3veSCnfsaFH09wJonxoMqt1QSFqWZHjbJamtM=; b=OaW9GCp7Q+heEe2VejZLutRv/coFFzUzn8edH9qdpojAnw/idHJRRha+ secPi86RCtngHWAhpuQnxbpEGMF/lWNV7Lem9HghsPUFtTnQa3DbE224H TTgUD8bWtSj9BrYKIAnRia1CCyHLRSFrVgoLSiZrhjhtF/i5FEl3AlL1B k=; Received: from unknown (HELO ironmsg-SD-alpha.qualcomm.com) ([10.53.140.30]) by alexa-out-sd-01.qualcomm.com with ESMTP; 29 Nov 2021 03:32:23 -0800 X-QCInternal: smtphost Received: from nasanex01c.na.qualcomm.com ([10.47.97.222]) by ironmsg-SD-alpha.qualcomm.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 29 Nov 2021 03:32:23 -0800 Received: from nalasex01a.na.qualcomm.com (10.47.209.196) by nasanex01c.na.qualcomm.com (10.47.97.222) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.922.19; Mon, 29 Nov 2021 03:32:22 -0800 Received: from blr-ubuntu-173.qualcomm.com (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.922.19; Mon, 29 Nov 2021 03:32:19 -0800 From: Rajendra Nayak To: , , CC: , , , , , , Kshitiz Godara , "Rajendra Nayak" Subject: [PATCH v2 4/4] arm64: dts: qcom: sc7280-crd: Add Touchscreen and touchpad support Date: Mon, 29 Nov 2021 17:01:37 +0530 Message-ID: <1638185497-26477-5-git-send-email-quic_rjendra@quicinc.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1638185497-26477-1-git-send-email-quic_rjendra@quicinc.com> References: <1638185497-26477-1-git-send-email-quic_rjendra@quicinc.com> MIME-Version: 1.0 X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nalasex01a.na.qualcomm.com (10.47.209.196) Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org From: Kshitiz Godara Add Touchscreen and touchpad hid-over-i2c node for the sc7280 CRD board Signed-off-by: Kshitiz Godara Signed-off-by: Rajendra Nayak Reviewed-by: Matthias Kaehlcke --- arch/arm64/boot/dts/qcom/sc7280-crd.dts | 61 +++++++++++++++++++++++++++++++++ 1 file changed, 61 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sc7280-crd.dts b/arch/arm64/boot/dts/qcom/sc7280-crd.dts index 1e3e2f3..fcfb14d 100644 --- a/arch/arm64/boot/dts/qcom/sc7280-crd.dts +++ b/arch/arm64/boot/dts/qcom/sc7280-crd.dts @@ -23,6 +23,47 @@ }; }; +ap_tp_i2c: &i2c0 { + status = "okay"; + clock-frequency = <400000>; + + trackpad: trackpad@15 { + compatible = "hid-over-i2c"; + reg = <0x15>; + pinctrl-names = "default"; + pinctrl-0 = <&tp_int_odl>; + + interrupt-parent = <&tlmm>; + interrupts = <7 IRQ_TYPE_EDGE_FALLING>; + + post-power-on-delay-ms = <20>; + hid-descr-addr = <0x0001>; + vdd-supply = <&vreg_l18b_1p8>; + + wakeup-source; + }; +}; + +ap_ts_pen_1v8: &i2c13 { + status = "okay"; + clock-frequency = <400000>; + + ap_ts: touchscreen@5c { + compatible = "hid-over-i2c"; + reg = <0x5C>; + pinctrl-names = "default"; + pinctrl-0 = <&ts_int_l>, <&ts_reset_l>; + + interrupt-parent = <&tlmm>; + interrupts = <55 IRQ_TYPE_LEVEL_LOW>; + + post-power-on-delay-ms = <500>; + hid-descr-addr = <0x0000>; + + vdd-supply = <&vreg_l19b_1p8>; + }; +}; + &nvme_3v3_regulator { gpio = <&tlmm 51 GPIO_ACTIVE_HIGH>; }; @@ -30,3 +71,23 @@ &nvme_pwren { pins = "gpio51"; }; + +&tlmm { + tp_int_odl: tp-int-odl { + pins = "gpio7"; + function = "gpio"; + bias-disable; + }; + + ts_int_l: ts-int-l { + pins = "gpio55"; + function = "gpio"; + bias-pull-up; + }; + + ts_reset_l: ts-reset-l { + pins = "gpio54"; + function = "gpio"; + bias-disable; + }; +};