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Tsirkin" Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" From: Eric Auger Ignore IORT till reference blob for E.b spec revision gets added. Signed-off-by: Eric Auger Reviewed-by: Michael S. Tsirkin Message-Id: <20211014115643.756977-2-eric.auger@redhat.com> Signed-off-by: Richard Henderson --- tests/qtest/bios-tables-test-allowed-diff.h | 1 + 1 file changed, 1 insertion(+) -- 2.25.1 diff --git a/tests/qtest/bios-tables-test-allowed-diff.h b/tests/qtest/bios-tables-test-allowed-diff.h index dfb8523c8b..9a5a923d6b 100644 --- a/tests/qtest/bios-tables-test-allowed-diff.h +++ b/tests/qtest/bios-tables-test-allowed-diff.h @@ -1 +1,2 @@ /* List of comma-separated changed AML files to ignore */ +"tests/data/acpi/virt/IORT", From patchwork Thu Oct 21 15:25:24 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 516053 Delivered-To: patch@linaro.org Received: by 2002:ac0:bf50:0:0:0:0:0 with SMTP id o16csp25121imj; Thu, 21 Oct 2021 08:39:36 -0700 (PDT) X-Google-Smtp-Source: ABdhPJzs82O8wnv58PfK9UUKJ5MckgGmPHdZIORMNoBVK+E1GYAlNrlVhhyon+pBn2kXM4tkHERO X-Received: by 2002:aca:6082:: with SMTP id u124mr5234447oib.153.1634830776229; Thu, 21 Oct 2021 08:39:36 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1634830776; cv=none; d=google.com; s=arc-20160816; b=Q96yKdLGypVLvkXF/aKfuzldv7udZ4CWfbKTVrBkOKrKJj7UF/Q76IB4atapDZIdvH IO5PTzoW8Im/oHTzHdAECWqA6lsrgwNw8VFwXmrMudTd3pG6oJOtuXLmnHBYXu6Pt44Q K8LQIsVTjohhk8x8jQ0aasbsnJ1NkVR5hpStQ6Udsg1ArH69otenqEw7gQRYB1Lu8KX2 IRkBb5JSa7C/Mqbmbvx/8ExMs3IlYlmk/bNeFeYOQ9A8UCsqu822DAnglG0S7PCn46bk UUcqXr1BuT61AIEwT2Hyi9ZK0OkhJEqkctVAjMuwl4VHNnMPjKYLXlCF+x2r87JPlpJf JRxg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=3uHaaL0MV3Lfbdvi6JXf/ib4D2pgKX/ajlDXIALVybM=; b=arBnFggghtuSsNz5yTRA0dHmToJVnKTm3PE8A+86Cr51FIPD8r7xKe1/sb+r14aEkj 68fEFUW69MFpo4GbkRG6Fu9QhQM3hbjPG6rRDd5aiOZc6dQNHd14k0sw0P7w6MWpFqgx 0ST5VctMtkM4ZEj4lKKUkbG1F+/n7NUHugEtg3Xr9a5OgmbnGyu82SRcoGGbzrxqsQDv b74uZ5NJ/dcp9afyVkg7nal4wdFRwjAZ5isPv3PvfZu476bwrWXibUv2TLp/4UhCPVNK Z6DbNu+VwCt/cSSagtKmcB7VE8Z2m8YFMmgGykY7pVd8ilOD47anFDHnojOKTXmdBP7N lkBg== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=H7TRRxcy; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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Tsirkin" , Jean-Philippe Brucker Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" From: Eric Auger Upgrade the IORT table from B to E.b specification revision (ARM DEN 0049E.b). The SMMUv3 and root complex node have additional fields. Also unique IORT node identifiers are introduced: they are generated in sequential order. They are not cross-referenced though. Signed-off-by: Eric Auger Reviewed-by: Jean-Philippe Brucker Reviewed-by: Igor Mammedov Reviewed-by: Michael S. Tsirkin Message-Id: <20211014115643.756977-3-eric.auger@redhat.com> Signed-off-by: Richard Henderson --- hw/arm/virt-acpi-build.c | 48 ++++++++++++++++++++++++---------------- 1 file changed, 29 insertions(+), 19 deletions(-) -- 2.25.1 diff --git a/hw/arm/virt-acpi-build.c b/hw/arm/virt-acpi-build.c index 6cec97352b..9c4730f4ab 100644 --- a/hw/arm/virt-acpi-build.c +++ b/hw/arm/virt-acpi-build.c @@ -241,19 +241,20 @@ static void acpi_dsdt_add_tpm(Aml *scope, VirtMachineState *vms) #endif #define ID_MAPPING_ENTRY_SIZE 20 -#define SMMU_V3_ENTRY_SIZE 60 -#define ROOT_COMPLEX_ENTRY_SIZE 32 +#define SMMU_V3_ENTRY_SIZE 68 +#define ROOT_COMPLEX_ENTRY_SIZE 36 #define IORT_NODE_OFFSET 48 static void build_iort_id_mapping(GArray *table_data, uint32_t input_base, uint32_t id_count, uint32_t out_ref) { - /* Identity RID mapping covering the whole input RID range */ + /* Table 4 ID mapping format */ build_append_int_noprefix(table_data, input_base, 4); /* Input base */ build_append_int_noprefix(table_data, id_count, 4); /* Number of IDs */ build_append_int_noprefix(table_data, input_base, 4); /* Output base */ build_append_int_noprefix(table_data, out_ref, 4); /* Output Reference */ - build_append_int_noprefix(table_data, 0, 4); /* Flags */ + /* Flags */ + build_append_int_noprefix(table_data, 0 /* Single mapping (disabled) */, 4); } struct AcpiIortIdMapping { @@ -298,7 +299,7 @@ static int iort_idmap_compare(gconstpointer a, gconstpointer b) /* * Input Output Remapping Table (IORT) * Conforms to "IO Remapping Table System Software on ARM Platforms", - * Document number: ARM DEN 0049B, October 2015 + * Document number: ARM DEN 0049E.b, Feb 2021 */ static void build_iort(GArray *table_data, BIOSLinker *linker, VirtMachineState *vms) @@ -307,10 +308,11 @@ build_iort(GArray *table_data, BIOSLinker *linker, VirtMachineState *vms) const uint32_t iort_node_offset = IORT_NODE_OFFSET; size_t node_size, smmu_offset = 0; AcpiIortIdMapping *idmap; + uint32_t id = 0; GArray *smmu_idmaps = g_array_new(false, true, sizeof(AcpiIortIdMapping)); GArray *its_idmaps = g_array_new(false, true, sizeof(AcpiIortIdMapping)); - AcpiTable table = { .sig = "IORT", .rev = 0, .oem_id = vms->oem_id, + AcpiTable table = { .sig = "IORT", .rev = 3, .oem_id = vms->oem_id, .oem_table_id = vms->oem_table_id }; /* Table 2 The IORT */ acpi_table_begin(&table, table_data); @@ -358,12 +360,12 @@ build_iort(GArray *table_data, BIOSLinker *linker, VirtMachineState *vms) build_append_int_noprefix(table_data, IORT_NODE_OFFSET, 4); build_append_int_noprefix(table_data, 0, 4); /* Reserved */ - /* 3.1.1.3 ITS group node */ + /* Table 12 ITS Group Format */ build_append_int_noprefix(table_data, 0 /* ITS Group */, 1); /* Type */ node_size = 20 /* fixed header size */ + 4 /* 1 GIC ITS Identifier */; build_append_int_noprefix(table_data, node_size, 2); /* Length */ - build_append_int_noprefix(table_data, 0, 1); /* Revision */ - build_append_int_noprefix(table_data, 0, 4); /* Reserved */ + build_append_int_noprefix(table_data, 1, 1); /* Revision */ + build_append_int_noprefix(table_data, id++, 4); /* Identifier */ build_append_int_noprefix(table_data, 0, 4); /* Number of ID mappings */ build_append_int_noprefix(table_data, 0, 4); /* Reference to ID Array */ build_append_int_noprefix(table_data, 1, 4); /* Number of ITSs */ @@ -374,19 +376,19 @@ build_iort(GArray *table_data, BIOSLinker *linker, VirtMachineState *vms) int irq = vms->irqmap[VIRT_SMMU] + ARM_SPI_BASE; smmu_offset = table_data->len - table.table_offset; - /* 3.1.1.2 SMMUv3 */ + /* Table 9 SMMUv3 Format */ build_append_int_noprefix(table_data, 4 /* SMMUv3 */, 1); /* Type */ node_size = SMMU_V3_ENTRY_SIZE + ID_MAPPING_ENTRY_SIZE; build_append_int_noprefix(table_data, node_size, 2); /* Length */ - build_append_int_noprefix(table_data, 0, 1); /* Revision */ - build_append_int_noprefix(table_data, 0, 4); /* Reserved */ + build_append_int_noprefix(table_data, 4, 1); /* Revision */ + build_append_int_noprefix(table_data, id++, 4); /* Identifier */ build_append_int_noprefix(table_data, 1, 4); /* Number of ID mappings */ /* Reference to ID Array */ build_append_int_noprefix(table_data, SMMU_V3_ENTRY_SIZE, 4); /* Base address */ build_append_int_noprefix(table_data, vms->memmap[VIRT_SMMU].base, 8); /* Flags */ - build_append_int_noprefix(table_data, 1 /* COHACC OverrideNote */, 4); + build_append_int_noprefix(table_data, 1 /* COHACC Override */, 4); build_append_int_noprefix(table_data, 0, 4); /* Reserved */ build_append_int_noprefix(table_data, 0, 8); /* VATOS address */ /* Model */ @@ -395,35 +397,43 @@ build_iort(GArray *table_data, BIOSLinker *linker, VirtMachineState *vms) build_append_int_noprefix(table_data, irq + 1, 4); /* PRI */ build_append_int_noprefix(table_data, irq + 3, 4); /* GERR */ build_append_int_noprefix(table_data, irq + 2, 4); /* Sync */ + build_append_int_noprefix(table_data, 0, 4); /* Proximity domain */ + /* DeviceID mapping index (ignored since interrupts are GSIV based) */ + build_append_int_noprefix(table_data, 0, 4); /* output IORT node is the ITS group node (the first node) */ build_iort_id_mapping(table_data, 0, 0xFFFF, IORT_NODE_OFFSET); } - /* Table 16 Root Complex Node */ + /* Table 17 Root Complex Node */ build_append_int_noprefix(table_data, 2 /* Root complex */, 1); /* Type */ node_size = ROOT_COMPLEX_ENTRY_SIZE + ID_MAPPING_ENTRY_SIZE * rc_mapping_count; build_append_int_noprefix(table_data, node_size, 2); /* Length */ - build_append_int_noprefix(table_data, 0, 1); /* Revision */ - build_append_int_noprefix(table_data, 0, 4); /* Reserved */ + build_append_int_noprefix(table_data, 3, 1); /* Revision */ + build_append_int_noprefix(table_data, id++, 4); /* Identifier */ /* Number of ID mappings */ build_append_int_noprefix(table_data, rc_mapping_count, 4); /* Reference to ID Array */ build_append_int_noprefix(table_data, ROOT_COMPLEX_ENTRY_SIZE, 4); - /* Table 13 Memory access properties */ + /* Table 14 Memory access properties */ /* CCA: Cache Coherent Attribute */ build_append_int_noprefix(table_data, 1 /* fully coherent */, 4); build_append_int_noprefix(table_data, 0, 1); /* AH: Note Allocation Hints */ build_append_int_noprefix(table_data, 0, 2); /* Reserved */ - /* MAF: Note Memory Access Flags */ - build_append_int_noprefix(table_data, 0x3 /* CCA = CPM = DCAS = 1 */, 1); + /* Table 15 Memory Access Flags */ + build_append_int_noprefix(table_data, 0x3 /* CCA = CPM = DACS = 1 */, 1); build_append_int_noprefix(table_data, 0, 4); /* ATS Attribute */ /* MCFG pci_segment */ build_append_int_noprefix(table_data, 0, 4); /* PCI Segment number */ + /* Memory address size limit */ + build_append_int_noprefix(table_data, 64, 1); + + build_append_int_noprefix(table_data, 0, 3); /* Reserved */ + /* Output Reference */ if (vms->iommu == VIRT_IOMMU_SMMUV3) { AcpiIortIdMapping *range; From patchwork Thu Oct 21 15:25:25 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 516054 Delivered-To: patch@linaro.org Received: by 2002:ac0:bf50:0:0:0:0:0 with SMTP id o16csp25330imj; Thu, 21 Oct 2021 08:39:52 -0700 (PDT) X-Google-Smtp-Source: ABdhPJxK0DhItOpVRpdFT9ECuuihYzFeobJfdJinWT2+GLx1gdLao+j795nGFjV3zVW88BX5zxjA X-Received: by 2002:a4a:6412:: with SMTP id o18mr4968691ooc.79.1634830792623; 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Tsirkin" Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" From: Eric Auger Re-generate reference blobs with rebuild-expected-aml.sh. Differences reported by "make check V=1" are listed below (IORT.numamem). Differences for other variants are similar. /* * Intel ACPI Component Architecture * AML/ASL+ Disassembler version 20180629 (64-bit version) * Copyright (c) 2000 - 2018 Intel Corporation * - * Disassembly of tests/data/acpi/virt/IORT.numamem, Thu Oct 14 06:13:19 2021 + * Disassembly of /tmp/aml-K8L9A1, Thu Oct 14 06:13:19 2021 * * ACPI Data Table [IORT] * * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue */ [000h 0000 4] Signature : "IORT" [IO Remapping Table] -[004h 0004 4] Table Length : 0000007C -[008h 0008 1] Revision : 00 -[009h 0009 1] Checksum : 07 +[004h 0004 4] Table Length : 00000080 +[008h 0008 1] Revision : 03 +[009h 0009 1] Checksum : B3 [00Ah 0010 6] Oem ID : "BOCHS " [010h 0016 8] Oem Table ID : "BXPC " [018h 0024 4] Oem Revision : 00000001 [01Ch 0028 4] Asl Compiler ID : "BXPC" [020h 0032 4] Asl Compiler Revision : 00000001 [024h 0036 4] Node Count : 00000002 [028h 0040 4] Node Offset : 00000030 [02Ch 0044 4] Reserved : 00000000 [030h 0048 1] Type : 00 [031h 0049 2] Length : 0018 -[033h 0051 1] Revision : 00 +[033h 0051 1] Revision : 01 [034h 0052 4] Reserved : 00000000 [038h 0056 4] Mapping Count : 00000000 [03Ch 0060 4] Mapping Offset : 00000000 [040h 0064 4] ItsCount : 00000001 [044h 0068 4] Identifiers : 00000000 [048h 0072 1] Type : 02 -[049h 0073 2] Length : 0034 -[04Bh 0075 1] Revision : 00 -[04Ch 0076 4] Reserved : 00000000 +[049h 0073 2] Length : 0038 +[04Bh 0075 1] Revision : 03 +[04Ch 0076 4] Reserved : 00000001 [050h 0080 4] Mapping Count : 00000001 -[054h 0084 4] Mapping Offset : 00000020 +[054h 0084 4] Mapping Offset : 00000024 [058h 0088 8] Memory Properties : [IORT Memory Access Properties] [058h 0088 4] Cache Coherency : 00000001 [05Ch 0092 1] Hints (decoded below) : 00 Transient : 0 Write Allocate : 0 Read Allocate : 0 Override : 0 [05Dh 0093 2] Reserved : 0000 [05Fh 0095 1] Memory Flags (decoded below) : 03 Coherency : 1 Device Attribute : 1 [060h 0096 4] ATS Attribute : 00000000 [064h 0100 4] PCI Segment Number : 00000000 -[068h 0104 1] Memory Size Limit : 00 +[068h 0104 1] Memory Size Limit : 40 [069h 0105 3] Reserved : 000000 -[068h 0104 4] Input base : 00000000 -[06Ch 0108 4] ID Count : 0000FFFF -[070h 0112 4] Output Base : 00000000 -[074h 0116 4] Output Reference : 00000030 -[078h 0120 4] Flags (decoded below) : 00000000 +[06Ch 0108 4] Input base : 00000000 +[070h 0112 4] ID Count : 0000FFFF +[074h 0116 4] Output Base : 00000000 +[078h 0120 4] Output Reference : 00000030 +[07Ch 0124 4] Flags (decoded below) : 00000000 Single Mapping : 0 -Raw Table Data: Length 124 (0x7C) +Raw Table Data: Length 128 (0x80) - 0000: 49 4F 52 54 7C 00 00 00 00 07 42 4F 43 48 53 20 // IORT|.....BOCHS + 0000: 49 4F 52 54 80 00 00 00 03 B3 42 4F 43 48 53 20 // IORT......BOCHS 0010: 42 58 50 43 20 20 20 20 01 00 00 00 42 58 50 43 // BXPC ....BXPC 0020: 01 00 00 00 02 00 00 00 30 00 00 00 00 00 00 00 // ........0....... - 0030: 00 18 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ - 0040: 01 00 00 00 00 00 00 00 02 34 00 00 00 00 00 00 // .........4...... - 0050: 01 00 00 00 20 00 00 00 01 00 00 00 00 00 00 03 // .... ........... - 0060: 00 00 00 00 00 00 00 00 00 00 00 00 FF FF 00 00 // ................ - 0070: 00 00 00 00 30 00 00 00 00 00 00 00 // ....0....... + 0030: 00 18 00 01 00 00 00 00 00 00 00 00 00 00 00 00 // ................ + 0040: 01 00 00 00 00 00 00 00 02 38 00 03 01 00 00 00 // .........8...... + 0050: 01 00 00 00 24 00 00 00 01 00 00 00 00 00 00 03 // ....$........... + 0060: 00 00 00 00 00 00 00 00 40 00 00 00 00 00 00 00 // ........@....... + 0070: FF FF 00 00 00 00 00 00 30 00 00 00 00 00 00 00 // ........0....... ** Signed-off-by: Eric Auger Reviewed-by: Michael S. Tsirkin Message-Id: <20211014115643.756977-4-eric.auger@redhat.com> Signed-off-by: Richard Henderson --- tests/qtest/bios-tables-test-allowed-diff.h | 1 - tests/data/acpi/virt/IORT | Bin 124 -> 128 bytes tests/data/acpi/virt/IORT.memhp | Bin 124 -> 128 bytes tests/data/acpi/virt/IORT.numamem | Bin 124 -> 128 bytes tests/data/acpi/virt/IORT.pxb | Bin 124 -> 128 bytes 5 files changed, 1 deletion(-) diff --git a/tests/data/acpi/virt/IORT b/tests/data/acpi/virt/IORT index 521acefe9ba66706c5607321a82d330586f3f280..7efd0ce8a6b3928efa7e1373f688ab4c5f50543b 100644 GIT binary patch literal 128 zcmebD4+?2uU|?Y0?Bwt45v<@85#X!<1dKp25F11@0kHuPgMkDCNC*yK93~3}W)K^M VRiHGGVg_O`aDdYP|3ers^8jQz3IPBB literal 124 zcmebD4+^Pa00MR=e`k+i1*eDrX9XZ&1PX!JAesq?4S*O7Bw!2(4Uz`|CKCt^;wu0# QRGb+i3L*dhhtM#y0PN=p0RR91 diff --git a/tests/data/acpi/virt/IORT.memhp b/tests/data/acpi/virt/IORT.memhp index 521acefe9ba66706c5607321a82d330586f3f280..7efd0ce8a6b3928efa7e1373f688ab4c5f50543b 100644 GIT binary patch literal 128 zcmebD4+?2uU|?Y0?Bwt45v<@85#X!<1dKp25F11@0kHuPgMkDCNC*yK93~3}W)K^M VRiHGGVg_O`aDdYP|3ers^8jQz3IPBB literal 124 zcmebD4+^Pa00MR=e`k+i1*eDrX9XZ&1PX!JAesq?4S*O7Bw!2(4Uz`|CKCt^;wu0# QRGb+i3L*dhhtM#y0PN=p0RR91 diff --git a/tests/data/acpi/virt/IORT.numamem b/tests/data/acpi/virt/IORT.numamem index 521acefe9ba66706c5607321a82d330586f3f280..7efd0ce8a6b3928efa7e1373f688ab4c5f50543b 100644 GIT binary patch literal 128 zcmebD4+?2uU|?Y0?Bwt45v<@85#X!<1dKp25F11@0kHuPgMkDCNC*yK93~3}W)K^M VRiHGGVg_O`aDdYP|3ers^8jQz3IPBB literal 124 zcmebD4+^Pa00MR=e`k+i1*eDrX9XZ&1PX!JAesq?4S*O7Bw!2(4Uz`|CKCt^;wu0# QRGb+i3L*dhhtM#y0PN=p0RR91 diff --git a/tests/data/acpi/virt/IORT.pxb b/tests/data/acpi/virt/IORT.pxb index 521acefe9ba66706c5607321a82d330586f3f280..7efd0ce8a6b3928efa7e1373f688ab4c5f50543b 100644 GIT binary patch literal 128 zcmebD4+?2uU|?Y0?Bwt45v<@85#X!<1dKp25F11@0kHuPgMkDCNC*yK93~3}W)K^M VRiHGGVg_O`aDdYP|3ers^8jQz3IPBB literal 124 zcmebD4+^Pa00MR=e`k+i1*eDrX9XZ&1PX!JAesq?4S*O7Bw!2(4Uz`|CKCt^;wu0# QRGb+i3L*dhhtM#y0PN=p0RR91 -- 2.25.1 diff --git a/tests/qtest/bios-tables-test-allowed-diff.h b/tests/qtest/bios-tables-test-allowed-diff.h index 9a5a923d6b..dfb8523c8b 100644 --- a/tests/qtest/bios-tables-test-allowed-diff.h +++ b/tests/qtest/bios-tables-test-allowed-diff.h @@ -1,2 +1 @@ /* List of comma-separated changed AML files to ignore */ -"tests/data/acpi/virt/IORT", From patchwork Thu Oct 21 15:25:26 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 516057 Delivered-To: patch@linaro.org Received: by 2002:ac0:bf50:0:0:0:0:0 with SMTP id o16csp28096imj; Thu, 21 Oct 2021 08:43:09 -0700 (PDT) X-Google-Smtp-Source: ABdhPJwtKemy8P0ZudvEUAQHsrKFoEC20EsbB2C3QrGAoj026yVPRuLSshgOU3p5UkbsDyW+/PMA X-Received: by 2002:a1f:324d:: with SMTP id y74mr6937704vky.20.1634830988981; Thu, 21 Oct 2021 08:43:08 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1634830988; cv=none; d=google.com; s=arc-20160816; b=Mbuz6rYOUC5khX62kuO1qFIIZ+hEMBw1IK7ILvlKdt5xM0dHcZ4N1YXTAf4IlJRYca py2EKVrIQuHdmM3UfEGts+b+aNGbpy4n+7heBZ5yQ8U0XGYMdhdw/u0I4zDLAggfDygw /qNZx/GAK9yIARzPKCDuwx+1nXdXBePtSkptayFYkY3f3dBlFDuF3Bu4NetwMsyzUaRK 6DXONZuBXLcBR0UiOt8jOQmdFX3UwaLtELsSZYsNlK0MKN82yyZJA0yRtGPBke2yL3l9 M6MKLF5xEv7CcIsxUhbVzS9GzSbCIh5rR9vqYo7kNe/WbsroIWHaerUQ59tYWA0zHV4m vvqw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=nBGj2XYtx0Tec+cPzA7IoclmH9d3Yk5987FTDu6jQCk=; b=JM5CZoxkSlpvX5NyDO5f/VunLaGhXUtbEz+bWT81rGvkfRNzG65i1CYX1qG6HHM56m LX5MD8UFgSLgaGKv2Qo8cQlHZQLQVUPmgqQ0Fbn3iv9FOCWswb5TErE0TBPEagMuuKSa 4mC14BIJ8Ye1zUGEtSvM+k6J32b1ocbsIfJbBEyrLUvKULSM83IZIwkdrLv7FNr03PBw 2szA7lJ4dV9bqTSS0fAYB9Cgl4uV1W2lC8g147P51pulE9mzhy07xS15WyIz2L2vhjiG xfM6pHw70eL3B0pLcLz5uZ95lYYvsPLG520WjBHpIdRcKJonq33KJ1GTOXL4iPgeF4OD Ayqg== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=msFIIW2N; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id t1si5917817vsj.22.2021.10.21.08.43.08 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Thu, 21 Oct 2021 08:43:08 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=msFIIW2N; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:41292 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1mdaDk-00065U-42 for patch@linaro.org; Thu, 21 Oct 2021 11:43:08 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:56548) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1mdZx0-0008QR-9B for qemu-devel@nongnu.org; Thu, 21 Oct 2021 11:25:50 -0400 Received: from mail-pj1-x102c.google.com ([2607:f8b0:4864:20::102c]:44900) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1mdZww-0002FD-PE for qemu-devel@nongnu.org; Thu, 21 Oct 2021 11:25:49 -0400 Received: by mail-pj1-x102c.google.com with SMTP id oa12-20020a17090b1bcc00b0019f715462a8so800025pjb.3 for ; Thu, 21 Oct 2021 08:25:46 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=nBGj2XYtx0Tec+cPzA7IoclmH9d3Yk5987FTDu6jQCk=; b=msFIIW2NWUspCgD4WY8HpGWte9b4kzPAo9Lr2lJ+nk7axzEH9Sj66Y8A4vDH85RkgT a28zce0TVWviV971NxpYHGBYrgsBfejs6mmD/IdwKfjMh9AmLhtUh4ceJjaorlxU8/Yj MMAN4FlE8a/+exoc1bLSRc2mujwxxsBV57jC50vrXxHYcme7Utza266ZrsrY46FRzKPs ZUWzG8VHWPCbZGaBDRTtdOTC5/fL/DAUUxLDdHI/qL1hMzv9o1Fd2QGMG3k+dNyh1UnT YCN06/1TPsH+NzmKJn2VQEuv4klwCzsbYWphAOmhEG94y8gSRR1IJ7CLlOCMFCdsQ0fZ DTVQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=nBGj2XYtx0Tec+cPzA7IoclmH9d3Yk5987FTDu6jQCk=; b=ZOhsD2HrXxA0vvJO2+EY70y5lINYkthHkTR/uOYhEEe3aUOYehY8ZCPpkuHytPIMqb IDGpujpKs3nQdqJtGKDkL+/nNIODsqz9XGb7Va/tXe6nlQbVWksjOMAbpqOXZN4cPR5Q a/wUnywIfAgFEX8cMDB7IwfULYbV2skxy3AbGZvUcXzOrzOZG7phDObgeZsMPMkDyolV LXPB73bDzPitDvrxeEumeY2x/knL+v6jbUbKZqvUW+hNGEp+dvzCqHpHKikioVTX/ajE qT/CPRUl/dHhkhn6deKJCKU/uYCjKUq70N88jidpxdCbHm9/nhx0Kw9fPUdxEKASM184 KpUg== X-Gm-Message-State: AOAM532wwZOXAg/pkNTaLzRjNAxiPlKr8h83wsQ879E9FXdbMDasmVvc NynaRlNSaxv1XBQiG5N6y3d4nJqHvjtZSg== X-Received: by 2002:a17:90a:4595:: with SMTP id v21mr7305301pjg.43.1634829945343; Thu, 21 Oct 2021 08:25:45 -0700 (PDT) Received: from localhost.localdomain ([71.212.134.125]) by smtp.gmail.com with ESMTPSA id y3sm5676257pge.44.2021.10.21.08.25.44 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 21 Oct 2021 08:25:45 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PULL 04/19] hw/arm/virt: Don't create device-tree node for empty NUMA node Date: Thu, 21 Oct 2021 08:25:26 -0700 Message-Id: <20211021152541.781175-5-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20211021152541.781175-1-richard.henderson@linaro.org> References: <20211021152541.781175-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::102c; envelope-from=richard.henderson@linaro.org; helo=mail-pj1-x102c.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Andrew Jones , Gavin Shan Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" From: Gavin Shan The empty NUMA node, where no memory resides, are allowed. For example, the following command line specifies two empty NUMA nodes. With this, QEMU fails to boot because of the conflicting device-tree node names, as the following error message indicates. /home/gavin/sandbox/qemu.main/build/qemu-system-aarch64 \ -accel kvm -machine virt,gic-version=host \ -cpu host -smp 4,sockets=2,cores=2,threads=1 \ -m 1024M,slots=16,maxmem=64G \ -object memory-backend-ram,id=mem0,size=512M \ -object memory-backend-ram,id=mem1,size=512M \ -numa node,nodeid=0,cpus=0-1,memdev=mem0 \ -numa node,nodeid=1,cpus=2-3,memdev=mem1 \ -numa node,nodeid=2 \ -numa node,nodeid=3 : qemu-system-aarch64: FDT: Failed to create subnode /memory@80000000: FDT_ERR_EXISTS As specified by linux device-tree binding document, the device-tree nodes for these empty NUMA nodes shouldn't be generated. However, the corresponding NUMA node IDs should be included in the distance map. The memory hotplug through device-tree on ARM64 isn't existing so far and it's not necessary to require the user to provide a distance map. Furthermore, the default distance map Linux generates may even be sufficient. So this simply skips populating the device-tree nodes for these empty NUMA nodes to avoid the error, so that QEMU can be started successfully. Signed-off-by: Gavin Shan Reviewed-by: Andrew Jones Message-Id: <20211015124246.23073-1-gshan@redhat.com> Signed-off-by: Richard Henderson --- hw/arm/boot.c | 13 +++++++++++++ 1 file changed, 13 insertions(+) -- 2.25.1 diff --git a/hw/arm/boot.c b/hw/arm/boot.c index 57efb61ee4..74ad397b1f 100644 --- a/hw/arm/boot.c +++ b/hw/arm/boot.c @@ -599,10 +599,23 @@ int arm_load_dtb(hwaddr addr, const struct arm_boot_info *binfo, } g_strfreev(node_path); + /* + * We drop all the memory nodes which correspond to empty NUMA nodes + * from the device tree, because the Linux NUMA binding document + * states they should not be generated. Linux will get the NUMA node + * IDs of the empty NUMA nodes from the distance map if they are needed. + * This means QEMU users may be obliged to provide command lines which + * configure distance maps when the empty NUMA node IDs are needed and + * Linux's default distance map isn't sufficient. + */ if (ms->numa_state != NULL && ms->numa_state->num_nodes > 0) { mem_base = binfo->loader_start; for (i = 0; i < ms->numa_state->num_nodes; i++) { mem_len = ms->numa_state->nodes[i].node_mem; + if (!mem_len) { + continue; + } + rc = fdt_add_memory_node(fdt, acells, mem_base, scells, mem_len, i); if (rc < 0) { From patchwork Thu Oct 21 15:25:27 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 516049 Delivered-To: patch@linaro.org Received: by 2002:ac0:bf50:0:0:0:0:0 with SMTP id o16csp20503imj; Thu, 21 Oct 2021 08:33:21 -0700 (PDT) X-Google-Smtp-Source: ABdhPJwGcq+4cZYDI5io/2+zGP+6JH800+G1a8lxvGDlmA6fTjJOc4Wf1ES4v9hPZZPj5tVL/T1N X-Received: by 2002:a05:6808:144c:: with SMTP id x12mr2733553oiv.6.1634830401386; Thu, 21 Oct 2021 08:33:21 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1634830401; cv=none; d=google.com; s=arc-20160816; b=VY+I0yIyWFZTa6jgK5SJEN+o/UV/g47+WO2seFpdM2XmpqYNzYdfu8VBwBb0IqhZZk dQwBaXSiw56yzW+pJeSd4O2VGG1zsd+V5FxRzZPSU6ZmW914mUacA3xvEfe2BUiRuAvu zoDSxf+SMWug7z/aRkI70NwS4PbaSaBh1CnDGZRLFo8uZTUl5VSQ1sFYmEFqoDtKoIE+ RvRXU9PApD0GvMKdWPTtEdUYHD9M7jP9nXrI7mTRpk9k3f7pVK3y+xS7BYiy+XWasVnk rBnHhZpHO8f5VBBY3wxQArfKudRQjCB2HGZEdHjrzmPzN6Towbm4g8bW0CzzTGecFluC RPdA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=XmPiuN7VGWQFXG0wvR4WMwlqOuQOorNdUMgDKtUti9Y=; b=V58GNT0WWbSjt3hbRxf196kXca0mDJPQ92EC43HPZyjpOd1qKxKG6SJzBLNP/PmXQ8 s7jQ7AFXwKKu42c0Ya5Hpi0p7UboJIUq8r/SS8D0E2+t/ISv8zpmADCuqAYQgdlK8ZkM 0S2zticsipKaDtTIGuP++uyWLPidfc2gNuo+fqGR3UkXHLB/o8GXx1kW/eoHamJ9Lai9 R4RQL7Pd3E/NE+hfBNweEH1UswzCir/jX9UsGWRU2dqVeH3Gw93ywITTOZ2M5dSIgdub Q7ZcFfrTbd7xi7I6wLWrquetJSckx2QlslbrVn7J1f8RrmhJ+H1qo5B/wOt4j79Taixo EQmg== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=YGjkYKoW; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Thomas Huth Reviewed-by: Gerd Hoffmann Message-Id: <20211018105816.2663195-2-philmd@redhat.com> Signed-off-by: Richard Henderson --- roms/Makefile | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) -- 2.25.1 diff --git a/roms/Makefile b/roms/Makefile index eeb5970348..b967b53bb7 100644 --- a/roms/Makefile +++ b/roms/Makefile @@ -143,7 +143,8 @@ build-efi-roms: build-pxe-roms # efirom # edk2-basetools: - cd edk2/BaseTools && git submodule update --init --force + cd edk2/BaseTools && git submodule update --init --force \ + Source/C/BrotliCompress/brotli $(MAKE) -C edk2/BaseTools \ PYTHON_COMMAND=$${EDK2_PYTHON_COMMAND:-python3} \ EXTRA_OPTFLAGS='$(EDK2_BASETOOLS_OPTFLAGS)' \ From patchwork Thu Oct 21 15:25:28 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 516058 Delivered-To: patch@linaro.org Received: by 2002:ac0:bf50:0:0:0:0:0 with SMTP id o16csp28198imj; Thu, 21 Oct 2021 08:43:15 -0700 (PDT) X-Google-Smtp-Source: ABdhPJxbnQzb8JHvMUMryHdycCSIRmGMhgBU0Ohula2N/7X4Q1OhoPz/48+AlOScVgdeGNLnkedb X-Received: by 2002:a9d:6483:: with SMTP id g3mr5383818otl.105.1634830995670; Thu, 21 Oct 2021 08:43:15 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1634830995; cv=none; d=google.com; s=arc-20160816; b=yBMRTRFQ3hLLBEWS5M67zvLW3pNg6C7SbOknaRMZVEZbbQk/H7vKrlhgTdUbK6bgoo DSl3PlD0rMGt0jmZYohSlWC9pRXuNH5a5Kob0HD9X5cybFxGsxPDOWIO+afs9YattiS0 x5jYp9ZiU/UNaMImIlVIbSVn/qY7dw+tzErTcjxE3tAv+0JqCBsBfuFvl1Co5nj0kAAm 8vJQBLzajfzzF9Rt3LpkWiMUcyvMz4Kt/Z6xysQoUJW3Yr4Nd8YpDjBLM56n0WOr6CdQ nGh8wKhD5W6nChT4tAQpDp4CFSItKT/MesFnwW+PXnJWNpLooABRDzQUOnk6JJQRuTU2 +cJg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=Mt5a7D+1CVHAxOqseVTcbDnwKe/J2TFbRKsmpUgULEQ=; b=qXBSzDrKFS1UfmEqJRfvGFKLQq/zqhy6vfVJSRukDqpOFShLqww/BfctFuR0HMwvZt HdXpX0gOTDOxWSWlqV0yXUTrPABspO60yomFVlQkCVmtxWgKLlF3oVNwhPdPpxKrmt/s 2BzvdPDwqZmWkavz1sf7EmTrurH6IBTvCG5WaCGExm2irb0DkQ6cZC10zn4sijfJKLKK OdUVbUz9HdkhY9TbMnFkwrqLepR3xaas/ILujb4TmdjVLkz5RZiCq2ulACeZh8yGtRG0 gEtGjWb0dVvga9py4utaoHAW4+7YHZwPaRiwaofmcmBRy2aocSNthqgPjsmyfMwmObUD 8xpg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="dFPK/2vd"; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id h8si7561168oti.2.2021.10.21.08.43.15 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Thu, 21 Oct 2021 08:43:15 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="dFPK/2vd"; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:41884 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1mdaDq-0006Ve-0e for patch@linaro.org; Thu, 21 Oct 2021 11:43:14 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:56620) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1mdZx2-00005I-I2 for qemu-devel@nongnu.org; Thu, 21 Oct 2021 11:25:52 -0400 Received: from mail-pj1-x102e.google.com ([2607:f8b0:4864:20::102e]:44902) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1mdZwy-0002LW-1q for qemu-devel@nongnu.org; Thu, 21 Oct 2021 11:25:52 -0400 Received: by mail-pj1-x102e.google.com with SMTP id oa12-20020a17090b1bcc00b0019f715462a8so800057pjb.3 for ; Thu, 21 Oct 2021 08:25:47 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=Mt5a7D+1CVHAxOqseVTcbDnwKe/J2TFbRKsmpUgULEQ=; b=dFPK/2vdLzATItyeIfFqrv3zJOcG0viMblzvs6AXMj/etJYy1bAg7pzJvR0uXemS/u /ILyuqW2+kpxizqAE0TxPDxWxpx2AfTocvXBDdJsA5f7wZWo3pbEL/uf15u4TankElde Wxrs3UzPpIv8kkpBfIHVwATf/TavA5WRsolzxSN3YqyxuwYnmCfKStacfkWnfeUJgy7P kIX24r54+p7EtCed99q4yapGrdCP9oiAosvjowJLKGsH7njH5JDDmht1IbjKROcg+Ieg jkIaoh+BBjxT0q+BW3H1s9cNblqq8fMh+eoC5ENOhWb8Zhpe+Lvx8mnZRM+6ltJIUYsH 7p1A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=Mt5a7D+1CVHAxOqseVTcbDnwKe/J2TFbRKsmpUgULEQ=; b=mAYQsL8+9ydkgCVkc2ELwhP/SEMsRcEElVT++y0lRQS+6kBUFkhxhPdq6B3wyCbZpV IZffrCgkt25BlyPT9uQi+FXT952KMAsGzLOCASNYsVTU3Cffslqrj+JDhEtPngV3LUA5 w+vVbSwZlJQlTXpTkVmSQYezy4FXWW1k1CGmaGJ3cIcdEbSLug2V/KtSwRYCx3x6NE4I jJ1kV5BIUoDWwEqEdSWH+7M5TRNWA8efBoaCgcTne0FV0rxUSc4REBNr+TI55YkmBAnb toORR40rZm1Z8LhcjrqaC+xiuvnzMsLurDpZbYKhPRNTnprcX6/+UI63hE+iZqrMSVBj cXVQ== X-Gm-Message-State: AOAM53028MrqqF2bQ2Zhv2KTqXm8/6zBVXWXbSCEgKD+99/QXboVShGj ez0CGvpP7rzlOXcEb/wT+dxWiunaVRHbqw== X-Received: by 2002:a17:902:70c5:b0:13f:f941:9ad6 with SMTP id l5-20020a17090270c500b0013ff9419ad6mr4143486plt.28.1634829946558; Thu, 21 Oct 2021 08:25:46 -0700 (PDT) Received: from localhost.localdomain ([71.212.134.125]) by smtp.gmail.com with ESMTPSA id y3sm5676257pge.44.2021.10.21.08.25.46 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 21 Oct 2021 08:25:46 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PULL 06/19] roms/edk2: Only initialize required submodules Date: Thu, 21 Oct 2021 08:25:28 -0700 Message-Id: <20211021152541.781175-7-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20211021152541.781175-1-richard.henderson@linaro.org> References: <20211021152541.781175-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::102e; envelope-from=richard.henderson@linaro.org; helo=mail-pj1-x102e.google.com X-Spam_score_int: -1 X-Spam_score: -0.2 X-Spam_bar: / X-Spam_report: (-0.2 / 5.0 requ) DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Gerd Hoffmann Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" From: Philippe Mathieu-Daudé The EDK2 firmware images built to test QEMU do not require the following submodules: - MdeModulePkg/Universal/RegularExpressionDxe/oniguruma - UnitTestFrameworkPkg/Library/CmockaLib/cmocka The only submodules required are: - ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3 - BaseTools/Source/C/BrotliCompress/brotli - CryptoPkg/Library/OpensslLib/openssl - MdeModulePkg/Library/BrotliCustomDecompressLib/brotli Adapt the buildsys machinery to only initialize the required submodules. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Gerd Hoffmann Message-Id: <20211018105816.2663195-3-philmd@redhat.com> Signed-off-by: Richard Henderson --- .gitlab-ci.d/edk2.yml | 6 +++++- roms/Makefile.edk2 | 7 ++++++- scripts/make-release | 7 ++++++- 3 files changed, 17 insertions(+), 3 deletions(-) -- 2.25.1 diff --git a/.gitlab-ci.d/edk2.yml b/.gitlab-ci.d/edk2.yml index 62497ba47f..13d0f8b019 100644 --- a/.gitlab-ci.d/edk2.yml +++ b/.gitlab-ci.d/edk2.yml @@ -50,7 +50,11 @@ build-edk2: GIT_DEPTH: 3 script: # Clone the required submodules and build EDK2 - git submodule update --init roms/edk2 - - git -C roms/edk2 submodule update --init + - git -C roms/edk2 submodule update --init -- + ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3 + BaseTools/Source/C/BrotliCompress/brotli + CryptoPkg/Library/OpensslLib/openssl + MdeModulePkg/Library/BrotliCustomDecompressLib/brotli - export JOBS=$(($(getconf _NPROCESSORS_ONLN) + 1)) - echo "=== Using ${JOBS} simultaneous jobs ===" - make -j${JOBS} -C roms efi 2>&1 1>edk2-stdout.log | tee -a edk2-stderr.log >&2 diff --git a/roms/Makefile.edk2 b/roms/Makefile.edk2 index a8ed325575..fdae0b511f 100644 --- a/roms/Makefile.edk2 +++ b/roms/Makefile.edk2 @@ -51,7 +51,12 @@ all: $(foreach flashdev,$(flashdevs),../pc-bios/edk2-$(flashdev).fd.bz2) \ # make-release/tarball scripts. submodules: if test -d edk2/.git; then \ - cd edk2 && git submodule update --init --force; \ + cd edk2 && git submodule update --init --force -- \ + ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3 \ + BaseTools/Source/C/BrotliCompress/brotli \ + CryptoPkg/Library/OpensslLib/openssl \ + MdeModulePkg/Library/BrotliCustomDecompressLib/brotli \ + ; \ fi # See notes on the ".NOTPARALLEL" target and the "+" indicator in diff --git a/scripts/make-release b/scripts/make-release index a2a8cda33c..05b14ecc95 100755 --- a/scripts/make-release +++ b/scripts/make-release @@ -27,7 +27,12 @@ git submodule update --init # don't necessarily have much control over how a submodule handles its # submodule dependencies, so we continue to handle these on a case-by-case # basis for now. -(cd roms/edk2 && git submodule update --init) +(cd roms/edk2 && \ + git submodule update --init -- \ + ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3 \ + BaseTools/Source/C/BrotliCompress/brotli \ + CryptoPkg/Library/OpensslLib/openssl \ + MdeModulePkg/Library/BrotliCustomDecompressLib/brotli) popd tar --exclude=.git -cjf ${destination}.tar.bz2 ${destination} rm -rf ${destination} From patchwork Thu Oct 21 15:25:29 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 516052 Delivered-To: patch@linaro.org Received: by 2002:ac0:bf50:0:0:0:0:0 with SMTP id o16csp24497imj; Thu, 21 Oct 2021 08:38:51 -0700 (PDT) X-Google-Smtp-Source: ABdhPJzkZfCD5IjO2KRMT5maA5PqMXIYCSNYuuJ3T2DypRgIW9gY70999f4GyM67oUvIDuQLGBpM X-Received: by 2002:aca:af84:: with SMTP id y126mr5584671oie.20.1634830731726; Thu, 21 Oct 2021 08:38:51 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1634830731; cv=none; d=google.com; s=arc-20160816; b=GI+53SBlzp2lONbXFIIoOW8lyeuUi4L7sRhVTCN4Fq69aH6uWLZTgmJT4EJfHngX0V 58hAf2cR4eJ5W/rgKpKZT9jtmP6zHf8I8mmauJizj7NrPlKKZ5dAvYsKvMA3hAIHRbdI y2cOeiNdMK6dIzoJTl1dU/0LQ5Nwb/ffEzijXvcTU5gtylZMuixkhzhP/XvSFSICFpky kkIR9Z/SyTNJHOLMeB44NnimPl/ycn/3dtXLIM7ivBsV8D27rHfTs9QyE8nIVxtAgstZ X3/3JCF1yvEgLgQ5HDhV8CZGiBiMC1c9WHYxCceaa/UPu+/3MK1keNPw5TFzlxE79ET6 Yw/g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=gwDCMsSCc9wL1Hr2zvm6dizELl6LEePS1y9rxyoipeg=; b=h0mYcAzdrVn6GM3qmv28p+kCC44jWrTUdfZluGkGMBRA8S/uu4K6EKTcivJrsIQeHW fVloCr52pyteJ61SmLdcyRIIY7aEEDt1bVHxUQ8KRuioESb5+5y9b1/EbVKfyTmapBQU lI9Ces4KMS3F+p2w1Rww/HdMod1wJ/2w0dJabdjMgf4OcJiCS4cqiDBpHgcTU13lhUTw vx6qFty87jE3/5JoW976Z5UhtxrpiXTi6VfypIi1z/wGWT4bPLlprLzsRz3Rc/9/nyGp eHrZe/yZQnQ6QZflb9jLFJpf7O2SBsanhHzNbr5jx/jHrYws13SCc+3Xkvic8LFCzbTR MQcg== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=nEfzbXPY; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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Date: Thu, 21 Oct 2021 08:25:29 -0700 Message-Id: <20211021152541.781175-8-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20211021152541.781175-1-richard.henderson@linaro.org> References: <20211021152541.781175-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::535; envelope-from=richard.henderson@linaro.org; helo=mail-pg1-x535.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Yanan Wang , =?utf-8?q?Alex_Benn=C3=A9e?= , Shuuichirou Ishii Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" From: Shuuichirou Ishii Signed-off-by: Shuuichirou Ishii Reviewed-by: Alex Bennée Reviewed-by: Yanan Wang Message-Id: <20211008063604.670699-1-ishii.shuuichir@fujitsu.com> Signed-off-by: Richard Henderson --- hw/arm/sbsa-ref.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) -- 2.25.1 diff --git a/hw/arm/sbsa-ref.c b/hw/arm/sbsa-ref.c index 509c5f09b4..358714bd3e 100644 --- a/hw/arm/sbsa-ref.c +++ b/hw/arm/sbsa-ref.c @@ -670,7 +670,7 @@ static void sbsa_ref_init(MachineState *machine) int n, sbsa_max_cpus; if (!cpu_type_valid(machine->cpu_type)) { - error_report("mach-virt: CPU type %s not supported", machine->cpu_type); + error_report("sbsa-ref: CPU type %s not supported", machine->cpu_type); exit(1); } From patchwork Thu Oct 21 15:25:30 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 516059 Delivered-To: patch@linaro.org Received: by 2002:ac0:bf50:0:0:0:0:0 with SMTP id o16csp29302imj; Thu, 21 Oct 2021 08:44:38 -0700 (PDT) X-Google-Smtp-Source: ABdhPJzIRQUHcpXis5sedkO+csrd6uN2kh0sm0Zm+06hJ/xZQNFFY6ee0gL6eA+RRUJUT4AHAL7N X-Received: by 2002:a05:6102:3577:: with SMTP id bh23mr7259069vsb.8.1634831078191; Thu, 21 Oct 2021 08:44:38 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1634831078; cv=none; d=google.com; s=arc-20160816; b=1Gh/fq723qy0UuTRaU9x6woImpIVauesn4RZhywuXJoSFTf1qHnNyHmaozmdlmqBcS 1y3xw8rosmwETzhZVVOSjTlghb84DpdgjWXAvOGKIBGh0XBLXlFO4qvQCyJ88OFT1aZa unI2AxynFHtRn+brK3m6BhA9sEbWPYVOtPeZIemyjV/VR20/cmGQkFYCG02JgkwenYvL CjmXrRzWxEk31M3Wlauu5IqM4jx3cKWzpMGsE6tya4IVNdq3odwNq/SGx5O4VwXB+NfS bpF0TT+a5N/p+fuu8MAzCzoLO7uD2bE0zQYnYcA2kkGyg5wrZ3oMvLFKi763Yc7UGzNd 9BdA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=p7YWf2lujzAh/0d3UGKlGnAGxER9ViPbSHizUh6kk68=; b=sOYasR9fyunyiQB8X00x3EvEiFMpgf3N6+GincPTzGzm3yhtRsZeZd/Ac1UNOAV3E4 ct8aG3wwMz8XFeo8BmOukeT9ypXXAQKPsBnxlRJZYghcJQSJLeNs/A2mpBVz/cRnqs+R ccs5JmBsqsM/P8roBP+T+fqI3PUQEacEVx8C0B81Bsoe1OepvKh6hqu9vJdyZWvDnYDp +YexA58oOKqj7cv7pcSedK7aohWnehnkFNwbyaOKMvISO/oyUF0fBd6mLVlYZ7l3AGlh 1cjRDyq7zvXoej32pOlCTw+3hH/OfjE9kh2fm8O2kM2Yc8YGU4UIi0nPB4mfqg4vohuQ vyUA== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=knG80ZLf; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id k19si1832631vkr.43.2021.10.21.08.44.38 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Thu, 21 Oct 2021 08:44:38 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=knG80ZLf; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:47560 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1mdaFB-0001uW-By for patch@linaro.org; Thu, 21 Oct 2021 11:44:37 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:56706) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1mdZx5-0000Ef-9a for qemu-devel@nongnu.org; Thu, 21 Oct 2021 11:25:55 -0400 Received: from mail-pl1-x631.google.com ([2607:f8b0:4864:20::631]:35499) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1mdZwz-0002QJ-K0 for qemu-devel@nongnu.org; Thu, 21 Oct 2021 11:25:54 -0400 Received: by mail-pl1-x631.google.com with SMTP id u6so678283ple.2 for ; Thu, 21 Oct 2021 08:25:49 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=p7YWf2lujzAh/0d3UGKlGnAGxER9ViPbSHizUh6kk68=; b=knG80ZLfW4p/cPYojkdsGeK+PSx0YEOXX/1dAH6esqdSFUie3YS3BBHCdLSFzjIafm /MMt0cVW6cqwoysoX2yFLRZ3wXl0pd+6Zz+TeVfmc4gT4DeiP/VpPHUJ8v7FIluRU3eo C0QlzEqORgIh+8uXyzFrCdTjAthHIkeQ9hxLUNhU+xuhesWiyXs6p5C+z6ENYZD7iJl8 E0BCG6vgcP0ZRR+1npap7lFGaltfhIR3HVn+Bp17df2DNrJVJH74KfwU0bv2QOw+4bvX qMnATqxy8bPG45ixWfVi44LfYc5/F7EX9MLTYi3XAFDXLxnAE0lnH2AJ9NkIi3t0emOe Jmkw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=p7YWf2lujzAh/0d3UGKlGnAGxER9ViPbSHizUh6kk68=; b=hwtnPzzYfFSWFH6kzY5y5AyuT0IyoyRgwlFHzTXjl6X+pbAFZUG8qmLEaNwilu/QY/ fJSFnBYQJrweObQ/5C545x8ldqxXpxM1tnBqrH5RBWZu64zBRyS7iEygtwxD7q2ZH1KV b+lofzmFPIorQiYpBXqv4ct0P3DYjYO14KRZtK+DC0bwdydAIchU/PWUTmiEXHKqT1xT hHBtGXSMyQhxjnhRB+ya0rAkxXSmdZylq25+Ufo+9voI8BLiO6EaVIlTwLNeMbJvX/n6 Ohwq9s0uQXBOK0AB/K2P1rXDSE3c+0kbiHVcd72kiEepS/x6OQxNqSgAZzhCBh5Kunq+ hNiw== X-Gm-Message-State: AOAM5320FZq6qkYcLC0xfKsfxE0Oszz5eCWzDmoLnNdCEvWdvHDGmYiP EviC65xD+iErphMexTtikF3tz+u1Ig++Gw== X-Received: by 2002:a17:902:ff02:b0:140:512:4dda with SMTP id f2-20020a170902ff0200b0014005124ddamr2552717plj.44.1634829948110; Thu, 21 Oct 2021 08:25:48 -0700 (PDT) Received: from localhost.localdomain ([71.212.134.125]) by smtp.gmail.com with ESMTPSA id y3sm5676257pge.44.2021.10.21.08.25.47 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 21 Oct 2021 08:25:47 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PULL 08/19] hw/elf_ops.h: switch to ssize_t for elf loader return type Date: Thu, 21 Oct 2021 08:25:30 -0700 Message-Id: <20211021152541.781175-9-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20211021152541.781175-1-richard.henderson@linaro.org> References: <20211021152541.781175-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::631; envelope-from=richard.henderson@linaro.org; helo=mail-pl1-x631.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Stefano Garzarella , Luc Michel , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" From: Luc Michel Until now, int was used as the return type for all the ELF loader related functions. The returned value is the sum of all loaded program headers "MemSize" fields. Because of the overflow check in elf_ops.h, trying to load an ELF bigger than INT_MAX will fail. Switch to ssize_t to remove this limitation. Signed-off-by: Luc Michel Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Reviewed-by: Stefano Garzarella Message-Id: <20211014194325.19917-1-lmichel@kalray.eu> Signed-off-by: Richard Henderson --- include/hw/elf_ops.h | 27 ++++++++++---------- include/hw/loader.h | 58 +++++++++++++++++++++--------------------- hw/core/loader.c | 60 +++++++++++++++++++++++--------------------- 3 files changed, 74 insertions(+), 71 deletions(-) -- 2.25.1 diff --git a/include/hw/elf_ops.h b/include/hw/elf_ops.h index 1c37cec4ae..995de8495c 100644 --- a/include/hw/elf_ops.h +++ b/include/hw/elf_ops.h @@ -312,25 +312,26 @@ static struct elf_note *glue(get_elf_note_type, SZ)(struct elf_note *nhdr, return nhdr; } -static int glue(load_elf, SZ)(const char *name, int fd, - uint64_t (*elf_note_fn)(void *, void *, bool), - uint64_t (*translate_fn)(void *, uint64_t), - void *translate_opaque, - int must_swab, uint64_t *pentry, - uint64_t *lowaddr, uint64_t *highaddr, - uint32_t *pflags, int elf_machine, - int clear_lsb, int data_swab, - AddressSpace *as, bool load_rom, - symbol_fn_t sym_cb) +static ssize_t glue(load_elf, SZ)(const char *name, int fd, + uint64_t (*elf_note_fn)(void *, void *, bool), + uint64_t (*translate_fn)(void *, uint64_t), + void *translate_opaque, + int must_swab, uint64_t *pentry, + uint64_t *lowaddr, uint64_t *highaddr, + uint32_t *pflags, int elf_machine, + int clear_lsb, int data_swab, + AddressSpace *as, bool load_rom, + symbol_fn_t sym_cb) { struct elfhdr ehdr; struct elf_phdr *phdr = NULL, *ph; - int size, i, total_size; + int size, i; + ssize_t total_size; elf_word mem_size, file_size, data_offset; uint64_t addr, low = (uint64_t)-1, high = 0; GMappedFile *mapped_file = NULL; uint8_t *data = NULL; - int ret = ELF_LOAD_FAILED; + ssize_t ret = ELF_LOAD_FAILED; if (read(fd, &ehdr, sizeof(ehdr)) != sizeof(ehdr)) goto fail; @@ -482,7 +483,7 @@ static int glue(load_elf, SZ)(const char *name, int fd, } } - if (mem_size > INT_MAX - total_size) { + if (mem_size > SSIZE_MAX - total_size) { ret = ELF_LOAD_TOO_BIG; goto fail; } diff --git a/include/hw/loader.h b/include/hw/loader.h index 81104cb02f..4fa485bd61 100644 --- a/include/hw/loader.h +++ b/include/hw/loader.h @@ -90,7 +90,7 @@ int load_image_gzipped(const char *filename, hwaddr addr, uint64_t max_sz); #define ELF_LOAD_WRONG_ARCH -3 #define ELF_LOAD_WRONG_ENDIAN -4 #define ELF_LOAD_TOO_BIG -5 -const char *load_elf_strerror(int error); +const char *load_elf_strerror(ssize_t error); /** load_elf_ram_sym: * @filename: Path of ELF file @@ -128,48 +128,48 @@ const char *load_elf_strerror(int error); typedef void (*symbol_fn_t)(const char *st_name, int st_info, uint64_t st_value, uint64_t st_size); -int load_elf_ram_sym(const char *filename, - uint64_t (*elf_note_fn)(void *, void *, bool), - uint64_t (*translate_fn)(void *, uint64_t), - void *translate_opaque, uint64_t *pentry, - uint64_t *lowaddr, uint64_t *highaddr, uint32_t *pflags, - int big_endian, int elf_machine, - int clear_lsb, int data_swab, - AddressSpace *as, bool load_rom, symbol_fn_t sym_cb); +ssize_t load_elf_ram_sym(const char *filename, + uint64_t (*elf_note_fn)(void *, void *, bool), + uint64_t (*translate_fn)(void *, uint64_t), + void *translate_opaque, uint64_t *pentry, + uint64_t *lowaddr, uint64_t *highaddr, + uint32_t *pflags, int big_endian, int elf_machine, + int clear_lsb, int data_swab, + AddressSpace *as, bool load_rom, symbol_fn_t sym_cb); /** load_elf_ram: * Same as load_elf_ram_sym(), but doesn't allow the caller to specify a * symbol callback function */ -int load_elf_ram(const char *filename, - uint64_t (*elf_note_fn)(void *, void *, bool), - uint64_t (*translate_fn)(void *, uint64_t), - void *translate_opaque, uint64_t *pentry, uint64_t *lowaddr, - uint64_t *highaddr, uint32_t *pflags, int big_endian, - int elf_machine, int clear_lsb, int data_swab, - AddressSpace *as, bool load_rom); +ssize_t load_elf_ram(const char *filename, + uint64_t (*elf_note_fn)(void *, void *, bool), + uint64_t (*translate_fn)(void *, uint64_t), + void *translate_opaque, uint64_t *pentry, + uint64_t *lowaddr, uint64_t *highaddr, uint32_t *pflags, + int big_endian, int elf_machine, int clear_lsb, + int data_swab, AddressSpace *as, bool load_rom); /** load_elf_as: * Same as load_elf_ram(), but always loads the elf as ROM */ -int load_elf_as(const char *filename, - uint64_t (*elf_note_fn)(void *, void *, bool), - uint64_t (*translate_fn)(void *, uint64_t), - void *translate_opaque, uint64_t *pentry, uint64_t *lowaddr, - uint64_t *highaddr, uint32_t *pflags, int big_endian, - int elf_machine, int clear_lsb, int data_swab, - AddressSpace *as); +ssize_t load_elf_as(const char *filename, + uint64_t (*elf_note_fn)(void *, void *, bool), + uint64_t (*translate_fn)(void *, uint64_t), + void *translate_opaque, uint64_t *pentry, uint64_t *lowaddr, + uint64_t *highaddr, uint32_t *pflags, int big_endian, + int elf_machine, int clear_lsb, int data_swab, + AddressSpace *as); /** load_elf: * Same as load_elf_as(), but doesn't allow the caller to specify an * AddressSpace. */ -int load_elf(const char *filename, - uint64_t (*elf_note_fn)(void *, void *, bool), - uint64_t (*translate_fn)(void *, uint64_t), - void *translate_opaque, uint64_t *pentry, uint64_t *lowaddr, - uint64_t *highaddr, uint32_t *pflags, int big_endian, - int elf_machine, int clear_lsb, int data_swab); +ssize_t load_elf(const char *filename, + uint64_t (*elf_note_fn)(void *, void *, bool), + uint64_t (*translate_fn)(void *, uint64_t), + void *translate_opaque, uint64_t *pentry, uint64_t *lowaddr, + uint64_t *highaddr, uint32_t *pflags, int big_endian, + int elf_machine, int clear_lsb, int data_swab); /** load_elf_hdr: * @filename: Path of ELF file diff --git a/hw/core/loader.c b/hw/core/loader.c index c623318b73..c7f97fdce8 100644 --- a/hw/core/loader.c +++ b/hw/core/loader.c @@ -326,7 +326,7 @@ static void *load_at(int fd, off_t offset, size_t size) #define SZ 64 #include "hw/elf_ops.h" -const char *load_elf_strerror(int error) +const char *load_elf_strerror(ssize_t error) { switch (error) { case 0: @@ -402,12 +402,12 @@ fail: } /* return < 0 if error, otherwise the number of bytes loaded in memory */ -int load_elf(const char *filename, - uint64_t (*elf_note_fn)(void *, void *, bool), - uint64_t (*translate_fn)(void *, uint64_t), - void *translate_opaque, uint64_t *pentry, uint64_t *lowaddr, - uint64_t *highaddr, uint32_t *pflags, int big_endian, - int elf_machine, int clear_lsb, int data_swab) +ssize_t load_elf(const char *filename, + uint64_t (*elf_note_fn)(void *, void *, bool), + uint64_t (*translate_fn)(void *, uint64_t), + void *translate_opaque, uint64_t *pentry, uint64_t *lowaddr, + uint64_t *highaddr, uint32_t *pflags, int big_endian, + int elf_machine, int clear_lsb, int data_swab) { return load_elf_as(filename, elf_note_fn, translate_fn, translate_opaque, pentry, lowaddr, highaddr, pflags, big_endian, @@ -415,12 +415,13 @@ int load_elf(const char *filename, } /* return < 0 if error, otherwise the number of bytes loaded in memory */ -int load_elf_as(const char *filename, - uint64_t (*elf_note_fn)(void *, void *, bool), - uint64_t (*translate_fn)(void *, uint64_t), - void *translate_opaque, uint64_t *pentry, uint64_t *lowaddr, - uint64_t *highaddr, uint32_t *pflags, int big_endian, - int elf_machine, int clear_lsb, int data_swab, AddressSpace *as) +ssize_t load_elf_as(const char *filename, + uint64_t (*elf_note_fn)(void *, void *, bool), + uint64_t (*translate_fn)(void *, uint64_t), + void *translate_opaque, uint64_t *pentry, uint64_t *lowaddr, + uint64_t *highaddr, uint32_t *pflags, int big_endian, + int elf_machine, int clear_lsb, int data_swab, + AddressSpace *as) { return load_elf_ram(filename, elf_note_fn, translate_fn, translate_opaque, pentry, lowaddr, highaddr, pflags, big_endian, @@ -428,13 +429,13 @@ int load_elf_as(const char *filename, } /* return < 0 if error, otherwise the number of bytes loaded in memory */ -int load_elf_ram(const char *filename, - uint64_t (*elf_note_fn)(void *, void *, bool), - uint64_t (*translate_fn)(void *, uint64_t), - void *translate_opaque, uint64_t *pentry, uint64_t *lowaddr, - uint64_t *highaddr, uint32_t *pflags, int big_endian, - int elf_machine, int clear_lsb, int data_swab, - AddressSpace *as, bool load_rom) +ssize_t load_elf_ram(const char *filename, + uint64_t (*elf_note_fn)(void *, void *, bool), + uint64_t (*translate_fn)(void *, uint64_t), + void *translate_opaque, uint64_t *pentry, + uint64_t *lowaddr, uint64_t *highaddr, uint32_t *pflags, + int big_endian, int elf_machine, int clear_lsb, + int data_swab, AddressSpace *as, bool load_rom) { return load_elf_ram_sym(filename, elf_note_fn, translate_fn, translate_opaque, @@ -444,16 +445,17 @@ int load_elf_ram(const char *filename, } /* return < 0 if error, otherwise the number of bytes loaded in memory */ -int load_elf_ram_sym(const char *filename, - uint64_t (*elf_note_fn)(void *, void *, bool), - uint64_t (*translate_fn)(void *, uint64_t), - void *translate_opaque, uint64_t *pentry, - uint64_t *lowaddr, uint64_t *highaddr, uint32_t *pflags, - int big_endian, int elf_machine, - int clear_lsb, int data_swab, - AddressSpace *as, bool load_rom, symbol_fn_t sym_cb) +ssize_t load_elf_ram_sym(const char *filename, + uint64_t (*elf_note_fn)(void *, void *, bool), + uint64_t (*translate_fn)(void *, uint64_t), + void *translate_opaque, uint64_t *pentry, + uint64_t *lowaddr, uint64_t *highaddr, + uint32_t *pflags, int big_endian, int elf_machine, + int clear_lsb, int data_swab, + AddressSpace *as, bool load_rom, symbol_fn_t sym_cb) { - int fd, data_order, target_data_order, must_swab, ret = ELF_LOAD_FAILED; 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Tsirkin" , Igor Mammedov Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" From: Eric Auger Add placeholders for DBG2 reference table for virt tests and ignore till reference blob is added. Signed-off-by: Eric Auger Acked-by: Igor Mammedov Acked-by: Michael S. Tsirkin Message-Id: <20211019080037.930641-2-eric.auger@redhat.com> Signed-off-by: Richard Henderson --- tests/qtest/bios-tables-test-allowed-diff.h | 1 + tests/data/acpi/virt/DBG2 | 0 2 files changed, 1 insertion(+) create mode 100644 tests/data/acpi/virt/DBG2 diff --git a/tests/data/acpi/virt/DBG2 b/tests/data/acpi/virt/DBG2 new file mode 100644 index 0000000000..e69de29bb2 -- 2.25.1 diff --git a/tests/qtest/bios-tables-test-allowed-diff.h b/tests/qtest/bios-tables-test-allowed-diff.h index dfb8523c8b..1910d154c2 100644 --- a/tests/qtest/bios-tables-test-allowed-diff.h +++ b/tests/qtest/bios-tables-test-allowed-diff.h @@ -1 +1,2 @@ /* List of comma-separated changed AML files to ignore */ +"tests/data/acpi/virt/DBG2", From patchwork Thu Oct 21 15:25:32 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 516055 Delivered-To: patch@linaro.org Received: by 2002:ac0:bf50:0:0:0:0:0 with SMTP id o16csp26626imj; Thu, 21 Oct 2021 08:41:30 -0700 (PDT) X-Google-Smtp-Source: ABdhPJzmVEge/+xAyXtYBiv0SArapveXWoyLj4vuKptKNwH8lsgJ2zpetnN4v/m7CmmWHAaZrEyd X-Received: by 2002:a05:6830:1dd8:: with SMTP id a24mr5549269otj.56.1634830890113; Thu, 21 Oct 2021 08:41:30 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1634830890; cv=none; d=google.com; s=arc-20160816; b=uw4mnEH1Kjl0hfHFNHrjDLXHFo9aBHtxndy+X9N0PTI35YTIOm0+n75huOnPBoZi9Y rOLEImqJrQ2S0hw/fJBtkV+CLSQsllmlQkfJvL/3/Fa3LNC1HNDyHikvHH4NgaBIUGrY QPOYbWKD9zobgD99b1pBR5Zg5jMxTAD6/5HosjTHeejLHk1hQcY0X0Zs4XeaxDeNovcp JlJnXQnxKfhxqRkgzeRo91CKExYp+rPS9PgIDS81xap8xQBp++VVNFpczZDSPZ5Vo2At oVpv2vf3qF/9NYUmyYWgcQBcOXYZdROQjc8RhrYww0x2+b1d2g6gsW9OlKhbzQWYmMkI 6NrA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=ErF+8i/+0tR5/azRFLcQKZVn9pixjkrst7fCrRvD3X8=; b=JFg9K/35HeymvQpP/HWt8ELCAgGQ9pBzL8Iik8Tx4vQywWxuJ4bWCyUYe5qEqg1O7M ci0ksdE1o2N7MJz6c6cj5czFZbY2NevE6KCX51KgOcp9ToU38Hqd2QSVar5QgKFMZYMx XjPt1b4JHWK2lHcmz3YqLd6jMi39Twz5A1F9UbzTlPUmwNzyFx8cSQFZMGEaRFohRvfV yDGqTPQsPcblVczwX25Sxcpq/quLTiRJB0pvGyHfC3vDkkb8yiSSfwHJsHtbgqK1qGsQ ovVfHqjs745r7MuoUetY4xlkHUz9lwvue6FtdXp4h1MF8shCzSQ9oKXB4LJBpGsJg2fI eBwg== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=MZjLG+i+; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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Tsirkin" , Igor Mammedov Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" From: Eric Auger ARM SBBR specification mandates DBG2 table (Debug Port Table 2) since v1.0 (ARM DEN0044F 8.3.1.7 DBG2). The DBG2 table allows to describe one or more debug ports. Generate an DBG2 table featuring a single debug port, the PL011. The DBG2 specification can be found at "Microsoft Debug Port Table 2 (DBG2)" https://docs.microsoft.com/en-us/windows-hardware/drivers/bringup/acpi-debug-port-table?redirectedfrom=MSDN Signed-off-by: Eric Auger Reviewed-by: Andrew Jones Reviewed-by: Igor Mammedov Acked-by: Michael S. Tsirkin Message-Id: <20211019080037.930641-3-eric.auger@redhat.com> Signed-off-by: Richard Henderson --- hw/arm/virt-acpi-build.c | 63 +++++++++++++++++++++++++++++++++++++++- 1 file changed, 62 insertions(+), 1 deletion(-) -- 2.25.1 diff --git a/hw/arm/virt-acpi-build.c b/hw/arm/virt-acpi-build.c index 9c4730f4ab..d3bb4cba3e 100644 --- a/hw/arm/virt-acpi-build.c +++ b/hw/arm/virt-acpi-build.c @@ -626,6 +626,64 @@ build_gtdt(GArray *table_data, BIOSLinker *linker, VirtMachineState *vms) acpi_table_end(linker, &table); } +/* Debug Port Table 2 (DBG2) */ +static void +build_dbg2(GArray *table_data, BIOSLinker *linker, VirtMachineState *vms) +{ + AcpiTable table = { .sig = "DBG2", .rev = 0, .oem_id = vms->oem_id, + .oem_table_id = vms->oem_table_id }; + int dbg2devicelength; + const char name[] = "COM0"; + const int namespace_length = sizeof(name); + + acpi_table_begin(&table, table_data); + + dbg2devicelength = 22 + /* BaseAddressRegister[] offset */ + 12 + /* BaseAddressRegister[] */ + 4 + /* AddressSize[] */ + namespace_length /* NamespaceString[] */; + + /* OffsetDbgDeviceInfo */ + build_append_int_noprefix(table_data, 44, 4); + /* NumberDbgDeviceInfo */ + build_append_int_noprefix(table_data, 1, 4); + + /* Table 2. Debug Device Information structure format */ + build_append_int_noprefix(table_data, 0, 1); /* Revision */ + build_append_int_noprefix(table_data, dbg2devicelength, 2); /* Length */ + /* NumberofGenericAddressRegisters */ + build_append_int_noprefix(table_data, 1, 1); + /* NameSpaceStringLength */ + build_append_int_noprefix(table_data, namespace_length, 2); + build_append_int_noprefix(table_data, 38, 2); /* NameSpaceStringOffset */ + build_append_int_noprefix(table_data, 0, 2); /* OemDataLength */ + /* OemDataOffset (0 means no OEM data) */ + build_append_int_noprefix(table_data, 0, 2); + + /* Port Type */ + build_append_int_noprefix(table_data, 0x8000 /* Serial */, 2); + /* Port Subtype */ + build_append_int_noprefix(table_data, 0x3 /* ARM PL011 UART */, 2); + build_append_int_noprefix(table_data, 0, 2); /* Reserved */ + /* BaseAddressRegisterOffset */ + build_append_int_noprefix(table_data, 22, 2); + /* AddressSizeOffset */ + build_append_int_noprefix(table_data, 34, 2); + + /* BaseAddressRegister[] */ + build_append_gas(table_data, AML_AS_SYSTEM_MEMORY, 8, 0, 1, + vms->memmap[VIRT_UART].base); + + /* AddressSize[] */ + build_append_int_noprefix(table_data, + vms->memmap[VIRT_UART].size, 4); + + /* NamespaceString[] */ + g_array_append_vals(table_data, name, namespace_length); + + acpi_table_end(linker, &table); +}; + /* * ACPI spec, Revision 5.1 Errata A * 5.2.12 Multiple APIC Description Table (MADT) @@ -885,7 +943,7 @@ void virt_acpi_build(VirtMachineState *vms, AcpiBuildTables *tables) dsdt = tables_blob->len; build_dsdt(tables_blob, tables->linker, vms); - /* FADT MADT GTDT MCFG SPCR pointed to by RSDT */ + /* FADT MADT GTDT MCFG SPCR DBG2 pointed to by RSDT */ acpi_add_table(table_offsets, tables_blob); build_fadt_rev5(tables_blob, tables->linker, vms, dsdt); @@ -908,6 +966,9 @@ void virt_acpi_build(VirtMachineState *vms, AcpiBuildTables *tables) acpi_add_table(table_offsets, tables_blob); build_spcr(tables_blob, tables->linker, vms); + acpi_add_table(table_offsets, tables_blob); + build_dbg2(tables_blob, tables->linker, vms); + if (vms->ras) { build_ghes_error_table(tables->hardware_errors, tables->linker); acpi_add_table(table_offsets, tables_blob); From patchwork Thu Oct 21 15:25:33 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 516048 Delivered-To: patch@linaro.org Received: by 2002:ac0:bf50:0:0:0:0:0 with SMTP id o16csp19672imj; Thu, 21 Oct 2021 08:32:21 -0700 (PDT) X-Google-Smtp-Source: ABdhPJxLOyNFfkQQvxgeB5OSqlflO0kS4pmYpfx78hX1t8bPjQsWD9DD435cRcwvAkl57jsoKFgJ X-Received: by 2002:aca:3555:: with SMTP id c82mr5269947oia.29.1634830341607; Thu, 21 Oct 2021 08:32:21 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1634830341; cv=none; d=google.com; s=arc-20160816; b=An0tO1uGulCpdDKyk4YxjklCOfTzyyJ1MptlxrVBA0AC4Z2nBXq733JM6IpDoeG1lC sUo5baXGQmhXhflKPFJZW/+4zYpNb/+lrSKl20ICnHBoZc2kENgF7xJALk7Y9CyIPToe wEkMrH5OeGXz1lPdSdZGC4EgHMmsJbidy3doHfoVxz3iy8la3pt4hFvaFyYk4saFrSAr /XQmEcdfx/m8WiJdjv/HmmXESI9wclvgnTY18udejVM+6VJOMuur1C774HkBxkZ6TK8J 8XK/QBoOYhEEHWEa4v/oFVyIXu143dDjT0oEJAIw/wBish1kh+2AJrZ2BfawYTnsIzHO UpjA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=MN2J3vMWpFDS9vALOoHKYzaMrPkmzkSrC3GEzqF6qxU=; b=yckTj9LMn4ot31ta5Z/myU9AFINBJUVFURKjEjFm4e7YL9yfb+aMdebhYCZbZSPQZq WxNroISyNrkE7TdjzkLSQ/ZQkKK/sFP2EWdVj7kxbwqgu38TxfK++zxxaVgzR0Ef185i fcJcqwnv0GWEdqQ9cY1xSlkp8ppbWFG2Vz6ENFAEbxbYvHKLurutkuxv53qq5e/WqYmZ f8YZvogElRppjEgdtK2BuIZekAIiGyjiwQR2DK//8cohTVuR4YH6i074WEQm93vMchnp dDK1J4+zILD8H+8N8EyZQIBd5dhkX2oWBOc845+5vvr3BJeUJ7MZciqOhpdrIZ+axjh5 XlpA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=cYZT3A8t; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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Tsirkin" Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" From: Eric Auger Add the DBG2 table generated with tests/data/acpi/rebuild-expected-aml.sh Signed-off-by: Eric Auger Acked-by: Michael S. Tsirkin Message-Id: <20211019080037.930641-4-eric.auger@redhat.com> Signed-off-by: Richard Henderson --- tests/qtest/bios-tables-test-allowed-diff.h | 1 - tests/data/acpi/virt/DBG2 | Bin 0 -> 87 bytes 2 files changed, 1 deletion(-) diff --git a/tests/data/acpi/virt/DBG2 b/tests/data/acpi/virt/DBG2 index e69de29bb2d1d6434b8b29ae775ad8c2e48c5391..86e6314f7b0235ef8ed3e0221e09f996c41f5e98 100644 GIT binary patch literal 87 zcmZ>9ayJTR0D|*Q{>~o33QiFL&I&-l2owUbL9`AKgJ=eA21Zr}H4uw|p@A7lh%qQJ TFmQk+Il-a=3=Gcxz6J~c3~mVl literal 0 HcmV?d00001 -- 2.25.1 diff --git a/tests/qtest/bios-tables-test-allowed-diff.h b/tests/qtest/bios-tables-test-allowed-diff.h index 1910d154c2..dfb8523c8b 100644 --- a/tests/qtest/bios-tables-test-allowed-diff.h +++ b/tests/qtest/bios-tables-test-allowed-diff.h @@ -1,2 +1 @@ /* List of comma-separated changed AML files to ignore */ -"tests/data/acpi/virt/DBG2", From patchwork Thu Oct 21 15:25:34 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 516062 Delivered-To: patch@linaro.org Received: by 2002:ac0:bf50:0:0:0:0:0 with SMTP id o16csp32053imj; Thu, 21 Oct 2021 08:47:52 -0700 (PDT) X-Google-Smtp-Source: ABdhPJxLXvDpJ1flpqaayKjY+HdizjbH9Yln8LWnb2HtZTKjEyqY8Si3mdaDrvHlP0Czd8JzjbNE X-Received: by 2002:a05:6830:2f3:: with SMTP id r19mr5522620ote.226.1634831272265; Thu, 21 Oct 2021 08:47:52 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1634831272; cv=none; d=google.com; s=arc-20160816; b=gxFNIa5xySPaD1Gpl5XvROPu72XU3+I2x297rqtIoE4FlMOOwKZ3G1/wepIkkUtgNG ljpObXuCSeg1FRemLzQeZ0cvbLkMS8klTbuRyxJk0+y8NCzQOqA0kIZ5yGJ1a3suLUOv gTwVtRYRUsT5mGbw/upcheiNAQE8Lfvf4YB+SqwT0pmPnAC8bubcYsbyVW8aqghm+KRu QHXHRTiIsALaVNkHgnXm6T/GiT0EGI86SLUpU4UE6wSLyxofqhwuZALthIaWRGoBEreI ZJmBHW29e3niU8xrTZUbn7nQ/GsYlVbamOYm5rkMuduVmCoj5YnuM17Q+pFbVgL7miI6 iviQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=Zq+vUL3+l8EwtzFQ0nupHEnvpxTTs/A/ZF3RDm4/SUA=; b=P8UG8JsM/UpgjvP8qDHrhRod5n9iABNxAas7Js3uODu6dMlvY5k5/TLqGyykHBfT3y vePEUHlHc2YwdzEUDHDMks4ikw4U7eUhFdqPBBGLBjwi4vUNhUIPiTm3aeQM+BLjVqnu /bikG/xhPkuAxmicuSl+J2nM4Lz66gLLBNBgPB462dIKNPFodoE3T8gJuHHQI7EVmJO7 oRXDbb01SpoKl/sgPhuiPuxY6mrkQMRFXC6UWMNRPWuvotdnzKkX19/Y3g7OL0N0M4JE 8VBQRO0tvSveapBFI7qnouSmUjuK7mAvzgMe1WLYPbtiAFYvLqwtC3Q4y5nMQSvCseZq WXCg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=P864iVT3; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id o43si6011961ota.232.2021.10.21.08.47.52 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Thu, 21 Oct 2021 08:47:52 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=P864iVT3; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:54584 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1mdaIJ-0006u0-Iu for patch@linaro.org; Thu, 21 Oct 2021 11:47:51 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:56744) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1mdZx6-0000Iv-E2 for qemu-devel@nongnu.org; Thu, 21 Oct 2021 11:25:56 -0400 Received: from mail-pf1-x42f.google.com ([2607:f8b0:4864:20::42f]:36362) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1mdZx2-0002Wn-Nc for qemu-devel@nongnu.org; Thu, 21 Oct 2021 11:25:56 -0400 Received: by mail-pf1-x42f.google.com with SMTP id m26so966193pff.3 for ; Thu, 21 Oct 2021 08:25:52 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=Zq+vUL3+l8EwtzFQ0nupHEnvpxTTs/A/ZF3RDm4/SUA=; b=P864iVT3ZhO7qiP9K9ZMnWLKgOdh0EGZmmtWcg4ytTiBgtrFepdLTipbp6BNAOmWcD 6M36GV78S6/m8RhxWIaaBoLQhvcDOs11pJiz4WcUeNWoGzhuFbbgJ7+IrR0DGIhLF9Db 4G9IBa5t6vbCqrfgx7LB9P+o25PgCWKyCKUGj9XC8R85U0UQutYkqT3XJf+upQ8O7xaK JfnE604rqrPgBPDh27HA2SGmvCsKfSNloKpzUlD9cOLGlxIueNqdYbEs0Z9o+LodgZiB nUVdju+cg+AtqIMGVAjwW0gy1eOHKMJdhHpex4sCjVIXqWyjyla4NLlw5WhlM6xc1PuB N9qA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=Zq+vUL3+l8EwtzFQ0nupHEnvpxTTs/A/ZF3RDm4/SUA=; b=ZuO9dWG5zMWv/I/j3+WFlrXyY+JScqKwqntODXZAIhrdrJMclBYyB7l4rruI8YsDjW HXQPwh/MoAsFj+128svXXlNabPr5YFHLJZWDHYR2lidJuFcX8SaJHfWQOvNbAopWxyDn NlGwi8CqzCXKFYCH2YxpHLxERi1IeVT2AWrh11IUbgvPkA/3rc+H8JuKRNGUvxnKXHO5 odpY9Wa0fPO7uwak1eeiv7mUaqxL3jbL4A/mJC5AyQ4zjsOejzmbm5Uq9IN7++r5LFf2 Tel0eYUQAEBBcep+v94O7pMURh+anqM0w0MbmukgqpOHbumwaw1qAiPipmRNiS1+McrZ Vv0Q== X-Gm-Message-State: AOAM532CDKnVXlzAhNK0BKk2EjtwUkm7j8YK3flnj6RDTkIkAHr45spa XM+2f0N79/dn1c7lO1ebfL1GUgLv6qpKCQ== X-Received: by 2002:a62:9215:0:b0:44c:4de1:f777 with SMTP id o21-20020a629215000000b0044c4de1f777mr6144791pfd.31.1634829951350; Thu, 21 Oct 2021 08:25:51 -0700 (PDT) Received: from localhost.localdomain ([71.212.134.125]) by smtp.gmail.com with ESMTPSA id y3sm5676257pge.44.2021.10.21.08.25.50 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 21 Oct 2021 08:25:51 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PULL 12/19] hw/arm/virt: Only describe cpu topology since virt-6.2 Date: Thu, 21 Oct 2021 08:25:34 -0700 Message-Id: <20211021152541.781175-13-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20211021152541.781175-1-richard.henderson@linaro.org> References: <20211021152541.781175-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::42f; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x42f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Yanan Wang , Andrew Jones Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" From: Yanan Wang On existing older machine types, without cpu topology described in ACPI or DT, the guest will populate one by default. With the topology described, it will read the information and set up its topology as instructed, but that may not be the same as what was getting used by default. It's possible that an user application has a dependency on the default topology and if the default one gets changed it will probably behave differently. Based on above consideration we'd better only describe topology information to the guest on 6.2 and later machine types. Signed-off-by: Yanan Wang Reviewed-by: Andrew Jones Message-Id: <20211020142125.7516-2-wangyanan55@huawei.com> Signed-off-by: Richard Henderson --- include/hw/arm/virt.h | 4 +++- hw/arm/virt.c | 1 + 2 files changed, 4 insertions(+), 1 deletion(-) -- 2.25.1 diff --git a/include/hw/arm/virt.h b/include/hw/arm/virt.h index b461b8d261..dc6b66ffc8 100644 --- a/include/hw/arm/virt.h +++ b/include/hw/arm/virt.h @@ -125,11 +125,13 @@ struct VirtMachineClass { bool claim_edge_triggered_timers; bool smbios_old_sys_ver; bool no_highmem_ecam; - bool no_ged; /* Machines < 4.2 has no support for ACPI GED device */ + bool no_ged; /* Machines < 4.2 have no support for ACPI GED device */ bool kvm_no_adjvtime; bool no_kvm_steal_time; bool acpi_expose_flash; bool no_secure_gpio; + /* Machines < 6.2 have no support for describing cpu topology to guest */ + bool no_cpu_topology; }; struct VirtMachineState { diff --git a/hw/arm/virt.c b/hw/arm/virt.c index 4160d49688..15e8d8cf4a 100644 --- a/hw/arm/virt.c +++ b/hw/arm/virt.c @@ -2816,6 +2816,7 @@ static void virt_machine_6_1_options(MachineClass *mc) virt_machine_6_2_options(mc); compat_props_add(mc->compat_props, hw_compat_6_1, hw_compat_6_1_len); mc->smp_props.prefer_sockets = true; + vmc->no_cpu_topology = true; /* qemu ITS was introduced with 6.2 */ vmc->no_tcg_its = true; From patchwork Thu Oct 21 15:25:35 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 516051 Delivered-To: patch@linaro.org Received: by 2002:ac0:bf50:0:0:0:0:0 with SMTP id o16csp23392imj; Thu, 21 Oct 2021 08:37:23 -0700 (PDT) X-Google-Smtp-Source: ABdhPJzWdUzMH/VShMsK0/BNAh12+vXnJ7tqLIRwCFSQ6spTrBPaK08XcwPOX+VvnoXzubTzK5bE X-Received: by 2002:a9d:60dd:: with SMTP id b29mr5308897otk.117.1634830643421; Thu, 21 Oct 2021 08:37:23 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1634830643; cv=none; d=google.com; s=arc-20160816; b=nJqnK/CW65kk9hJ0ToKXcsngbdRO42x3MBpR7c8Erf3ADyKNUpy5SNRTPgc7pWS4Rl TLwcua173RkxV7lBd6o5rL13+EEqp9Fj8Iwp36syCC1NQsiQnkI7Q5zMiufOF1yxZUc2 WcQxotcfhaJoTsv49ygl2Y02+B/ncsl0lMbE0EPJ5frnMcWh7Y8klDukkp+UwXgqRIG+ c03Mn3GkBcYOfnGSVHsgXKygfDy3QrJAxEO6lAqhT6R459SNfdZ+8gpME/Ya2QaGHbpL rMtkeubutxbzdHGJMv/vdu2u6nVIGQHR4R/VWlh3TU4mmwtFL39gb/XEXMUZF1/y+crc PX9w== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=n/Pvx/0svSuMmT8RY9aB1ty9PqQ7g1AslPNBWP29bj4=; b=nVTqV/8YhYpg0uzaOZsYTDHuEmRY22FhGSx11lPGF0BYx+lYLWHWdElNxWvZKZDiYa YLjwgddNPaxlPx2pSDf8oG4y9Evb/kA8s4ING6ZLmkssx1sJIEskW/X+DkOvqgr4RcYg E10J/Y8AMFJXVlgA0v2kQN6MfTlHdkSkIWjzGp5TMV0J9pN2H6GV3C3mD0C2Y3CUsOeQ LwbTkcoF3x+xcG6IIKiaWSi4aS7Tl67IIPQsTayzm5SwUWIcMDtqqDKunlKXg+o25Nx8 YqbEQUMiMLg1LGGReoLrXGRPzLElJfBBYKAO+MfXxXHbJ80owrvD5axtg74pxPJjr3TH ZPBg== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=IZkgbko5; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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We'll use it in a coming patch where we will add cpu-map to the device tree. And we also tweak an error message of qemu_fdt_add_subnode(). Co-developed-by: Andrew Jones Signed-off-by: Yanan Wang Reviewed-by: David Gibson Reviewed-by: Andrew Jones Cc: David Gibson Cc: Alistair Francis Message-Id: <20211020142125.7516-3-wangyanan55@huawei.com> Signed-off-by: Richard Henderson --- include/sysemu/device_tree.h | 1 + softmmu/device_tree.c | 44 ++++++++++++++++++++++++++++++++++-- 2 files changed, 43 insertions(+), 2 deletions(-) -- 2.25.1 diff --git a/include/sysemu/device_tree.h b/include/sysemu/device_tree.h index 8a2fe55622..ef060a9759 100644 --- a/include/sysemu/device_tree.h +++ b/include/sysemu/device_tree.h @@ -121,6 +121,7 @@ uint32_t qemu_fdt_get_phandle(void *fdt, const char *path); uint32_t qemu_fdt_alloc_phandle(void *fdt); int qemu_fdt_nop_node(void *fdt, const char *node_path); int qemu_fdt_add_subnode(void *fdt, const char *name); +int qemu_fdt_add_path(void *fdt, const char *path); #define qemu_fdt_setprop_cells(fdt, node_path, property, ...) \ do { \ diff --git a/softmmu/device_tree.c b/softmmu/device_tree.c index b621f63fba..3965c834ca 100644 --- a/softmmu/device_tree.c +++ b/softmmu/device_tree.c @@ -540,8 +540,8 @@ int qemu_fdt_add_subnode(void *fdt, const char *name) retval = fdt_add_subnode(fdt, parent, basename); if (retval < 0) { - error_report("FDT: Failed to create subnode %s: %s", name, - fdt_strerror(retval)); + error_report("%s: Failed to create subnode %s: %s", + __func__, name, fdt_strerror(retval)); exit(1); } @@ -549,6 +549,46 @@ int qemu_fdt_add_subnode(void *fdt, const char *name) return retval; } +/* + * qemu_fdt_add_path: Like qemu_fdt_add_subnode(), but will add + * all missing subnodes from the given path. + */ +int qemu_fdt_add_path(void *fdt, const char *path) +{ + const char *name; + const char *p = path; + int namelen, retval; + int parent = 0; + + if (path[0] != '/') { + return -1; + } + + while (p) { + name = p + 1; + p = strchr(name, '/'); + namelen = p != NULL ? p - name : strlen(name); + + retval = fdt_subnode_offset_namelen(fdt, parent, name, namelen); + if (retval < 0 && retval != -FDT_ERR_NOTFOUND) { + error_report("%s: Unexpected error in finding subnode %.*s: %s", + __func__, namelen, name, fdt_strerror(retval)); + exit(1); + } else if (retval == -FDT_ERR_NOTFOUND) { + retval = fdt_add_subnode_namelen(fdt, parent, name, namelen); + if (retval < 0) { + error_report("%s: Failed to create subnode %.*s: %s", + __func__, namelen, name, fdt_strerror(retval)); + exit(1); + } + } + + parent = retval; + } + + return retval; +} + void qemu_fdt_dumpdtb(void *fdt, int size) { const char *dumpdtb = current_machine->dumpdtb; From patchwork Thu Oct 21 15:25:36 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 516064 Delivered-To: patch@linaro.org Received: by 2002:ac0:bf50:0:0:0:0:0 with SMTP id o16csp34822imj; Thu, 21 Oct 2021 08:51:00 -0700 (PDT) X-Google-Smtp-Source: ABdhPJz2+U9PkiG7hJuQJsvQBUTM3NBI+0rAjyi8bEYPQYs++2jgeD3s2pXE1yHIE0H+NVhi/+Fa X-Received: by 2002:aca:a94c:: with SMTP id s73mr5391674oie.93.1634831460006; Thu, 21 Oct 2021 08:51:00 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1634831460; cv=none; d=google.com; s=arc-20160816; b=ERP2Sa60s6BATCfDrHLsdyB7KL7e7h7wKKnhGKlZEafNmgEXg4DbgDXgpbUf7RGHcz oXr6DG1xEFblIoo23JRzH1FTR9i00ym+FvfpmJ+Vk6QI/8RGMYCJhxjeGTEJwBjPZZo3 sjohD2JEKsaVNKS3nTXr7zTb0ZjwK5yHSLWgJMcxXYwxaaaVs5/vkvhZnEUljzn7jFuX zGjsm7+KeZjAIXybat0sMLyXLJPyrmOP02W17iIvHBvE5NIekjbeRGpD6f0/PR6/97Ms GwCo1S+iDVkLZ5O2+mMOhCmdUGKPeN+6b9G5Sse3xkytlQXcB+Ck35NI8sk40uv9su5w UNgw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=PUts9d+IaMxABVZC1wteSIPc85en1c9gLB8uoNMgezU=; b=HM2JthAGocPiZ78L9LR47g3ZKlV3ybFsWu/tX4wMndnpQni42qIZfp5PjkYiyYtB+p gQ9HXwI8BPnZUPWXejrMyBwopAI9WinCfVZskRnQ2+MFjFLGbWvtsS8OtO7ixfiicm9D nNTO7y5Cbgy5LcK2PbeZ3yFKuDotofDh/yuW0cIwvfhlVvDv4LIveTBNYwX25GWUdizK Y0jbyzq9Aa21Y/H9CWusdvDQ9E8kgBzRwAu56fYHmcutx9t7Aojg83o/R1d98XF0ZIVG jG1kK85fj2SDjZYW55qwUVdhj9jXKtyNyEyKr9GrVPobc/JE8cgc7S8GHBCN7K83Pgkd pt/A== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=HCmZMmvO; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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In accordance with the Devicetree Specification, the Linux Doc "arm/cpus.yaml" requires that cpus and cpu nodes in the DT are present. And we have already met the requirement by generating /cpus/cpu@* nodes for members within ms->smp.cpus. Accordingly, we should also create subnodes in cpu-map for the present cpus, each of which relates to an unique cpu node. The Linux Doc "cpu/cpu-topology.txt" states that the hierarchy of CPUs in a SMP system is defined through four entities and they are socket/cluster/core/thread. It is also required that a socket node's child nodes must be one or more cluster nodes. Given that currently we are only provided with information of socket/core/thread, we assume there is one cluster child node in each socket node when creating cpu-map. Co-developed-by: Yanan Wang Signed-off-by: Andrew Jones Signed-off-by: Yanan Wang Message-Id: <20211020142125.7516-4-wangyanan55@huawei.com> Signed-off-by: Richard Henderson --- hw/arm/virt.c | 70 +++++++++++++++++++++++++++++++++++++++++++-------- 1 file changed, 60 insertions(+), 10 deletions(-) -- 2.25.1 diff --git a/hw/arm/virt.c b/hw/arm/virt.c index 15e8d8cf4a..ca433adb5b 100644 --- a/hw/arm/virt.c +++ b/hw/arm/virt.c @@ -351,20 +351,21 @@ static void fdt_add_cpu_nodes(const VirtMachineState *vms) int cpu; int addr_cells = 1; const MachineState *ms = MACHINE(vms); + const VirtMachineClass *vmc = VIRT_MACHINE_GET_CLASS(vms); int smp_cpus = ms->smp.cpus; /* - * From Documentation/devicetree/bindings/arm/cpus.txt - * On ARM v8 64-bit systems value should be set to 2, - * that corresponds to the MPIDR_EL1 register size. - * If MPIDR_EL1[63:32] value is equal to 0 on all CPUs - * in the system, #address-cells can be set to 1, since - * MPIDR_EL1[63:32] bits are not used for CPUs - * identification. + * See Linux Documentation/devicetree/bindings/arm/cpus.yaml + * On ARM v8 64-bit systems value should be set to 2, + * that corresponds to the MPIDR_EL1 register size. + * If MPIDR_EL1[63:32] value is equal to 0 on all CPUs + * in the system, #address-cells can be set to 1, since + * MPIDR_EL1[63:32] bits are not used for CPUs + * identification. * - * Here we actually don't know whether our system is 32- or 64-bit one. - * The simplest way to go is to examine affinity IDs of all our CPUs. If - * at least one of them has Aff3 populated, we set #address-cells to 2. + * Here we actually don't know whether our system is 32- or 64-bit one. + * The simplest way to go is to examine affinity IDs of all our CPUs. If + * at least one of them has Aff3 populated, we set #address-cells to 2. */ for (cpu = 0; cpu < smp_cpus; cpu++) { ARMCPU *armcpu = ARM_CPU(qemu_get_cpu(cpu)); @@ -407,8 +408,57 @@ static void fdt_add_cpu_nodes(const VirtMachineState *vms) ms->possible_cpus->cpus[cs->cpu_index].props.node_id); } + if (!vmc->no_cpu_topology) { + qemu_fdt_setprop_cell(ms->fdt, nodename, "phandle", + qemu_fdt_alloc_phandle(ms->fdt)); + } + g_free(nodename); } + + if (!vmc->no_cpu_topology) { + /* + * Add vCPU topology description through fdt node cpu-map. + * + * See Linux Documentation/devicetree/bindings/cpu/cpu-topology.txt + * In a SMP system, the hierarchy of CPUs can be defined through + * four entities that are used to describe the layout of CPUs in + * the system: socket/cluster/core/thread. + * + * A socket node represents the boundary of system physical package + * and its child nodes must be one or more cluster nodes. A system + * can contain several layers of clustering within a single physical + * package and cluster nodes can be contained in parent cluster nodes. + * + * Given that cluster is not yet supported in the vCPU topology, + * we currently generate one cluster node within each socket node + * by default. + */ + qemu_fdt_add_subnode(ms->fdt, "/cpus/cpu-map"); + + for (cpu = smp_cpus - 1; cpu >= 0; cpu--) { + char *cpu_path = g_strdup_printf("/cpus/cpu@%d", cpu); + char *map_path; + + if (ms->smp.threads > 1) { + map_path = g_strdup_printf( + "/cpus/cpu-map/socket%d/cluster0/core%d/thread%d", + cpu / (ms->smp.cores * ms->smp.threads), + (cpu / ms->smp.threads) % ms->smp.cores, + cpu % ms->smp.threads); + } else { + map_path = g_strdup_printf( + "/cpus/cpu-map/socket%d/cluster0/core%d", + cpu / ms->smp.cores, + cpu % ms->smp.cores); + } + qemu_fdt_add_path(ms->fdt, map_path); + qemu_fdt_setprop_phandle(ms->fdt, map_path, "cpu", cpu_path); + + g_free(map_path); + g_free(cpu_path); + } + } } static void fdt_add_its_gic_node(VirtMachineState *vms) From patchwork Thu Oct 21 15:25:37 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 516061 Delivered-To: patch@linaro.org Received: by 2002:ac0:bf50:0:0:0:0:0 with SMTP id o16csp30880imj; Thu, 21 Oct 2021 08:46:23 -0700 (PDT) X-Google-Smtp-Source: ABdhPJy5PKpVk9eZEKh8k5EQDfTI2ywTbAwaX+eGeIGXSTheks4k+U2iMWDxXOUw3gz3FkFkTz9Z X-Received: by 2002:a05:6808:1898:: with SMTP id bi24mr4957279oib.3.1634831183043; Thu, 21 Oct 2021 08:46:23 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1634831183; cv=none; d=google.com; s=arc-20160816; b=tX7UpbMh0TEGGkksOwa504+JUWMv6wAnElJJ4fmwrdzqaX0f4XzGk8AQLwf6X4JhWz w9Xe5DTFInkBy59P4NpPZMAV7J7I4OYHA7PAHGx4yiizTN/sIB1Pd88C/OVvASxcF0Hv kC0CLQ5j1sLFjptT0pZvPn5NYfcCNJIpHO7bxicGdWxw4gEY5rnsJEnz9uekfcOoyR63 YtnG5ugBJqC/E+Ee1NSGORJszT3bmn5rbrorJdwxOWd1UliOxGR8ikNTmCz+8RDuyPUS 6SXuNKQ9E4NDD1nGlomwL1n0tfivMYGJze1CjuREuo46g4uQlHLmkUrw89Fsu1LapJTE n0XQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=ntlLu6jx+KTwzSkrUsKE+JzLZz72IPGPPdjKz27oBkU=; b=f1l7EbXohDKSIhJUX0UKGpBchcJGztAt4AaEikLh36QP+tRoa7DnysS1CP44vzUhFc csQWIvnluubLjZjSslUng9abPh4l9pYAOQBVVAVPPAwz5TlPqcK7jcUlXdES2UmtwnG/ 1FZCcoEv3dfYTgCeeLSD48fe/7lR3izqoKUDUAuolrJYMTg6utbCX86m6gKqptSRS371 ktwKS3Wguqb1RhA9kJcRDwDkMoDY4cv2KOQ0ZuUWImYimAkhFEZ8ohu4A0jnx7nRdvfx TIvt0H+oEXjqOCSiHBFi3ZAeEENKuZnrS+6lpTYiUHz3shcm7HLiQ5I5NpmaXHwIDR1F fG6w== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=M51voO5g; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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Tsirkin" , Yanan Wang , Eric Auger , Henglong Fan , Ying Fang Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" From: Yanan Wang Add a generic API to build Processor hierarchy node structure (Type 0), which is strictly consistent with descriptions in ACPI 6.3: 5.2.29.1. This function will be used to build ACPI PPTT table for cpu topology. Co-developed-by: Ying Fang Co-developed-by: Henglong Fan Co-developed-by: Yanan Wang Signed-off-by: Yanan Wang Reviewed-by: Andrew Jones Reviewed-by: Michael S. Tsirkin Reviewed-by: Eric Auger Message-Id: <20211020142125.7516-5-wangyanan55@huawei.com> Signed-off-by: Richard Henderson --- hw/acpi/aml-build.c | 30 ++++++++++++++++++++++++++++++ 1 file changed, 30 insertions(+) -- 2.25.1 diff --git a/hw/acpi/aml-build.c b/hw/acpi/aml-build.c index 76af0ebaf9..5195324585 100644 --- a/hw/acpi/aml-build.c +++ b/hw/acpi/aml-build.c @@ -1964,6 +1964,36 @@ void build_slit(GArray *table_data, BIOSLinker *linker, MachineState *ms, acpi_table_end(linker, &table); } +/* + * ACPI spec, Revision 6.3 + * 5.2.29.1 Processor hierarchy node structure (Type 0) + */ +static void build_processor_hierarchy_node(GArray *tbl, uint32_t flags, + uint32_t parent, uint32_t id, + uint32_t *priv_rsrc, + uint32_t priv_num) +{ + int i; + + build_append_byte(tbl, 0); /* Type 0 - processor */ + build_append_byte(tbl, 20 + priv_num * 4); /* Length */ + build_append_int_noprefix(tbl, 0, 2); /* Reserved */ + build_append_int_noprefix(tbl, flags, 4); /* Flags */ + build_append_int_noprefix(tbl, parent, 4); /* Parent */ + build_append_int_noprefix(tbl, id, 4); /* ACPI Processor ID */ + + /* Number of private resources */ + build_append_int_noprefix(tbl, priv_num, 4); + + /* Private resources[N] */ + if (priv_num > 0) { + assert(priv_rsrc); + for (i = 0; i < priv_num; i++) { + build_append_int_noprefix(tbl, priv_rsrc[i], 4); + } + } +} + /* build rev1/rev3/rev5.1 FADT */ void build_fadt(GArray *tbl, BIOSLinker *linker, const AcpiFadtData *f, const char *oem_id, const char *oem_table_id) From patchwork Thu Oct 21 15:25:38 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 516065 Delivered-To: patch@linaro.org Received: by 2002:ac0:bf50:0:0:0:0:0 with SMTP id o16csp35421imj; Thu, 21 Oct 2021 08:51:44 -0700 (PDT) X-Google-Smtp-Source: ABdhPJwbnryNBrQ2INqe5UUw55RnYt14ED7Kv+fXu4VvBbsqyb4KFVDjLxawuNaB+fMhLMpDB67D X-Received: by 2002:a9d:60cf:: with SMTP id b15mr5433919otk.282.1634831504119; Thu, 21 Oct 2021 08:51:44 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1634831504; cv=none; d=google.com; s=arc-20160816; b=rx26bvo2OEEE886QYnmyZO9sce1c2MOX9WbUsG7AFD+GXzTkLvaAdIQFcrAvUHtWZ9 cDpNvMIXhlL0eX/QpqtDNpdLdUXkHO6kOPzjJdUM2G3DwFlJCTYhe87kVgvi05ZCq7b4 DDUuFS9+Gt/R6UENlaFYelpAysibrImn82FnE7DgKIVwdvhnbQoeqMYuKYlRZ8wUkxWX KZK0jOcqSS8/Z+8ovyxg9YkWAxVGTEC9AnDEy+eDOlP8tPHEJZwhxeQh1r2MsN+zsumL b72cIJnDaZWEPFi5Sy0gQuxVLg7sriP2+sr2dpcjaVwSlsjLg/9rw+3pkMVy5LDE3ndj lE7w== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=HMr9QBRkVrXrtQnoAy2rVMOzIhch4tI7pkgXe6e828Q=; b=HWrna0xAHHLI+TnuobkeI/hB1ZzCbemrdDWYQtYQRPR1RBQ0xVdutcaz2+ZvSL9Xvy ekqN9MMdy5Bo+VgPhd6HwN72Sqbj3Sgd6svwXCOvAg+xALuEWsfzbdbHRzAv8+I1ETlt urBgmKgZMg7WDXt8awUAAio/ZQ9UHYoGxg5tJ4ThnBvicP3003jpKMFvRXi/Y9C0FOMD NhlfmN1krrN7jHN0QDeATakns3+dR06NEHGLl1moNcvhtPebPgcZO79GuR/oFxy/NBQJ vNHgrUK2vouomqxvpVNEDkRRbyxCpRI2QGdNKbMTMNqUVriJWEbvxZmFRiDIkTErePvA fFvQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=DqDqkqdU; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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Tsirkin" Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" From: Andrew Jones Add the Processor Properties Topology Table (PPTT) used to describe CPU topology information to ACPI guests. Note, a DT-boot Linux guest with a non-flat CPU topology will see socket and core IDs being sequential integers starting from zero, which is different from ACPI-boot Linux guest, e.g. with -smp 4,sockets=2,cores=2,threads=1 a DT boot produces: cpu: 0 package_id: 0 core_id: 0 cpu: 1 package_id: 0 core_id: 1 cpu: 2 package_id: 1 core_id: 0 cpu: 3 package_id: 1 core_id: 1 an ACPI boot produces: cpu: 0 package_id: 36 core_id: 0 cpu: 1 package_id: 36 core_id: 1 cpu: 2 package_id: 96 core_id: 2 cpu: 3 package_id: 96 core_id: 3 This is due to several reasons: 1) DT cpu nodes do not have an equivalent field to what the PPTT ACPI Processor ID must be, i.e. something equal to the MADT CPU UID or equal to the UID of an ACPI processor container. In both ACPI cases those are platform dependant IDs assigned by the vendor. 2) While QEMU is the vendor for a guest, if the topology specifies SMT (> 1 thread), then, with ACPI, it is impossible to assign a core-id the same value as a package-id, thus it is not possible to have package-id=0 and core-id=0. This is because package and core containers must be in the same ACPI namespace and therefore must have unique UIDs. 3) ACPI processor containers are not mandatorily required for PPTT tables to be used and, due to the limitations of which IDs are selected described above in (2), they are not helpful for QEMU, so we don't build them with this patch. In the absence of them, Linux assigns its own unique IDs. The maintainers have chosen not to use counters from zero, but rather ACPI table offsets, which explains why the numbers are so much larger than with DT. 4) When there is no SMT (threads=1) the core IDs for ACPI boot guests match the logical CPU IDs, because these IDs must be equal to the MADT CPU UID (as no processor containers are present), and QEMU uses the logical CPU ID for these MADT IDs. So in summary, with QEMU as the vendor for the guests, we simply use sequential integers starting from zero for the non-leaf nodes but with ID-valid flag unset, so that guest will ignore them and use table offsets as unique container IDs. And we use logical CPU IDs for the leaf nodes with the ID-valid flag set, which will be consistent with MADT. Currently the implementation of PPTT generation complies with ACPI specification 5.2.29 (Revision 6.3). The 6.3 spec can be found at: https://uefi.org/sites/default/files/resources/ACPI_6_3_May16.pdf Reviewed-by: Eric Auger Co-developed-by: Yanan Wang Signed-off-by: Andrew Jones Signed-off-by: Yanan Wang Reviewed-by: Michael S. Tsirkin Message-Id: <20211020142125.7516-6-wangyanan55@huawei.com> Signed-off-by: Richard Henderson --- include/hw/acpi/aml-build.h | 3 ++ hw/acpi/aml-build.c | 59 +++++++++++++++++++++++++++++++++++++ 2 files changed, 62 insertions(+) -- 2.25.1 diff --git a/include/hw/acpi/aml-build.h b/include/hw/acpi/aml-build.h index 3cf6f2c1b9..8346003a22 100644 --- a/include/hw/acpi/aml-build.h +++ b/include/hw/acpi/aml-build.h @@ -489,6 +489,9 @@ void build_srat_memory(GArray *table_data, uint64_t base, void build_slit(GArray *table_data, BIOSLinker *linker, MachineState *ms, const char *oem_id, const char *oem_table_id); +void build_pptt(GArray *table_data, BIOSLinker *linker, MachineState *ms, + const char *oem_id, const char *oem_table_id); + void build_fadt(GArray *tbl, BIOSLinker *linker, const AcpiFadtData *f, const char *oem_id, const char *oem_table_id); diff --git a/hw/acpi/aml-build.c b/hw/acpi/aml-build.c index 5195324585..b3b3310df3 100644 --- a/hw/acpi/aml-build.c +++ b/hw/acpi/aml-build.c @@ -1994,6 +1994,65 @@ static void build_processor_hierarchy_node(GArray *tbl, uint32_t flags, } } +/* + * ACPI spec, Revision 6.3 + * 5.2.29 Processor Properties Topology Table (PPTT) + */ +void build_pptt(GArray *table_data, BIOSLinker *linker, MachineState *ms, + const char *oem_id, const char *oem_table_id) +{ + int pptt_start = table_data->len; + int uid = 0; + int socket; + AcpiTable table = { .sig = "PPTT", .rev = 2, + .oem_id = oem_id, .oem_table_id = oem_table_id }; + + acpi_table_begin(&table, table_data); + + for (socket = 0; socket < ms->smp.sockets; socket++) { + uint32_t socket_offset = table_data->len - pptt_start; + int core; + + build_processor_hierarchy_node( + table_data, + /* + * Physical package - represents the boundary + * of a physical package + */ + (1 << 0), + 0, socket, NULL, 0); + + for (core = 0; core < ms->smp.cores; core++) { + uint32_t core_offset = table_data->len - pptt_start; + int thread; + + if (ms->smp.threads > 1) { + build_processor_hierarchy_node( + table_data, + (0 << 0), /* not a physical package */ + socket_offset, core, NULL, 0); + + for (thread = 0; thread < ms->smp.threads; thread++) { + build_processor_hierarchy_node( + table_data, + (1 << 1) | /* ACPI Processor ID valid */ + (1 << 2) | /* Processor is a Thread */ + (1 << 3), /* Node is a Leaf */ + core_offset, uid++, NULL, 0); + } + } else { + build_processor_hierarchy_node( + table_data, + (1 << 1) | /* ACPI Processor ID valid */ + (1 << 3), /* Node is a Leaf */ + socket_offset, uid++, NULL, 0); + } + } + } + + acpi_table_end(linker, &table); +} + /* build rev1/rev3/rev5.1 FADT */ void build_fadt(GArray *tbl, BIOSLinker *linker, const AcpiFadtData *f, const char *oem_id, const char *oem_table_id) From patchwork Thu Oct 21 15:25:39 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 516063 Delivered-To: patch@linaro.org Received: by 2002:ac0:bf50:0:0:0:0:0 with SMTP id o16csp32592imj; Thu, 21 Oct 2021 08:48:32 -0700 (PDT) X-Google-Smtp-Source: ABdhPJw7d+cFTtdkP5IfD8ztTSO/5KYqa7Wte+cm4ac5XhlQzxhdroWjaJFt9Fytg1Bx1Tn3zRLo X-Received: by 2002:a05:6808:120e:: with SMTP id a14mr5044914oil.63.1634831312921; Thu, 21 Oct 2021 08:48:32 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1634831312; cv=none; d=google.com; s=arc-20160816; b=AkJAAwEgIFOOcZ7YYjVP8PTjG8RyPNJQ54Fx3KTiwR1KD8r3ecJarnKETX7HD+HZgA Jtd3d3ZItZQ09F3HwFbt1u6lb7UGBYHVrmEk932OgWV+A38nHDfxn+0T5Pce7RZlSwiV m7IRg7Ttx/O/75uAi4SDsD/1PowaojuMaBrdyfwulsu5ajBNYVrZaUyNzr40oZ15Hsdo tKP2gbNzmYm1OriAxQ531jAgOiXZnizjr/LaxXMjJl4tpRvw8kGKiusFDElbIfsXWoz1 ZlJucIIxFDOmHDgQg44dj4C8lxQbLKNks7beLMPax7ohcTxZBAKUmgQ3sDj4xG8clH01 kAtA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=YRu/MDU+L2EeOsm4b1PTwNiPfEDkTApHO7aOs9wyn2k=; b=dfH94DmtK+pEQNYDAQkhzER4dIv+tD4MQflBojn5IU+slyS0SD9fwWeliBphRycDpp NZ92hayX7/PrLbLtISnvLxSpy0JWUmBsIorjKPQ6Uctx29wrDEttE3fUiWBivY7+vQnl WjtNQI3keegxbo16Ld7Nv182nGrtmShPQC98uqe/hTh62m/HZR8cO343iQBq7mWUmy8M CQvYECYgkxywFso6ruuR8sDNu/tyucdRdPZy88vungAjOyzPNU0mmrktHPyDhNYxD6ld 4IzR2HnR3aw6+K9ye+rply3WzEPTu6bSxCRcpe+HLmp8f0NfE7MHt22515K7PvpbDDmA u++A== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=a5guZ69j; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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Thu, 21 Oct 2021 08:25:54 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PULL 17/19] tests/data/acpi/virt: Add an empty expected file for PPTT Date: Thu, 21 Oct 2021 08:25:39 -0700 Message-Id: <20211021152541.781175-18-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20211021152541.781175-1-richard.henderson@linaro.org> References: <20211021152541.781175-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::62d; envelope-from=richard.henderson@linaro.org; helo=mail-pl1-x62d.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Yanan Wang , Eric Auger Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" From: Yanan Wang Add a generic empty binary file for the new introduced PPTT table under tests/data/acpi/virt, and list it as files to be changed in tests/qtest/bios-tables-test-allowed-diff.h Signed-off-by: Yanan Wang Reviewed-by: Eric Auger Message-Id: <20211020142125.7516-7-wangyanan55@huawei.com> Signed-off-by: Richard Henderson --- tests/qtest/bios-tables-test-allowed-diff.h | 1 + tests/data/acpi/virt/PPTT | 0 2 files changed, 1 insertion(+) create mode 100644 tests/data/acpi/virt/PPTT diff --git a/tests/data/acpi/virt/PPTT b/tests/data/acpi/virt/PPTT new file mode 100644 index 0000000000..e69de29bb2 -- 2.25.1 diff --git a/tests/qtest/bios-tables-test-allowed-diff.h b/tests/qtest/bios-tables-test-allowed-diff.h index dfb8523c8b..cb143a55a6 100644 --- a/tests/qtest/bios-tables-test-allowed-diff.h +++ b/tests/qtest/bios-tables-test-allowed-diff.h @@ -1 +1,2 @@ /* List of comma-separated changed AML files to ignore */ +"tests/data/acpi/virt/PPTT", From patchwork Thu Oct 21 15:25:40 2021 Content-Type: text/plain; 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Signed-off-by: Yanan Wang Reviewed-by: Andrew Jones Reviewed-by: Eric Auger Message-Id: <20211020142125.7516-8-wangyanan55@huawei.com> Signed-off-by: Richard Henderson --- hw/arm/virt-acpi-build.c | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) -- 2.25.1 diff --git a/hw/arm/virt-acpi-build.c b/hw/arm/virt-acpi-build.c index d3bb4cba3e..674f902652 100644 --- a/hw/arm/virt-acpi-build.c +++ b/hw/arm/virt-acpi-build.c @@ -943,13 +943,19 @@ void virt_acpi_build(VirtMachineState *vms, AcpiBuildTables *tables) dsdt = tables_blob->len; build_dsdt(tables_blob, tables->linker, vms); - /* FADT MADT GTDT MCFG SPCR DBG2 pointed to by RSDT */ + /* FADT MADT PPTT GTDT MCFG SPCR DBG2 pointed to by RSDT */ acpi_add_table(table_offsets, tables_blob); build_fadt_rev5(tables_blob, tables->linker, vms, dsdt); acpi_add_table(table_offsets, tables_blob); build_madt(tables_blob, tables->linker, vms); + if (!vmc->no_cpu_topology) { + acpi_add_table(table_offsets, tables_blob); + build_pptt(tables_blob, tables->linker, ms, + vms->oem_id, vms->oem_table_id); + } + acpi_add_table(table_offsets, tables_blob); build_gtdt(tables_blob, tables->linker, vms); From patchwork Thu Oct 21 15:25:41 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 516067 Delivered-To: patch@linaro.org Received: by 2002:ac0:bf50:0:0:0:0:0 with SMTP id o16csp38351imj; Thu, 21 Oct 2021 08:55:06 -0700 (PDT) X-Google-Smtp-Source: ABdhPJyUXSWhWMjN3iVrQxJJv9q67TNq/wuqc833ocS5qUiq4n6TZgMiZSH1nskBQokYBp+/O9IQ X-Received: by 2002:a9d:718c:: with SMTP id o12mr5338589otj.135.1634831706214; Thu, 21 Oct 2021 08:55:06 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1634831706; cv=none; d=google.com; s=arc-20160816; b=moQNZ8iN3a8S0fhmQ+Hlh/0iXobtrPVl1hJT5TczQrPwh1AkAZ/EM1A8qY7dk5HUja m4wMO+6aLab5fJ3B5Q3BpPDsFCW4IU2xOgq0tr4cj8yQikhsbuhyls/hCTusMum9MqZ7 uTkaEGCbew9vVN7woZ4aoHXxhka1V96g4ch5K+bZYzlOJ8e3PqiA+7081BpXmuCxQLfG HR2TTcpXH9U4au+yruexdyL6C0UGTZKkLY31i1M2EdKjThxgYzoJi5s/xbcZxAtOCWGY pMoQpkE9PKmxRnfNqp/KG8skX68E05aiy+FQyV8k4QXbkBhwWCYL4b5+ru2y3ex8a8pw XOlQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=wuSVT6Jeal3XVHWytRnTfXOtr84gMm7/3+2VSVYEgGI=; b=Neqk6x8oqntytaBzF9NOKGn5Dp3fQkYgr2WzKvCJ8LDao4j9g2hMpN5MPFo4p2z4oW 11mpcY3SH1EzbawT3w4R0e8AeOgMyaHVDpjHvKVz4lGEaRwWeFUFaDEXADKYSudk3qY+ VnSdriMlb1toQHstrZWKILhcvaZoeqRirigAYsZJOSAoPHb+LrNY2l31aKQyUWc/dS9f o67YpfCGY8E/leLfYKJfFOMlGTSq1hmWz4KE2V/qXPgYc07QFTC2OQAZqabM/eD+j8qg CzBDcGBymgFa0gB705nBC4RR0sj70cVArsfGIO6OYSUbDhlBGNUvFmgJvvaf0Fb0MbJb gAvA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=VYyna40u; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id k7si6575179ooa.59.2021.10.21.08.55.06 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Thu, 21 Oct 2021 08:55:06 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=VYyna40u; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:44052 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1mdaPJ-0002AC-8R for patch@linaro.org; Thu, 21 Oct 2021 11:55:05 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:56832) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1mdZxA-0000Zo-IM for qemu-devel@nongnu.org; Thu, 21 Oct 2021 11:26:00 -0400 Received: from mail-pl1-x636.google.com ([2607:f8b0:4864:20::636]:46778) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1mdZx7-0002rp-OX for qemu-devel@nongnu.org; Thu, 21 Oct 2021 11:26:00 -0400 Received: by mail-pl1-x636.google.com with SMTP id i1so629248plr.13 for ; Thu, 21 Oct 2021 08:25:57 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=wuSVT6Jeal3XVHWytRnTfXOtr84gMm7/3+2VSVYEgGI=; b=VYyna40uD+G+5YQbHm0OtsBX595D9R62bz9cGqaYR31/YzxhYvW61pBu5/cEqMqhs0 DWitsiElx53prKVnOs/5XtkX3KKZoQmpyJSmB0Mg/LHb39kCYzf2qPcAr52gL1g3OLRA SRL4RWN+dxYn7nNFNd88g5UclOIIoK9Zkggh/aOoYSOEDVtw2/0WeYMJ2qFi1rbCuZUD N4X5U2Y1O1bwi3k0xDK5FO8S5G9FaFCyd8k7+Umd5KqEyX7IL82MVct/NW+Lup8iqpvR E+WerXBnLVsvV3f8E4kb4uOrd0Ba5xS7zZ4NnHXGLfFcZf9bYT1qxI62l0hzbHb/qMcI 6eqg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=wuSVT6Jeal3XVHWytRnTfXOtr84gMm7/3+2VSVYEgGI=; b=FlsniU9YC8lh/0T4Tav+er72PqYy+zoS93ZAhLubkV9iCZb37JmY926nsVbWWNeNGu rXeIWcvXU/HF0rbBQbuctLYQleBvX3mYPJ/KUn/1TBBm8JiDEpd8g4DYuA6HPqGXLcae 0iPRe5U9g0Z6J/0wX0aJWelJPcR+0dZpadyBfIeehfHHD72V5Kq7RhPUjlI3HVg76bPB 8avLCcqqWYq/B5x/9CPBGxNezq28n1yS08SrRhYySBCe2ldOU9q8f6Dx1Ea7libf3uTo ECDWF1djkks+Pi3ud2yGOr8KNaUi3VHxacDo4G6MI9FYiACc3VS8g1YVyZmgEnacJDKm L2Dg== X-Gm-Message-State: AOAM533UfM5jYirMxnsVjzp1UK3CXW1t4Z1uB9GG4UPLHsnSHo01jZ+f 0kAMAWCX2zOh826eClY54/ctb4Nt6m4xfg== X-Received: by 2002:a17:902:7246:b0:138:a6ed:66cc with SMTP id c6-20020a170902724600b00138a6ed66ccmr5997416pll.22.1634829956467; Thu, 21 Oct 2021 08:25:56 -0700 (PDT) Received: from localhost.localdomain ([71.212.134.125]) by smtp.gmail.com with ESMTPSA id y3sm5676257pge.44.2021.10.21.08.25.55 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 21 Oct 2021 08:25:56 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PULL 19/19] tests/data/acpi/virt: Update the empty expected file for PPTT Date: Thu, 21 Oct 2021 08:25:41 -0700 Message-Id: <20211021152541.781175-20-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20211021152541.781175-1-richard.henderson@linaro.org> References: <20211021152541.781175-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::636; envelope-from=richard.henderson@linaro.org; helo=mail-pl1-x636.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Yanan Wang , Eric Auger Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" From: Yanan Wang Run ./tests/data/acpi/rebuild-expected-aml.sh from build directory to update PPTT binary. Also empty bios-tables-test-allowed-diff.h. Disassembled output of the updated new file: /* * Intel ACPI Component Architecture * AML/ASL+ Disassembler version 20180810 (64-bit version) * Copyright (c) 2000 - 2018 Intel Corporation * * Disassembly of tests/data/acpi/virt/PPTT, Fri Oct 8 10:12:32 2021 * * ACPI Data Table [PPTT] * * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue */ [000h 0000 4] Signature : "PPTT" [Processor Properties Topology Table] [004h 0004 4] Table Length : 0000004C [008h 0008 1] Revision : 02 [009h 0009 1] Checksum : A8 [00Ah 0010 6] Oem ID : "BOCHS " [010h 0016 8] Oem Table ID : "BXPC " [018h 0024 4] Oem Revision : 00000001 [01Ch 0028 4] Asl Compiler ID : "BXPC" [020h 0032 4] Asl Compiler Revision : 00000001 [024h 0036 1] Subtable Type : 00 [Processor Hierarchy Node] [025h 0037 1] Length : 14 [026h 0038 2] Reserved : 0000 [028h 0040 4] Flags (decoded below) : 00000001 Physical package : 1 ACPI Processor ID valid : 0 [02Ch 0044 4] Parent : 00000000 [030h 0048 4] ACPI Processor ID : 00000000 [034h 0052 4] Private Resource Number : 00000000 [038h 0056 1] Subtable Type : 00 [Processor Hierarchy Node] [039h 0057 1] Length : 14 [03Ah 0058 2] Reserved : 0000 [03Ch 0060 4] Flags (decoded below) : 0000000A Physical package : 0 ACPI Processor ID valid : 1 [040h 0064 4] Parent : 00000024 [044h 0068 4] ACPI Processor ID : 00000000 [048h 0072 4] Private Resource Number : 00000000 Raw Table Data: Length 76 (0x4C) 0000: 50 50 54 54 4C 00 00 00 02 A8 42 4F 43 48 53 20 // PPTTL.....BOCHS 0010: 42 58 50 43 20 20 20 20 01 00 00 00 42 58 50 43 // BXPC ....BXPC 0020: 01 00 00 00 00 14 00 00 01 00 00 00 00 00 00 00 // ................ 0030: 00 00 00 00 00 00 00 00 00 14 00 00 0A 00 00 00 // ................ 0040: 24 00 00 00 00 00 00 00 00 00 00 00 // $........... Reviewed-by: Eric Auger Signed-off-by: Yanan Wang Message-Id: <20211020142125.7516-9-wangyanan55@huawei.com> Signed-off-by: Richard Henderson --- tests/qtest/bios-tables-test-allowed-diff.h | 1 - tests/data/acpi/virt/PPTT | Bin 0 -> 76 bytes 2 files changed, 1 deletion(-) diff --git a/tests/data/acpi/virt/PPTT b/tests/data/acpi/virt/PPTT index e69de29bb2d1d6434b8b29ae775ad8c2e48c5391..7a1258ecf123555b24462c98ccbb76b4ac1d0c2b 100644 GIT binary patch literal 76 zcmWFt2nq3FU|?Wc;pFe^5v<@85#X!<1dKp25F11@h%hjKX%HI*fMQ%gwhD|7qyeJ> B2LS*8 literal 0 HcmV?d00001 -- 2.25.1 diff --git a/tests/qtest/bios-tables-test-allowed-diff.h b/tests/qtest/bios-tables-test-allowed-diff.h index cb143a55a6..dfb8523c8b 100644 --- a/tests/qtest/bios-tables-test-allowed-diff.h +++ b/tests/qtest/bios-tables-test-allowed-diff.h @@ -1,2 +1 @@ /* List of comma-separated changed AML files to ignore */ -"tests/data/acpi/virt/PPTT",