From patchwork Tue Oct 5 03:25:28 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bjorn Andersson X-Patchwork-Id: 515225 Delivered-To: patch@linaro.org Received: by 2002:ac0:890a:0:0:0:0:0 with SMTP id 10csp1688686imy; Mon, 4 Oct 2021 20:23:55 -0700 (PDT) X-Google-Smtp-Source: ABdhPJy54qGPT6dDg3i6ostD9FXftav162OFUQO66Iuv1fjnfsBdIT0/7cI/4ylVVzqXCFuNjpWm X-Received: by 2002:a17:906:5010:: with SMTP id s16mr21647268ejj.245.1633404235212; Mon, 04 Oct 2021 20:23:55 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1633404235; cv=none; d=google.com; s=arc-20160816; b=D24IPTNkCWn1CHX5avnXLYfumHY5Wh+JTCcHrOfBP3HBmdAc+lWnQammtkWYg3ukoC kGvofaatF+Li23UcW0KvBoyZmpnhLu4H/bXOAXZQtkeaQcemf8MLQL26fBR19tfGNWaI NagMOiIAvRWTZwgNqZIeUeW+/geFYXhpf3apYN+dZJ5gAhEpFmtyTquR8/cNeXVmv11R Ur4Z36Aj0GDs4qYc27z0dMk6C1sYksVhOMkWT5NXiMQn9RN74dnBzIOvHR7STNPYMmdN NeIg0rBVUan8Gn3Iergxq7kK3W8FW9ocRGnGhZiU/i9FpV6NWIA7J0s0KNzDVWSCWUX0 /MBQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=5F9P+rsu48FUbDV9TizntpJNt5FGTMagwmpzztCYYIw=; b=l7GYusiqnCtOKb9LN6fdO1H/Z4XVy+23jIKdI8t4c0SChCIRnJM0ibNLJwCSaLGpe6 qPnHgTwNFJaJgICjMBYGKV0ar7PRUJQsf72kdjdbcq/AYlu0XuM9F4qubRCA6gpWHSMy qOV4QtTLCJUHnZ2wc3aVa6nEFbqoao7F8krmiHiyvnL12OZHm9WyWWOMlChuVMwidioh 0aPVY+CK5V5gkv4YT+ozNLBNlb4tGJZoERq3ooS0y3QLLNrknI3XYJrLZicpb74x98Wo vMlBwTG5Eu+lJ1fkPoRk9crbFq2pzND0GRoIgJTSoZIKGDmpjNaWaiBM9NUsPH8OVEeO 3noQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=Vgnf2JNJ; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id d29si21308606ejo.60.2021.10.04.20.23.55; Mon, 04 Oct 2021 20:23:55 -0700 (PDT) Received-SPF: pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=Vgnf2JNJ; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231664AbhJEDZm (ORCPT + 7 others); Mon, 4 Oct 2021 23:25:42 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:59848 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231559AbhJEDZk (ORCPT ); Mon, 4 Oct 2021 23:25:40 -0400 Received: from mail-ot1-x335.google.com (mail-ot1-x335.google.com [IPv6:2607:f8b0:4864:20::335]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id AC613C061755 for ; Mon, 4 Oct 2021 20:23:50 -0700 (PDT) Received: by mail-ot1-x335.google.com with SMTP id l16-20020a9d6a90000000b0053b71f7dc83so24187092otq.7 for ; Mon, 04 Oct 2021 20:23:50 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=5F9P+rsu48FUbDV9TizntpJNt5FGTMagwmpzztCYYIw=; b=Vgnf2JNJ6OouXm7x/ldZOtSiEBU9yaIGBuePc25n9LYJz7oTjHqtLMbpOy+DiE8yIC +bCLgob2aVTyOTtF+ltOjjwjX0Nro3SOfDRrylKn17hldGv6KKiQIqacFJumID5GcZEN cjoX0u1fz/8xwfXhSSISiSmb/8YZIO2o9zcqU6QwgEPzSfnnMK6kalPihkksXoEyBdjq 0U+GG1xvEb89Q9uSNygFIdMIRKA8BX48trA5bdmoeXsOD8D+jHKmJ3z5gxQlLN4dgP+L bRmtdhiTa0mCO6vvbhL6mU4f53vxCvA6973/kQYNdgKqNQ7Dz5heVCyNOKtZYESt41Xn XCww== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=5F9P+rsu48FUbDV9TizntpJNt5FGTMagwmpzztCYYIw=; b=icdTNgBg4xJA9LScEW52NarNoe1xQIaNVxByGF7gkOkX6jeNnjMnk+Zzwaf6vtILWI GNvAWQVJgfFCzfW2XYi8KHpfq6doz4BJWRXDLLADqasBLKcVblpeW2jMB4Sz/PMbXT/a isr+smiqc2OkV2E8VRWcnCr2BJndNfxCYHrD7WuoLloXjNhRgYA5mqvh9lTemA2Dvt7r YYwpQhwpA8/5rbfc7+ydbIUsBKG2w0EGh63KKv0NNbZopbDbk9mD9neGbvbyMubyoMBN WegabxtSl5s6JEKP8Ib3yiCvH4IUypDsMbEHkaqZLDIYrsiQNOT8gU5aw2iWM8cr9oZa hUmA== X-Gm-Message-State: AOAM533HQ95oSjaxUR1hio67h04YabSiAM3T+GNCArcItqEk8RGfUKdx VoW+WVgvbfVv8Kp9BEVFGcIsNQ== X-Received: by 2002:a05:6830:22d6:: with SMTP id q22mr11873976otc.344.1633404230029; Mon, 04 Oct 2021 20:23:50 -0700 (PDT) Received: from localhost.localdomain ([2600:1700:a0:3dc8:205:1bff:fec0:b9b3]) by smtp.gmail.com with ESMTPSA id j4sm3111955oia.56.2021.10.04.20.23.49 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 04 Oct 2021 20:23:49 -0700 (PDT) From: Bjorn Andersson To: Andy Gross , Bjorn Andersson , Zhang Rui , Daniel Lezcano , Amit Kucheria , Rob Herring , Thara Gopinath , Dmitry Baryshkov Cc: linux-arm-msm@vger.kernel.org, linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v3 1/4] dt-bindings: thermal: qcom: add HC variant of adc-thermal monitor bindings Date: Mon, 4 Oct 2021 20:25:28 -0700 Message-Id: <20211005032531.2251928-2-bjorn.andersson@linaro.org> X-Mailer: git-send-email 2.29.2 In-Reply-To: <20211005032531.2251928-1-bjorn.andersson@linaro.org> References: <20211005032531.2251928-1-bjorn.andersson@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org The HC generation of the ADC Thermal Monitor is quite similar to the 5th generation, but differs in valid values for a few properties. Create a new binding for the HC version of the hardware, rather than sprinkle conditionals throughout the existing binding. Signed-off-by: Bjorn Andersson --- Changes since v2: - None .../bindings/thermal/qcom-spmi-adc-tm-hc.yaml | 149 ++++++++++++++++++ 1 file changed, 149 insertions(+) create mode 100644 Documentation/devicetree/bindings/thermal/qcom-spmi-adc-tm-hc.yaml -- 2.29.2 diff --git a/Documentation/devicetree/bindings/thermal/qcom-spmi-adc-tm-hc.yaml b/Documentation/devicetree/bindings/thermal/qcom-spmi-adc-tm-hc.yaml new file mode 100644 index 000000000000..8273ac55b63f --- /dev/null +++ b/Documentation/devicetree/bindings/thermal/qcom-spmi-adc-tm-hc.yaml @@ -0,0 +1,149 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/thermal/qcom-spmi-adc-tm-hc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm's SPMI PMIC ADC HC Thermal Monitoring +maintainers: + - Dmitry Baryshkov + +properties: + compatible: + const: qcom,spmi-adc-tm-hc + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + "#thermal-sensor-cells": + const: 1 + description: + Number of cells required to uniquely identify the thermal sensors. Since + we have multiple sensors this is set to 1 + + "#address-cells": + const: 1 + + "#size-cells": + const: 0 + + qcom,avg-samples: + $ref: /schemas/types.yaml#/definitions/uint32 + description: Number of samples to be used for measurement. + enum: + - 1 + - 2 + - 4 + - 8 + - 16 + default: 1 + + qcom,decimation: + $ref: /schemas/types.yaml#/definitions/uint32 + description: This parameter is used to decrease ADC sampling rate. + Quicker measurements can be made by reducing decimation ratio. + enum: + - 256 + - 512 + - 1024 + default: 1024 + +patternProperties: + "^([-a-z0-9]*)@[0-7]$": + type: object + description: + Represent one thermal sensor. + + properties: + reg: + description: Specify the sensor channel. There are 8 channels in PMIC5's ADC TM + minimum: 0 + maximum: 7 + + io-channels: + description: + From common IIO binding. Used to pipe PMIC ADC channel to thermal monitor + + qcom,ratiometric: + $ref: /schemas/types.yaml#/definitions/flag + description: + Channel calibration type. + If this property is specified VADC will use the VDD reference + (1.875V) and GND for channel calibration. If property is not found, + channel will be calibrated with 0V and 1.25V reference channels, + also known as absolute calibration. + + qcom,hw-settle-time-us: + description: Time between AMUX getting configured and the ADC starting conversion. + enum: [0, 100, 200, 300, 400, 500, 600, 700, 1000, 2000, 4000, 6000, 8000, 10000] + + qcom,pre-scaling: + $ref: /schemas/types.yaml#/definitions/uint32-array + description: Used for scaling the channel input signal before the + signal is fed to VADC. The configuration for this node is to know the + pre-determined ratio and use it for post scaling. It is a pair of + integers, denoting the numerator and denominator of the fraction by + which input signal is multiplied. For example, <1 3> indicates the + signal is scaled down to 1/3 of its value before ADC measurement. If + property is not found default value depending on chip will be used. + items: + - const: 1 + - enum: [ 1, 3, 4, 6, 20, 8, 10 ] + + required: + - reg + - io-channels + + additionalProperties: + false + +required: + - compatible + - reg + - interrupts + - "#address-cells" + - "#size-cells" + - "#thermal-sensor-cells" + +additionalProperties: false + +examples: + - | + #include + #include + spmi_bus { + #address-cells = <1>; + #size-cells = <0>; + pm8998_adc: adc@3100 { + reg = <0x3100>; + compatible = "qcom,spmi-adc-rev2"; + #address-cells = <1>; + #size-cells = <0>; + #io-channel-cells = <1>; + + /* Other propreties are omitted */ + adc-chan@4c { + reg = ; + }; + }; + + pm8998_adc_tm: adc-tm@3400 { + compatible = "qcom,spmi-adc-tm-hc"; + reg = <0x3400>; + interrupts = <0x2 0x34 0x0 IRQ_TYPE_EDGE_RISING>; + #thermal-sensor-cells = <1>; + #address-cells = <1>; + #size-cells = <0>; + + thermistor@1 { + reg = <1>; + io-channels = <&pm8998_adc ADC5_XO_THERM_100K_PU>; + qcom,ratiometric; + qcom,hw-settle-time-us = <200>; + }; + }; + }; +... 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[23.128.96.18]) by mx.google.com with ESMTP id u9si3186403edf.223.2021.10.04.20.24.00; Mon, 04 Oct 2021 20:24:00 -0700 (PDT) Received-SPF: pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=uFy5Lbzd; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231901AbhJEDZs (ORCPT + 7 others); Mon, 4 Oct 2021 23:25:48 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:59882 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231751AbhJEDZn (ORCPT ); Mon, 4 Oct 2021 23:25:43 -0400 Received: from mail-ot1-x335.google.com (mail-ot1-x335.google.com [IPv6:2607:f8b0:4864:20::335]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 689B3C061753 for ; Mon, 4 Oct 2021 20:23:53 -0700 (PDT) Received: by mail-ot1-x335.google.com with SMTP id 97-20020a9d006a000000b00545420bff9eso24230847ota.8 for ; Mon, 04 Oct 2021 20:23:53 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=M3NkAo4ipnsswFd7+bb6gh6i4/0zZCNYqzmzcXc1S2E=; b=uFy5Lbzdcs1mvU8Xy0XTdLp0Vm6MJS1W8fN46g+3N9sR6JBS1O6wgZNF265dwpgeMm Xhd1eXFIcB4DI6zxgCWu8tT8j94Wmb21RQRERzKkALcOYUWZGILlORlmaTwedRBnXNEZ TGpWSckGdau3g5uhG//nK1g43jjvFmkjFCT8w44SALnvsr+Wt+lQXaC7QQ6raaArEG1J vWrKYe9fP7DpjErgZM8KtNPWC3ldmYFXXNqSn3gt7Zg1ZLGHRuyylwYcOUEO5kCNywzx g48mwjcAsb19mV3yOwRIJMkLJSim79LDlDQydu84ALS3DScY8VQ4gEjKxIqQnmZmoOnF uO/g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=M3NkAo4ipnsswFd7+bb6gh6i4/0zZCNYqzmzcXc1S2E=; b=Jnbh7lT7WfqELDdLU8dnjFX1ZS7tIFFGUFcJXW3WslzTZQkVHN0TQu5XCUZac9+wBH K4Bn8/dM+Hz6XgSG7aFfxDATQ0Js8g/NeMTEC2XLm9C/dD2CXzhH6IH/Ed3lj9lUSs3w vWC/9cbW5cEHtcwQQ3Er3sl11TMp971GQb/HvoBf0Uy31spEDD4LrNo018SiP3jU+sAh ymxUmiaLI6+iVLcmIRmmrj21reE7lVjM+3mHv64bxsR3OeuzWPD+CsrRwLnplO9mQ6lF 64aiRdhkHDA4RIu+hWjabG8rHwWsyEmckA2A1uhRYbCy8cv80BnwvsYOpPCTygykWev8 m5Yw== X-Gm-Message-State: AOAM530FgoetZbbgEIJGjT+08N686H0i/IklS+Kz9QCU+P7krHt04jlg urbGEmUXupkY9t4glBFfJ3I6qA== X-Received: by 2002:a9d:6a50:: with SMTP id h16mr12335629otn.314.1633404232776; Mon, 04 Oct 2021 20:23:52 -0700 (PDT) Received: from localhost.localdomain ([2600:1700:a0:3dc8:205:1bff:fec0:b9b3]) by smtp.gmail.com with ESMTPSA id j4sm3111955oia.56.2021.10.04.20.23.51 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 04 Oct 2021 20:23:52 -0700 (PDT) From: Bjorn Andersson To: Andy Gross , Bjorn Andersson , Zhang Rui , Daniel Lezcano , Amit Kucheria , Rob Herring , Thara Gopinath , Dmitry Baryshkov Cc: linux-arm-msm@vger.kernel.org, linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v3 4/4] arm64: dts: qcom: sdm845: mtp: Add vadc channels and thermal zones Date: Mon, 4 Oct 2021 20:25:31 -0700 Message-Id: <20211005032531.2251928-5-bjorn.andersson@linaro.org> X-Mailer: git-send-email 2.29.2 In-Reply-To: <20211005032531.2251928-1-bjorn.andersson@linaro.org> References: <20211005032531.2251928-1-bjorn.andersson@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Downstream defines four ADC channels related to thermal sensors external to the PM8998 and two channels for internal voltage measurements. Add these to the upstream SDM845 MTP, describe the thermal monitor channels and add thermal_zones for these. Signed-off-by: Bjorn Andersson --- Changes since v2: - Added missing qcom,ratiometric and qcom,hw-settle-time-us from the ADC channels arch/arm64/boot/dts/qcom/sdm845-mtp.dts | 140 ++++++++++++++++++++++++ 1 file changed, 140 insertions(+) -- 2.29.2 diff --git a/arch/arm64/boot/dts/qcom/sdm845-mtp.dts b/arch/arm64/boot/dts/qcom/sdm845-mtp.dts index 52dd7a858231..9aa21399b7ee 100644 --- a/arch/arm64/boot/dts/qcom/sdm845-mtp.dts +++ b/arch/arm64/boot/dts/qcom/sdm845-mtp.dts @@ -10,6 +10,8 @@ #include #include #include "sdm845.dtsi" +#include "pm8998.dtsi" +#include "pmi8998.dtsi" / { model = "Qualcomm Technologies, Inc. SDM845 MTP"; @@ -46,6 +48,68 @@ vreg_s4a_1p8: pm8998-smps4 { vin-supply = <&vph_pwr>; }; + + thermal-zones { + xo_thermal: xo-thermal { + polling-delay-passive = <0>; + polling-delay = <0>; + + thermal-sensors = <&pm8998_adc_tm 1>; + + trips { + trip-point { + temperature = <125000>; + hysteresis = <10000>; + type = "passive"; + }; + }; + }; + + msm_thermal: msm-thermal { + polling-delay-passive = <0>; + polling-delay = <0>; + + thermal-sensors = <&pm8998_adc_tm 2>; + + trips { + trip-point { + temperature = <125000>; + hysteresis = <10000>; + type = "passive"; + }; + }; + }; + + pa_thermal: pa-thermal { + polling-delay-passive = <0>; + polling-delay = <0>; + + thermal-sensors = <&pm8998_adc_tm 3>; + + trips { + trip-point { + temperature = <125000>; + hysteresis = <10000>; + type = "passive"; + }; + }; + }; + + quiet_thermal: quiet-thermal { + polling-delay-passive = <0>; + polling-delay = <0>; + + thermal-sensors = <&pm8998_adc_tm 4>; + + trips { + trip-point { + temperature = <125000>; + hysteresis = <10000>; + type = "passive"; + }; + }; + }; + }; }; &adsp_pas { @@ -469,6 +533,82 @@ &mss_pil { firmware-name = "qcom/sdm845/mba.mbn", "qcom/sdm845/modem.mbn"; }; +&pm8998_adc { + adc-chan@4c { + reg = ; + label = "xo_therm"; + qcom,ratiometric; + qcom,hw-settle-time-us = <200>; + }; + + adc-chan@4d { + reg = ; + label = "msm_therm"; + qcom,ratiometric; + qcom,hw-settle-time-us = <200>; + }; + + adc-chan@4f { + reg = ; + label = "pa_therm1"; + qcom,ratiometric; + qcom,hw-settle-time-us = <200>; + }; + + adc-chan@51 { + reg = ; + label = "quiet_therm"; + qcom,ratiometric; + qcom,hw-settle-time-us = <200>; + }; + + adc-chan@83 { + reg = ; + label = "vph_pwr"; + qcom,ratiometric; + qcom,hw-settle-time-us = <200>; + }; + + adc-chan@85 { + reg = ; + label = "vcoin"; + qcom,ratiometric; + qcom,hw-settle-time-us = <200>; + }; +}; + +&pm8998_adc_tm { + status = "okay"; + + xo-thermistor@1 { + reg = <1>; + io-channels = <&pm8998_adc ADC5_XO_THERM_100K_PU>; + qcom,ratiometric; + qcom,hw-settle-time-us = <200>; + }; + + msm-thermistor@2 { + reg = <2>; + io-channels = <&pm8998_adc ADC5_AMUX_THM1_100K_PU>; + qcom,ratiometric; + qcom,hw-settle-time-us = <200>; + }; + + pa-thermistor@3 { + reg = <3>; + io-channels = <&pm8998_adc ADC5_AMUX_THM3_100K_PU>; + qcom,ratiometric; + qcom,hw-settle-time-us = <200>; + }; + + quiet-thermistor@4 { + reg = <4>; + io-channels = <&pm8998_adc ADC5_AMUX_THM5_100K_PU>; + qcom,ratiometric; + qcom,hw-settle-time-us = <200>; + }; +}; + &qupv3_id_1 { status = "okay"; };