From patchwork Fri May 26 06:35:13 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Guodong Xu X-Patchwork-Id: 100547 Delivered-To: patch@linaro.org Received: by 10.140.96.100 with SMTP id j91csp112876qge; Thu, 25 May 2017 23:35:57 -0700 (PDT) X-Received: by 10.99.175.18 with SMTP id w18mr465774pge.183.1495780557715; Thu, 25 May 2017 23:35:57 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1495780557; cv=none; d=google.com; s=arc-20160816; b=b7Sn1vKT+l9LUt2Rv66HxOjFfjp5PfQS/AdcB6JAijz8Ja4ECBqgmiIJZ5QKB61ywZ VeJ9Xqe4+zHiIZXEdCRn29we4kWit8MDjN0Egq+CJ+mkwgGWUNBmoTfehO60kSFUz3fS +cF4VSePKseFdoOk0DMmDC6Zm1j1DjYiuxKXgJCqj3VUWOcnm9ufL95ZlrXWnRNjgU4W 9xc/Q2rtWXEtP/Xr++0Ot6303/8E10TCyqFLYi8KHsuCr6OnMljBsVICbvX4yz0pLRhy xuHOPdi+3R+Ajraq8UgaGJ2tFO2ZUfY8DYRYm13kPgK4mvac70ZFiLv3tNWQwFGAD2Ao yG+Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature:arc-authentication-results; bh=Nx22xPi5LDSPODn5Qj/z6sOSQKg1h1PwLhU0NeI4v3M=; b=G28edyO8wzgnSt0/rW5N0e/0egBM5jgmmJc5JRI2h9g4Q8ZYJVSECcEJ4RCU97h9vp UfzjakAWRiINkc08PoVEo9/SjEdcMS2+YylBG9972mv/dnOyvhw1ND/xlkc/8J74IALh 8Hdqe7+VLG9Tw+yG2xvi92PID2RpxTTkAJxHEZXtDL7thqEofdWsiqb7JkNMc9nzx1+A S7eyc6mHekR2KutrgstW5J+Io1nW+IMP6vHxMftvglIsLWNftyaz4Wq4V29zekunCvL9 WNUVgLOvyYlOUPzyQxn4zXTGkkzBjUjM/MpN7RHkqOu4iEFKjf8fUKCoLU46n52AV15H g1Wg== ARC-Authentication-Results: i=1; mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id d83si30790270pfj.52.2017.05.25.23.35.57; Thu, 25 May 2017 23:35:57 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1163660AbdEZGfo (ORCPT + 7 others); Fri, 26 May 2017 02:35:44 -0400 Received: from mail-pf0-f170.google.com ([209.85.192.170]:36122 "EHLO mail-pf0-f170.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1163650AbdEZGfj (ORCPT ); Fri, 26 May 2017 02:35:39 -0400 Received: by mail-pf0-f170.google.com with SMTP id m17so2572903pfg.3 for ; Thu, 25 May 2017 23:35:39 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=7CcB9RKTfOzb8KzCcuBy6mzs91sw+vfK57RuHKWll2Y=; b=hK5qUvzP2zyqnzkXy8HPUjwntp5DPKPAq82+KT6X2kSRKjEFejmDy8eZer05yYdwgB PHqKHB297Spk91T41Ei9bSiqNHX3tT9JEheQz9eQ5r16vKLJxLxWEnQo4v2JV7lO10um 7WDZ5Wzf5yRnMmQt6zwARRF1W24pKnHqQtohY= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=7CcB9RKTfOzb8KzCcuBy6mzs91sw+vfK57RuHKWll2Y=; b=t3Lm1XwPC7ZbZ3/Xf/bBJR61+gqEMbBMg6SYUk/sNPXed8tolCwu6AZSHocxlFruFk obZ4zfDmMQRmXM7RFLXEV5bh7DO+BB4zLSw+amwxlXjMPcninJzkUBydxsOjpDGRefE/ XStQ4y4EFZn2SANwDyOZjXVh80f4kZyhBXOdhM/8hM58/TIvoxILYRMV467LRSQqmL64 AD7Qz9IUPeaiAOULDr3wo6nTZNybu9CnbL8nzXsUioDQSDQuCmfMnqK2wiwBJlOtteGT ANbTx2hHj98CN7OCykQZ4UWpvn98NKNIUPps8wrVp0P9eUMLESEgIdRzoPol7sDRCetV f86g== X-Gm-Message-State: AODbwcBHS6DIt6gdKIt54/DHzjuJP3Ej3r/McdkP5q6iE52S7/W9fKWc FbHckD6oJGMC8/LX X-Received: by 10.98.35.150 with SMTP id q22mr471410pfj.220.1495780539242; Thu, 25 May 2017 23:35:39 -0700 (PDT) Received: from docularxu-ThinkPad-T440p.219.146.1.66 ([45.56.159.222]) by smtp.gmail.com with ESMTPSA id j11sm11420635pgn.38.2017.05.25.23.35.31 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 25 May 2017 23:35:38 -0700 (PDT) From: Guodong Xu To: lee.jones@linaro.org, robh+dt@kernel.org, mark.rutland@arm.com, xuwei5@hisilicon.com, catalin.marinas@arm.com, will.deacon@arm.com, lgirdwood@gmail.com, broonie@kernel.org, khilman@baylibre.com, arnd@arndb.de, gregory.clement@free-electrons.com, olof@lixom.net, thomas.petazzoni@free-electrons.com, yamada.masahiro@socionext.com, riku.voipio@linaro.org, treding@nvidia.com, krzk@kernel.org, eric@anholt.net, damm+renesas@opensource.se, ard.biesheuvel@linaro.org, linus.walleij@linaro.org, geert+renesas@glider.be Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, hw.wangxiaoyin@hisilicon.com, Guodong Xu Subject: [PATCH 1/6] dt-bindings: mfd: Add hi6421v530 bindings Date: Fri, 26 May 2017 14:35:13 +0800 Message-Id: <20170526063518.21246-2-guodong.xu@linaro.org> X-Mailer: git-send-email 2.10.2 In-Reply-To: <20170526063518.21246-1-guodong.xu@linaro.org> References: <20170526063518.21246-1-guodong.xu@linaro.org> Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org DT bindings for hisilicon HI655x PMIC chip. Signed-off-by: Guodong Xu --- .../bindings/mfd/hisilicon,hi6421v530.txt | 25 ++++++++++++++++++++++ 1 file changed, 25 insertions(+) create mode 100644 Documentation/devicetree/bindings/mfd/hisilicon,hi6421v530.txt -- 2.10.2 -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/Documentation/devicetree/bindings/mfd/hisilicon,hi6421v530.txt b/Documentation/devicetree/bindings/mfd/hisilicon,hi6421v530.txt new file mode 100644 index 0000000..6ffe6f6 --- /dev/null +++ b/Documentation/devicetree/bindings/mfd/hisilicon,hi6421v530.txt @@ -0,0 +1,25 @@ +Hisilicon Hi6421v530 Power Management Integrated Circuit (PMIC) + +The hardware layout for access PMIC Hi6421v530 from AP SoC Hi3660. +Between PMIC Hi6421v530 and Hi3660, the physical signal channel is SSI. +We can use memory-mapped I/O to communicate. + ++----------------+ +-------------+ +| | | | +| Hi3660 | SSI bus | Hi6421v530 | +| |-------------| | +| |(REGMAP_MMIO)| | ++----------------+ +-------------+ + +Required properties: +- compatible: Should be "hisilicon,hi6421v530-pmic". +- reg: Base address of PMIC on Hi3660 SoC. +- interrupt-controller: Hi6421v530 has internal IRQs (has own IRQ domain). + +Example: + pmic: pmic@fff34000 { + compatible = "hisilicon,hi6421v530-pmic"; + reg = <0x0 0xfff34000 0x0 0x1000>; + interrupt-controller; + #interrupt-cells = <2>; + } From patchwork Fri May 26 06:35:16 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Guodong Xu X-Patchwork-Id: 100550 Delivered-To: patch@linaro.org Received: by 10.140.96.100 with SMTP id j91csp112994qge; Thu, 25 May 2017 23:36:26 -0700 (PDT) X-Received: by 10.84.233.132 with SMTP id l4mr55734614plk.148.1495780586869; Thu, 25 May 2017 23:36:26 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1495780586; cv=none; d=google.com; s=arc-20160816; b=WvaRpxkO8JnDAzb/2hDJWY+GZ1/AmkENf2aRpMLq6OvFaKvji+72saHkBcdsfZ6hW3 j17azEazsT9zbXuVRdLtkhrCYWW00qLMy0sIFom/F5zDIaKtfe1fhC8cpxq8sdPyxzt7 vhvapGFGbi4pU87vczj8eTGEgwWYqLW95nFbSkI9bVi/SSnGmd1xF/cZys5OvPVwTNQ3 uzpnllVzozZ+yEzqSqjChuSjS1b3cZG59u+UjGVClQhdIR2PcUF3oZAOFN0n1ZDF4+gT a4froWswb1R877V43PqZjjy3ZcKc77Mb3kZyG+t29PSRDYbWvNEJLD2hAbqv402gZlHd mHpQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature:arc-authentication-results; bh=mjgGx2k2QlkYK3hlOrMV6z8G9dQuCHs5GnkgFRNjWvo=; b=rArdoqIIdFYXxSdlYQH9VISpvkJKF0WVFMFKtPlbA6H0ILla8to+xF3J24AWQRI+1j qfdhog0Cf3Jo3OnvtyFGjMs9BTWeCwhB5bkr61PJStTFZiMd1RbOsbErcPOvG9ZbizJN nu68Qup6fHbnVO/wjSMgWAslwX+1nWjoGAKWQgVZ20zSFaonWy+ORBa4dJz8imEvj5rc WSzWKEmMJM3I/zc2axDwxqFr5+0jjEgwKXlO51XsX3uohQox/fPH95uV8riV2H3AlNia ce/8iH0lnHPLRrNPRF3HkQ4s3IL4O+YK/QVueTJ1Wfw1aTWyWRBtPm4NggXa5YcGnc7p sXUg== ARC-Authentication-Results: i=1; mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id p24si31494836pli.172.2017.05.25.23.36.26; Thu, 25 May 2017 23:36:26 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1166197AbdEZGgN (ORCPT + 7 others); Fri, 26 May 2017 02:36:13 -0400 Received: from mail-pf0-f171.google.com ([209.85.192.171]:36322 "EHLO mail-pf0-f171.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1163654AbdEZGgJ (ORCPT ); Fri, 26 May 2017 02:36:09 -0400 Received: by mail-pf0-f171.google.com with SMTP id m17so2583069pfg.3 for ; Thu, 25 May 2017 23:36:04 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=1Dmxu3gMVkL77nFB9cFAY9ZKLd0wEkbsG3L1349aCH0=; b=iJ0Bcnep4p2Gl8N+tCGJG16pTEa/d5WnwYodGET01tX3vjKM3Azd9tEVT742Vdhcqh TLTY3pGBKpWO8F0WSYPUes29r/kA8fAIPJYKoLg1WHpujqIOmQHf+4nNalP8Iapnuo0P VRCwOTMX06Ks5R7fIeamaVr24BWPvhXcusTCI= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=1Dmxu3gMVkL77nFB9cFAY9ZKLd0wEkbsG3L1349aCH0=; b=JwIEdpQTv8Aiz3rtcuKYG1xBIvc/eP4FGjwv+ZMdTjxNaUiFO8jkIOjIOSigBrFobB BLkVBTMGwQFGkOc8FrvAI7MdlqMle85dDYuXKjqSu3j2uIz2eJs7U/nxW39ouMZ2dmmt 3krokYVmcBUMj49geLnYtKFoKZb389VY17A5dPxt+OCbcI0lz1HjSHxu5+1Kw/LqKUYN Qm5Zw5GxXghUEJr2w/ZwMZtp7n4Zdsr+s+Fly2jfHGOPZCL4Hi3I3+o+rSPRO3L+fZhY GzFLOidTYh+glSE8uTDB3zdAHwOGzEIgaXJsln8sFzWEVMawQQDBZfU8/2jFRcXpukQK wpLw== X-Gm-Message-State: AODbwcBqR1eZPnvf14B1V/jeTsA2uSuHfpDQr+nRSAv8oJOQar4LNSL+ bTMfym3iS2ZJJbxu X-Received: by 10.99.127.89 with SMTP id p25mr507702pgn.92.1495780564077; Thu, 25 May 2017 23:36:04 -0700 (PDT) Received: from docularxu-ThinkPad-T440p.219.146.1.66 ([45.56.159.222]) by smtp.gmail.com with ESMTPSA id j11sm11420635pgn.38.2017.05.25.23.35.55 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 25 May 2017 23:36:03 -0700 (PDT) From: Guodong Xu To: lee.jones@linaro.org, robh+dt@kernel.org, mark.rutland@arm.com, xuwei5@hisilicon.com, catalin.marinas@arm.com, will.deacon@arm.com, lgirdwood@gmail.com, broonie@kernel.org, khilman@baylibre.com, arnd@arndb.de, gregory.clement@free-electrons.com, olof@lixom.net, thomas.petazzoni@free-electrons.com, yamada.masahiro@socionext.com, riku.voipio@linaro.org, treding@nvidia.com, krzk@kernel.org, eric@anholt.net, damm+renesas@opensource.se, ard.biesheuvel@linaro.org, linus.walleij@linaro.org, geert+renesas@glider.be Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, hw.wangxiaoyin@hisilicon.com, Guodong Xu Subject: [PATCH 4/6] regulator: hi6421v530: add driver for hi6421v530 voltage regulator Date: Fri, 26 May 2017 14:35:16 +0800 Message-Id: <20170526063518.21246-5-guodong.xu@linaro.org> X-Mailer: git-send-email 2.10.2 In-Reply-To: <20170526063518.21246-1-guodong.xu@linaro.org> References: <20170526063518.21246-1-guodong.xu@linaro.org> Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Wang Xiaoyin add the driver for hi6421v530 voltage regulator Signed-off-by: Wang Xiaoyin Signed-off-by: Guodong Xu --- drivers/regulator/Kconfig | 10 + drivers/regulator/Makefile | 1 + drivers/regulator/hi6421v530-regulator.c | 355 +++++++++++++++++++++++++++++++ 3 files changed, 366 insertions(+) create mode 100644 drivers/regulator/hi6421v530-regulator.c -- 2.10.2 -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/drivers/regulator/Kconfig b/drivers/regulator/Kconfig index 48db87d..c389ce8 100644 --- a/drivers/regulator/Kconfig +++ b/drivers/regulator/Kconfig @@ -296,6 +296,16 @@ config REGULATOR_HI6421 21 general purpose LDOs, 3 dedicated LDOs, and 5 BUCKs. All of them come with support to either ECO (idle) or sleep mode. +config REGULATOR_HI6421V530 + tristate "HiSilicon Hi6421v530 PMIC voltage regulator support" + depends on MFD_HI6421V530_PMIC && OF + help + This driver provides support for the voltage regulators on + HiSilicon Hi6421v530 PMU / Codec IC. + Hi6421v530 is a multi-function device which, on regulator part, + provides 5 general purpose LDOs, and all of them come with support + to either ECO (idle) or sleep mode. + config REGULATOR_HI655X tristate "Hisilicon HI655X PMIC regulators support" depends on ARCH_HISI || COMPILE_TEST diff --git a/drivers/regulator/Makefile b/drivers/regulator/Makefile index dc3503f..36e2b75 100644 --- a/drivers/regulator/Makefile +++ b/drivers/regulator/Makefile @@ -38,6 +38,7 @@ obj-$(CONFIG_REGULATOR_DB8500_PRCMU) += db8500-prcmu.o obj-$(CONFIG_REGULATOR_FAN53555) += fan53555.o obj-$(CONFIG_REGULATOR_GPIO) += gpio-regulator.o obj-$(CONFIG_REGULATOR_HI6421) += hi6421-regulator.o +obj-$(CONFIG_REGULATOR_HI6421V530) += hi6421v530-regulator.o obj-$(CONFIG_REGULATOR_HI655X) += hi655x-regulator.o obj-$(CONFIG_REGULATOR_ISL6271A) += isl6271a-regulator.o obj-$(CONFIG_REGULATOR_ISL9305) += isl9305.o diff --git a/drivers/regulator/hi6421v530-regulator.c b/drivers/regulator/hi6421v530-regulator.c new file mode 100644 index 0000000..82854d0 --- /dev/null +++ b/drivers/regulator/hi6421v530-regulator.c @@ -0,0 +1,355 @@ +/* + * Device driver for regulators in Hi6421V530 IC + * + * Copyright (c) <2017> HiSilicon Technologies Co., Ltd. + * http://www.hisilicon.com + * Copyright (c) <2017> Linaro Ltd. + * http://www.linaro.org + * + * Author: Wang Xiaoyin + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +/* + * struct hi6421c530_regulator_pdata - Hi6421V530 regulator data + * of platform device. + * @lock: mutex to serialize regulator enable + */ +struct hi6421v530_regulator_pdata { + struct mutex lock; +}; + +/* + * struct hi6421v530_regulator_info - hi6421v530 regulator information + * @desc: regulator description + * @mode_mask: ECO mode bitmask of LDOs; for BUCKs, this masks sleep + * @eco_microamp: eco mode load upper limit (in uA), valid for LDOs only + */ +struct hi6421v530_regulator_info { + struct regulator_desc desc; + u8 mode_mask; + u32 eco_microamp; +}; + +/* HI6421v530 regulators */ +enum hi6421v530_regulator_id { + HI6421V530_LDO3, + HI6421V530_LDO9, + HI6421V530_LDO11, + HI6421V530_LDO15, + HI6421V530_LDO16, + HI6421V530_NUM_REGULATORS, +}; + +#define HI6421V530_REGULATOR_OF_MATCH(_name, id) \ +{ \ + .name = #_name, \ + .driver_data = (void *) HI6421V530_##id, \ +} + +static struct of_regulator_match hi6421v530_regulator_match[] = { + HI6421V530_REGULATOR_OF_MATCH(hi6421v530_ldo3, LDO3), + HI6421V530_REGULATOR_OF_MATCH(hi6421v530_ldo9, LDO9), + HI6421V530_REGULATOR_OF_MATCH(hi6421v530_ldo11, LDO11), + HI6421V530_REGULATOR_OF_MATCH(hi6421v530_ldo15, LDO15), + HI6421V530_REGULATOR_OF_MATCH(hi6421v530_ldo16, LDO16), +}; + +static const unsigned int ldo_3_voltages[] = { + 1800000, 1825000, 1850000, 1875000, + 1900000, 1925000, 1950000, 1975000, + 2000000, 2025000, 2050000, 2075000, + 2100000, 2125000, 2150000, 2200000, +}; + +static const unsigned int ldo_9_11_voltages[] = { + 1750000, 1800000, 1825000, 2800000, + 2850000, 2950000, 3000000, 3300000, +}; + +static const unsigned int ldo_15_16_voltages[] = { + 1750000, 1800000, 2400000, 2600000, + 2700000, 2850000, 2950000, 3000000, +}; + +static const struct regulator_ops hi6421v530_ldo_ops; + +#define HI6421V530_LDO_ENABLE_TIME (350) + +/* + * _id - LDO id name string + * v_table - voltage table + * vreg - voltage select register + * vmask - voltage select mask + * ereg - enable register + * emask - enable mask + * odelay - off/on delay time in uS + * ecomask - eco mode mask + * ecoamp - eco mode load uppler limit in uA + */ +#define HI6421V530_LDO(_id, v_table, vreg, vmask, ereg, emask, \ + odelay, ecomask, ecoamp) \ + [HI6421V530_##_id] = { \ + .desc = { \ + .name = #_id, \ + .ops = &hi6421v530_ldo_ops, \ + .type = REGULATOR_VOLTAGE, \ + .id = HI6421V530_##_id, \ + .owner = THIS_MODULE, \ + .n_voltages = ARRAY_SIZE(v_table), \ + .volt_table = v_table, \ + .vsel_reg = HI6421_REG_TO_BUS_ADDR(vreg), \ + .vsel_mask = vmask, \ + .enable_reg = HI6421_REG_TO_BUS_ADDR(ereg), \ + .enable_mask = emask, \ + .enable_time = HI6421V530_LDO_ENABLE_TIME, \ + .off_on_delay = odelay, \ + }, \ + .mode_mask = ecomask, \ + .eco_microamp = ecoamp, \ + } + +/* HI6421V530 regulator information */ + +static struct hi6421v530_regulator_info + hi6421v530_regulator_info[HI6421V530_NUM_REGULATORS] = { + HI6421V530_LDO(LDO3, ldo_3_voltages, 0x061, 0xf, 0x060, 0x2, + 20000, 0x6, 8000), + HI6421V530_LDO(LDO9, ldo_9_11_voltages, 0x06b, 0x7, 0x06a, 0x2, + 40000, 0x6, 8000), + HI6421V530_LDO(LDO11, ldo_9_11_voltages, 0x06f, 0x7, 0x06e, 0x2, + 40000, 0x6, 8000), + HI6421V530_LDO(LDO15, ldo_15_16_voltages, 0x077, 0x7, 0x076, 0x2, + 40000, 0x6, 8000), + HI6421V530_LDO(LDO16, ldo_15_16_voltages, 0x079, 0x7, 0x078, 0x2, + 40000, 0x6, 8000), +}; + +static int hi6421v530_regulator_enable(struct regulator_dev *rdev) +{ + struct hi6421v530_regulator_pdata *pdata; + int ret = 0; + + pdata = dev_get_drvdata(rdev->dev.parent); + mutex_lock(&pdata->lock); + + ret = regmap_update_bits(rdev->regmap, rdev->desc->enable_reg, + rdev->desc->enable_mask, + 1 << (ffs(rdev->desc->enable_mask) - 1)); + + mutex_unlock(&pdata->lock); + return ret; +} + +static int hi6421v530_regulator_disable(struct regulator_dev *rdev) +{ + struct hi6421v530_regulator_pdata *pdata; + int ret = 0; + + pdata = dev_get_drvdata(rdev->dev.parent); + mutex_lock(&pdata->lock); + + ret = regmap_update_bits(rdev->regmap, rdev->desc->enable_reg, + rdev->desc->enable_mask, 0); + + mutex_unlock(&pdata->lock); + return ret; +} + +static int hi6421v530_regulator_is_enabled(struct regulator_dev *rdev) +{ + unsigned int reg_val = 0; + int ret = 0; + + regmap_read(rdev->regmap, rdev->desc->enable_reg, ®_val); + + ret = (reg_val & (rdev->desc->enable_mask)) ? 1 : 0; + return ret; +} + +static int hi6421v530_regulator_set_voltage(struct regulator_dev *rdev, + unsigned int sel) +{ + struct hi6421v530_regulator_pdata *pdata; + int ret = 0; + + pdata = dev_get_drvdata(rdev->dev.parent); + mutex_lock(&pdata->lock); + + ret = regmap_update_bits(rdev->regmap, rdev->desc->vsel_reg, + rdev->desc->vsel_mask, + sel << (ffs(rdev->desc->vsel_mask) - 1)); + + mutex_unlock(&pdata->lock); + return ret; +} + +static int hi6421v530_regulator_get_voltage(struct regulator_dev *rdev) +{ + unsigned int reg_val = 0; + int voltage; + + regmap_read(rdev->regmap, rdev->desc->vsel_reg, ®_val); + + voltage = reg_val >> (ffs(rdev->desc->vsel_mask) - 1); + return voltage; +} + +static unsigned int hi6421v530_regulator_ldo_get_mode( + struct regulator_dev *rdev) +{ + struct hi6421v530_regulator_info *info; + unsigned int reg_val; + + info = rdev_get_drvdata(rdev); + regmap_read(rdev->regmap, rdev->desc->enable_reg, ®_val); + + if (reg_val & (info->mode_mask)) + return REGULATOR_MODE_IDLE; + + return REGULATOR_MODE_NORMAL; +} + +static int hi6421v530_regulator_ldo_set_mode(struct regulator_dev *rdev, + unsigned int mode) +{ + struct hi6421v530_regulator_info *info; + struct hi6421v530_regulator_pdata *pdata; + unsigned int new_mode; + + info = rdev_get_drvdata(rdev); + pdata = dev_get_drvdata(rdev->dev.parent); + switch (mode) { + case REGULATOR_MODE_NORMAL: + new_mode = 0; + break; + case REGULATOR_MODE_IDLE: + new_mode = info->mode_mask; + break; + default: + return -EINVAL; + } + + mutex_lock(&pdata->lock); + regmap_update_bits(rdev->regmap, rdev->desc->enable_reg, + info->mode_mask, new_mode); + mutex_unlock(&pdata->lock); + + return 0; +} + + +static const struct regulator_ops hi6421v530_ldo_ops = { + .is_enabled = hi6421v530_regulator_is_enabled, + .enable = hi6421v530_regulator_enable, + .disable = hi6421v530_regulator_disable, + .list_voltage = regulator_list_voltage_table, + .map_voltage = regulator_map_voltage_ascend, + .get_voltage_sel = hi6421v530_regulator_get_voltage, + .set_voltage_sel = hi6421v530_regulator_set_voltage, + .get_mode = hi6421v530_regulator_ldo_get_mode, + .set_mode = hi6421v530_regulator_ldo_set_mode, +}; + +static int hi6421v530_regulator_register(struct platform_device *pdev, + struct regmap *rmap, + struct regulator_init_data *init_data, + int id, struct device_node *np) +{ + struct hi6421v530_regulator_info *info = NULL; + struct regulator_config config = { }; + struct regulator_dev *rdev; + + /* assign per-regulator data */ + info = &hi6421v530_regulator_info[id]; + + config.dev = &pdev->dev; + config.init_data = init_data; + config.driver_data = info; + config.regmap = rmap; + config.of_node = np; + + /* register regulator with framework */ + rdev = devm_regulator_register(&pdev->dev, &info->desc, &config); + if (IS_ERR(rdev)) { + dev_err(&pdev->dev, "failed to register regulator %s\n", + info->desc.name); + return PTR_ERR(rdev); + } + + rdev->constraints->valid_modes_mask = info->mode_mask; + rdev->constraints->valid_ops_mask |= + REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_MODE; + + return 0; +} + +static int hi6421v530_regulator_probe(struct platform_device *pdev) +{ + struct device *dev = &pdev->dev; + struct device_node *np; + struct hi6421_pmic *pmic; + struct hi6421v530_regulator_pdata *pdata; + int i, ret = 0; + + pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL); + if (!pdata) + return -ENOMEM; + mutex_init(&pdata->lock); + + platform_set_drvdata(pdev, pdata); + + np = of_get_child_by_name(dev->parent->of_node, "regulators"); + if (!np) + return -ENODEV; + + ret = of_regulator_match(dev, np, + hi6421v530_regulator_match, + ARRAY_SIZE(hi6421v530_regulator_match)); + of_node_put(np); + if (ret < 0) { + dev_err(dev, "Error parsing regulator init data: %d\n", ret); + return ret; + } + + pmic = dev_get_drvdata(dev->parent); + + for (i = 0; i < ARRAY_SIZE(hi6421v530_regulator_match); i++) { + ret = hi6421v530_regulator_register(pdev, pmic->regmap, + hi6421v530_regulator_match[i].init_data, i, + hi6421v530_regulator_match[i].of_node); + + if (ret) + return ret; + } + + return 0; +} + +static struct platform_driver hi6421v530_regulator_driver = { + .driver = { + .name = "hi6421v530-regulator", + }, + .probe = hi6421v530_regulator_probe, +}; +module_platform_driver(hi6421v530_regulator_driver); + +MODULE_AUTHOR("Wang Xiaoyin "); +MODULE_DESCRIPTION("Hi6421v530 regulator driver"); +MODULE_LICENSE("GPL v2"); From patchwork Fri May 26 06:35:17 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Guodong Xu X-Patchwork-Id: 100551 Delivered-To: patch@linaro.org Received: by 10.140.96.100 with SMTP id j91csp113059qge; Thu, 25 May 2017 23:36:40 -0700 (PDT) X-Received: by 10.99.109.129 with SMTP id i123mr471844pgc.103.1495780600250; Thu, 25 May 2017 23:36:40 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1495780600; cv=none; d=google.com; s=arc-20160816; b=0NPYFlUPAp7YbHLRh7b7lsHCye/3/bhWK/TTMTHtnFcKcThP48OYVTpo+QABmZ8CVC UScRRbe8h/hgztQIjro1xinq1Rw1UgEgRESZM0k23eYDkpUrZuK1wbCFwz7uPEGOiXg/ 3VGK9qxBTSEPQLZ1JFda12RTiYQDbQhXF1iqWF18rz2hJtO6cSkW+hhWdpZE1M20HYKR 69dhlKY1lHeAh2R6MoFG2twLEI0Z1/9QLp4iydvRz2UtBZcsQm+CoFHnhLLG1hPDOn/l WxaNh01cZ1CuEc+2KF8xTy+iK9kKN2GQYV77C3K6vm+OLg5LXmOJlvuMdwZyCFcb795M ilhQ== ARC-Message-Signature: i=1; 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Thu, 25 May 2017 23:36:11 -0700 (PDT) Received: from docularxu-ThinkPad-T440p.219.146.1.66 ([45.56.159.222]) by smtp.gmail.com with ESMTPSA id j11sm11420635pgn.38.2017.05.25.23.36.04 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 25 May 2017 23:36:11 -0700 (PDT) From: Guodong Xu To: lee.jones@linaro.org, robh+dt@kernel.org, mark.rutland@arm.com, xuwei5@hisilicon.com, catalin.marinas@arm.com, will.deacon@arm.com, lgirdwood@gmail.com, broonie@kernel.org, khilman@baylibre.com, arnd@arndb.de, gregory.clement@free-electrons.com, olof@lixom.net, thomas.petazzoni@free-electrons.com, yamada.masahiro@socionext.com, riku.voipio@linaro.org, treding@nvidia.com, krzk@kernel.org, eric@anholt.net, damm+renesas@opensource.se, ard.biesheuvel@linaro.org, linus.walleij@linaro.org, geert+renesas@glider.be Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, hw.wangxiaoyin@hisilicon.com, Guodong Xu Subject: [PATCH 5/6] arm64: dts: hikey960: add device node for pmic and regulators Date: Fri, 26 May 2017 14:35:17 +0800 Message-Id: <20170526063518.21246-6-guodong.xu@linaro.org> X-Mailer: git-send-email 2.10.2 In-Reply-To: <20170526063518.21246-1-guodong.xu@linaro.org> References: <20170526063518.21246-1-guodong.xu@linaro.org> Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Wang Xiaoyin add device node for hi6421 pmic core and hi6421v530 voltage regulator,include LDO(1,3,9,11,15,16) Signed-off-by: Wang Xiaoyin Signed-off-by: Guodong Xu --- arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts | 60 +++++++++++++++++++++++ 1 file changed, 60 insertions(+) -- 2.10.2 -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts b/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts index ca448f0..b7a404a 100644 --- a/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts +++ b/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts @@ -97,6 +97,66 @@ default-state = "off"; }; }; + + pmic: pmic@fff34000 { + compatible = "hisilicon,hi6421v530-pmic"; + reg = <0x0 0xfff34000 0x0 0x1000>; + interrupt-controller; + #interrupt-cells = <2>; + + regulators { + ldo1: LDO1 { + regulator-compatible = "hi6421v530_ldo1"; + regulator-name = "LDO1"; + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <1500000>; + regulator-always-on; + regulator-enable-ramp-delay = <120>; + }; + + ldo3: LDO3 { + regulator-compatible = "hi6421v530_ldo3"; + regulator-name = "LDO3"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <2200000>; + regulator-always-on; + regulator-enable-ramp-delay = <120>; + }; + + ldo9: LDO9 { + regulator-compatible = "hi6421v530_ldo9"; + regulator-name = "LDO9"; + regulator-min-microvolt = <1750000>; + regulator-max-microvolt = <3300000>; + regulator-enable-ramp-delay = <240>; + }; + + ldo11: LDO11 { + regulator-compatible = "hi6421v530_ldo11"; + regulator-name = "LDO11"; + regulator-min-microvolt = <1750000>; + regulator-max-microvolt = <3300000>; + regulator-enable-ramp-delay = <240>; + }; + + ldo15: LDO15 { + regulator-compatible = "hi6421v530_ldo15"; + regulator-name = "LDO15"; + regulator-min-microvolt = <1750000>; + regulator-max-microvolt = <3000000>; + regulator-always-on; + regulator-enable-ramp-delay = <120>; + }; + + ldo16: LDO16 { + regulator-compatible = "hi6421v530_ldo16"; + regulator-name = "LDO16"; + regulator-min-microvolt = <1750000>; + regulator-max-microvolt = <3000000>; + regulator-enable-ramp-delay = <360>; + }; + }; + }; }; &i2c0 { From patchwork Fri May 26 06:35:18 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Guodong Xu X-Patchwork-Id: 100552 Delivered-To: patch@linaro.org Received: by 10.140.96.100 with SMTP id j91csp113062qge; Thu, 25 May 2017 23:36:41 -0700 (PDT) X-Received: by 10.99.117.65 with SMTP id f1mr516149pgn.58.1495780600976; Thu, 25 May 2017 23:36:40 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1495780600; cv=none; d=google.com; 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[209.132.180.67]) by mx.google.com with ESMTP id x11si31031492pfi.188.2017.05.25.23.36.40; Thu, 25 May 2017 23:36:40 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1946977AbdEZGge (ORCPT + 7 others); Fri, 26 May 2017 02:36:34 -0400 Received: from mail-pf0-f179.google.com ([209.85.192.179]:36451 "EHLO mail-pf0-f179.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1946990AbdEZGga (ORCPT ); Fri, 26 May 2017 02:36:30 -0400 Received: by mail-pf0-f179.google.com with SMTP id m17so2589349pfg.3 for ; Thu, 25 May 2017 23:36:25 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=F3HaKCnOr3BfVV0p3bUomXUYu2PZlGzkJxitEcIFK0c=; b=YV5w7JxlssjOekyaXnsaIiPArb4L7YVfdks45bIQifo+rjeUJUWal4doBFC7QCBq/u aP3C012cPnMQllj/3qAXolmCfmyKvRE9VgbIXxT11t42dcQ27O+MReCUa8+YlDPAW8Uu iyQiRtOhAeHb9DWy0gnWGPgB+AGuVTqsu1FLI= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=F3HaKCnOr3BfVV0p3bUomXUYu2PZlGzkJxitEcIFK0c=; b=FCnb4sjYpozSl4v6XhSYMgHTlclIwtuhtTzs8l+KNbbIcTUGCvWawz1JCwZt/X1abR I1MUXZNdUdMaOapXK1loHwYNWznACLyAfuExrzEJkfjXs9lcFAnWRP8kUO0WiolvRV7o QzOEg7DJImrnCTJRO0wPaNFIzX8FU4faJ2x5JmcOPcLSD0maxYPfy3F10X/qWmpn6OOW 8M9jMxRFVj6SlMDChtWaraKN6aUFSZLScNrNcVNO1mqqZkAA6Uw+wAXJoqKyXZqaFR1u rzxivugmJoFNUlMjOGdS3tBfcvxMgxLsPpul2fpeMTdKot3sbmMPl1qY/G+S0xi+olHg rGDQ== X-Gm-Message-State: AODbwcDZgzUkx/KUNKgYUJCRwenePIPzRx93hW2QlzimC8JU0RN+5wwO pZ+m+mEK1+vWegqc X-Received: by 10.98.193.65 with SMTP id i62mr482642pfg.134.1495780580006; Thu, 25 May 2017 23:36:20 -0700 (PDT) Received: from docularxu-ThinkPad-T440p.219.146.1.66 ([45.56.159.222]) by smtp.gmail.com with ESMTPSA id j11sm11420635pgn.38.2017.05.25.23.36.12 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 25 May 2017 23:36:19 -0700 (PDT) From: Guodong Xu To: lee.jones@linaro.org, robh+dt@kernel.org, mark.rutland@arm.com, xuwei5@hisilicon.com, catalin.marinas@arm.com, will.deacon@arm.com, lgirdwood@gmail.com, broonie@kernel.org, khilman@baylibre.com, arnd@arndb.de, gregory.clement@free-electrons.com, olof@lixom.net, thomas.petazzoni@free-electrons.com, yamada.masahiro@socionext.com, riku.voipio@linaro.org, treding@nvidia.com, krzk@kernel.org, eric@anholt.net, damm+renesas@opensource.se, ard.biesheuvel@linaro.org, linus.walleij@linaro.org, geert+renesas@glider.be Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, hw.wangxiaoyin@hisilicon.com, Guodong Xu Subject: [PATCH 6/6] arm64: defconfig: enable hi6421v530 MFD and regulator Date: Fri, 26 May 2017 14:35:18 +0800 Message-Id: <20170526063518.21246-7-guodong.xu@linaro.org> X-Mailer: git-send-email 2.10.2 In-Reply-To: <20170526063518.21246-1-guodong.xu@linaro.org> References: <20170526063518.21246-1-guodong.xu@linaro.org> Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Enable configs for hi6421v530 mfd and regulator driver Signed-off-by: Guodong Xu --- arch/arm64/configs/defconfig | 2 ++ 1 file changed, 2 insertions(+) -- 2.10.2 -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig index ce07285..287e943 100644 --- a/arch/arm64/configs/defconfig +++ b/arch/arm64/configs/defconfig @@ -305,6 +305,7 @@ CONFIG_S3C2410_WATCHDOG=y CONFIG_MESON_GXBB_WATCHDOG=m CONFIG_MESON_WATCHDOG=m CONFIG_MFD_EXYNOS_LPASS=m +CONFIG_MFD_HI6421V530_PMIC=y CONFIG_MFD_MAX77620=y CONFIG_MFD_RK808=y CONFIG_MFD_SPMI_PMIC=y @@ -315,6 +316,7 @@ CONFIG_MFD_CROS_EC=y CONFIG_MFD_CROS_EC_I2C=y CONFIG_REGULATOR_FIXED_VOLTAGE=y CONFIG_REGULATOR_GPIO=y +CONFIG_REGULATOR_HI6421V530=y CONFIG_REGULATOR_HI655X=y CONFIG_REGULATOR_MAX77620=y CONFIG_REGULATOR_PWM=y