From patchwork Wed Sep 15 12:27:05 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jan Kiszka X-Patchwork-Id: 513256 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.7 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 99C45C4332F for ; Wed, 15 Sep 2021 12:27:30 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 85468611C4 for ; Wed, 15 Sep 2021 12:27:30 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S237647AbhIOM2s (ORCPT ); Wed, 15 Sep 2021 08:28:48 -0400 Received: from gecko.sbs.de ([194.138.37.40]:38473 "EHLO gecko.sbs.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S237460AbhIOM2r (ORCPT ); Wed, 15 Sep 2021 08:28:47 -0400 Received: from mail2.sbs.de (mail2.sbs.de [192.129.41.66]) by gecko.sbs.de (8.15.2/8.15.2) with ESMTPS id 18FCRDYP016562 (version=TLSv1.2 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Wed, 15 Sep 2021 14:27:13 +0200 Received: from md1f2u6c.ad001.siemens.net ([167.87.79.72]) by mail2.sbs.de (8.15.2/8.15.2) with ESMTP id 18FCRAr3006124; Wed, 15 Sep 2021 14:27:12 +0200 From: Jan Kiszka To: Nishanth Menon , Tero Kristo , Rob Herring Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Bao Cheng Su , Chao Zeng , Aswath Govindraju Subject: [PATCH v4 1/6] arm64: dts: ti: iot2050: Flip mmc device ordering on Advanced devices Date: Wed, 15 Sep 2021 14:27:05 +0200 Message-Id: <104e3f81835f1141e9d822682c89fd5c22e4df25.1631708830.git.jan.kiszka@siemens.com> X-Mailer: git-send-email 2.31.1 In-Reply-To: References: MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Jan Kiszka This ensures that the SD card will remain mmc0 across Basic and Advanced devices, also avoiding surprises for users coming from the downstream kernels. Signed-off-by: Jan Kiszka Acked-by: Aswath Govindraju --- arch/arm64/boot/dts/ti/k3-am65-iot2050-common.dtsi | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm64/boot/dts/ti/k3-am65-iot2050-common.dtsi b/arch/arm64/boot/dts/ti/k3-am65-iot2050-common.dtsi index 1008e9162ba2..6261ca8ee2d8 100644 --- a/arch/arm64/boot/dts/ti/k3-am65-iot2050-common.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am65-iot2050-common.dtsi @@ -17,6 +17,8 @@ / { aliases { spi0 = &mcu_spi0; + mmc0 = &sdhci1; + mmc1 = &sdhci0; }; chosen { From patchwork Wed Sep 15 12:27:06 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jan Kiszka X-Patchwork-Id: 512396 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.7 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id C1023C433F5 for ; Wed, 15 Sep 2021 12:27:25 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id A53CC60F44 for ; Wed, 15 Sep 2021 12:27:25 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232257AbhIOM2n (ORCPT ); Wed, 15 Sep 2021 08:28:43 -0400 Received: from david.siemens.de ([192.35.17.14]:35081 "EHLO david.siemens.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229464AbhIOM2n (ORCPT ); Wed, 15 Sep 2021 08:28:43 -0400 Received: from mail2.sbs.de (mail2.sbs.de [192.129.41.66]) by david.siemens.de (8.15.2/8.15.2) with ESMTPS id 18FCRD1a030330 (version=TLSv1.2 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Wed, 15 Sep 2021 14:27:13 +0200 Received: from md1f2u6c.ad001.siemens.net ([167.87.79.72]) by mail2.sbs.de (8.15.2/8.15.2) with ESMTP id 18FCRAr4006124; Wed, 15 Sep 2021 14:27:13 +0200 From: Jan Kiszka To: Nishanth Menon , Tero Kristo , Rob Herring Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Bao Cheng Su , Chao Zeng , Aswath Govindraju Subject: [PATCH v4 2/6] arm64: dts: ti: iot2050: Disable SR2.0-only PRUs Date: Wed, 15 Sep 2021 14:27:06 +0200 Message-Id: X-Mailer: git-send-email 2.31.1 In-Reply-To: References: MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Jan Kiszka The IOT2050 devices described so far are using SR1.0 silicon, thus do not have the additional PRUs of the ICSSG of the SR2.0. Disable them. Signed-off-by: Jan Kiszka Acked-by: Aswath Govindraju Acked-by: Suman Anna --- .../boot/dts/ti/k3-am65-iot2050-common.dtsi | 24 +++++++++++++++++++ 1 file changed, 24 insertions(+) diff --git a/arch/arm64/boot/dts/ti/k3-am65-iot2050-common.dtsi b/arch/arm64/boot/dts/ti/k3-am65-iot2050-common.dtsi index 6261ca8ee2d8..58c8e64d5885 100644 --- a/arch/arm64/boot/dts/ti/k3-am65-iot2050-common.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am65-iot2050-common.dtsi @@ -716,3 +716,27 @@ &icssg1_mdio { &icssg2_mdio { status = "disabled"; }; + +&tx_pru0_0 { + status = "disabled"; +}; + +&tx_pru0_1 { + status = "disabled"; +}; + +&tx_pru1_0 { + status = "disabled"; +}; + +&tx_pru1_1 { + status = "disabled"; +}; + +&tx_pru2_0 { + status = "disabled"; +}; + +&tx_pru2_1 { + status = "disabled"; +}; From patchwork Wed Sep 15 12:27:07 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jan Kiszka X-Patchwork-Id: 512394 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.7 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id F04F1C43217 for ; Wed, 15 Sep 2021 12:27:29 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id D93F760F44 for ; Wed, 15 Sep 2021 12:27:29 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S237241AbhIOM2r (ORCPT ); Wed, 15 Sep 2021 08:28:47 -0400 Received: from thoth.sbs.de ([192.35.17.2]:35184 "EHLO thoth.sbs.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S236700AbhIOM2q (ORCPT ); Wed, 15 Sep 2021 08:28:46 -0400 Received: from mail2.sbs.de (mail2.sbs.de [192.129.41.66]) by thoth.sbs.de (8.15.2/8.15.2) with ESMTPS id 18FCRDxv005856 (version=TLSv1.2 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Wed, 15 Sep 2021 14:27:14 +0200 Received: from md1f2u6c.ad001.siemens.net ([167.87.79.72]) by mail2.sbs.de (8.15.2/8.15.2) with ESMTP id 18FCRAr5006124; Wed, 15 Sep 2021 14:27:13 +0200 From: Jan Kiszka To: Nishanth Menon , Tero Kristo , Rob Herring Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Bao Cheng Su , Chao Zeng Subject: [PATCH v4 3/6] arm64: dts: ti: iot2050: Add/enabled mailboxes and carve-outs for R5F cores Date: Wed, 15 Sep 2021 14:27:07 +0200 Message-Id: <1a39e2efad70eefd548f38d7d5ea2333e0cfab59.1631708830.git.jan.kiszka@siemens.com> X-Mailer: git-send-email 2.31.1 In-Reply-To: References: MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Jan Kiszka Analogously to the am654-base-board, configure the mailboxes for the two R5F cores, add them and the already existing memory carve-outs to the related MCU nodes. Allows to load applications under Linux onto the cores, e.g. the RTI watchdog firmware. Signed-off-by: Jan Kiszka Reviewed-by: Suman Anna --- .../boot/dts/ti/k3-am65-iot2050-common.dtsi | 26 +++++++++++++++++-- 1 file changed, 24 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/ti/k3-am65-iot2050-common.dtsi b/arch/arm64/boot/dts/ti/k3-am65-iot2050-common.dtsi index 58c8e64d5885..b29537088289 100644 --- a/arch/arm64/boot/dts/ti/k3-am65-iot2050-common.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am65-iot2050-common.dtsi @@ -658,11 +658,21 @@ &pcie1_ep { }; &mailbox0_cluster0 { - status = "disabled"; + interrupts = <436>; + + mbox_mcu_r5fss0_core0: mbox-mcu-r5fss0-core0 { + ti,mbox-tx = <1 0 0>; + ti,mbox-rx = <0 0 0>; + }; }; &mailbox0_cluster1 { - status = "disabled"; + interrupts = <432>; + + mbox_mcu_r5fss0_core1: mbox-mcu-r5fss0-core1 { + ti,mbox-tx = <1 0 0>; + ti,mbox-rx = <0 0 0>; + }; }; &mailbox0_cluster2 { @@ -705,6 +715,18 @@ &mailbox0_cluster11 { status = "disabled"; }; +&mcu_r5fss0_core0 { + memory-region = <&mcu_r5fss0_core0_dma_memory_region>, + <&mcu_r5fss0_core0_memory_region>; + mboxes = <&mailbox0_cluster0 &mbox_mcu_r5fss0_core0>; +}; + +&mcu_r5fss0_core1 { + memory-region = <&mcu_r5fss0_core1_dma_memory_region>, + <&mcu_r5fss0_core1_memory_region>; + mboxes = <&mailbox0_cluster1 &mbox_mcu_r5fss0_core1>; +}; + &icssg0_mdio { status = "disabled"; }; From patchwork Wed Sep 15 12:27:08 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jan Kiszka X-Patchwork-Id: 513257 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.7 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id C1002C4332F for ; Wed, 15 Sep 2021 12:27:28 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id A379360F44 for ; Wed, 15 Sep 2021 12:27:28 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S237453AbhIOM2q (ORCPT ); Wed, 15 Sep 2021 08:28:46 -0400 Received: from thoth.sbs.de ([192.35.17.2]:35181 "EHLO thoth.sbs.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234393AbhIOM2p (ORCPT ); Wed, 15 Sep 2021 08:28:45 -0400 Received: from mail2.sbs.de (mail2.sbs.de [192.129.41.66]) by thoth.sbs.de (8.15.2/8.15.2) with ESMTPS id 18FCREbJ005863 (version=TLSv1.2 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Wed, 15 Sep 2021 14:27:14 +0200 Received: from md1f2u6c.ad001.siemens.net ([167.87.79.72]) by mail2.sbs.de (8.15.2/8.15.2) with ESMTP id 18FCRAr6006124; Wed, 15 Sep 2021 14:27:14 +0200 From: Jan Kiszka To: Nishanth Menon , Tero Kristo , Rob Herring Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Bao Cheng Su , Chao Zeng Subject: [PATCH v4 4/6] dt-bindings: arm: ti: Add bindings for Siemens IOT2050 PG2 boards Date: Wed, 15 Sep 2021 14:27:08 +0200 Message-Id: <336ade4715b3d2f5f83c3ed8f3fa2989f5699578.1631708830.git.jan.kiszka@siemens.com> X-Mailer: git-send-email 2.31.1 In-Reply-To: References: MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Jan Kiszka Product Generation 2 (PG2) boards are based on SR2.x SoCs and will be released soon. Signed-off-by: Jan Kiszka Acked-by: Rob Herring --- Documentation/devicetree/bindings/arm/ti/k3.yaml | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/ti/k3.yaml b/Documentation/devicetree/bindings/arm/ti/k3.yaml index c5aa362e4026..ccde4a0d7b46 100644 --- a/Documentation/devicetree/bindings/arm/ti/k3.yaml +++ b/Documentation/devicetree/bindings/arm/ti/k3.yaml @@ -24,7 +24,9 @@ properties: - enum: - ti,am654-evm - siemens,iot2050-basic + - siemens,iot2050-basic-pg2 - siemens,iot2050-advanced + - siemens,iot2050-advanced-pg2 - const: ti,am654 - description: K3 J721E SoC From patchwork Wed Sep 15 12:27:09 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jan Kiszka X-Patchwork-Id: 512393 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.7 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 46AE1C433EF for ; Wed, 15 Sep 2021 12:27:30 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 29C7C6108F for ; Wed, 15 Sep 2021 12:27:30 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S237623AbhIOM2r (ORCPT ); Wed, 15 Sep 2021 08:28:47 -0400 Received: from goliath.siemens.de ([192.35.17.28]:35928 "EHLO goliath.siemens.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S236893AbhIOM2q (ORCPT ); Wed, 15 Sep 2021 08:28:46 -0400 Received: from mail2.sbs.de (mail2.sbs.de [192.129.41.66]) by goliath.siemens.de (8.15.2/8.15.2) with ESMTPS id 18FCREqp012240 (version=TLSv1.2 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Wed, 15 Sep 2021 14:27:15 +0200 Received: from md1f2u6c.ad001.siemens.net ([167.87.79.72]) by mail2.sbs.de (8.15.2/8.15.2) with ESMTP id 18FCRAr7006124; Wed, 15 Sep 2021 14:27:14 +0200 From: Jan Kiszka To: Nishanth Menon , Tero Kristo , Rob Herring Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Bao Cheng Su , Chao Zeng Subject: [PATCH v4 5/6] arm64: dts: ti: iot2050: Prepare for adding 2nd-generation boards Date: Wed, 15 Sep 2021 14:27:09 +0200 Message-Id: <87408a5d2d56e6d7dd840e9cec1c8f9da97754be.1631708830.git.jan.kiszka@siemens.com> X-Mailer: git-send-email 2.31.1 In-Reply-To: References: MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Jan Kiszka The current IOT2050 devices are Product Generation 1 (PG1), using SR1.0 AM65x silicon. Upcoming PG2 devices will use SR2.x SoCs and will therefore need separate device trees. Prepare for that by factoring out common bits that will be shared across both generations. At this chance, drop a link to the product homepage to in the top-level dts files. Also fix a typo in my email address in some headers. Signed-off-by: Jan Kiszka --- .../dts/ti/k3-am65-iot2050-common-pg1.dtsi | 46 +++++++++++++++ .../boot/dts/ti/k3-am65-iot2050-common.dtsi | 35 +----------- ...ts => k3-am6528-iot2050-basic-common.dtsi} | 12 +--- .../boot/dts/ti/k3-am6528-iot2050-basic.dts | 56 +++---------------- ...=> k3-am6548-iot2050-advanced-common.dtsi} | 8 +-- .../dts/ti/k3-am6548-iot2050-advanced.dts | 50 +++-------------- 6 files changed, 67 insertions(+), 140 deletions(-) create mode 100644 arch/arm64/boot/dts/ti/k3-am65-iot2050-common-pg1.dtsi copy arch/arm64/boot/dts/ti/{k3-am6528-iot2050-basic.dts => k3-am6528-iot2050-basic-common.dtsi} (80%) copy arch/arm64/boot/dts/ti/{k3-am6548-iot2050-advanced.dts => k3-am6548-iot2050-advanced-common.dtsi} (85%) diff --git a/arch/arm64/boot/dts/ti/k3-am65-iot2050-common-pg1.dtsi b/arch/arm64/boot/dts/ti/k3-am65-iot2050-common-pg1.dtsi new file mode 100644 index 000000000000..51f902fa35a7 --- /dev/null +++ b/arch/arm64/boot/dts/ti/k3-am65-iot2050-common-pg1.dtsi @@ -0,0 +1,46 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (c) Siemens AG, 2021 + * + * Authors: + * Jan Kiszka + * + * Common bits of the IOT2050 Basic and Advanced variants, PG1 + */ + +&dss { + assigned-clocks = <&k3_clks 67 2>; + assigned-clock-parents = <&k3_clks 67 5>; +}; + +&serdes0 { + status = "disabled"; +}; + +&sdhci1 { + no-1-8-v; +}; + +&tx_pru0_0 { + status = "disabled"; +}; + +&tx_pru0_1 { + status = "disabled"; +}; + +&tx_pru1_0 { + status = "disabled"; +}; + +&tx_pru1_1 { + status = "disabled"; +}; + +&tx_pru2_0 { + status = "disabled"; +}; + +&tx_pru2_1 { + status = "disabled"; +}; diff --git a/arch/arm64/boot/dts/ti/k3-am65-iot2050-common.dtsi b/arch/arm64/boot/dts/ti/k3-am65-iot2050-common.dtsi index b29537088289..65da226847f4 100644 --- a/arch/arm64/boot/dts/ti/k3-am65-iot2050-common.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am65-iot2050-common.dtsi @@ -4,13 +4,11 @@ * * Authors: * Le Jin - * Jan Kiszka + * Jan Kiszka * - * Common bits of the IOT2050 Basic and Advanced variants + * Common bits of the IOT2050 Basic and Advanced variants, PG1 and PG2 */ -/dts-v1/; - #include "k3-am654.dtsi" #include @@ -557,7 +555,6 @@ &sdhci1 { pinctrl-0 = <&main_mmc1_pins_default>; ti,driver-strength-ohm = <50>; disable-wp; - no-1-8-v; }; &usb0 { @@ -631,10 +628,6 @@ dpi_out: endpoint { }; }; -&serdes0 { - status = "disabled"; -}; - &pcie0_rc { status = "disabled"; }; @@ -738,27 +731,3 @@ &icssg1_mdio { &icssg2_mdio { status = "disabled"; }; - -&tx_pru0_0 { - status = "disabled"; -}; - -&tx_pru0_1 { - status = "disabled"; -}; - -&tx_pru1_0 { - status = "disabled"; -}; - -&tx_pru1_1 { - status = "disabled"; -}; - -&tx_pru2_0 { - status = "disabled"; -}; - -&tx_pru2_1 { - status = "disabled"; -}; diff --git a/arch/arm64/boot/dts/ti/k3-am6528-iot2050-basic.dts b/arch/arm64/boot/dts/ti/k3-am6528-iot2050-basic-common.dtsi similarity index 80% copy from arch/arm64/boot/dts/ti/k3-am6528-iot2050-basic.dts copy to arch/arm64/boot/dts/ti/k3-am6528-iot2050-basic-common.dtsi index 94bb5dd39122..4a9bf7d7c07d 100644 --- a/arch/arm64/boot/dts/ti/k3-am6528-iot2050-basic.dts +++ b/arch/arm64/boot/dts/ti/k3-am6528-iot2050-basic-common.dtsi @@ -4,20 +4,14 @@ * * Authors: * Le Jin - * Jan Kiszka + * Jan Kiszka * - * AM6528-based (dual-core) IOT2050 Basic variant - * 1 GB RAM, no eMMC, main_uart0 on connector X30 + * Common bits of the IOT2050 Basic variant, PG1 and PG2 */ -/dts-v1/; - #include "k3-am65-iot2050-common.dtsi" / { - compatible = "siemens,iot2050-basic", "ti,am654"; - model = "SIMATIC IOT2050 Basic"; - memory@80000000 { device_type = "memory"; /* 1G RAM */ @@ -61,6 +55,6 @@ &main_uart0 { }; &mcu_r5fss0 { - /* lock-step mode not supported on this board */ + /* lock-step mode not supported on Basic boards */ ti,cluster-mode = <0>; }; diff --git a/arch/arm64/boot/dts/ti/k3-am6528-iot2050-basic.dts b/arch/arm64/boot/dts/ti/k3-am6528-iot2050-basic.dts index 94bb5dd39122..87928ff28214 100644 --- a/arch/arm64/boot/dts/ti/k3-am6528-iot2050-basic.dts +++ b/arch/arm64/boot/dts/ti/k3-am6528-iot2050-basic.dts @@ -4,63 +4,21 @@ * * Authors: * Le Jin - * Jan Kiszka + * Jan Kiszka * - * AM6528-based (dual-core) IOT2050 Basic variant + * AM6528-based (dual-core) IOT2050 Basic variant, Product Generation 1 * 1 GB RAM, no eMMC, main_uart0 on connector X30 + * + * Product homepage: + * https://new.siemens.com/global/en/products/automation/pc-based/iot-gateways/simatic-iot2050.html */ /dts-v1/; -#include "k3-am65-iot2050-common.dtsi" +#include "k3-am6528-iot2050-basic-common.dtsi" +#include "k3-am65-iot2050-common-pg1.dtsi" / { compatible = "siemens,iot2050-basic", "ti,am654"; model = "SIMATIC IOT2050 Basic"; - - memory@80000000 { - device_type = "memory"; - /* 1G RAM */ - reg = <0x00000000 0x80000000 0x00000000 0x40000000>; - }; - - cpus { - cpu-map { - /delete-node/ cluster1; - }; - /delete-node/ cpu@100; - /delete-node/ cpu@101; - }; - - /delete-node/ l2-cache1; -}; - -/* eMMC */ -&sdhci0 { - status = "disabled"; -}; - -&main_pmx0 { - main_uart0_pins_default: main-uart0-pins-default { - pinctrl-single,pins = < - AM65X_IOPAD(0x01e4, PIN_INPUT, 0) /* (AF11) UART0_RXD */ - AM65X_IOPAD(0x01e8, PIN_OUTPUT, 0) /* (AE11) UART0_TXD */ - AM65X_IOPAD(0x01ec, PIN_INPUT, 0) /* (AG11) UART0_CTSn */ - AM65X_IOPAD(0x01f0, PIN_OUTPUT, 0) /* (AD11) UART0_RTSn */ - AM65X_IOPAD(0x0188, PIN_INPUT, 1) /* (D25) UART0_DCDn */ - AM65X_IOPAD(0x018c, PIN_INPUT, 1) /* (B26) UART0_DSRn */ - AM65X_IOPAD(0x0190, PIN_OUTPUT, 1) /* (A24) UART0_DTRn */ - AM65X_IOPAD(0x0194, PIN_INPUT, 1) /* (E24) UART0_RIN */ - >; - }; -}; - -&main_uart0 { - pinctrl-names = "default"; - pinctrl-0 = <&main_uart0_pins_default>; -}; - -&mcu_r5fss0 { - /* lock-step mode not supported on this board */ - ti,cluster-mode = <0>; }; diff --git a/arch/arm64/boot/dts/ti/k3-am6548-iot2050-advanced.dts b/arch/arm64/boot/dts/ti/k3-am6548-iot2050-advanced-common.dtsi similarity index 85% copy from arch/arm64/boot/dts/ti/k3-am6548-iot2050-advanced.dts copy to arch/arm64/boot/dts/ti/k3-am6548-iot2050-advanced-common.dtsi index ec9617c13cdb..d25e8b26187f 100644 --- a/arch/arm64/boot/dts/ti/k3-am6548-iot2050-advanced.dts +++ b/arch/arm64/boot/dts/ti/k3-am6548-iot2050-advanced-common.dtsi @@ -4,10 +4,9 @@ * * Authors: * Le Jin - * Jan Kiszka + * Jan Kiszka * - * AM6548-based (quad-core) IOT2050 Advanced variant - * 2 GB RAM, 16 GB eMMC, USB-serial converter on connector X30 + * Common bits of the IOT2050 Advanced variant, PG1 and PG2 */ /dts-v1/; @@ -15,9 +14,6 @@ #include "k3-am65-iot2050-common.dtsi" / { - compatible = "siemens,iot2050-advanced", "ti,am654"; - model = "SIMATIC IOT2050 Advanced"; - memory@80000000 { device_type = "memory"; /* 2G RAM */ diff --git a/arch/arm64/boot/dts/ti/k3-am6548-iot2050-advanced.dts b/arch/arm64/boot/dts/ti/k3-am6548-iot2050-advanced.dts index ec9617c13cdb..077f165bdc68 100644 --- a/arch/arm64/boot/dts/ti/k3-am6548-iot2050-advanced.dts +++ b/arch/arm64/boot/dts/ti/k3-am6548-iot2050-advanced.dts @@ -4,57 +4,21 @@ * * Authors: * Le Jin - * Jan Kiszka + * Jan Kiszka * - * AM6548-based (quad-core) IOT2050 Advanced variant + * AM6548-based (quad-core) IOT2050 Advanced variant, Product Generation 1 * 2 GB RAM, 16 GB eMMC, USB-serial converter on connector X30 + * + * Product homepage: + * https://new.siemens.com/global/en/products/automation/pc-based/iot-gateways/simatic-iot2050.html */ /dts-v1/; -#include "k3-am65-iot2050-common.dtsi" +#include "k3-am6548-iot2050-advanced-common.dtsi" +#include "k3-am65-iot2050-common-pg1.dtsi" / { compatible = "siemens,iot2050-advanced", "ti,am654"; model = "SIMATIC IOT2050 Advanced"; - - memory@80000000 { - device_type = "memory"; - /* 2G RAM */ - reg = <0x00000000 0x80000000 0x00000000 0x80000000>; - }; -}; - -&main_pmx0 { - main_mmc0_pins_default: main-mmc0-pins-default { - pinctrl-single,pins = < - AM65X_IOPAD(0x01a8, PIN_INPUT_PULLDOWN, 0) /* (B25) MMC0_CLK */ - AM65X_IOPAD(0x01ac, PIN_INPUT_PULLUP, 0) /* (B27) MMC0_CMD */ - AM65X_IOPAD(0x01a4, PIN_INPUT_PULLUP, 0) /* (A26) MMC0_DAT0 */ - AM65X_IOPAD(0x01a0, PIN_INPUT_PULLUP, 0) /* (E25) MMC0_DAT1 */ - AM65X_IOPAD(0x019c, PIN_INPUT_PULLUP, 0) /* (C26) MMC0_DAT2 */ - AM65X_IOPAD(0x0198, PIN_INPUT_PULLUP, 0) /* (A25) MMC0_DAT3 */ - AM65X_IOPAD(0x0194, PIN_INPUT_PULLUP, 0) /* (E24) MMC0_DAT4 */ - AM65X_IOPAD(0x0190, PIN_INPUT_PULLUP, 0) /* (A24) MMC0_DAT5 */ - AM65X_IOPAD(0x018c, PIN_INPUT_PULLUP, 0) /* (B26) MMC0_DAT6 */ - AM65X_IOPAD(0x0188, PIN_INPUT_PULLUP, 0) /* (D25) MMC0_DAT7 */ - AM65X_IOPAD(0x01b8, PIN_OUTPUT_PULLUP, 7) /* (B23) MMC0_SDWP */ - AM65X_IOPAD(0x01b4, PIN_INPUT_PULLUP, 0) /* (A23) MMC0_SDCD */ - AM65X_IOPAD(0x01b0, PIN_INPUT, 0) /* (C25) MMC0_DS */ - >; - }; -}; - -/* eMMC */ -&sdhci0 { - pinctrl-names = "default"; - pinctrl-0 = <&main_mmc0_pins_default>; - bus-width = <8>; - non-removable; - ti,driver-strength-ohm = <50>; - disable-wp; -}; - -&main_uart0 { - status = "disabled"; }; From patchwork Wed Sep 15 12:27:10 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jan Kiszka X-Patchwork-Id: 512395 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.7 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5CF99C433F5 for ; Wed, 15 Sep 2021 12:27:28 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 3DE7F611C4 for ; Wed, 15 Sep 2021 12:27:28 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S237034AbhIOM2p (ORCPT ); Wed, 15 Sep 2021 08:28:45 -0400 Received: from thoth.sbs.de ([192.35.17.2]:35179 "EHLO thoth.sbs.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234331AbhIOM2p (ORCPT ); Wed, 15 Sep 2021 08:28:45 -0400 Received: from mail2.sbs.de (mail2.sbs.de [192.129.41.66]) by thoth.sbs.de (8.15.2/8.15.2) with ESMTPS id 18FCRF2M005873 (version=TLSv1.2 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Wed, 15 Sep 2021 14:27:15 +0200 Received: from md1f2u6c.ad001.siemens.net ([167.87.79.72]) by mail2.sbs.de (8.15.2/8.15.2) with ESMTP id 18FCRAr8006124; Wed, 15 Sep 2021 14:27:14 +0200 From: Jan Kiszka To: Nishanth Menon , Tero Kristo , Rob Herring Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Bao Cheng Su , Chao Zeng Subject: [PATCH v4 6/6] arm64: dts: ti: iot2050: Add support for product generation 2 boards Date: Wed, 15 Sep 2021 14:27:10 +0200 Message-Id: X-Mailer: git-send-email 2.31.1 In-Reply-To: References: MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Jan Kiszka This adds the devices trees for IOT2050 Product Generation 2 (PG2) boards. We have Basic and an Advanced variants again, differing in number of cores, RAM size, availability of eMMC and further details. The major difference to PG1 is the used silicon revision (SR2.x on PG2). Signed-off-by: Jan Kiszka --- arch/arm64/boot/dts/ti/Makefile | 2 + .../dts/ti/k3-am65-iot2050-common-pg2.dtsi | 51 +++++++++++++++++++ .../dts/ti/k3-am6528-iot2050-basic-pg2.dts | 24 +++++++++ .../dts/ti/k3-am6548-iot2050-advanced-pg2.dts | 29 +++++++++++ 4 files changed, 106 insertions(+) create mode 100644 arch/arm64/boot/dts/ti/k3-am65-iot2050-common-pg2.dtsi create mode 100644 arch/arm64/boot/dts/ti/k3-am6528-iot2050-basic-pg2.dts create mode 100644 arch/arm64/boot/dts/ti/k3-am6548-iot2050-advanced-pg2.dts diff --git a/arch/arm64/boot/dts/ti/Makefile b/arch/arm64/boot/dts/ti/Makefile index d56c742f5a10..41a4bc96e6bd 100644 --- a/arch/arm64/boot/dts/ti/Makefile +++ b/arch/arm64/boot/dts/ti/Makefile @@ -8,7 +8,9 @@ dtb-$(CONFIG_ARCH_K3) += k3-am654-base-board.dtb dtb-$(CONFIG_ARCH_K3) += k3-am6528-iot2050-basic.dtb +dtb-$(CONFIG_ARCH_K3) += k3-am6528-iot2050-basic-pg2.dtb dtb-$(CONFIG_ARCH_K3) += k3-am6548-iot2050-advanced.dtb +dtb-$(CONFIG_ARCH_K3) += k3-am6548-iot2050-advanced-pg2.dtb dtb-$(CONFIG_ARCH_K3) += k3-j721e-common-proc-board.dtb diff --git a/arch/arm64/boot/dts/ti/k3-am65-iot2050-common-pg2.dtsi b/arch/arm64/boot/dts/ti/k3-am65-iot2050-common-pg2.dtsi new file mode 100644 index 000000000000..c25bce7339b7 --- /dev/null +++ b/arch/arm64/boot/dts/ti/k3-am65-iot2050-common-pg2.dtsi @@ -0,0 +1,51 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (c) Siemens AG, 2021 + * + * Authors: + * Chao Zeng + * Jan Kiszka + * + * Common bits of the IOT2050 Basic and Advanced variants, PG2 + */ + +&main_pmx0 { + cp2102n_reset_pin_default: cp2102n-reset-pin-default { + pinctrl-single,pins = < + /* (AF12) GPIO1_24, used as cp2102 reset */ + AM65X_IOPAD(0x01e0, PIN_OUTPUT, 7) + >; + }; +}; + +&main_gpio1 { + pinctrl-names = "default"; + pinctrl-0 = <&cp2102n_reset_pin_default>; + gpio-line-names = + "", "", "", "", "", "", "", "", "", "", + "", "", "", "", "", "", "", "", "", "", + "", "", "", "", "CP2102N-RESET"; +}; + +&dss { + /* Workaround needed to get DP clock of 154Mhz */ + assigned-clocks = <&k3_clks 67 0>; +}; + +&serdes0 { + assigned-clocks = <&k3_clks 153 4>, <&serdes0 AM654_SERDES_CMU_REFCLK>; + assigned-clock-parents = <&k3_clks 153 7>, <&k3_clks 153 4>; +}; + +&dwc3_0 { + assigned-clock-parents = <&k3_clks 151 4>, /* set REF_CLK to 20MHz i.e. PER0_PLL/48 */ + <&k3_clks 151 8>; /* set PIPE3_TXB_CLK to WIZ8B2M4VSB */ + phys = <&serdes0 PHY_TYPE_USB3 0>; + phy-names = "usb3-phy"; +}; + +&usb0_phy { + maximum-speed = "super-speed"; + snps,dis-u1-entry-quirk; + snps,dis-u2-entry-quirk; +}; diff --git a/arch/arm64/boot/dts/ti/k3-am6528-iot2050-basic-pg2.dts b/arch/arm64/boot/dts/ti/k3-am6528-iot2050-basic-pg2.dts new file mode 100644 index 000000000000..c62549a4b436 --- /dev/null +++ b/arch/arm64/boot/dts/ti/k3-am6528-iot2050-basic-pg2.dts @@ -0,0 +1,24 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (c) Siemens AG, 2018-2021 + * + * Authors: + * Le Jin + * Jan Kiszka + * + * AM6528-based (dual-core) IOT2050 Basic variant, Product Generation 2 + * 1 GB RAM, no eMMC, main_uart0 on connector X30 + * + * Product homepage: + * https://new.siemens.com/global/en/products/automation/pc-based/iot-gateways/simatic-iot2050.html + */ + +/dts-v1/; + +#include "k3-am6528-iot2050-basic-common.dtsi" +#include "k3-am65-iot2050-common-pg2.dtsi" + +/ { + compatible = "siemens,iot2050-basic-pg2", "ti,am654"; + model = "SIMATIC IOT2050 Basic PG2"; +}; diff --git a/arch/arm64/boot/dts/ti/k3-am6548-iot2050-advanced-pg2.dts b/arch/arm64/boot/dts/ti/k3-am6548-iot2050-advanced-pg2.dts new file mode 100644 index 000000000000..f00dc86d01b9 --- /dev/null +++ b/arch/arm64/boot/dts/ti/k3-am6548-iot2050-advanced-pg2.dts @@ -0,0 +1,29 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (c) Siemens AG, 2018-2021 + * + * Authors: + * Le Jin + * Jan Kiszka + * + * AM6548-based (quad-core) IOT2050 Advanced variant, Product Generation 2 + * 2 GB RAM, 16 GB eMMC, USB-serial converter on connector X30 + * + * Product homepage: + * https://new.siemens.com/global/en/products/automation/pc-based/iot-gateways/simatic-iot2050.html + */ + +/dts-v1/; + +#include "k3-am6548-iot2050-advanced-common.dtsi" +#include "k3-am65-iot2050-common-pg2.dtsi" + +/ { + compatible = "siemens,iot2050-advanced-pg2", "ti,am654"; + model = "SIMATIC IOT2050 Advanced PG2"; +}; + +&mcu_r5fss0 { + /* lock-step mode not supported on this board */ + ti,cluster-mode = <0>; +};