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[209.132.180.67]) by mx.google.com with ESMTP id g28-v6si5161137pgg.384.2018.10.24.10.29.32; Wed, 24 Oct 2018 10:29:32 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-gpio-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=HsDFzDP7; spf=pass (google.com: best guess record for domain of linux-gpio-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-gpio-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726857AbeJYB60 (ORCPT + 5 others); Wed, 24 Oct 2018 21:58:26 -0400 Received: from mail-pl1-f194.google.com ([209.85.214.194]:38237 "EHLO mail-pl1-f194.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726851AbeJYB6Z (ORCPT ); Wed, 24 Oct 2018 21:58:25 -0400 Received: by mail-pl1-f194.google.com with SMTP id p7-v6so2558241plk.5 for ; Wed, 24 Oct 2018 10:29:31 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id; bh=oLtwJjIz/IU8OXu+/CrIVG1zsDaxMtMaiIL2AWF5Eug=; b=HsDFzDP7ERvGcsVIxM6lWMjFUa/fqNXf+wpoxF57dtUziMk6ZkgJhKUbhM7NkP5PE6 8TC8TeN0zTipMR0Vx7h9TjiPSsE86eF4j6Cv78qXIIavv832BjtzEy0ZiFOa3IxOjUNR f3D4y7q3dbS7FQKPUfESPhjQZ3gR+Jac/3NXU= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=oLtwJjIz/IU8OXu+/CrIVG1zsDaxMtMaiIL2AWF5Eug=; b=PisvFVm3aYgZKX8tTg4uM2L75F0Wj3tEb5QDcpgin50dZFMMjaudw1hDgUulsIxGnC b19PBMLnLXbua6JyshvdeCRPJqmzO6qJXAg5LD6amjZs1XBPxy/Zmzk1J6W/yMeGclVG ctTTzKE4v+CLz2rrTY3sYLhqXCO8TZcyGZjsRbLV60+sBmOvLFwaZKbtPoGo/Z7f08Pl cuDgegMNHSh5NpbpeGzJ0UuzDFgtffAlK9d6yx5Dl9O3mrc6qqZ62ltda1i1MFRdDO7F r4iCZ2Ej4Q22pM7bsYjd208p+M3LqS3tCYJeYD9pvyuJfwFfJuSD8bk3b99MCEJK8VL2 fSFg== X-Gm-Message-State: AGRZ1gKC/PrlTK6OnMNQprJnM4M4+NNG3IFzSLOE6SihE1G847GtsrBN EJaa2QHstxZD70AvU7f8B4qB X-Received: by 2002:a17:902:8b8a:: with SMTP id ay10-v6mr3325306plb.130.1540402170776; Wed, 24 Oct 2018 10:29:30 -0700 (PDT) Received: from localhost.localdomain ([2409:4072:609e:d62f:18fd:8436:e2d2:50c6]) by smtp.gmail.com with ESMTPSA id m11-v6sm3922849pfi.102.2018.10.24.10.29.27 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 24 Oct 2018 10:29:29 -0700 (PDT) From: Manivannan Sadhasivam To: linus.walleij@linaro.org Cc: linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org, Manivannan Sadhasivam Subject: [PATCH] gpio: pl061: Move irq_chip definition inside struct pl061 Date: Wed, 24 Oct 2018 22:59:15 +0530 Message-Id: <20181024172915.15544-1-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.17.1 Sender: linux-gpio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org Keeping the irq_chip definition static will make it shared with multiple giochips in the system. This practice is considered to be bad and now we will get the below warning from gpiolib core: "detected irqchip that is shared with multiple gpiochips: please fix the driver." Hence, move the irq_chip definition from static to `struct pl061` for using a unique irq_chip for each gpiochip. Signed-off-by: Manivannan Sadhasivam --- drivers/gpio/gpio-pl061.c | 21 ++++++++++----------- 1 file changed, 10 insertions(+), 11 deletions(-) -- 2.17.1 diff --git a/drivers/gpio/gpio-pl061.c b/drivers/gpio/gpio-pl061.c index 2afd9de84a0d..dc42571e6fdc 100644 --- a/drivers/gpio/gpio-pl061.c +++ b/drivers/gpio/gpio-pl061.c @@ -54,6 +54,7 @@ struct pl061 { void __iomem *base; struct gpio_chip gc; + struct irq_chip irq_chip; int parent_irq; #ifdef CONFIG_PM @@ -281,15 +282,6 @@ static int pl061_irq_set_wake(struct irq_data *d, unsigned int state) return irq_set_irq_wake(pl061->parent_irq, state); } -static struct irq_chip pl061_irqchip = { - .name = "pl061", - .irq_ack = pl061_irq_ack, - .irq_mask = pl061_irq_mask, - .irq_unmask = pl061_irq_unmask, - .irq_set_type = pl061_irq_type, - .irq_set_wake = pl061_irq_set_wake, -}; - static int pl061_probe(struct amba_device *adev, const struct amba_id *id) { struct device *dev = &adev->dev; @@ -328,6 +320,13 @@ static int pl061_probe(struct amba_device *adev, const struct amba_id *id) /* * irq_chip support */ + pl061->irq_chip.name = dev_name(dev); + pl061->irq_chip.irq_ack = pl061_irq_ack; + pl061->irq_chip.irq_mask = pl061_irq_mask; + pl061->irq_chip.irq_unmask = pl061_irq_unmask; + pl061->irq_chip.irq_set_type = pl061_irq_type; + pl061->irq_chip.irq_set_wake = pl061_irq_set_wake; + writeb(0, pl061->base + GPIOIE); /* disable irqs */ irq = adev->irq[0]; if (irq < 0) { @@ -336,14 +335,14 @@ static int pl061_probe(struct amba_device *adev, const struct amba_id *id) } pl061->parent_irq = irq; - ret = gpiochip_irqchip_add(&pl061->gc, &pl061_irqchip, + ret = gpiochip_irqchip_add(&pl061->gc, &pl061->irq_chip, 0, handle_bad_irq, IRQ_TYPE_NONE); if (ret) { dev_info(&adev->dev, "could not add irqchip\n"); return ret; } - gpiochip_set_chained_irqchip(&pl061->gc, &pl061_irqchip, + gpiochip_set_chained_irqchip(&pl061->gc, &pl061->irq_chip, irq, pl061_irq_handler); amba_set_drvdata(adev, pl061);