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[131.252.210.177]) by mx.google.com with ESMTPS id g39-v6si469539plb.297.2018.10.23.00.24.36 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Tue, 23 Oct 2018 00:24:36 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of dri-devel-bounces@lists.freedesktop.org designates 131.252.210.177 as permitted sender) client-ip=131.252.210.177; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of dri-devel-bounces@lists.freedesktop.org designates 131.252.210.177 as permitted sender) smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 8407389449; Tue, 23 Oct 2018 07:24:34 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mail-lj1-x243.google.com (mail-lj1-x243.google.com [IPv6:2a00:1450:4864:20::243]) by gabe.freedesktop.org (Postfix) with ESMTPS id 6C60589449 for ; Tue, 23 Oct 2018 07:24:33 +0000 (UTC) Received: by mail-lj1-x243.google.com with SMTP id o14-v6so368443ljj.2 for ; Tue, 23 Oct 2018 00:24:33 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=/cVvHX9JYD1tOnDSuFiEz3FyAyvXsF9k4/EK/WHiNc4=; b=N96PMvT2pcyIJikzMmte61X/hDahX6SoMZhj4HDRSXbG5HddWkzd+LTBDVkSD5OxWz MtyO6LJmj3M2XlPthVS37ZtRkVlNuhqAk0dPd5D4tGk03uvjD2G4hVHYflOevkogKUhd 9JPpnnh2hYx2xWe+qzs66sjhdDBANcAMpjA/AlPUnauV+UfqMXPjzinxS8lVWZNdz4F8 YrHi2ZdnQjIXByUPXL/Q8LHn+6w5Bg8FlhTXn/cRZ77kPgC1ko17cqxvH64y4fcBLc7c 1TdC09fCruGnT278mu9hIKUKSSDdSqZTAF247XZziFEoXfpp3jsPbRkScsT+JSo+rBXq s29g== X-Gm-Message-State: ABuFfogGzI10m3hssaWR0OC9wmtCiq6wQ+tCxh6l2AuX5LSBoTNHiAAh Qr+dF57kVTdRc5PlKPVRYDceaA== X-Received: by 2002:a2e:2a43:: with SMTP id q64-v6mr30800711ljq.153.1540279471599; Tue, 23 Oct 2018 00:24:31 -0700 (PDT) Received: from genomnajs.ideon.se ([85.235.10.227]) by smtp.gmail.com with ESMTPSA id 1-v6sm74154ljc.46.2018.10.23.00.24.28 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Tue, 23 Oct 2018 00:24:29 -0700 (PDT) From: Linus Walleij To: Thierry Reding , dri-devel@lists.freedesktop.org Subject: [PATCH v3] drm: dsi: Add lane clock rate fields to DSI device Date: Tue, 23 Oct 2018 09:24:22 +0200 Message-Id: <20181023072422.25754-1-linus.walleij@linaro.org> X-Mailer: git-send-email 2.17.2 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" The DSI devices have a maximum operating frequency specified in their data sheet per the MIPI specification, and DSI hosts that can scale their frequency need this information to set their clock dividers right. As current panel drivers often lack this information, specify that setting it to zero will make the DSI host use some reasonable default. Reviewed-by: Andrzej Hajda Signed-off-by: Linus Walleij --- ChangeLog v2->v3: - Lowercase the kerneldoc - Specify that the unit is hertz - Collect Andrzej's review tag ChangeLog v1->v2: - s/*_rate_hz/*_rate/g - s/operation/mode/g - Clarify that zero is only allowed for legacy drivers --- include/drm/drm_mipi_dsi.h | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/include/drm/drm_mipi_dsi.h b/include/drm/drm_mipi_dsi.h index 4fef19064b0f..491528f48cfb 100644 --- a/include/drm/drm_mipi_dsi.h +++ b/include/drm/drm_mipi_dsi.h @@ -168,6 +168,12 @@ struct mipi_dsi_device_info { * @format: pixel format for video mode * @lanes: number of active data lanes * @mode_flags: DSI operation mode related flags + * @hs_rate: maximum lane frequency for high speed mode in hertz, this should + * be set to the real limits of the hardware, zero is only accepted for + * legacy drivers + * @lp_rate: maximum lane frequency for low power mode in hertz, this should + * be set to the real limits of the hardware, zero is only accepted for + * legacy drivers */ struct mipi_dsi_device { struct mipi_dsi_host *host; @@ -178,6 +184,8 @@ struct mipi_dsi_device { unsigned int lanes; enum mipi_dsi_pixel_format format; unsigned long mode_flags; + unsigned long hs_rate; + unsigned long lp_rate; }; #define MIPI_DSI_MODULE_PREFIX "mipi-dsi:"