From patchwork Mon Sep 6 08:23:45 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sibi Sankar X-Patchwork-Id: 507397 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6DC16C433F5 for ; Mon, 6 Sep 2021 08:24:26 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 5877A60F45 for ; Mon, 6 Sep 2021 08:24:26 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S240782AbhIFIZ3 (ORCPT ); Mon, 6 Sep 2021 04:25:29 -0400 Received: from so254-9.mailgun.net ([198.61.254.9]:36433 "EHLO so254-9.mailgun.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S240775AbhIFIZ2 (ORCPT ); Mon, 6 Sep 2021 04:25:28 -0400 DKIM-Signature: a=rsa-sha256; v=1; c=relaxed/relaxed; d=mg.codeaurora.org; q=dns/txt; s=smtp; t=1630916664; h=References: In-Reply-To: Message-Id: Date: Subject: Cc: To: From: Sender; bh=I5z7NRG7RvJa4jKHVPGL8/xmVoB4Vn3a0Vc9VxthTQA=; b=OP7/9Av3ADnuUR09HedXwa9GMHJTwxdH/kx5AClvW4xxTmUiXEUc+tKedy6zADEWZBOY7NJg Sf8scOHPCz1g3SD7nyynka2rKKHuOvPTQTQr8ODNQtcNLQEL79iKluXXrgafhiz0vkFWAdCq SYuhKZx8cLSMyeDLm73Qt6WrJ5I= X-Mailgun-Sending-Ip: 198.61.254.9 X-Mailgun-Sid: WyI1YmJiNiIsICJkZXZpY2V0cmVlQHZnZXIua2VybmVsLm9yZyIsICJiZTllNGEiXQ== Received: from smtp.codeaurora.org (ec2-35-166-182-171.us-west-2.compute.amazonaws.com [35.166.182.171]) by smtp-out-n05.prod.us-east-1.postgun.com with SMTP id 6135d0301567234b8c7341ff (version=TLS1.2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256); Mon, 06 Sep 2021 08:24:16 GMT Sender: sibis=codeaurora.org@mg.codeaurora.org Received: by smtp.codeaurora.org (Postfix, from userid 1001) id A2CE5C43618; Mon, 6 Sep 2021 08:24:15 +0000 (UTC) Received: from blr-ubuntu-87.qualcomm.com (blr-bdr-fw-01_GlobalNAT_AllZones-Outside.qualcomm.com [103.229.18.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: sibis) by smtp.codeaurora.org (Postfix) with ESMTPSA id 4E29CC43618; Mon, 6 Sep 2021 08:24:10 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 smtp.codeaurora.org 4E29CC43618 Authentication-Results: aws-us-west-2-caf-mail-1.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: aws-us-west-2-caf-mail-1.web.codeaurora.org; spf=fail smtp.mailfrom=codeaurora.org From: Sibi Sankar To: mka@chromium.org, swboyd@chromium.org, bjorn.andersson@linaro.org, robh+dt@kernel.org Cc: ulf.hansson@linaro.org, rjw@rjwysocki.net, agross@kernel.org, ohad@wizery.com, mathieu.poirier@linaro.org, linux-arm-msm@vger.kernel.org, linux-remoteproc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, dianders@chromium.org, rishabhb@codeaurora.org, sidgup@codeaurora.org, Sibi Sankar Subject: [PATCH v6 01/13] dt-bindings: soc: qcom: aoss: Drop the load state power-domain Date: Mon, 6 Sep 2021 13:53:45 +0530 Message-Id: <1630916637-4278-2-git-send-email-sibis@codeaurora.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1630916637-4278-1-git-send-email-sibis@codeaurora.org> References: <1630916637-4278-1-git-send-email-sibis@codeaurora.org> Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org The power-domains exposed by AOSS QMP node are used to notify the Always on Subsystem (AOSS) that a particular co-processor is up/down. These co-processors enter low-power modes independent to that of the application processor and their states are expected to remain unaltered across system suspend/resume cycles. To achieve this behavior let's drop the load power-domain and replace them with generic qmp_send interface instead. Signed-off-by: Sibi Sankar Reviewed-by: Matthias Kaehlcke Reviewed-by: Stephen Boyd Acked-by: Rob Herring --- Documentation/devicetree/bindings/soc/qcom/qcom,aoss-qmp.yaml | 11 +---------- 1 file changed, 1 insertion(+), 10 deletions(-) diff --git a/Documentation/devicetree/bindings/soc/qcom/qcom,aoss-qmp.yaml b/Documentation/devicetree/bindings/soc/qcom/qcom,aoss-qmp.yaml index 1904612fad85..e2e173dfada7 100644 --- a/Documentation/devicetree/bindings/soc/qcom/qcom,aoss-qmp.yaml +++ b/Documentation/devicetree/bindings/soc/qcom/qcom,aoss-qmp.yaml @@ -19,8 +19,7 @@ description: The AOSS side channel exposes control over a set of resources, used to control a set of debug related clocks and to affect the low power state of resources - related to the secondary subsystems. These resources are exposed as a set of - power-domains. + related to the secondary subsystems. properties: compatible: @@ -58,13 +57,6 @@ properties: description: The single clock represents the QDSS clock. - "#power-domain-cells": - const: 1 - description: | - The provided power-domains are: - CDSP state (0), LPASS state (1), modem state (2), SLPI - state (3), SPSS state (4) and Venus state (5). - required: - compatible - reg @@ -102,7 +94,6 @@ examples: mboxes = <&apss_shared 0>; #clock-cells = <0>; - #power-domain-cells = <1>; cx_cdev: cx { #cooling-cells = <2>; From patchwork Mon Sep 6 08:23:46 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sibi Sankar X-Patchwork-Id: 507694 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 18248C4332F for ; Mon, 6 Sep 2021 08:24:28 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 0396060F92 for ; Mon, 6 Sep 2021 08:24:28 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S240808AbhIFIZa (ORCPT ); Mon, 6 Sep 2021 04:25:30 -0400 Received: from so254-9.mailgun.net ([198.61.254.9]:44479 "EHLO so254-9.mailgun.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S240795AbhIFIZa (ORCPT ); Mon, 6 Sep 2021 04:25:30 -0400 DKIM-Signature: a=rsa-sha256; v=1; c=relaxed/relaxed; d=mg.codeaurora.org; q=dns/txt; s=smtp; t=1630916666; h=References: In-Reply-To: Message-Id: Date: Subject: Cc: To: From: Sender; bh=r8tB4J1FneQRPe60YCkiKiWdYkZgApzLq/Uc2rvQnMw=; b=o+zrEDc9QvRMFSDdhQiMnzgfc/yDMXqlE9Te67xZ4CT388dYy8+FYOGEnYyvTj5eGO8oO4IZ HHzH8XV261bBgOM3SUL9wDlhzj84qlGj5KMneMNmAD6UIoRiBy5on8+pv9eZMoLujZHeq0yi lYg4NSAaF8PxaWw984YWpHfihvQ= X-Mailgun-Sending-Ip: 198.61.254.9 X-Mailgun-Sid: WyI1YmJiNiIsICJkZXZpY2V0cmVlQHZnZXIua2VybmVsLm9yZyIsICJiZTllNGEiXQ== Received: from smtp.codeaurora.org (ec2-35-166-182-171.us-west-2.compute.amazonaws.com [35.166.182.171]) by smtp-out-n07.prod.us-east-1.postgun.com with SMTP id 6135d036e0fcecca19e47e68 (version=TLS1.2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256); Mon, 06 Sep 2021 08:24:22 GMT Sender: sibis=codeaurora.org@mg.codeaurora.org Received: by smtp.codeaurora.org (Postfix, from userid 1001) id 7E6C0C4360C; Mon, 6 Sep 2021 08:24:21 +0000 (UTC) Received: from blr-ubuntu-87.qualcomm.com (blr-bdr-fw-01_GlobalNAT_AllZones-Outside.qualcomm.com [103.229.18.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: sibis) by smtp.codeaurora.org (Postfix) with ESMTPSA id 9639EC4360C; Mon, 6 Sep 2021 08:24:15 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 smtp.codeaurora.org 9639EC4360C Authentication-Results: aws-us-west-2-caf-mail-1.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: aws-us-west-2-caf-mail-1.web.codeaurora.org; spf=fail smtp.mailfrom=codeaurora.org From: Sibi Sankar To: mka@chromium.org, swboyd@chromium.org, bjorn.andersson@linaro.org, robh+dt@kernel.org Cc: ulf.hansson@linaro.org, rjw@rjwysocki.net, agross@kernel.org, ohad@wizery.com, mathieu.poirier@linaro.org, linux-arm-msm@vger.kernel.org, linux-remoteproc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, dianders@chromium.org, rishabhb@codeaurora.org, sidgup@codeaurora.org, Sibi Sankar Subject: [PATCH v6 02/13] dt-bindings: remoteproc: qcom: pas: Add QMP property Date: Mon, 6 Sep 2021 13:53:46 +0530 Message-Id: <1630916637-4278-3-git-send-email-sibis@codeaurora.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1630916637-4278-1-git-send-email-sibis@codeaurora.org> References: <1630916637-4278-1-git-send-email-sibis@codeaurora.org> Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org The load state power-domain, used by the co-processors to notify the Always on Subsystem (AOSS) that a particular co-processor is up/down, suffers from the side-effect of changing states during suspend/resume. However the co-processors enter low-power modes independent to that of the application processor and their states are expected to remain unaltered across system suspend/resume cycles. To achieve this behavior let's drop the load state power-domain and replace them with the qmp property for all SoCs supporting low power mode signalling. Due to the current broken load state implementation, we can afford the binding breakage that ensues and the remoteproc functionality will remain the same when using newer kernels with older dtbs. Signed-off-by: Sibi Sankar Reviewed-by: Stephen Boyd --- v6: * Updated commit message to explain binding breakage. [Stephen] .../devicetree/bindings/remoteproc/qcom,adsp.yaml | 61 +++++++++++----------- 1 file changed, 31 insertions(+), 30 deletions(-) diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,adsp.yaml b/Documentation/devicetree/bindings/remoteproc/qcom,adsp.yaml index 0c112f3264a9..0d2b5bd4907a 100644 --- a/Documentation/devicetree/bindings/remoteproc/qcom,adsp.yaml +++ b/Documentation/devicetree/bindings/remoteproc/qcom,adsp.yaml @@ -93,6 +93,10 @@ properties: maxItems: 1 description: Reference to the reserved-memory for the Hexagon core + qcom,qmp: + $ref: /schemas/types.yaml#/definitions/phandle + description: Reference to the AOSS side-channel message RAM. + qcom,smem-states: $ref: /schemas/types.yaml#/definitions/phandle-array description: States used by the AP to signal the Hexagon core @@ -369,13 +373,11 @@ allOf: properties: power-domains: items: - - description: Load State power domain - description: CX power domain - description: MX power domain - description: MSS power domain power-domain-names: items: - - const: load_state - const: cx - const: mx - const: mss @@ -391,43 +393,20 @@ allOf: properties: power-domains: items: - - description: Load State power domain - description: CX power domain - power-domain-names: - items: - - const: load_state - - const: cx - if: properties: compatible: contains: enum: + - qcom,sdx55-mpss-pas - qcom,sm8150-mpss-pas - qcom,sm8350-mpss-pas then: properties: power-domains: items: - - description: Load State power domain - - description: CX power domain - - description: MSS power domain - power-domain-names: - items: - - const: load_state - - const: cx - - const: mss - - - if: - properties: - compatible: - contains: - enum: - - qcom,sdx55-mpss-pas - then: - properties: - power-domains: - items: - description: CX power domain - description: MSS power domain power-domain-names: @@ -451,12 +430,10 @@ allOf: properties: power-domains: items: - - description: Load State power domain - description: LCX power domain - description: LMX power domain power-domain-names: items: - - const: load_state - const: lcx - const: lmx @@ -470,12 +447,10 @@ allOf: properties: power-domains: items: - - description: Load State power domain - description: CX power domain - description: MXC power domain power-domain-names: items: - - const: load_state - const: cx - const: mxc @@ -511,6 +486,32 @@ allOf: - const: mss_restart - const: pdc_reset + - if: + properties: + compatible: + contains: + enum: + - qcom,sc7180-mpss-pas + - qcom,sc8180x-adsp-pas + - qcom,sc8180x-cdsp-pas + - qcom,sc8180x-mpss-pas + - qcom,sm8150-adsp-pas + - qcom,sm8150-cdsp-pas + - qcom,sm8150-mpss-pas + - qcom,sm8150-slpi-pas + - qcom,sm8250-adsp-pas + - qcom,sm8250-cdsp-pas + - qcom,sm8250-slpi-pas + - qcom,sm8350-adsp-pas + - qcom,sm8350-cdsp-pas + - qcom,sm8350-mpss-pas + - qcom,sm8350-slpi-pas + then: + properties: + qcom,qmp: + items: + - description: Reference to the AOSS side-channel message RAM. + examples: - | #include From patchwork Mon Sep 6 08:23:47 2021 Content-Type: text/plain; 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Mon, 6 Sep 2021 08:24:20 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 smtp.codeaurora.org D99B5C43618 Authentication-Results: aws-us-west-2-caf-mail-1.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: aws-us-west-2-caf-mail-1.web.codeaurora.org; spf=fail smtp.mailfrom=codeaurora.org From: Sibi Sankar To: mka@chromium.org, swboyd@chromium.org, bjorn.andersson@linaro.org, robh+dt@kernel.org Cc: ulf.hansson@linaro.org, rjw@rjwysocki.net, agross@kernel.org, ohad@wizery.com, mathieu.poirier@linaro.org, linux-arm-msm@vger.kernel.org, linux-remoteproc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, dianders@chromium.org, rishabhb@codeaurora.org, sidgup@codeaurora.org, Sibi Sankar Subject: [PATCH v6 03/13] dt-bindings: remoteproc: qcom: Add QMP property Date: Mon, 6 Sep 2021 13:53:47 +0530 Message-Id: <1630916637-4278-4-git-send-email-sibis@codeaurora.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1630916637-4278-1-git-send-email-sibis@codeaurora.org> References: <1630916637-4278-1-git-send-email-sibis@codeaurora.org> Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add Qualcomm Mailbox Protocol (QMP) property to replace the power domain exposed by the AOSS QMP node. Signed-off-by: Sibi Sankar Reviewed-by: Stephen Boyd Acked-by: Rob Herring --- Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt b/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt index 69c49c7b2cff..494257010629 100644 --- a/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt +++ b/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt @@ -174,7 +174,12 @@ For the compatible string below the following supplies are required: must be "cx", "mx" qcom,sc7180-mss-pil: qcom,sdm845-mss-pil: - must be "cx", "mx", "mss", "load_state" + must be "cx", "mx", "mss" + +- qcom,qmp: + Usage: optional + Value type: + Definition: reference to the AOSS side-channel message RAM. - qcom,smem-states: Usage: required From patchwork Mon Sep 6 08:23:48 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sibi Sankar X-Patchwork-Id: 507395 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 12746C433FE for ; Mon, 6 Sep 2021 08:25:03 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id EFB7560041 for ; Mon, 6 Sep 2021 08:25:02 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S240884AbhIFI0F (ORCPT ); Mon, 6 Sep 2021 04:26:05 -0400 Received: from m43-7.mailgun.net ([69.72.43.7]:59787 "EHLO m43-7.mailgun.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S240856AbhIFI0F (ORCPT ); Mon, 6 Sep 2021 04:26:05 -0400 DKIM-Signature: a=rsa-sha256; v=1; c=relaxed/relaxed; d=mg.codeaurora.org; q=dns/txt; s=smtp; t=1630916701; h=References: In-Reply-To: Message-Id: Date: Subject: Cc: To: From: Sender; bh=auLomwUCulcodaVTVig9OHUV2sfR4cNS2YohiAmD/T0=; b=vOf1RE9vQIdyLkLJ2giFS5JJ/jGKIgCrOOn3FbkqI9HBECXghwXM7FrCrgWIqRr8nM9oh5e7 Kr0UmYNEyQF9Y2CgDAoFH3FamLX+TXGBS/UtttGiUxFoQ5wv9LLDgUOBRBrRxJlDhjiPbNEo hL175dwdRdifQhIOopZrBwdhc4Q= X-Mailgun-Sending-Ip: 69.72.43.7 X-Mailgun-Sid: WyI1YmJiNiIsICJkZXZpY2V0cmVlQHZnZXIua2VybmVsLm9yZyIsICJiZTllNGEiXQ== Received: from smtp.codeaurora.org (ec2-35-166-182-171.us-west-2.compute.amazonaws.com [35.166.182.171]) by smtp-out-n07.prod.us-east-1.postgun.com with SMTP id 6135d044e0fcecca19e49e52 (version=TLS1.2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256); Mon, 06 Sep 2021 08:24:36 GMT Sender: sibis=codeaurora.org@mg.codeaurora.org Received: by smtp.codeaurora.org (Postfix, from userid 1001) id AA377C43635; Mon, 6 Sep 2021 08:24:35 +0000 (UTC) Received: from blr-ubuntu-87.qualcomm.com (blr-bdr-fw-01_GlobalNAT_AllZones-Outside.qualcomm.com [103.229.18.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: sibis) by smtp.codeaurora.org (Postfix) with ESMTPSA id 4711AC43616; Mon, 6 Sep 2021 08:24:26 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 smtp.codeaurora.org 4711AC43616 Authentication-Results: aws-us-west-2-caf-mail-1.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: aws-us-west-2-caf-mail-1.web.codeaurora.org; spf=fail smtp.mailfrom=codeaurora.org From: Sibi Sankar To: mka@chromium.org, swboyd@chromium.org, bjorn.andersson@linaro.org, robh+dt@kernel.org Cc: ulf.hansson@linaro.org, rjw@rjwysocki.net, agross@kernel.org, ohad@wizery.com, mathieu.poirier@linaro.org, linux-arm-msm@vger.kernel.org, linux-remoteproc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, dianders@chromium.org, rishabhb@codeaurora.org, sidgup@codeaurora.org, Sibi Sankar Subject: [PATCH v6 04/13] remoteproc: qcom: q6v5: Use qmp_send to update co-processor load state Date: Mon, 6 Sep 2021 13:53:48 +0530 Message-Id: <1630916637-4278-5-git-send-email-sibis@codeaurora.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1630916637-4278-1-git-send-email-sibis@codeaurora.org> References: <1630916637-4278-1-git-send-email-sibis@codeaurora.org> Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org The power domains exposed by the AOSS QMP driver control the load state resources linked to modem, adsp, cdsp remoteprocs. These are used to notify the Always on Subsystem (AOSS) that a particular co-processor is up/down. AOSS uses this information to wait for the co-processors to suspend before starting its sleep sequence. These co-processors enter low-power modes independent to that of the application processor and the load state resources linked to them are expected to remain unaltered across system suspend/resume cycles. To achieve this behavior lets stop using the power-domains exposed by the AOSS QMP node and replace them with generic qmp_send interface instead. Signed-off-by: Sibi Sankar Reviewed-by: Stephen Boyd --- drivers/remoteproc/qcom_q6v5.c | 57 ++++++++++++++++++++++++- drivers/remoteproc/qcom_q6v5.h | 7 ++- drivers/remoteproc/qcom_q6v5_adsp.c | 7 ++- drivers/remoteproc/qcom_q6v5_mss.c | 44 ++++--------------- drivers/remoteproc/qcom_q6v5_pas.c | 85 +++++++++---------------------------- drivers/remoteproc/qcom_q6v5_wcss.c | 4 +- 6 files changed, 96 insertions(+), 108 deletions(-) diff --git a/drivers/remoteproc/qcom_q6v5.c b/drivers/remoteproc/qcom_q6v5.c index 7e9244c748da..eada7e34f3af 100644 --- a/drivers/remoteproc/qcom_q6v5.c +++ b/drivers/remoteproc/qcom_q6v5.c @@ -16,8 +16,30 @@ #include "qcom_common.h" #include "qcom_q6v5.h" +#define Q6V5_LOAD_STATE_MSG_LEN 64 #define Q6V5_PANIC_DELAY_MS 200 +static int q6v5_load_state_toggle(struct qcom_q6v5 *q6v5, bool enable) +{ + char buf[Q6V5_LOAD_STATE_MSG_LEN]; + int ret; + + if (!q6v5->qmp) + return 0; + + ret = snprintf(buf, sizeof(buf), + "{class: image, res: load_state, name: %s, val: %s}", + q6v5->load_state, enable ? "on" : "off"); + + WARN_ON(ret >= Q6V5_LOAD_STATE_MSG_LEN); + + ret = qmp_send(q6v5->qmp, buf, sizeof(buf)); + if (ret) + dev_err(q6v5->dev, "failed to toggle load state\n"); + + return ret; +} + /** * qcom_q6v5_prepare() - reinitialize the qcom_q6v5 context before start * @q6v5: reference to qcom_q6v5 context to be reinitialized @@ -26,6 +48,12 @@ */ int qcom_q6v5_prepare(struct qcom_q6v5 *q6v5) { + int ret; + + ret = q6v5_load_state_toggle(q6v5, true); + if (ret) + return ret; + reinit_completion(&q6v5->start_done); reinit_completion(&q6v5->stop_done); @@ -47,6 +75,7 @@ EXPORT_SYMBOL_GPL(qcom_q6v5_prepare); int qcom_q6v5_unprepare(struct qcom_q6v5 *q6v5) { disable_irq(q6v5->handover_irq); + q6v5_load_state_toggle(q6v5, false); return !q6v5->handover_issued; } @@ -196,12 +225,13 @@ EXPORT_SYMBOL_GPL(qcom_q6v5_panic); * @pdev: platform_device reference for acquiring resources * @rproc: associated remoteproc instance * @crash_reason: SMEM id for crash reason string, or 0 if none + * @load_state: load state resource string * @handover: function to be called when proxy resources should be released * * Return: 0 on success, negative errno on failure */ int qcom_q6v5_init(struct qcom_q6v5 *q6v5, struct platform_device *pdev, - struct rproc *rproc, int crash_reason, + struct rproc *rproc, int crash_reason, const char *load_state, void (*handover)(struct qcom_q6v5 *q6v5)) { int ret; @@ -286,9 +316,34 @@ int qcom_q6v5_init(struct qcom_q6v5 *q6v5, struct platform_device *pdev, return PTR_ERR(q6v5->state); } + q6v5->load_state = devm_kstrdup_const(&pdev->dev, load_state, GFP_KERNEL); + q6v5->qmp = qmp_get(&pdev->dev); + if (IS_ERR(q6v5->qmp)) { + if (PTR_ERR(q6v5->qmp) != -ENODEV) + return dev_err_probe(&pdev->dev, PTR_ERR(q6v5->qmp), + "failed to acquire load state\n"); + q6v5->qmp = NULL; + } else if (!q6v5->load_state) { + if (!load_state) + dev_err(&pdev->dev, "load state resource string empty\n"); + + qmp_put(q6v5->qmp); + return load_state ? -ENOMEM : -EINVAL; + } + return 0; } EXPORT_SYMBOL_GPL(qcom_q6v5_init); +/** + * qcom_q6v5_deinit() - deinitialize the q6v5 common struct + * @q6v5: reference to qcom_q6v5 context to be deinitialized + */ +void qcom_q6v5_deinit(struct qcom_q6v5 *q6v5) +{ + qmp_put(q6v5->qmp); +} +EXPORT_SYMBOL_GPL(qcom_q6v5_deinit); + MODULE_LICENSE("GPL v2"); MODULE_DESCRIPTION("Qualcomm Peripheral Image Loader for Q6V5"); diff --git a/drivers/remoteproc/qcom_q6v5.h b/drivers/remoteproc/qcom_q6v5.h index 1c212f670cbc..f35e04471ed7 100644 --- a/drivers/remoteproc/qcom_q6v5.h +++ b/drivers/remoteproc/qcom_q6v5.h @@ -5,6 +5,7 @@ #include #include +#include struct rproc; struct qcom_smem_state; @@ -15,6 +16,8 @@ struct qcom_q6v5 { struct rproc *rproc; struct qcom_smem_state *state; + struct qmp *qmp; + unsigned stop_bit; int wdog_irq; @@ -32,12 +35,14 @@ struct qcom_q6v5 { bool running; + const char *load_state; void (*handover)(struct qcom_q6v5 *q6v5); }; int qcom_q6v5_init(struct qcom_q6v5 *q6v5, struct platform_device *pdev, - struct rproc *rproc, int crash_reason, + struct rproc *rproc, int crash_reason, const char *load_state, void (*handover)(struct qcom_q6v5 *q6v5)); +void qcom_q6v5_deinit(struct qcom_q6v5 *q6v5); int qcom_q6v5_prepare(struct qcom_q6v5 *q6v5); int qcom_q6v5_unprepare(struct qcom_q6v5 *q6v5); diff --git a/drivers/remoteproc/qcom_q6v5_adsp.c b/drivers/remoteproc/qcom_q6v5_adsp.c index 8b0d8bbacd2e..098362e6e233 100644 --- a/drivers/remoteproc/qcom_q6v5_adsp.c +++ b/drivers/remoteproc/qcom_q6v5_adsp.c @@ -185,7 +185,9 @@ static int adsp_start(struct rproc *rproc) int ret; unsigned int val; - qcom_q6v5_prepare(&adsp->q6v5); + ret = qcom_q6v5_prepare(&adsp->q6v5); + if (ret) + return ret; ret = clk_prepare_enable(adsp->xo); if (ret) @@ -465,7 +467,7 @@ static int adsp_probe(struct platform_device *pdev) if (ret) goto disable_pm; - ret = qcom_q6v5_init(&adsp->q6v5, pdev, rproc, desc->crash_reason_smem, + ret = qcom_q6v5_init(&adsp->q6v5, pdev, rproc, desc->crash_reason_smem, NULL, qcom_adsp_pil_handover); if (ret) goto disable_pm; @@ -500,6 +502,7 @@ static int adsp_remove(struct platform_device *pdev) rproc_del(adsp->rproc); + qcom_q6v5_deinit(&adsp->q6v5); qcom_remove_glink_subdev(adsp->rproc, &adsp->glink_subdev); qcom_remove_sysmon_subdev(adsp->sysmon); qcom_remove_ssr_subdev(adsp->rproc, &adsp->ssr_subdev); diff --git a/drivers/remoteproc/qcom_q6v5_mss.c b/drivers/remoteproc/qcom_q6v5_mss.c index 423b31dfa574..7a1422bd7925 100644 --- a/drivers/remoteproc/qcom_q6v5_mss.c +++ b/drivers/remoteproc/qcom_q6v5_mss.c @@ -137,7 +137,6 @@ struct rproc_hexagon_res { char **proxy_clk_names; char **reset_clk_names; char **active_clk_names; - char **active_pd_names; char **proxy_pd_names; int version; bool need_mem_protection; @@ -169,12 +168,10 @@ struct q6v5 { struct clk *active_clks[8]; struct clk *reset_clks[4]; struct clk *proxy_clks[4]; - struct device *active_pds[1]; struct device *proxy_pds[3]; int active_clk_count; int reset_clk_count; int proxy_clk_count; - int active_pd_count; int proxy_pd_count; struct reg_info active_regs[1]; @@ -895,18 +892,14 @@ static int q6v5_mba_load(struct q6v5 *qproc) int xfermemop_ret; bool mba_load_err = false; - qcom_q6v5_prepare(&qproc->q6v5); - - ret = q6v5_pds_enable(qproc, qproc->active_pds, qproc->active_pd_count); - if (ret < 0) { - dev_err(qproc->dev, "failed to enable active power domains\n"); - goto disable_irqs; - } + ret = qcom_q6v5_prepare(&qproc->q6v5); + if (ret) + return ret; ret = q6v5_pds_enable(qproc, qproc->proxy_pds, qproc->proxy_pd_count); if (ret < 0) { dev_err(qproc->dev, "failed to enable proxy power domains\n"); - goto disable_active_pds; + goto disable_irqs; } ret = q6v5_regulator_enable(qproc, qproc->fallback_proxy_regs, @@ -1039,8 +1032,6 @@ static int q6v5_mba_load(struct q6v5 *qproc) qproc->fallback_proxy_reg_count); disable_proxy_pds: q6v5_pds_disable(qproc, qproc->proxy_pds, qproc->proxy_pd_count); -disable_active_pds: - q6v5_pds_disable(qproc, qproc->active_pds, qproc->active_pd_count); disable_irqs: qcom_q6v5_unprepare(&qproc->q6v5); @@ -1076,7 +1067,6 @@ static void q6v5_mba_reclaim(struct q6v5 *qproc) qproc->active_clk_count); q6v5_regulator_disable(qproc, qproc->active_regs, qproc->active_reg_count); - q6v5_pds_disable(qproc, qproc->active_pds, qproc->active_pd_count); /* In case of failure or coredump scenario where reclaiming MBA memory * could not happen reclaim it here. @@ -1756,14 +1746,6 @@ static int q6v5_probe(struct platform_device *pdev) } qproc->active_reg_count = ret; - ret = q6v5_pds_attach(&pdev->dev, qproc->active_pds, - desc->active_pd_names); - if (ret < 0) { - dev_err(&pdev->dev, "Failed to attach active power domains\n"); - goto free_rproc; - } - qproc->active_pd_count = ret; - ret = q6v5_pds_attach(&pdev->dev, qproc->proxy_pds, desc->proxy_pd_names); /* Fallback to regulators for old device trees */ @@ -1773,12 +1755,12 @@ static int q6v5_probe(struct platform_device *pdev) desc->fallback_proxy_supply); if (ret < 0) { dev_err(&pdev->dev, "Failed to get fallback proxy regulators.\n"); - goto detach_active_pds; + goto free_rproc; } qproc->fallback_proxy_reg_count = ret; } else if (ret < 0) { dev_err(&pdev->dev, "Failed to init power domains\n"); - goto detach_active_pds; + goto free_rproc; } else { qproc->proxy_pd_count = ret; } @@ -1792,7 +1774,7 @@ static int q6v5_probe(struct platform_device *pdev) qproc->need_mem_protection = desc->need_mem_protection; qproc->has_mba_logs = desc->has_mba_logs; - ret = qcom_q6v5_init(&qproc->q6v5, pdev, rproc, MPSS_CRASH_REASON_SMEM, + ret = qcom_q6v5_init(&qproc->q6v5, pdev, rproc, MPSS_CRASH_REASON_SMEM, "modem", qcom_msa_handover); if (ret) goto detach_proxy_pds; @@ -1822,8 +1804,6 @@ static int q6v5_probe(struct platform_device *pdev) qcom_remove_glink_subdev(rproc, &qproc->glink_subdev); detach_proxy_pds: q6v5_pds_detach(qproc, qproc->proxy_pds, qproc->proxy_pd_count); -detach_active_pds: - q6v5_pds_detach(qproc, qproc->active_pds, qproc->active_pd_count); free_rproc: rproc_free(rproc); @@ -1837,13 +1817,13 @@ static int q6v5_remove(struct platform_device *pdev) rproc_del(rproc); + qcom_q6v5_deinit(&qproc->q6v5); qcom_remove_sysmon_subdev(qproc->sysmon); qcom_remove_ssr_subdev(rproc, &qproc->ssr_subdev); qcom_remove_smd_subdev(rproc, &qproc->smd_subdev); qcom_remove_glink_subdev(rproc, &qproc->glink_subdev); q6v5_pds_detach(qproc, qproc->proxy_pds, qproc->proxy_pd_count); - q6v5_pds_detach(qproc, qproc->active_pds, qproc->active_pd_count); rproc_free(rproc); @@ -1867,10 +1847,6 @@ static const struct rproc_hexagon_res sc7180_mss = { "nav", NULL }, - .active_pd_names = (char*[]){ - "load_state", - NULL - }, .proxy_pd_names = (char*[]){ "cx", "mx", @@ -1903,10 +1879,6 @@ static const struct rproc_hexagon_res sdm845_mss = { "mnoc_axi", NULL }, - .active_pd_names = (char*[]){ - "load_state", - NULL - }, .proxy_pd_names = (char*[]){ "cx", "mx", diff --git a/drivers/remoteproc/qcom_q6v5_pas.c b/drivers/remoteproc/qcom_q6v5_pas.c index 401b1ec90785..7036e6e9eff4 100644 --- a/drivers/remoteproc/qcom_q6v5_pas.c +++ b/drivers/remoteproc/qcom_q6v5_pas.c @@ -37,9 +37,9 @@ struct adsp_data { bool has_aggre2_clk; bool auto_boot; - char **active_pd_names; char **proxy_pd_names; + const char *load_state; const char *ssr_name; const char *sysmon_name; int ssctl_id; @@ -57,10 +57,8 @@ struct qcom_adsp { struct regulator *cx_supply; struct regulator *px_supply; - struct device *active_pds[1]; struct device *proxy_pds[3]; - int active_pd_count; int proxy_pd_count; int pas_id; @@ -149,15 +147,13 @@ static int adsp_start(struct rproc *rproc) struct qcom_adsp *adsp = (struct qcom_adsp *)rproc->priv; int ret; - qcom_q6v5_prepare(&adsp->q6v5); - - ret = adsp_pds_enable(adsp, adsp->active_pds, adsp->active_pd_count); - if (ret < 0) - goto disable_irqs; + ret = qcom_q6v5_prepare(&adsp->q6v5); + if (ret) + return ret; ret = adsp_pds_enable(adsp, adsp->proxy_pds, adsp->proxy_pd_count); if (ret < 0) - goto disable_active_pds; + goto disable_irqs; ret = clk_prepare_enable(adsp->xo); if (ret) @@ -201,8 +197,6 @@ static int adsp_start(struct rproc *rproc) clk_disable_unprepare(adsp->xo); disable_proxy_pds: adsp_pds_disable(adsp, adsp->proxy_pds, adsp->proxy_pd_count); -disable_active_pds: - adsp_pds_disable(adsp, adsp->active_pds, adsp->active_pd_count); disable_irqs: qcom_q6v5_unprepare(&adsp->q6v5); @@ -234,7 +228,6 @@ static int adsp_stop(struct rproc *rproc) if (ret) dev_err(adsp->dev, "failed to shutdown: %d\n", ret); - adsp_pds_disable(adsp, adsp->active_pds, adsp->active_pd_count); handover = qcom_q6v5_unprepare(&adsp->q6v5); if (handover) qcom_pas_handover(&adsp->q6v5); @@ -456,19 +449,13 @@ static int adsp_probe(struct platform_device *pdev) if (ret) goto free_rproc; - ret = adsp_pds_attach(&pdev->dev, adsp->active_pds, - desc->active_pd_names); - if (ret < 0) - goto free_rproc; - adsp->active_pd_count = ret; - ret = adsp_pds_attach(&pdev->dev, adsp->proxy_pds, desc->proxy_pd_names); if (ret < 0) - goto detach_active_pds; + goto free_rproc; adsp->proxy_pd_count = ret; - ret = qcom_q6v5_init(&adsp->q6v5, pdev, rproc, desc->crash_reason_smem, + ret = qcom_q6v5_init(&adsp->q6v5, pdev, rproc, desc->crash_reason_smem, desc->load_state, qcom_pas_handover); if (ret) goto detach_proxy_pds; @@ -492,8 +479,6 @@ static int adsp_probe(struct platform_device *pdev) detach_proxy_pds: adsp_pds_detach(adsp, adsp->proxy_pds, adsp->proxy_pd_count); -detach_active_pds: - adsp_pds_detach(adsp, adsp->active_pds, adsp->active_pd_count); free_rproc: rproc_free(rproc); @@ -506,6 +491,7 @@ static int adsp_remove(struct platform_device *pdev) rproc_del(adsp->rproc); + qcom_q6v5_deinit(&adsp->q6v5); qcom_remove_glink_subdev(adsp->rproc, &adsp->glink_subdev); qcom_remove_sysmon_subdev(adsp->sysmon); qcom_remove_smd_subdev(adsp->rproc, &adsp->smd_subdev); @@ -532,14 +518,11 @@ static const struct adsp_data sm8150_adsp_resource = { .pas_id = 1, .has_aggre2_clk = false, .auto_boot = true, - .active_pd_names = (char*[]){ - "load_state", - NULL - }, .proxy_pd_names = (char*[]){ "cx", NULL }, + .load_state = "adsp", .ssr_name = "lpass", .sysmon_name = "adsp", .ssctl_id = 0x14, @@ -551,15 +534,12 @@ static const struct adsp_data sm8250_adsp_resource = { .pas_id = 1, .has_aggre2_clk = false, .auto_boot = true, - .active_pd_names = (char*[]){ - "load_state", - NULL - }, .proxy_pd_names = (char*[]){ "lcx", "lmx", NULL }, + .load_state = "adsp", .ssr_name = "lpass", .sysmon_name = "adsp", .ssctl_id = 0x14, @@ -571,15 +551,12 @@ static const struct adsp_data sm8350_adsp_resource = { .pas_id = 1, .has_aggre2_clk = false, .auto_boot = true, - .active_pd_names = (char*[]){ - "load_state", - NULL - }, .proxy_pd_names = (char*[]){ "lcx", "lmx", NULL }, + .load_state = "adsp", .ssr_name = "lpass", .sysmon_name = "adsp", .ssctl_id = 0x14, @@ -617,14 +594,11 @@ static const struct adsp_data sm8150_cdsp_resource = { .pas_id = 18, .has_aggre2_clk = false, .auto_boot = true, - .active_pd_names = (char*[]){ - "load_state", - NULL - }, .proxy_pd_names = (char*[]){ "cx", NULL }, + .load_state = "cdsp", .ssr_name = "cdsp", .sysmon_name = "cdsp", .ssctl_id = 0x17, @@ -636,14 +610,11 @@ static const struct adsp_data sm8250_cdsp_resource = { .pas_id = 18, .has_aggre2_clk = false, .auto_boot = true, - .active_pd_names = (char*[]){ - "load_state", - NULL - }, .proxy_pd_names = (char*[]){ "cx", NULL }, + .load_state = "cdsp", .ssr_name = "cdsp", .sysmon_name = "cdsp", .ssctl_id = 0x17, @@ -655,14 +626,11 @@ static const struct adsp_data sm8350_cdsp_resource = { .pas_id = 18, .has_aggre2_clk = false, .auto_boot = true, - .active_pd_names = (char*[]){ - "load_state", - NULL - }, .proxy_pd_names = (char*[]){ "cx", NULL }, + .load_state = "cdsp", .ssr_name = "cdsp", .sysmon_name = "cdsp", .ssctl_id = 0x17, @@ -675,15 +643,12 @@ static const struct adsp_data mpss_resource_init = { .minidump_id = 3, .has_aggre2_clk = false, .auto_boot = false, - .active_pd_names = (char*[]){ - "load_state", - NULL - }, .proxy_pd_names = (char*[]){ "cx", "mss", NULL }, + .load_state = "modem", .ssr_name = "mpss", .sysmon_name = "modem", .ssctl_id = 0x12, @@ -695,14 +660,11 @@ static const struct adsp_data sc8180x_mpss_resource = { .pas_id = 4, .has_aggre2_clk = false, .auto_boot = false, - .active_pd_names = (char*[]){ - "load_state", - NULL - }, .proxy_pd_names = (char*[]){ "cx", NULL }, + .load_state = "modem", .ssr_name = "mpss", .sysmon_name = "modem", .ssctl_id = 0x12, @@ -725,15 +687,12 @@ static const struct adsp_data sm8150_slpi_resource = { .pas_id = 12, .has_aggre2_clk = false, .auto_boot = true, - .active_pd_names = (char*[]){ - "load_state", - NULL - }, .proxy_pd_names = (char*[]){ "lcx", "lmx", NULL }, + .load_state = "slpi", .ssr_name = "dsps", .sysmon_name = "slpi", .ssctl_id = 0x16, @@ -745,15 +704,12 @@ static const struct adsp_data sm8250_slpi_resource = { .pas_id = 12, .has_aggre2_clk = false, .auto_boot = true, - .active_pd_names = (char*[]){ - "load_state", - NULL - }, .proxy_pd_names = (char*[]){ "lcx", "lmx", NULL }, + .load_state = "slpi", .ssr_name = "dsps", .sysmon_name = "slpi", .ssctl_id = 0x16, @@ -765,15 +721,12 @@ static const struct adsp_data sm8350_slpi_resource = { .pas_id = 12, .has_aggre2_clk = false, .auto_boot = true, - .active_pd_names = (char*[]){ - "load_state", - NULL - }, .proxy_pd_names = (char*[]){ "lcx", "lmx", NULL }, + .load_state = "slpi", .ssr_name = "dsps", .sysmon_name = "slpi", .ssctl_id = 0x16, diff --git a/drivers/remoteproc/qcom_q6v5_wcss.c b/drivers/remoteproc/qcom_q6v5_wcss.c index 20d50ec7eff1..0689288a2425 100644 --- a/drivers/remoteproc/qcom_q6v5_wcss.c +++ b/drivers/remoteproc/qcom_q6v5_wcss.c @@ -1044,8 +1044,7 @@ static int q6v5_wcss_probe(struct platform_device *pdev) if (ret) goto free_rproc; - ret = qcom_q6v5_init(&wcss->q6v5, pdev, rproc, desc->crash_reason_smem, - NULL); + ret = qcom_q6v5_init(&wcss->q6v5, pdev, rproc, desc->crash_reason_smem, NULL, NULL); if (ret) goto free_rproc; @@ -1075,6 +1074,7 @@ static int q6v5_wcss_remove(struct platform_device *pdev) { struct rproc *rproc = platform_get_drvdata(pdev); + qcom_q6v5_deinit(&qproc->q6v5); rproc_del(rproc); rproc_free(rproc); From patchwork Mon Sep 6 08:23:49 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sibi Sankar X-Patchwork-Id: 507693 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 78865C433F5 for ; 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Mon, 06 Sep 2021 08:24:37 GMT Sender: sibis=codeaurora.org@mg.codeaurora.org Received: by smtp.codeaurora.org (Postfix, from userid 1001) id A542AC43616; Mon, 6 Sep 2021 08:24:37 +0000 (UTC) Received: from blr-ubuntu-87.qualcomm.com (blr-bdr-fw-01_GlobalNAT_AllZones-Outside.qualcomm.com [103.229.18.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: sibis) by smtp.codeaurora.org (Postfix) with ESMTPSA id D1EC5C4361C; Mon, 6 Sep 2021 08:24:31 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 smtp.codeaurora.org D1EC5C4361C Authentication-Results: aws-us-west-2-caf-mail-1.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: aws-us-west-2-caf-mail-1.web.codeaurora.org; spf=fail smtp.mailfrom=codeaurora.org From: Sibi Sankar To: mka@chromium.org, swboyd@chromium.org, bjorn.andersson@linaro.org, robh+dt@kernel.org Cc: ulf.hansson@linaro.org, rjw@rjwysocki.net, agross@kernel.org, ohad@wizery.com, mathieu.poirier@linaro.org, linux-arm-msm@vger.kernel.org, linux-remoteproc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, dianders@chromium.org, rishabhb@codeaurora.org, sidgup@codeaurora.org, Sibi Sankar Subject: [PATCH v6 05/13] arm64: dts: qcom: sc7180: Use QMP property to control load state Date: Mon, 6 Sep 2021 13:53:49 +0530 Message-Id: <1630916637-4278-6-git-send-email-sibis@codeaurora.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1630916637-4278-1-git-send-email-sibis@codeaurora.org> References: <1630916637-4278-1-git-send-email-sibis@codeaurora.org> Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Use the Qualcomm Mailbox Protocol (QMP) property to control the load state resources on SC7180 SoCs and drop deprecated power-domains exposed by AOSS QMP node. Signed-off-by: Sibi Sankar Reviewed-by: Stephen Boyd Reviewed-by: Matthias Kaehlcke --- arch/arm64/boot/dts/qcom/sc7180.dtsi | 9 ++++----- 1 file changed, 4 insertions(+), 5 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sc7180.dtsi b/arch/arm64/boot/dts/qcom/sc7180.dtsi index c8921e2d6480..24ee106b933a 100644 --- a/arch/arm64/boot/dts/qcom/sc7180.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7180.dtsi @@ -15,7 +15,6 @@ #include #include #include -#include #include #include #include @@ -1922,14 +1921,15 @@ clock-names = "iface", "bus", "nav", "snoc_axi", "mnoc_axi", "xo"; - power-domains = <&aoss_qmp AOSS_QMP_LS_MODEM>, - <&rpmhpd SC7180_CX>, + power-domains = <&rpmhpd SC7180_CX>, <&rpmhpd SC7180_MX>, <&rpmhpd SC7180_MSS>; - power-domain-names = "load_state", "cx", "mx", "mss"; + power-domain-names = "cx", "mx", "mss"; memory-region = <&mpss_mem>; + qcom,qmp = <&aoss_qmp>; + qcom,smem-states = <&modem_smp2p_out 0>; qcom,smem-state-names = "stop"; @@ -3224,7 +3224,6 @@ mboxes = <&apss_shared 0>; #clock-cells = <0>; - #power-domain-cells = <1>; }; spmi_bus: spmi@c440000 { From patchwork Mon Sep 6 08:23:50 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sibi Sankar X-Patchwork-Id: 507692 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id EC1B8C433F5 for ; Mon, 6 Sep 2021 08:25:09 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id DA3EE6108E for ; Mon, 6 Sep 2021 08:25:09 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S240940AbhIFI0M (ORCPT ); Mon, 6 Sep 2021 04:26:12 -0400 Received: from so254-9.mailgun.net ([198.61.254.9]:15889 "EHLO so254-9.mailgun.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S240914AbhIFI0M (ORCPT ); Mon, 6 Sep 2021 04:26:12 -0400 DKIM-Signature: a=rsa-sha256; v=1; c=relaxed/relaxed; d=mg.codeaurora.org; q=dns/txt; s=smtp; t=1630916708; h=References: In-Reply-To: Message-Id: Date: Subject: Cc: To: From: Sender; bh=CYLM3ttDiigjQYIsI///xTEr7/DnQKOl4naOcEYHHMI=; b=fTrQTtP3lwq2rBgcKWubcAeBrXjsyjJkPgOvJh7QZzdibX4qwQses2Oav9d/dPmJnVVyfgHC y5yHeiLUuLhK8hpiSETbKhSGKmNmYxkOp5b1O39GR1/9GwkDGvNPVmnss04Y2Lzn7A6Qhkj6 imcB7nt7Xv2yeJnypJE322qM0ho= X-Mailgun-Sending-Ip: 198.61.254.9 X-Mailgun-Sid: WyI1YmJiNiIsICJkZXZpY2V0cmVlQHZnZXIua2VybmVsLm9yZyIsICJiZTllNGEiXQ== Received: from smtp.codeaurora.org (ec2-35-166-182-171.us-west-2.compute.amazonaws.com [35.166.182.171]) by smtp-out-n03.prod.us-east-1.postgun.com with SMTP id 6135d04c6fc2cf7ad9c99d7b (version=TLS1.2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256); Mon, 06 Sep 2021 08:24:44 GMT Sender: sibis=codeaurora.org@mg.codeaurora.org Received: by smtp.codeaurora.org (Postfix, from userid 1001) id 0A7D5C4361A; Mon, 6 Sep 2021 08:24:43 +0000 (UTC) Received: from blr-ubuntu-87.qualcomm.com (blr-bdr-fw-01_GlobalNAT_AllZones-Outside.qualcomm.com [103.229.18.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: sibis) by smtp.codeaurora.org (Postfix) with ESMTPSA id A8DD8C4361A; Mon, 6 Sep 2021 08:24:37 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 smtp.codeaurora.org A8DD8C4361A Authentication-Results: aws-us-west-2-caf-mail-1.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: aws-us-west-2-caf-mail-1.web.codeaurora.org; spf=fail smtp.mailfrom=codeaurora.org From: Sibi Sankar To: mka@chromium.org, swboyd@chromium.org, bjorn.andersson@linaro.org, robh+dt@kernel.org Cc: ulf.hansson@linaro.org, rjw@rjwysocki.net, agross@kernel.org, ohad@wizery.com, mathieu.poirier@linaro.org, linux-arm-msm@vger.kernel.org, linux-remoteproc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, dianders@chromium.org, rishabhb@codeaurora.org, sidgup@codeaurora.org, Sibi Sankar Subject: [PATCH v6 06/13] arm64: dts: qcom: sc7280: Use QMP property to control load state Date: Mon, 6 Sep 2021 13:53:50 +0530 Message-Id: <1630916637-4278-7-git-send-email-sibis@codeaurora.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1630916637-4278-1-git-send-email-sibis@codeaurora.org> References: <1630916637-4278-1-git-send-email-sibis@codeaurora.org> Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Use the Qualcomm Mailbox Protocol (QMP) property to control the load state resources on SC7280 SoCs and drop deprecated power-domains exposed by AOSS QMP node. Signed-off-by: Sibi Sankar Reviewed-by: Stephen Boyd --- arch/arm64/boot/dts/qcom/sc7280.dtsi | 2 -- 1 file changed, 2 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi index 53a21d086178..5e4f4f3b738a 100644 --- a/arch/arm64/boot/dts/qcom/sc7280.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi @@ -10,7 +10,6 @@ #include #include #include -#include #include #include #include @@ -1481,7 +1480,6 @@ IPCC_MPROC_SIGNAL_GLINK_QMP>; #clock-cells = <0>; - #power-domain-cells = <1>; }; spmi_bus: spmi@c440000 { From patchwork Mon Sep 6 08:23:51 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sibi Sankar X-Patchwork-Id: 507691 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2796CC4332F for ; Mon, 6 Sep 2021 08:25:13 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 1692F60F43 for ; Mon, 6 Sep 2021 08:25:13 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S240908AbhIFI0P (ORCPT ); Mon, 6 Sep 2021 04:26:15 -0400 Received: from so254-9.mailgun.net ([198.61.254.9]:15889 "EHLO so254-9.mailgun.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S240943AbhIFI0O (ORCPT ); Mon, 6 Sep 2021 04:26:14 -0400 DKIM-Signature: a=rsa-sha256; v=1; c=relaxed/relaxed; d=mg.codeaurora.org; q=dns/txt; s=smtp; t=1630916710; h=References: In-Reply-To: Message-Id: Date: Subject: Cc: To: From: Sender; bh=j66fQ0ghagc4hJSe/bQRKeJpkmZASMctlTPVDui7FjI=; b=sF5TnI2FDV27TRV9VUohCEeSamhfZJZBzfr8K42fsPcdNfS5ieutOvj9xcpDAOwV0m1Bu/7V E4DbyjOXso9rIDndgCJ914/094JrLP18myrfj7onRrfOaPp3WvSOrxsfI5DB3NvLEftlVbZ7 1eWWYJJvy20fIyl+o8/zxDiLxfA= X-Mailgun-Sending-Ip: 198.61.254.9 X-Mailgun-Sid: WyI1YmJiNiIsICJkZXZpY2V0cmVlQHZnZXIua2VybmVsLm9yZyIsICJiZTllNGEiXQ== Received: from smtp.codeaurora.org (ec2-35-166-182-171.us-west-2.compute.amazonaws.com [35.166.182.171]) by smtp-out-n06.prod.us-east-1.postgun.com with SMTP id 6135d052c603a0154ff63e23 (version=TLS1.2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256); Mon, 06 Sep 2021 08:24:50 GMT Sender: sibis=codeaurora.org@mg.codeaurora.org Received: by smtp.codeaurora.org (Postfix, from userid 1001) id 76666C4363B; Mon, 6 Sep 2021 08:24:49 +0000 (UTC) Received: from blr-ubuntu-87.qualcomm.com (blr-bdr-fw-01_GlobalNAT_AllZones-Outside.qualcomm.com [103.229.18.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: sibis) by smtp.codeaurora.org (Postfix) with ESMTPSA id 3349DC43618; Mon, 6 Sep 2021 08:24:42 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 smtp.codeaurora.org 3349DC43618 Authentication-Results: aws-us-west-2-caf-mail-1.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: aws-us-west-2-caf-mail-1.web.codeaurora.org; spf=fail smtp.mailfrom=codeaurora.org From: Sibi Sankar To: mka@chromium.org, swboyd@chromium.org, bjorn.andersson@linaro.org, robh+dt@kernel.org Cc: ulf.hansson@linaro.org, rjw@rjwysocki.net, agross@kernel.org, ohad@wizery.com, mathieu.poirier@linaro.org, linux-arm-msm@vger.kernel.org, linux-remoteproc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, dianders@chromium.org, rishabhb@codeaurora.org, sidgup@codeaurora.org, Sibi Sankar Subject: [PATCH v6 07/13] arm64: dts: qcom: sdm845: Use QMP property to control load state Date: Mon, 6 Sep 2021 13:53:51 +0530 Message-Id: <1630916637-4278-8-git-send-email-sibis@codeaurora.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1630916637-4278-1-git-send-email-sibis@codeaurora.org> References: <1630916637-4278-1-git-send-email-sibis@codeaurora.org> Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Use the Qualcomm Mailbox Protocol (QMP) property to control the load state resources on SDM845 SoCs and drop deprecated power-domains exposed by AOSS QMP node. Signed-off-by: Sibi Sankar Reviewed-by: Stephen Boyd --- arch/arm64/boot/dts/qcom/sdm845.dtsi | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi index 425f169b5d1e..e13afa8f91c0 100644 --- a/arch/arm64/boot/dts/qcom/sdm845.dtsi +++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi @@ -2979,6 +2979,8 @@ clock-names = "iface", "bus", "mem", "gpll0_mss", "snoc_axi", "mnoc_axi", "prng", "xo"; + qcom,qmp = <&aoss_qmp>; + qcom,smem-states = <&modem_smp2p_out 0>; qcom,smem-state-names = "stop"; @@ -2988,11 +2990,10 @@ qcom,halt-regs = <&tcsr_mutex_regs 0x23000 0x25000 0x24000>; - power-domains = <&aoss_qmp 2>, - <&rpmhpd SDM845_CX>, + power-domains = <&rpmhpd SDM845_CX>, <&rpmhpd SDM845_MX>, <&rpmhpd SDM845_MSS>; - power-domain-names = "load_state", "cx", "mx", "mss"; + power-domain-names = "cx", "mx", "mss"; mba { memory-region = <&mba_region>; @@ -4583,7 +4584,6 @@ mboxes = <&apss_shared 0>; #clock-cells = <0>; - #power-domain-cells = <1>; cx_cdev: cx { #cooling-cells = <2>; From patchwork Mon Sep 6 08:23:52 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sibi Sankar X-Patchwork-Id: 507690 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 488F4C4332F for ; Mon, 6 Sep 2021 08:25:24 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 32C0560F43 for ; Mon, 6 Sep 2021 08:25:24 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S241032AbhIFI01 (ORCPT ); Mon, 6 Sep 2021 04:26:27 -0400 Received: from so254-9.mailgun.net ([198.61.254.9]:39987 "EHLO so254-9.mailgun.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S241004AbhIFI00 (ORCPT ); Mon, 6 Sep 2021 04:26:26 -0400 DKIM-Signature: a=rsa-sha256; v=1; c=relaxed/relaxed; d=mg.codeaurora.org; q=dns/txt; s=smtp; t=1630916722; h=References: In-Reply-To: Message-Id: Date: Subject: Cc: To: From: Sender; bh=diZT85RKQBQ/yH7dwA/l8A067C8+I84JBl+XyV/mPxk=; b=QJiHKtMaI8u01p8usigJQCpc5Go7eVgjtT0i6K1zBs0ahSlyyzS03yBs96977LGHUkxwxQTp ih488dm47Et8FLk5rGJx1zAw/4ncqKX/1E21bij22+3BNkJVbDDBO16AulIpcuPoedPtahPs GvZQirCQ7LDWZ3LU4HMhDBRqEpw= X-Mailgun-Sending-Ip: 198.61.254.9 X-Mailgun-Sid: WyI1YmJiNiIsICJkZXZpY2V0cmVlQHZnZXIua2VybmVsLm9yZyIsICJiZTllNGEiXQ== Received: from smtp.codeaurora.org (ec2-35-166-182-171.us-west-2.compute.amazonaws.com [35.166.182.171]) by smtp-out-n02.prod.us-east-1.postgun.com with SMTP id 6135d0591567234b8c73a676 (version=TLS1.2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256); Mon, 06 Sep 2021 08:24:57 GMT Sender: sibis=codeaurora.org@mg.codeaurora.org Received: by smtp.codeaurora.org (Postfix, from userid 1001) id E408CC4361B; Mon, 6 Sep 2021 08:24:55 +0000 (UTC) Received: from blr-ubuntu-87.qualcomm.com (blr-bdr-fw-01_GlobalNAT_AllZones-Outside.qualcomm.com [103.229.18.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: sibis) by smtp.codeaurora.org (Postfix) with ESMTPSA id D4DBCC4361B; Mon, 6 Sep 2021 08:24:48 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 smtp.codeaurora.org D4DBCC4361B Authentication-Results: aws-us-west-2-caf-mail-1.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: aws-us-west-2-caf-mail-1.web.codeaurora.org; spf=fail smtp.mailfrom=codeaurora.org From: Sibi Sankar To: mka@chromium.org, swboyd@chromium.org, bjorn.andersson@linaro.org, robh+dt@kernel.org Cc: ulf.hansson@linaro.org, rjw@rjwysocki.net, agross@kernel.org, ohad@wizery.com, mathieu.poirier@linaro.org, linux-arm-msm@vger.kernel.org, linux-remoteproc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, dianders@chromium.org, rishabhb@codeaurora.org, sidgup@codeaurora.org, Sibi Sankar Subject: [PATCH v6 08/13] arm64: dts: qcom: sm8150: Use QMP property to control load state Date: Mon, 6 Sep 2021 13:53:52 +0530 Message-Id: <1630916637-4278-9-git-send-email-sibis@codeaurora.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1630916637-4278-1-git-send-email-sibis@codeaurora.org> References: <1630916637-4278-1-git-send-email-sibis@codeaurora.org> Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Use the Qualcomm Mailbox Protocol (QMP) property to control the load state resources on SM8150 SoCs and drop deprecated power-domains exposed by AOSS QMP node. Signed-off-by: Sibi Sankar Reviewed-by: Stephen Boyd --- arch/arm64/boot/dts/qcom/sm8150.dtsi | 28 ++++++++++++++-------------- 1 file changed, 14 insertions(+), 14 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sm8150.dtsi b/arch/arm64/boot/dts/qcom/sm8150.dtsi index ef0232c2cf45..8a035693b7a3 100644 --- a/arch/arm64/boot/dts/qcom/sm8150.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8150.dtsi @@ -6,7 +6,6 @@ #include #include -#include #include #include #include @@ -1729,13 +1728,14 @@ clocks = <&rpmhcc RPMH_CXO_CLK>; clock-names = "xo"; - power-domains = <&aoss_qmp AOSS_QMP_LS_SLPI>, - <&rpmhpd 3>, + power-domains = <&rpmhpd 3>, <&rpmhpd 2>; - power-domain-names = "load_state", "lcx", "lmx"; + power-domain-names = "lcx", "lmx"; memory-region = <&slpi_mem>; + qcom,qmp = <&aoss_qmp>; + qcom,smem-states = <&slpi_smp2p_out 0>; qcom,smem-state-names = "stop"; @@ -2319,13 +2319,14 @@ clocks = <&rpmhcc RPMH_CXO_CLK>; clock-names = "xo"; - power-domains = <&aoss_qmp AOSS_QMP_LS_MODEM>, - <&rpmhpd 7>, + power-domains = <&rpmhpd 7>, <&rpmhpd 0>; - power-domain-names = "load_state", "cx", "mss"; + power-domain-names = "cx", "mss"; memory-region = <&mpss_mem>; + qcom,qmp = <&aoss_qmp>; + qcom,smem-states = <&modem_smp2p_out 0>; qcom,smem-state-names = "stop"; @@ -2945,12 +2946,12 @@ clocks = <&rpmhcc RPMH_CXO_CLK>; clock-names = "xo"; - power-domains = <&aoss_qmp AOSS_QMP_LS_CDSP>, - <&rpmhpd 7>; - power-domain-names = "load_state", "cx"; + power-domains = <&rpmhpd 7>; memory-region = <&cdsp_mem>; + qcom,qmp = <&aoss_qmp>; + qcom,smem-states = <&cdsp_smp2p_out 0>; qcom,smem-state-names = "stop"; @@ -3174,7 +3175,6 @@ mboxes = <&apss_shared 0>; #clock-cells = <0>; - #power-domain-cells = <1>; }; tsens0: thermal-sensor@c263000 { @@ -3321,12 +3321,12 @@ clocks = <&rpmhcc RPMH_CXO_CLK>; clock-names = "xo"; - power-domains = <&aoss_qmp AOSS_QMP_LS_LPASS>, - <&rpmhpd 7>; - power-domain-names = "load_state", "cx"; + power-domains = <&rpmhpd 7>; memory-region = <&adsp_mem>; + qcom,qmp = <&aoss_qmp>; + qcom,smem-states = <&adsp_smp2p_out 0>; qcom,smem-state-names = "stop"; From patchwork Mon Sep 6 08:23:53 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sibi Sankar X-Patchwork-Id: 507394 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3A3E4C43217 for ; Mon, 6 Sep 2021 08:25:11 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 23C6B61004 for ; Mon, 6 Sep 2021 08:25:11 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S240956AbhIFI0O (ORCPT ); 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Mon, 06 Sep 2021 08:25:03 GMT Sender: sibis=codeaurora.org@mg.codeaurora.org Received: by smtp.codeaurora.org (Postfix, from userid 1001) id 454CFC4361C; Mon, 6 Sep 2021 08:25:01 +0000 (UTC) Received: from blr-ubuntu-87.qualcomm.com (blr-bdr-fw-01_GlobalNAT_AllZones-Outside.qualcomm.com [103.229.18.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: sibis) by smtp.codeaurora.org (Postfix) with ESMTPSA id 95613C43460; Mon, 6 Sep 2021 08:24:54 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 smtp.codeaurora.org 95613C43460 Authentication-Results: aws-us-west-2-caf-mail-1.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: aws-us-west-2-caf-mail-1.web.codeaurora.org; spf=fail smtp.mailfrom=codeaurora.org From: Sibi Sankar To: mka@chromium.org, swboyd@chromium.org, bjorn.andersson@linaro.org, robh+dt@kernel.org Cc: ulf.hansson@linaro.org, rjw@rjwysocki.net, agross@kernel.org, ohad@wizery.com, mathieu.poirier@linaro.org, linux-arm-msm@vger.kernel.org, linux-remoteproc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, dianders@chromium.org, rishabhb@codeaurora.org, sidgup@codeaurora.org, Sibi Sankar Subject: [PATCH v6 09/13] arm64: dts: qcom: sm8250: Use QMP property to control load state Date: Mon, 6 Sep 2021 13:53:53 +0530 Message-Id: <1630916637-4278-10-git-send-email-sibis@codeaurora.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1630916637-4278-1-git-send-email-sibis@codeaurora.org> References: <1630916637-4278-1-git-send-email-sibis@codeaurora.org> Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Use the Qualcomm Mailbox Protocol (QMP) property to control the load state resources on SM8250 SoCs and drop deprecated power-domains exposed by AOSS QMP node. Signed-off-by: Sibi Sankar Reviewed-by: Stephen Boyd --- arch/arm64/boot/dts/qcom/sm8250.dtsi | 22 +++++++++++----------- 1 file changed, 11 insertions(+), 11 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sm8250.dtsi b/arch/arm64/boot/dts/qcom/sm8250.dtsi index 8c15d9fed08f..2796b27f7c04 100644 --- a/arch/arm64/boot/dts/qcom/sm8250.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8250.dtsi @@ -13,7 +13,6 @@ #include #include #include -#include #include #include #include @@ -2088,13 +2087,14 @@ clocks = <&rpmhcc RPMH_CXO_CLK>; clock-names = "xo"; - power-domains = <&aoss_qmp AOSS_QMP_LS_SLPI>, - <&rpmhpd SM8250_LCX>, + power-domains = <&rpmhpd SM8250_LCX>, <&rpmhpd SM8250_LMX>; - power-domain-names = "load_state", "lcx", "lmx"; + power-domain-names = "lcx", "lmx"; memory-region = <&slpi_mem>; + qcom,qmp = <&aoss_qmp>; + qcom,smem-states = <&smp2p_slpi_out 0>; qcom,smem-state-names = "stop"; @@ -2154,12 +2154,12 @@ clocks = <&rpmhcc RPMH_CXO_CLK>; clock-names = "xo"; - power-domains = <&aoss_qmp AOSS_QMP_LS_CDSP>, - <&rpmhpd SM8250_CX>; - power-domain-names = "load_state", "cx"; + power-domains = <&rpmhpd SM8250_CX>; memory-region = <&cdsp_mem>; + qcom,qmp = <&aoss_qmp>; + qcom,smem-states = <&smp2p_cdsp_out 0>; qcom,smem-state-names = "stop"; @@ -2907,7 +2907,6 @@ IPCC_MPROC_SIGNAL_GLINK_QMP>; #clock-cells = <0>; - #power-domain-cells = <1>; }; spmi_bus: spmi@c440000 { @@ -3824,13 +3823,14 @@ clocks = <&rpmhcc RPMH_CXO_CLK>; clock-names = "xo"; - power-domains = <&aoss_qmp AOSS_QMP_LS_LPASS>, - <&rpmhpd SM8250_LCX>, + power-domains = <&rpmhpd SM8250_LCX>, <&rpmhpd SM8250_LMX>; - power-domain-names = "load_state", "lcx", "lmx"; + power-domain-names = "lcx", "lmx"; memory-region = <&adsp_mem>; + qcom,qmp = <&aoss_qmp>; + qcom,smem-states = <&smp2p_adsp_out 0>; qcom,smem-state-names = "stop"; From patchwork Mon Sep 6 08:23:54 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sibi Sankar X-Patchwork-Id: 507689 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id ED879C433FE for ; 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Mon, 06 Sep 2021 08:25:10 GMT Sender: sibis=codeaurora.org@mg.codeaurora.org Received: by smtp.codeaurora.org (Postfix, from userid 1001) id A32E1C4363F; Mon, 6 Sep 2021 08:25:08 +0000 (UTC) Received: from blr-ubuntu-87.qualcomm.com (blr-bdr-fw-01_GlobalNAT_AllZones-Outside.qualcomm.com [103.229.18.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: sibis) by smtp.codeaurora.org (Postfix) with ESMTPSA id 77337C43616; Mon, 6 Sep 2021 08:25:00 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 smtp.codeaurora.org 77337C43616 Authentication-Results: aws-us-west-2-caf-mail-1.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: aws-us-west-2-caf-mail-1.web.codeaurora.org; spf=fail smtp.mailfrom=codeaurora.org From: Sibi Sankar To: mka@chromium.org, swboyd@chromium.org, bjorn.andersson@linaro.org, robh+dt@kernel.org Cc: ulf.hansson@linaro.org, rjw@rjwysocki.net, agross@kernel.org, ohad@wizery.com, mathieu.poirier@linaro.org, linux-arm-msm@vger.kernel.org, linux-remoteproc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, dianders@chromium.org, rishabhb@codeaurora.org, sidgup@codeaurora.org, Sibi Sankar Subject: [PATCH v6 10/13] arm64: dts: qcom: sm8350: Use QMP property to control load state Date: Mon, 6 Sep 2021 13:53:54 +0530 Message-Id: <1630916637-4278-11-git-send-email-sibis@codeaurora.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1630916637-4278-1-git-send-email-sibis@codeaurora.org> References: <1630916637-4278-1-git-send-email-sibis@codeaurora.org> Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Use the Qualcomm Mailbox Protocol (QMP) property to control the load state resources on SM8350 SoCs and drop deprecated power-domains exposed by AOSS QMP node. Signed-off-by: Sibi Sankar Reviewed-by: Stephen Boyd --- arch/arm64/boot/dts/qcom/sm8350.dtsi | 30 ++++++++++++++++-------------- 1 file changed, 16 insertions(+), 14 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sm8350.dtsi b/arch/arm64/boot/dts/qcom/sm8350.dtsi index e91cd8a5e535..6c83cd52a279 100644 --- a/arch/arm64/boot/dts/qcom/sm8350.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8350.dtsi @@ -8,7 +8,6 @@ #include #include #include -#include #include #include #include @@ -726,15 +725,16 @@ clocks = <&rpmhcc RPMH_CXO_CLK>; clock-names = "xo"; - power-domains = <&aoss_qmp AOSS_QMP_LS_MODEM>, - <&rpmhpd 0>, + power-domains = <&rpmhpd 0>, <&rpmhpd 12>; - power-domain-names = "load_state", "cx", "mss"; + power-domain-names = "cx", "mss"; interconnects = <&mc_virt MASTER_LLCC &mc_virt SLAVE_EBI1>; memory-region = <&pil_modem_mem>; + qcom,qmp = <&aoss_qmp>; + qcom,smem-states = <&smp2p_modem_out 0>; qcom,smem-state-names = "stop"; @@ -794,7 +794,6 @@ mboxes = <&ipcc IPCC_CLIENT_AOP IPCC_MPROC_SIGNAL_GLINK_QMP>; #clock-cells = <0>; - #power-domain-cells = <1>; }; spmi_bus: spmi@c440000 { @@ -1107,13 +1106,14 @@ clocks = <&rpmhcc RPMH_CXO_CLK>; clock-names = "xo"; - power-domains = <&aoss_qmp AOSS_QMP_LS_SLPI>, - <&rpmhpd 4>, + power-domains = <&rpmhpd 4>, <&rpmhpd 5>; - power-domain-names = "load_state", "lcx", "lmx"; + power-domain-names = "lcx", "lmx"; memory-region = <&pil_slpi_mem>; + qcom,qmp = <&aoss_qmp>; + qcom,smem-states = <&smp2p_slpi_out 0>; qcom,smem-state-names = "stop"; @@ -1147,15 +1147,16 @@ clocks = <&rpmhcc RPMH_CXO_CLK>; clock-names = "xo"; - power-domains = <&aoss_qmp AOSS_QMP_LS_CDSP>, - <&rpmhpd 0>, + power-domains = <&rpmhpd 0>, <&rpmhpd 10>; - power-domain-names = "load_state", "cx", "mxc"; + power-domain-names = "cx", "mxc"; interconnects = <&compute_noc MASTER_CDSP_PROC &mc_virt SLAVE_EBI1>; memory-region = <&pil_cdsp_mem>; + qcom,qmp = <&aoss_qmp>; + qcom,smem-states = <&smp2p_cdsp_out 0>; qcom,smem-state-names = "stop"; @@ -1381,13 +1382,14 @@ clocks = <&rpmhcc RPMH_CXO_CLK>; clock-names = "xo"; - power-domains = <&aoss_qmp AOSS_QMP_LS_LPASS>, - <&rpmhpd 4>, + power-domains = <&rpmhpd 4>, <&rpmhpd 5>; - power-domain-names = "load_state", "lcx", "lmx"; + power-domain-names = "lcx", "lmx"; memory-region = <&pil_adsp_mem>; + qcom,qmp = <&aoss_qmp>; + qcom,smem-states = <&smp2p_adsp_out 0>; qcom,smem-state-names = "stop"; From patchwork Mon Sep 6 08:23:55 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sibi Sankar X-Patchwork-Id: 507391 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 455F1C433F5 for ; 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Mon, 06 Sep 2021 08:25:14 GMT Sender: sibis=codeaurora.org@mg.codeaurora.org Received: by smtp.codeaurora.org (Postfix, from userid 1001) id 9139BC43163; Mon, 6 Sep 2021 08:25:13 +0000 (UTC) Received: from blr-ubuntu-87.qualcomm.com (blr-bdr-fw-01_GlobalNAT_AllZones-Outside.qualcomm.com [103.229.18.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: sibis) by smtp.codeaurora.org (Postfix) with ESMTPSA id 4ACE0C43618; Mon, 6 Sep 2021 08:25:06 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 smtp.codeaurora.org 4ACE0C43618 Authentication-Results: aws-us-west-2-caf-mail-1.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: aws-us-west-2-caf-mail-1.web.codeaurora.org; spf=fail smtp.mailfrom=codeaurora.org From: Sibi Sankar To: mka@chromium.org, swboyd@chromium.org, bjorn.andersson@linaro.org, robh+dt@kernel.org Cc: ulf.hansson@linaro.org, rjw@rjwysocki.net, agross@kernel.org, ohad@wizery.com, mathieu.poirier@linaro.org, linux-arm-msm@vger.kernel.org, linux-remoteproc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, dianders@chromium.org, rishabhb@codeaurora.org, sidgup@codeaurora.org, Sibi Sankar Subject: [PATCH v6 11/13] soc: qcom: aoss: Drop power domain support Date: Mon, 6 Sep 2021 13:53:55 +0530 Message-Id: <1630916637-4278-12-git-send-email-sibis@codeaurora.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1630916637-4278-1-git-send-email-sibis@codeaurora.org> References: <1630916637-4278-1-git-send-email-sibis@codeaurora.org> Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Strip out the load state power-domain support from the driver since the low power mode signalling for the co-processors is now accessible through the direct qmp message send interface. Signed-off-by: Sibi Sankar Reviewed-by: Matthias Kaehlcke Reviewed-by: Stephen Boyd --- drivers/soc/qcom/qcom_aoss.c | 107 ------------------------------------------- 1 file changed, 107 deletions(-) diff --git a/drivers/soc/qcom/qcom_aoss.c b/drivers/soc/qcom/qcom_aoss.c index 9fb74aa7c9ab..d650012ca19c 100644 --- a/drivers/soc/qcom/qcom_aoss.c +++ b/drivers/soc/qcom/qcom_aoss.c @@ -2,7 +2,6 @@ /* * Copyright (c) 2019, Linaro Ltd */ -#include #include #include #include @@ -11,7 +10,6 @@ #include #include #include -#include #include #include #include @@ -67,7 +65,6 @@ struct qmp_cooling_device { * @event: wait_queue for synchronization with the IRQ * @tx_lock: provides synchronization between multiple callers of qmp_send() * @qdss_clk: QDSS clock hw struct - * @pd_data: genpd data * @cooling_devs: thermal cooling devices */ struct qmp { @@ -85,18 +82,10 @@ struct qmp { struct mutex tx_lock; struct clk_hw qdss_clk; - struct genpd_onecell_data pd_data; struct qmp_cooling_device *cooling_devs; struct dentry *debugfs_file; }; -struct qmp_pd { - struct qmp *qmp; - struct generic_pm_domain pd; -}; - -#define to_qmp_pd_resource(res) container_of(res, struct qmp_pd, pd) - static void qmp_kick(struct qmp *qmp) { mbox_send_message(qmp->mbox_chan, NULL); @@ -322,95 +311,6 @@ static void qmp_qdss_clk_remove(struct qmp *qmp) clk_hw_unregister(&qmp->qdss_clk); } -static int qmp_pd_power_toggle(struct qmp_pd *res, bool enable) -{ - char buf[QMP_MSG_LEN] = {}; - - snprintf(buf, sizeof(buf), - "{class: image, res: load_state, name: %s, val: %s}", - res->pd.name, enable ? "on" : "off"); - return qmp_send(res->qmp, buf, sizeof(buf)); -} - -static int qmp_pd_power_on(struct generic_pm_domain *domain) -{ - return qmp_pd_power_toggle(to_qmp_pd_resource(domain), true); -} - -static int qmp_pd_power_off(struct generic_pm_domain *domain) -{ - return qmp_pd_power_toggle(to_qmp_pd_resource(domain), false); -} - -static const char * const sdm845_resources[] = { - [AOSS_QMP_LS_CDSP] = "cdsp", - [AOSS_QMP_LS_LPASS] = "adsp", - [AOSS_QMP_LS_MODEM] = "modem", - [AOSS_QMP_LS_SLPI] = "slpi", - [AOSS_QMP_LS_SPSS] = "spss", - [AOSS_QMP_LS_VENUS] = "venus", -}; - -static int qmp_pd_add(struct qmp *qmp) -{ - struct genpd_onecell_data *data = &qmp->pd_data; - struct device *dev = qmp->dev; - struct qmp_pd *res; - size_t num = ARRAY_SIZE(sdm845_resources); - int ret; - int i; - - res = devm_kcalloc(dev, num, sizeof(*res), GFP_KERNEL); - if (!res) - return -ENOMEM; - - data->domains = devm_kcalloc(dev, num, sizeof(*data->domains), - GFP_KERNEL); - if (!data->domains) - return -ENOMEM; - - for (i = 0; i < num; i++) { - res[i].qmp = qmp; - res[i].pd.name = sdm845_resources[i]; - res[i].pd.power_on = qmp_pd_power_on; - res[i].pd.power_off = qmp_pd_power_off; - - ret = pm_genpd_init(&res[i].pd, NULL, true); - if (ret < 0) { - dev_err(dev, "failed to init genpd\n"); - goto unroll_genpds; - } - - data->domains[i] = &res[i].pd; - } - - data->num_domains = i; - - ret = of_genpd_add_provider_onecell(dev->of_node, data); - if (ret < 0) - goto unroll_genpds; - - return 0; - -unroll_genpds: - for (i--; i >= 0; i--) - pm_genpd_remove(data->domains[i]); - - return ret; -} - -static void qmp_pd_remove(struct qmp *qmp) -{ - struct genpd_onecell_data *data = &qmp->pd_data; - struct device *dev = qmp->dev; - int i; - - of_genpd_del_provider(dev->of_node); - - for (i = 0; i < data->num_domains; i++) - pm_genpd_remove(data->domains[i]); -} - static int qmp_cdev_get_max_state(struct thermal_cooling_device *cdev, unsigned long *state) { @@ -641,10 +541,6 @@ static int qmp_probe(struct platform_device *pdev) if (ret) goto err_close_qmp; - ret = qmp_pd_add(qmp); - if (ret) - goto err_remove_qdss_clk; - ret = qmp_cooling_devices_register(qmp); if (ret) dev_err(&pdev->dev, "failed to register aoss cooling devices\n"); @@ -656,8 +552,6 @@ static int qmp_probe(struct platform_device *pdev) return 0; -err_remove_qdss_clk: - qmp_qdss_clk_remove(qmp); err_close_qmp: qmp_close(qmp); err_free_mbox: @@ -673,7 +567,6 @@ static int qmp_remove(struct platform_device *pdev) debugfs_remove(qmp->debugfs_file); qmp_qdss_clk_remove(qmp); - qmp_pd_remove(qmp); qmp_cooling_devices_remove(qmp); qmp_close(qmp); From patchwork Mon Sep 6 08:23:56 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sibi Sankar X-Patchwork-Id: 507393 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 98704C433F5 for ; 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Mon, 06 Sep 2021 08:25:18 GMT Sender: sibis=codeaurora.org@mg.codeaurora.org Received: by smtp.codeaurora.org (Postfix, from userid 1001) id 787BFC43460; Mon, 6 Sep 2021 08:25:18 +0000 (UTC) Received: from blr-ubuntu-87.qualcomm.com (blr-bdr-fw-01_GlobalNAT_AllZones-Outside.qualcomm.com [103.229.18.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: sibis) by smtp.codeaurora.org (Postfix) with ESMTPSA id 0330AC43638; Mon, 6 Sep 2021 08:25:11 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 smtp.codeaurora.org 0330AC43638 Authentication-Results: aws-us-west-2-caf-mail-1.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: aws-us-west-2-caf-mail-1.web.codeaurora.org; spf=fail smtp.mailfrom=codeaurora.org From: Sibi Sankar To: mka@chromium.org, swboyd@chromium.org, bjorn.andersson@linaro.org, robh+dt@kernel.org Cc: ulf.hansson@linaro.org, rjw@rjwysocki.net, agross@kernel.org, ohad@wizery.com, mathieu.poirier@linaro.org, linux-arm-msm@vger.kernel.org, linux-remoteproc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, dianders@chromium.org, rishabhb@codeaurora.org, sidgup@codeaurora.org, Sibi Sankar Subject: [PATCH v6 12/13] dt-bindings: msm/dp: Remove aoss-qmp header Date: Mon, 6 Sep 2021 13:53:56 +0530 Message-Id: <1630916637-4278-13-git-send-email-sibis@codeaurora.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1630916637-4278-1-git-send-email-sibis@codeaurora.org> References: <1630916637-4278-1-git-send-email-sibis@codeaurora.org> Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Remove the unused aoss-qmp header from the list of includes. Signed-off-by: Sibi Sankar Acked-by: Rob Herring Reviewed-by: Stephen Boyd --- Documentation/devicetree/bindings/display/msm/dp-controller.yaml | 1 - 1 file changed, 1 deletion(-) diff --git a/Documentation/devicetree/bindings/display/msm/dp-controller.yaml b/Documentation/devicetree/bindings/display/msm/dp-controller.yaml index 64d8d9e5e47a..d89b3c510c27 100644 --- a/Documentation/devicetree/bindings/display/msm/dp-controller.yaml +++ b/Documentation/devicetree/bindings/display/msm/dp-controller.yaml @@ -95,7 +95,6 @@ examples: - | #include #include - #include #include displayport-controller@ae90000 { From patchwork Mon Sep 6 08:23:57 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sibi Sankar X-Patchwork-Id: 507392 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id B5C37C433F5 for ; Mon, 6 Sep 2021 08:25:37 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 9CC0B6103B for ; Mon, 6 Sep 2021 08:25:37 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S240905AbhIFI0k (ORCPT ); Mon, 6 Sep 2021 04:26:40 -0400 Received: from so254-9.mailgun.net ([198.61.254.9]:15889 "EHLO so254-9.mailgun.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S241012AbhIFI0j (ORCPT ); Mon, 6 Sep 2021 04:26:39 -0400 DKIM-Signature: a=rsa-sha256; v=1; c=relaxed/relaxed; d=mg.codeaurora.org; q=dns/txt; s=smtp; t=1630916735; h=References: In-Reply-To: Message-Id: Date: Subject: Cc: To: From: Sender; bh=Ja0ch2BKFqV8Z+kWiGBFMXL83Jhiecq8a/U0GuvQfuI=; b=MSUNBc4+OiE5n5z2o9AklomwMGufk8lkFHX0l+kQFr4nfPQSPBKEWZBIxriPAy6F/w8E2Uh6 dP5t6Ut0jnfv4955aOOz5EgRKnXCcvqPuKyoe0XoNIyAve1qIFriVm7AK/AQFevuCA5zHjlc LcQImXh08KAIoGbhJxpzkf0fSrQ= X-Mailgun-Sending-Ip: 198.61.254.9 X-Mailgun-Sid: WyI1YmJiNiIsICJkZXZpY2V0cmVlQHZnZXIua2VybmVsLm9yZyIsICJiZTllNGEiXQ== Received: from smtp.codeaurora.org (ec2-35-166-182-171.us-west-2.compute.amazonaws.com [35.166.182.171]) by smtp-out-n04.prod.us-west-2.postgun.com with SMTP id 6135d07489cdb62061d230d8 (version=TLS1.2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256); Mon, 06 Sep 2021 08:25:24 GMT Sender: sibis=codeaurora.org@mg.codeaurora.org Received: by smtp.codeaurora.org (Postfix, from userid 1001) id A3A0FC43638; Mon, 6 Sep 2021 08:25:24 +0000 (UTC) Received: from blr-ubuntu-87.qualcomm.com (blr-bdr-fw-01_GlobalNAT_AllZones-Outside.qualcomm.com [103.229.18.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: sibis) by smtp.codeaurora.org (Postfix) with ESMTPSA id C8EF9C43165; Mon, 6 Sep 2021 08:25:17 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 smtp.codeaurora.org C8EF9C43165 Authentication-Results: aws-us-west-2-caf-mail-1.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: aws-us-west-2-caf-mail-1.web.codeaurora.org; spf=fail smtp.mailfrom=codeaurora.org From: Sibi Sankar To: mka@chromium.org, swboyd@chromium.org, bjorn.andersson@linaro.org, robh+dt@kernel.org Cc: ulf.hansson@linaro.org, rjw@rjwysocki.net, agross@kernel.org, ohad@wizery.com, mathieu.poirier@linaro.org, linux-arm-msm@vger.kernel.org, linux-remoteproc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, dianders@chromium.org, rishabhb@codeaurora.org, sidgup@codeaurora.org, Sibi Sankar Subject: [PATCH v6 13/13] dt-bindings: soc: qcom: aoss: Delete unused power-domain definitions Date: Mon, 6 Sep 2021 13:53:57 +0530 Message-Id: <1630916637-4278-14-git-send-email-sibis@codeaurora.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1630916637-4278-1-git-send-email-sibis@codeaurora.org> References: <1630916637-4278-1-git-send-email-sibis@codeaurora.org> Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Delete unused power-domain definitions exposed by AOSS QMP. Signed-off-by: Sibi Sankar Reviewed-by: Stephen Boyd Acked-by: Rob Herring Reviewed-by: Matthias Kaehlcke --- include/dt-bindings/power/qcom-aoss-qmp.h | 14 -------------- 1 file changed, 14 deletions(-) delete mode 100644 include/dt-bindings/power/qcom-aoss-qmp.h diff --git a/include/dt-bindings/power/qcom-aoss-qmp.h b/include/dt-bindings/power/qcom-aoss-qmp.h deleted file mode 100644 index ec336d31dee4..000000000000 --- a/include/dt-bindings/power/qcom-aoss-qmp.h +++ /dev/null @@ -1,14 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -/* Copyright (c) 2018, Linaro Ltd. */ - -#ifndef __DT_BINDINGS_POWER_QCOM_AOSS_QMP_H -#define __DT_BINDINGS_POWER_QCOM_AOSS_QMP_H - -#define AOSS_QMP_LS_CDSP 0 -#define AOSS_QMP_LS_LPASS 1 -#define AOSS_QMP_LS_MODEM 2 -#define AOSS_QMP_LS_SLPI 3 -#define AOSS_QMP_LS_SPSS 4 -#define AOSS_QMP_LS_VENUS 5 - -#endif