From patchwork Fri Oct 19 01:56:15 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 149203 Delivered-To: patch@linaro.org Received: by 2002:a2e:8595:0:0:0:0:0 with SMTP id b21-v6csp2714179lji; Thu, 18 Oct 2018 18:58:53 -0700 (PDT) X-Google-Smtp-Source: ACcGV61kUgUDENRrr5H602H7s4XoEsCuTR9N+M2xaH5STu90uAFlhQ18rEOWQsx+nt/WRCxl7b42 X-Received: by 2002:a37:a3cd:: with SMTP id m196-v6mr4353661qke.138.1539914333622; Thu, 18 Oct 2018 18:58:53 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1539914333; cv=none; d=google.com; s=arc-20160816; b=MBy4M2nPF9xkMKwc/tGX4GxDJQyjC9aNifC6mVbBIoP/t+EV4I/N0KznpKlDSXetu5 970ULi/UjACFzVHU4DGDZZAJDyr35k4war6PF2Alc0Xm2fepcYe/xheGwHb14Akpvsvd IS8UHpRNsVE0toi+nd8KTB9T5EttYS//GrtgE+AeagkAEMPfhzerFgCWVgGZyNtCv4dq ojj7cUF2mnrcmd6xcf+82zcPtiRE6K6WwdR5dmxLhl4wPmagakf40vSvcM7z4B7ObD7H 9NtHrgvElcCmO7WO5vSst9dPeOwdoR9C/Ql3nthGxlOWndl5ncmrR1xL1eKMZiZgJhxb J6tg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:subject:references:in-reply-to :message-id:date:to:from:dkim-signature; bh=2rYUpwFMdqLRhJkf9zenkRS6T7M+r4Z28gefTS144y4=; b=EkI0pwEQ7kI6zhxJYFmEMzqa2Sy0S1VBTm38ct77F8zt7KURgHd6McSmjpB0SGnd4c MZpUYK2hLD4LjJD5fkDbqDjqSMc0Lnu9RcGGuRyGvaGEpvJM2n/dlN1to+W6UhqmHKoN xAt2ZfjVt9cyuooG2/Nm6+kiCEgavchuXRzoAcrqQ1G13mysPZk61HwOgAQObTKjl4+V GydOb6rQ0UdYIKZMWo+kmIGh0PakbAAjIXhOY+EqkFYGpcyfYDvn0e27FdJj+AyaZygD o+HdZn2x08EZUy4RAakf5Ju6PgB/QS4i2Q6pfjObPgZL1Vt+NyTQVdQ7YZJAv4RJ4JFq 9JIw== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=FA7rgWfJ; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [2001:4830:134:3::11]) by mx.google.com with ESMTPS id p14-v6si2142542qtj.126.2018.10.18.18.58.53 for (version=TLS1 cipher=AES128-SHA bits=128/128); Thu, 18 Oct 2018 18:58:53 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) client-ip=2001:4830:134:3::11; Authentication-Results: mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=FA7rgWfJ; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:46262 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gDK3x-0000Yz-44 for patch@linaro.org; Thu, 18 Oct 2018 21:58:53 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:57569) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gDK1m-0006Uv-Ji for qemu-devel@nongnu.org; Thu, 18 Oct 2018 21:56:40 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1gDK1i-0003wE-Gn for qemu-devel@nongnu.org; Thu, 18 Oct 2018 21:56:38 -0400 Received: from mail-pg1-x541.google.com ([2607:f8b0:4864:20::541]:40372) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1gDK1i-0003kU-4R for qemu-devel@nongnu.org; Thu, 18 Oct 2018 21:56:34 -0400 Received: by mail-pg1-x541.google.com with SMTP id n31-v6so15052474pgm.7 for ; Thu, 18 Oct 2018 18:56:22 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=2rYUpwFMdqLRhJkf9zenkRS6T7M+r4Z28gefTS144y4=; b=FA7rgWfJWMV9lrY8pcOU1tPFjd00znnfF8V+Miz5D4u9zAWjYby6BuRshoRmXXG4O/ q4UyofYNJcxC9nIfqXLmQK/P/M2jb2n1rlmLNLAVmplCkNZBdEFfEp/n9LqwKn68SUxr QRGCW9B7O0X33vYYeuJw2JHg7DicfQwk/aEHQ= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=2rYUpwFMdqLRhJkf9zenkRS6T7M+r4Z28gefTS144y4=; b=BzHuRZdc1PwCvM6GciCpvi8wLd918hUh0hFNbC7drpwIiCJHbXvXWAiYj7wAhkTG03 CCRW9Y9XufpbJXOnmOsscPtcSsIdYVkQNEVrICLYE7e4g5YSsKjITQDARCNkr8q+kDkA a8LcnNVkT5EX4Ct2iEhwsDV5VS28pzank71RpmGkhG++SO1t3yp4oQpjs0tJJtxQg8f2 oVzn2RMQZt58RPN5yUamG9Eoky8OKnryMHAZ3dOnlM6weNhy6XutiC3W9VtSc1g1mhoh LYZBjl5I2iJ2/NEREBlZ5h4tx/OrJRTjM1W5nv06iSz1I2a/0ZqBcIJtrdJ8+kITOk5g xvzg== X-Gm-Message-State: ABuFfoh9NvTYOwJYEmlc5esjuLPKEZBBYkdd5WPjvn1FDBrCMMz7I6ZR uTqvwRvshxU9T33sQNFjOEXCJYSlv6c= X-Received: by 2002:a63:f050:: with SMTP id s16-v6mr30761350pgj.403.1539914181558; Thu, 18 Oct 2018 18:56:21 -0700 (PDT) Received: from cloudburst.twiddle.net (174-21-9-133.tukw.qwest.net. [174.21.9.133]) by smtp.gmail.com with ESMTPSA id p62-v6sm33170892pfp.111.2018.10.18.18.56.20 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Thu, 18 Oct 2018 18:56:20 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Date: Thu, 18 Oct 2018 18:56:15 -0700 Message-Id: <20181019015617.22583-2-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.2 In-Reply-To: <20181019015617.22583-1-richard.henderson@linaro.org> References: <20181019015617.22583-1-richard.henderson@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::541 Subject: [Qemu-devel] [PATCH v2 1/3] target/arm: Remove writefn from TTBR0_EL3 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" The EL3 version of this register does not include an ASID, and so the tlb_flush performed by vmsa_ttbr_write is not needed. Reviewed-by: Aaron Lindsay Signed-off-by: Richard Henderson --- target/arm/helper.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) -- 2.17.2 Reviewed-by: Peter Maydell diff --git a/target/arm/helper.c b/target/arm/helper.c index e3946562aa..24bbde4f76 100644 --- a/target/arm/helper.c +++ b/target/arm/helper.c @@ -4214,7 +4214,7 @@ static const ARMCPRegInfo el3_cp_reginfo[] = { .fieldoffset = offsetof(CPUARMState, cp15.mvbar) }, { .name = "TTBR0_EL3", .state = ARM_CP_STATE_AA64, .opc0 = 3, .opc1 = 6, .crn = 2, .crm = 0, .opc2 = 0, - .access = PL3_RW, .writefn = vmsa_ttbr_write, .resetvalue = 0, + .access = PL3_RW, .resetvalue = 0, .fieldoffset = offsetof(CPUARMState, cp15.ttbr0_el[3]) }, { .name = "TCR_EL3", .state = ARM_CP_STATE_AA64, .opc0 = 3, .opc1 = 6, .crn = 2, .crm = 0, .opc2 = 2, From patchwork Fri Oct 19 01:56:16 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 149202 Delivered-To: patch@linaro.org Received: by 2002:a2e:8595:0:0:0:0:0 with SMTP id b21-v6csp2714171lji; Thu, 18 Oct 2018 18:58:53 -0700 (PDT) X-Google-Smtp-Source: ACcGV61tc2QkWf+aWKmcIpfiXHnKE3AHq61A9sBiFK6Cn2NpMBgOQ1pRA/UIUBqqIhMwzOdfK4Bw X-Received: by 2002:ac8:4085:: with SMTP id p5-v6mr31287807qtl.248.1539914333447; Thu, 18 Oct 2018 18:58:53 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1539914333; cv=none; d=google.com; s=arc-20160816; b=KvKARcKm/NOgYaoY04zKvZc7Jf02euyuFgIv4BEK3IDZ/wWbOjfkN1f9eaZtNwA6Rr pwxAYL/26Fh0b8V58/ce6ZzuZA0J99LeU5EdOVuC2UQh+LQWjMek6JEFW/tR2b/zExEh ahcgkpD4hU97Tpl3NRFfFrlfr/Vi5/PjPD+/IxIZEnJohBIP8pmk7mA6XWHxWJF51mpi E4/wLpf4luUQUUu+qorkTpsNweO5k5b16BlojjEJ8KcsNlYxxBsXAlnlZF4LFXtJGJz+ 9WB85vw52LrOq4L8y/ddXliDthyEh7+ut38qaCny6NjsEEr+c6pQXe0Yn6wGxMxZhlYt xLYQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:subject:references:in-reply-to :message-id:date:to:from:dkim-signature; bh=7EO8aWpIPQTssuS56XDHtv1ElZWc/DQfneu/cFYaDcY=; b=dvMwpmnHnn2q2oWNsA5zeWHFhMNO6uBqLV+NoLrObsb3+8hcrjf8B3AY7upDqtWjpd jaatWsuuPufBfI6UdwxNeAIJj9NR9gMiWDaq8i7FQ9l6b/M5GMEUzuuTuzCR6V4vHbi8 1gkmUSQmFNwWJBDAcjzs9Sg7zFnIV4+85HSgExbpAF/oWYPwGCSn64eI2vJpaxpiBrA2 5RlV25clQ/2DTjJq+CR+eXrVxQysiUtc9o1nAInXS/BbKDrhTWbVo2z0yN2TyIORw6Pn i31TBlBbLUInN+hegwQE1OWMWVsPZnX3lI9DZRDGTp9c4IBwmU1L29ywvtAuzFkYJ7Uy T7Gg== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=XmIHtobm; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [2001:4830:134:3::11]) by mx.google.com with ESMTPS id u11-v6si2476101qkk.255.2018.10.18.18.58.53 for (version=TLS1 cipher=AES128-SHA bits=128/128); Thu, 18 Oct 2018 18:58:53 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) client-ip=2001:4830:134:3::11; Authentication-Results: mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=XmIHtobm; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:46261 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gDK3w-0000Yp-U4 for patch@linaro.org; Thu, 18 Oct 2018 21:58:52 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:57566) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gDK1m-0006Us-Ij for qemu-devel@nongnu.org; Thu, 18 Oct 2018 21:56:39 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1gDK1j-0003y7-C9 for qemu-devel@nongnu.org; Thu, 18 Oct 2018 21:56:38 -0400 Received: from mail-pl1-x641.google.com ([2607:f8b0:4864:20::641]:42196) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1gDK1i-0003lc-Pt for qemu-devel@nongnu.org; Thu, 18 Oct 2018 21:56:35 -0400 Received: by mail-pl1-x641.google.com with SMTP id c8-v6so15121173plo.9 for ; Thu, 18 Oct 2018 18:56:24 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=7EO8aWpIPQTssuS56XDHtv1ElZWc/DQfneu/cFYaDcY=; b=XmIHtobmPVmEkpp3HdrI0QZGyITwgJMIauW6Mb6nXq9/DNvW8Bge0NJh6Nn5BmGka/ VzC8DlUHs73fBrb5UrKY9bZkogHm8z2jvqG7oz+jw54EbW30bVUej7MyuYKcuEFHW8FL kQCa7Ld3U2vZnGaJgSJXhtNnea4aga82jl0uM= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=7EO8aWpIPQTssuS56XDHtv1ElZWc/DQfneu/cFYaDcY=; b=aF7aMBaHLb1itX/r0lKNYXzDtDzc6J6xAHxOZf9HzrnP/8kJJaHAqRx9TV92UlZU6+ vt3GXsmmRL82TWVRq7cQduZlGuJ4/SRCuad1uJe9QNqURN/4u2nE7cyw16Qe6N51c0mz 3niYZWHOBoOMIyIQ4N7FulfXjZ5/stFEpijlRDET9lraEWpI5c2+rcGJj48XgDhbH6zr C8Cw9Xf5yqX019MQp1NUwFspWpeUlrrdylJeGvP9tgGbbbd+oMk5RllPjhZPr8oBSrV4 rWxndbuUV9w8fS4JxA57AegoJ9ZXU2WYMnFvHK0ylFlXXNaRe8GE+zJn6Qu15nBJIMGJ zXqQ== X-Gm-Message-State: ABuFfohnd/wsOB2wL4WxWB9RaZ96V0hTNuqhVpzGNMl2AilJD8JmUkhA 4ZVGHGoR0PIzD+UGkuO1DsaZATUaNBc= X-Received: by 2002:a17:902:ac89:: with SMTP id h9-v6mr31354407plr.174.1539914183006; Thu, 18 Oct 2018 18:56:23 -0700 (PDT) Received: from cloudburst.twiddle.net (174-21-9-133.tukw.qwest.net. [174.21.9.133]) by smtp.gmail.com with ESMTPSA id p62-v6sm33170892pfp.111.2018.10.18.18.56.21 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Thu, 18 Oct 2018 18:56:22 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Date: Thu, 18 Oct 2018 18:56:16 -0700 Message-Id: <20181019015617.22583-3-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.2 In-Reply-To: <20181019015617.22583-1-richard.henderson@linaro.org> References: <20181019015617.22583-1-richard.henderson@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::641 Subject: [Qemu-devel] [PATCH v2 2/3] target/arm: Only flush tlb if ASID changes X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Since QEMU does not implement ASIDs, changes to the ASID must flush the tlb. However, if the ASID does not change there is no reason to flush. In testing a boot of the Ubuntu installer to the first menu, this reduces the number of flushes by 30%, or nearly 600k instances. Reviewed-by: Aaron Lindsay Signed-off-by: Richard Henderson --- target/arm/helper.c | 8 +++----- 1 file changed, 3 insertions(+), 5 deletions(-) -- 2.17.2 Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Peter Maydell diff --git a/target/arm/helper.c b/target/arm/helper.c index 24bbde4f76..ed70ac645e 100644 --- a/target/arm/helper.c +++ b/target/arm/helper.c @@ -2709,12 +2709,10 @@ static void vmsa_tcr_el1_write(CPUARMState *env, const ARMCPRegInfo *ri, static void vmsa_ttbr_write(CPUARMState *env, const ARMCPRegInfo *ri, uint64_t value) { - /* 64 bit accesses to the TTBRs can change the ASID and so we - * must flush the TLB. - */ - if (cpreg_field_is_64bit(ri)) { + /* If the ASID changes (with a 64-bit write), we must flush the TLB. */ + if (cpreg_field_is_64bit(ri) && + extract64(raw_read(env, ri) ^ value, 48, 16) != 0) { ARMCPU *cpu = arm_env_get_cpu(env); - tlb_flush(CPU(cpu)); } raw_write(env, ri, value); From patchwork Fri Oct 19 01:56:17 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 149201 Delivered-To: patch@linaro.org Received: by 2002:a2e:8595:0:0:0:0:0 with SMTP id b21-v6csp2712977lji; Thu, 18 Oct 2018 18:57:03 -0700 (PDT) X-Google-Smtp-Source: ACcGV61zTgki8keFo5ZRNA6KBsl7gIl+Y6w+/OcmHFwTq//mOlshO5Boh8oK+gNTozufk7F/D2n3 X-Received: by 2002:ac8:687:: with SMTP id f7-v6mr31085188qth.348.1539914223467; Thu, 18 Oct 2018 18:57:03 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1539914223; cv=none; d=google.com; s=arc-20160816; b=c2CeUMCBbzVjvreoGfp8mx4LgaolBSgUh97g1EYhd2zkAYkN7opOCLFrz5F77Dn+46 8p+hI3tmwgYeB2QZcLtVtLjnJz/BbMdhrlRGoBN545m6qpPH7dA/rGCNypdiW/8zQPUh JdCVcS6l8k+G2jFX3muQkEc3Oop7ceRFdeL2FbwTOg0oI4zsIWbKVwlvmlTb2Tv6qWmk QAIsxIjKjJhdrX9ZNhMkMtswo62WGzerd2YA3J4mUyaAixyuBU2IlRBedNF+uFSH/o7E mPdc4PjCmi3zGofyyvXSJ7+UsEelY7xi8b+ZJyu2yJqFbqnMgwnWLlAFz3c01sq4Qibm CX2Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:subject:references:in-reply-to :message-id:date:to:from:dkim-signature; bh=TTyR7xzj+PHD0K1CpzmCfsJOcm4+gyZaOYvrOzDqHOk=; b=hvZkkwtzKUiHw0gQnAf7NMoeU9Zp7Ik9nFpbjl5yuYecZeP72BbTC8hIZ5GF47STH/ 5V2BUvY5NI7begpjkWIwvbalkiV7PVdS598fu1JcETm6r4GKKbbtgA5AjvwN5tUmmN0U dTK7RuK6IKpTJEz8iBPX3P5G5hmfPZE+vhFfSJ3aBpgHzBpTQGY1K/dWnzt8iDVVJ3Pr KKKBHVhOfCJdjSrVE1MmIZrVC5GtNLXlXcpQD0jETvzgyJcStu5DcUNhU5Pt6S3BUF3u 72YNx1ioLrUQu4BK1U4lhgI4HciR1yEPNz/XrdnQyAXwTSmLnoU59S69lxIHAP1kd7nI njHg== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=Ur3D5KVO; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [2001:4830:134:3::11]) by mx.google.com with ESMTPS id 18-v6si2631903qkz.65.2018.10.18.18.57.03 for (version=TLS1 cipher=AES128-SHA bits=128/128); Thu, 18 Oct 2018 18:57:03 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) client-ip=2001:4830:134:3::11; Authentication-Results: mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=Ur3D5KVO; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:46221 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gDK2A-0006WW-UN for patch@linaro.org; Thu, 18 Oct 2018 21:57:03 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:57565) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gDK1m-0006Ur-J9 for qemu-devel@nongnu.org; Thu, 18 Oct 2018 21:56:40 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1gDK1i-0003w0-Fi for qemu-devel@nongnu.org; Thu, 18 Oct 2018 21:56:38 -0400 Received: from mail-pg1-x541.google.com ([2607:f8b0:4864:20::541]:46180) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1gDK1h-0003mk-N2 for qemu-devel@nongnu.org; Thu, 18 Oct 2018 21:56:34 -0400 Received: by mail-pg1-x541.google.com with SMTP id r190-v6so3425915pgr.13 for ; Thu, 18 Oct 2018 18:56:25 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=TTyR7xzj+PHD0K1CpzmCfsJOcm4+gyZaOYvrOzDqHOk=; b=Ur3D5KVOArDHnTltp5LUYGWt/ZgIi4veW0Z/25r99dmNsARdzSXsivr/7hPOZvmcod 8MIsMOAGSlsxszHGMKrvL+e457nG94IGEs9l7cAiMYojO51ahUBCPEssAxw1fk8IezCF kX/MXTdkaZxuJT3VwFXrIG9je/WCQt9dhlsjM= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=TTyR7xzj+PHD0K1CpzmCfsJOcm4+gyZaOYvrOzDqHOk=; b=ED1CSg7n2oKzELxuDaMzBlRlRgUnAgab8prl8i4OqE8Z7FnaAxAtzXD26iqWEyiCLr YOQ7pIOTZS0F7+ilgcf89jCs/raYsz08/K5ExnDgHEhWN0EfbLL/wMqM3m8AXZBjOE6Z j9jMwteEiHq8CH7MNr53+IBrwR67USXKI4NSBQZbpAeOJY9GScwfBft8m42oZEE57PVU 2bZzMvV3qc3ClXHe5RJsvIAVkQmwFwKJAB3L27Xy3z6ZrD/HvBPzVA0YaAaBXzGFS2li Tum8o2HfpH5ECpIa4aagxuLwmvQ2TIGskB4xU5LlZxI5RliKBijEu0Khky9L3L9uWISE S5hw== X-Gm-Message-State: ABuFfogV4AGJSkZmROjFp7hTr/M6fbMvJWL+44a6iTY/C3CSnipOLp9X RZCXEpzRbL2IYltuS/9jspZxwczvLHE= X-Received: by 2002:a65:4783:: with SMTP id e3-v6mr30119517pgs.12.1539914184460; Thu, 18 Oct 2018 18:56:24 -0700 (PDT) Received: from cloudburst.twiddle.net (174-21-9-133.tukw.qwest.net. [174.21.9.133]) by smtp.gmail.com with ESMTPSA id p62-v6sm33170892pfp.111.2018.10.18.18.56.23 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Thu, 18 Oct 2018 18:56:23 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Date: Thu, 18 Oct 2018 18:56:17 -0700 Message-Id: <20181019015617.22583-4-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.2 In-Reply-To: <20181019015617.22583-1-richard.henderson@linaro.org> References: <20181019015617.22583-1-richard.henderson@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::541 Subject: [Qemu-devel] [PATCH v2 3/3] target/arm: Flush only the TLBs affected by TTBR*_EL1 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Only the EL0 and EL1 TLBs are affected by the EL1 register, so flush only 2 of the 8 TLBs. In testing a boot of the Ubuntu installer to the first menu, this accounts for nearly all of the full tlb flushes: all but 11k of the 1.2M instances without the patch. Signed-off-by: Richard Henderson --- target/arm/helper.c | 16 +++++++++------- 1 file changed, 9 insertions(+), 7 deletions(-) -- 2.17.2 diff --git a/target/arm/helper.c b/target/arm/helper.c index ed70ac645e..3ba8e66487 100644 --- a/target/arm/helper.c +++ b/target/arm/helper.c @@ -2706,14 +2706,16 @@ static void vmsa_tcr_el1_write(CPUARMState *env, const ARMCPRegInfo *ri, tcr->raw_tcr = value; } -static void vmsa_ttbr_write(CPUARMState *env, const ARMCPRegInfo *ri, - uint64_t value) +static void vmsa_ttbr_el1_write(CPUARMState *env, const ARMCPRegInfo *ri, + uint64_t value) { /* If the ASID changes (with a 64-bit write), we must flush the TLB. */ if (cpreg_field_is_64bit(ri) && extract64(raw_read(env, ri) ^ value, 48, 16) != 0) { ARMCPU *cpu = arm_env_get_cpu(env); - tlb_flush(CPU(cpu)); + tlb_flush_by_mmuidx(CPU(cpu), + ARMMMUIdxBit_S12NSE1 | + ARMMMUIdxBit_S12NSE0); } raw_write(env, ri, value); } @@ -2761,12 +2763,12 @@ static const ARMCPRegInfo vmsa_cp_reginfo[] = { .fieldoffset = offsetof(CPUARMState, cp15.esr_el[1]), .resetvalue = 0, }, { .name = "TTBR0_EL1", .state = ARM_CP_STATE_BOTH, .opc0 = 3, .opc1 = 0, .crn = 2, .crm = 0, .opc2 = 0, - .access = PL1_RW, .writefn = vmsa_ttbr_write, .resetvalue = 0, + .access = PL1_RW, .writefn = vmsa_ttbr_el1_write, .resetvalue = 0, .bank_fieldoffsets = { offsetof(CPUARMState, cp15.ttbr0_s), offsetof(CPUARMState, cp15.ttbr0_ns) } }, { .name = "TTBR1_EL1", .state = ARM_CP_STATE_BOTH, .opc0 = 3, .opc1 = 0, .crn = 2, .crm = 0, .opc2 = 1, - .access = PL1_RW, .writefn = vmsa_ttbr_write, .resetvalue = 0, + .access = PL1_RW, .writefn = vmsa_ttbr_el1_write, .resetvalue = 0, .bank_fieldoffsets = { offsetof(CPUARMState, cp15.ttbr1_s), offsetof(CPUARMState, cp15.ttbr1_ns) } }, { .name = "TCR_EL1", .state = ARM_CP_STATE_AA64, @@ -3018,12 +3020,12 @@ static const ARMCPRegInfo lpae_cp_reginfo[] = { .access = PL1_RW, .type = ARM_CP_64BIT | ARM_CP_ALIAS, .bank_fieldoffsets = { offsetof(CPUARMState, cp15.ttbr0_s), offsetof(CPUARMState, cp15.ttbr0_ns) }, - .writefn = vmsa_ttbr_write, }, + .writefn = vmsa_ttbr_el1_write, }, { .name = "TTBR1", .cp = 15, .crm = 2, .opc1 = 1, .access = PL1_RW, .type = ARM_CP_64BIT | ARM_CP_ALIAS, .bank_fieldoffsets = { offsetof(CPUARMState, cp15.ttbr1_s), offsetof(CPUARMState, cp15.ttbr1_ns) }, - .writefn = vmsa_ttbr_write, }, + .writefn = vmsa_ttbr_el1_write, }, REGINFO_SENTINEL };