From patchwork Tue Oct 16 03:01:47 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Masahiro Yamada X-Patchwork-Id: 148903 Delivered-To: patch@linaro.org Received: by 2002:a2e:8595:0:0:0:0:0 with SMTP id b21-v6csp4543404lji; Mon, 15 Oct 2018 20:02:42 -0700 (PDT) X-Google-Smtp-Source: ACcGV60nDMbF1PgJWQpTHenjwU1dW0XsOvhrxsw4GhSVP6EuaWBPs80m6XpOXoVie/FUmxDjNOmN X-Received: by 2002:a17:902:6843:: with SMTP id f3-v6mr19628715pln.64.1539658961861; Mon, 15 Oct 2018 20:02:41 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1539658961; cv=none; d=google.com; s=arc-20160816; b=CmfX/qYMAqr/8Xq7uRj74k3O6qtp58zjsr4pQ5Hx2aX0IjB0OOiqewNTzQaYAc9nkK 3mpDhaIDMDmnN3/S5xpibpsw4UAhk1OyJTG7KHeaTV4h6rwBGo+dSy/y7SKip0qEc3a9 S3ndUoJkoND9tRAUMsvxWPKw7crhcOV8+ibBp+fVcon6DFs8wulftC+9U2uf431HTFln 8FkNLfCBMNRVti15Id0kJFxG8BcGaWyw5D6At++DRrtHLYY5pM8lptnLb08UxuiSudnX hemx0cOk4EZxqtTKxTSSW9Hk2jfHhV/BHwxrBPOuJyR+vuJtb6AGqohQIuvZ8WuSLrYo TTwg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature:dkim-filter; bh=8mve5wKKHLT57E+Sp7ZGGe3P0Plrd/MS1fwKPvtPSt8=; b=llxvlwhKdd9gWOwf3GKoit3ReTrxPNSLjOEiTCxTZktTYDK/A3Yb7r/Qf1wy8YJEBa vb0amIggSYwNrzf5DWJ8B2VwW9dLT7Wy+5ibPXa/CEKJjHIWztppPilLevEx7ql8CpGd BvmN4i0KTfdeFkutzWLgxZt1XBUpOT+8OCJ5ELLMQ4pnmLYzOMLghFalht2STMBLB35m LRuaRkWyhcKBHS1DV7sB7ASKpdZ9qKTICUUc8MjOvmBd38pBJ2uPpNDdl7jCklX1A5Xk IQ3Mz5jD5YxTNQRaCaBuxvqrttT9paGmJFMXnkJc6PCAqFrUai8Fq+SsIEMQc6yOtvcz ywgA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@nifty.com header.s=dec2015msa header.b=LTjHPHS2; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id m21-v6si13154888pgh.167.2018.10.15.20.02.41; Mon, 15 Oct 2018 20:02:41 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@nifty.com header.s=dec2015msa header.b=LTjHPHS2; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727434AbeJPKuq (ORCPT + 32 others); Tue, 16 Oct 2018 06:50:46 -0400 Received: from conuserg-12.nifty.com ([210.131.2.79]:45986 "EHLO conuserg-12.nifty.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726987AbeJPKuq (ORCPT ); Tue, 16 Oct 2018 06:50:46 -0400 Received: from pug.e01.socionext.com (p14092-ipngnfx01kyoto.kyoto.ocn.ne.jp [153.142.97.92]) (authenticated) by conuserg-12.nifty.com with ESMTP id w9G31q7E017707; Tue, 16 Oct 2018 12:01:53 +0900 DKIM-Filter: OpenDKIM Filter v2.10.3 conuserg-12.nifty.com w9G31q7E017707 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nifty.com; s=dec2015msa; t=1539658913; bh=8mve5wKKHLT57E+Sp7ZGGe3P0Plrd/MS1fwKPvtPSt8=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=LTjHPHS2jUAIvbnoEx2x8kABx7XncEYbGUAOSlKcjGjbxYlC7+hSSbuPsGYZAVFaj dsCEglEGxJ5JhAErLe8S1GE0CrKGgUX30kcfs9Nfp/6K3YNVltTBomCJ9Rvwn028rd X8hnZ/WiKodJSUjrT4aCFl/RlcRrr1obzFTQ9nseYFcdQr3CeGLgvZBNQPwX6Cu7XM xM4VTN4vmwtOW5tNy8F0ksR21EMIm6HiNZMaZyjYL1uWCHEekrhr1AQcHXdqS3Mavs nXFG6iq1BgETiRjB2/XKpmfJ2WEvfDmjRT8v2QQQ7E6BYJheMBB8hzWqBGokk0HxDJ orLyuaR2T1YAA== X-Nifty-SrcIP: [153.142.97.92] From: Masahiro Yamada To: Wolfram Sang , linux-i2c@vger.kernel.org Cc: Masahiro Yamada , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH 1/3] i2c: uniphier-f: make driver robust against concurrency Date: Tue, 16 Oct 2018 12:01:47 +0900 Message-Id: <1539658909-26691-2-git-send-email-yamada.masahiro@socionext.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1539658909-26691-1-git-send-email-yamada.masahiro@socionext.com> References: <1539658909-26691-1-git-send-email-yamada.masahiro@socionext.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org This is unlikely to happen, but it is possible for a CPU to enter the interrupt handler just after wait_for_completion_timeout() has expired. If this happens, the hardware is accessed from multiple contexts concurrently. Disable the IRQ after wait_for_completion_timeout(), and do nothing from the handler when the IRQ is disabled. Fixes: 6a62974b667f ("i2c: uniphier_f: add UniPhier FIFO-builtin I2C driver") Signed-off-by: Masahiro Yamada --- drivers/i2c/busses/i2c-uniphier-f.c | 17 ++++++++++++++++- 1 file changed, 16 insertions(+), 1 deletion(-) -- 2.7.4 diff --git a/drivers/i2c/busses/i2c-uniphier-f.c b/drivers/i2c/busses/i2c-uniphier-f.c index a403e85..200dfd1 100644 --- a/drivers/i2c/busses/i2c-uniphier-f.c +++ b/drivers/i2c/busses/i2c-uniphier-f.c @@ -98,6 +98,7 @@ struct uniphier_fi2c_priv { unsigned int flags; unsigned int busy_cnt; unsigned int clk_cycle; + spinlock_t lock; /* IRQ synchronization */ }; static void uniphier_fi2c_fill_txfifo(struct uniphier_fi2c_priv *priv, @@ -162,7 +163,10 @@ static irqreturn_t uniphier_fi2c_interrupt(int irq, void *dev_id) struct uniphier_fi2c_priv *priv = dev_id; u32 irq_status; + spin_lock(&priv->lock); + irq_status = readl(priv->membase + UNIPHIER_FI2C_INT); + irq_status &= priv->enabled_irqs; dev_dbg(&priv->adap.dev, "interrupt: enabled_irqs=%04x, irq_status=%04x\n", @@ -230,6 +234,8 @@ static irqreturn_t uniphier_fi2c_interrupt(int irq, void *dev_id) goto handled; } + spin_unlock(&priv->lock); + return IRQ_NONE; data_done: @@ -246,6 +252,8 @@ static irqreturn_t uniphier_fi2c_interrupt(int irq, void *dev_id) handled: uniphier_fi2c_clear_irqs(priv); + spin_unlock(&priv->lock); + return IRQ_HANDLED; } @@ -311,7 +319,7 @@ static int uniphier_fi2c_master_xfer_one(struct i2c_adapter *adap, { struct uniphier_fi2c_priv *priv = i2c_get_adapdata(adap); bool is_read = msg->flags & I2C_M_RD; - unsigned long time_left; + unsigned long time_left, flags; dev_dbg(&adap->dev, "%s: addr=0x%02x, len=%d, stop=%d\n", is_read ? "receive" : "transmit", msg->addr, msg->len, stop); @@ -342,6 +350,12 @@ static int uniphier_fi2c_master_xfer_one(struct i2c_adapter *adap, priv->membase + UNIPHIER_FI2C_CR); time_left = wait_for_completion_timeout(&priv->comp, adap->timeout); + + spin_lock_irqsave(&priv->lock, flags); + priv->enabled_irqs = 0; + uniphier_fi2c_set_irqs(priv); + spin_unlock_irqrestore(&priv->lock, flags); + if (!time_left) { dev_err(&adap->dev, "transaction timeout.\n"); uniphier_fi2c_recover(priv); @@ -529,6 +543,7 @@ static int uniphier_fi2c_probe(struct platform_device *pdev) priv->clk_cycle = clk_rate / bus_speed; init_completion(&priv->comp); + spin_lock_init(&priv->lock); priv->adap.owner = THIS_MODULE; priv->adap.algo = &uniphier_fi2c_algo; priv->adap.dev.parent = dev; From patchwork Tue Oct 16 03:01:48 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Masahiro Yamada X-Patchwork-Id: 148904 Delivered-To: patch@linaro.org Received: by 2002:a2e:8595:0:0:0:0:0 with SMTP id b21-v6csp4543690lji; Mon, 15 Oct 2018 20:03:03 -0700 (PDT) X-Google-Smtp-Source: ACcGV63oG9afibHlIX7LGe986Yx+OtB6bhvrF7RtWLl0YVpOebKAaQ9BRSmdYVyHCOoOYZ2qoN/h X-Received: by 2002:a17:902:760b:: with SMTP id k11-v6mr19794798pll.103.1539658983768; Mon, 15 Oct 2018 20:03:03 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1539658983; cv=none; d=google.com; s=arc-20160816; b=cmRqweziKiIc61+7bm+KzgiJKYNLNp7a2naWyhI2UmtQolPhXtaL4B0WADSOmIhsBW EQ0ymIfZGfLWBEwTPo+WFDJrsZdTJYzAXLJKn3g4uu83ffeohBF8sgspDPuRLhR/xTkS Tnzb3OSrIUM210dk8Sjf7sG8jtFhZ2t1U3LlNVK2vF2CuHRkJHV31YYczUwpYBKFEc+c I75hK48v8+/voFCbwD8H0aL21OiGmzSxSrdVgm5r6Zt6VVI6dN7QV9rfmck9JY2bw4GZ yfcjWNor/W2mY2Qss9JPBmFnIPUX/EV1SOS21lRRKgPGckJy7+1vsJSTaHyOgmn7rXcq CaNA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature:dkim-filter; bh=0jExx5vDSGpy/qM7ZAif6aEaMMZKi5fc6yONUDddKPc=; b=G+ON0t2+fzXSuJlCIYNCp6i47p8GugmsYsb+o6t2RPoR/2qYSUio6mjm9E/egnGdO0 5TPLaXmAWO1cfrbQOVZFS+s1h3BDwkqfEb0Y0f2DQPCEAt6+iLJr2zhoMMGUO1y7uRV3 u9rNArl4PovjGfEr1cveuj3Gw8psqBK6UErnNxRfBAtyfNA7XNIe0OKph/EL0YYH8zF8 h3nju+kAu5we4kD8wwZVg3RMUl0JWwvUNEk4ewJEZ4FfLA3FBpGy1xo4x7IP0KBwMHim CKZqu5G+YS2EFR7CYmUOrN1eVvjf1mXwGvm0vyMYlPUWjN+0Vpgb8iO0fNffmvSJffru mLNQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@nifty.com header.s=dec2015msa header.b=wFAcg1yh; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id 32-v6si12711702pls.207.2018.10.15.20.03.03; Mon, 15 Oct 2018 20:03:03 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@nifty.com header.s=dec2015msa header.b=wFAcg1yh; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727481AbeJPKvJ (ORCPT + 32 others); Tue, 16 Oct 2018 06:51:09 -0400 Received: from conuserg-12.nifty.com ([210.131.2.79]:45922 "EHLO conuserg-12.nifty.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727360AbeJPKun (ORCPT ); Tue, 16 Oct 2018 06:50:43 -0400 Received: from pug.e01.socionext.com (p14092-ipngnfx01kyoto.kyoto.ocn.ne.jp [153.142.97.92]) (authenticated) by conuserg-12.nifty.com with ESMTP id w9G31q7F017707; Tue, 16 Oct 2018 12:01:53 +0900 DKIM-Filter: OpenDKIM Filter v2.10.3 conuserg-12.nifty.com w9G31q7F017707 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nifty.com; s=dec2015msa; t=1539658914; bh=0jExx5vDSGpy/qM7ZAif6aEaMMZKi5fc6yONUDddKPc=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=wFAcg1yhovR2BD7Pa1BaDM4Iwz5LBV8e8+Scpc+tokw5T1tsVE+y0f4GF3PfuaFYW ALMTN4QAsCTmGD548ePzCImxsg7YQ89yWEEHheqmeByeO9wrq4DPAXBuKFYFCnlyWK 7ezAJf4tV1ttEVMsvIi+vYxuqCDHzBRfK8MrpuLGAtc15d1MNdC1sXPAoqMCw6WZu8 VIyrMhOCHqo0yvFRZqoN1koxjhwQbSOL/5EbbMx41qaQzUxoqGxqT5M396Ly4FGiUU 3mpUrT63Xx7lwxnKKvZJ5o55eFL3gXtPQcefyuhsV7EwbuMQk6KUPDlRJwN6Lovt8E DA/jlMzPRkUyA== X-Nifty-SrcIP: [153.142.97.92] From: Masahiro Yamada To: Wolfram Sang , linux-i2c@vger.kernel.org Cc: Masahiro Yamada , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH 2/3] i2c: uniphier-f: fix occasional timeout error Date: Tue, 16 Oct 2018 12:01:48 +0900 Message-Id: <1539658909-26691-3-git-send-email-yamada.masahiro@socionext.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1539658909-26691-1-git-send-email-yamada.masahiro@socionext.com> References: <1539658909-26691-1-git-send-email-yamada.masahiro@socionext.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Currently, a timeout error could happen at a repeated START condition. For a (non-repeated) START condition, the controller starts sending data when the UNIPHIER_FI2C_CR_STA bit is set. However, for a repeated START condition, the hardware starts running when the slave address is written to the TX FIFO - the write to the UNIPHIER_FI2C_CR register is actually unneeded. Because the hardware is already running before the IRQ is enabled for a repeated START, the driver may miss the IRQ event. In most cases, this problem does not show up since modern CPUs are much faster than the I2C transfer. However, it is still possible that a context switch happens after the controller starts, but before the IRQ register is set up. To fix this, - Do not write UNIPHIER_FI2C_CR for repeated START conditions. - Enable IRQ *before* writing the slave address to the TX FIFO. - Disable IRQ for the current CPU while queuing up the TX FIFO; If the CPU is interrupted by some task, the interrupt handler might be invoked due to the empty TX FIFO before completing the setup. Fixes: 6a62974b667f ("i2c: uniphier_f: add UniPhier FIFO-builtin I2C driver") Signed-off-by: Masahiro Yamada --- drivers/i2c/busses/i2c-uniphier-f.c | 33 +++++++++++++++++++++++++-------- 1 file changed, 25 insertions(+), 8 deletions(-) -- 2.7.4 diff --git a/drivers/i2c/busses/i2c-uniphier-f.c b/drivers/i2c/busses/i2c-uniphier-f.c index 200dfd1..0677153 100644 --- a/drivers/i2c/busses/i2c-uniphier-f.c +++ b/drivers/i2c/busses/i2c-uniphier-f.c @@ -260,6 +260,8 @@ static irqreturn_t uniphier_fi2c_interrupt(int irq, void *dev_id) static void uniphier_fi2c_tx_init(struct uniphier_fi2c_priv *priv, u16 addr) { priv->enabled_irqs |= UNIPHIER_FI2C_INT_TE; + uniphier_fi2c_set_irqs(priv); + /* do not use TX byte counter */ writel(0, priv->membase + UNIPHIER_FI2C_TBC); /* set slave address */ @@ -292,6 +294,8 @@ static void uniphier_fi2c_rx_init(struct uniphier_fi2c_priv *priv, u16 addr) priv->enabled_irqs |= UNIPHIER_FI2C_INT_RF; } + uniphier_fi2c_set_irqs(priv); + /* set slave address with RD bit */ writel(UNIPHIER_FI2C_DTTX_CMD | UNIPHIER_FI2C_DTTX_RD | addr << 1, priv->membase + UNIPHIER_FI2C_DTTX); @@ -315,14 +319,16 @@ static void uniphier_fi2c_recover(struct uniphier_fi2c_priv *priv) } static int uniphier_fi2c_master_xfer_one(struct i2c_adapter *adap, - struct i2c_msg *msg, bool stop) + struct i2c_msg *msg, bool repeat, + bool stop) { struct uniphier_fi2c_priv *priv = i2c_get_adapdata(adap); bool is_read = msg->flags & I2C_M_RD; unsigned long time_left, flags; - dev_dbg(&adap->dev, "%s: addr=0x%02x, len=%d, stop=%d\n", - is_read ? "receive" : "transmit", msg->addr, msg->len, stop); + dev_dbg(&adap->dev, "%s: addr=0x%02x, len=%d, repeat=%d, stop=%d\n", + is_read ? "receive" : "transmit", msg->addr, msg->len, + repeat, stop); priv->len = msg->len; priv->buf = msg->buf; @@ -338,16 +344,24 @@ static int uniphier_fi2c_master_xfer_one(struct i2c_adapter *adap, writel(UNIPHIER_FI2C_RST_TBRST | UNIPHIER_FI2C_RST_RBRST, priv->membase + UNIPHIER_FI2C_RST); /* reset TX/RX FIFO */ + spin_lock_irqsave(&priv->lock, flags); + if (is_read) uniphier_fi2c_rx_init(priv, msg->addr); else uniphier_fi2c_tx_init(priv, msg->addr); - uniphier_fi2c_set_irqs(priv); - dev_dbg(&adap->dev, "start condition\n"); - writel(UNIPHIER_FI2C_CR_MST | UNIPHIER_FI2C_CR_STA, - priv->membase + UNIPHIER_FI2C_CR); + /* + * For a repeated START condition, writing a slave address to the FIFO + * kicks the controller. So, the UNIPHIER_FI2C_CR register should be + * written only for a non-repeated START condition. + */ + if (!repeat) + writel(UNIPHIER_FI2C_CR_MST | UNIPHIER_FI2C_CR_STA, + priv->membase + UNIPHIER_FI2C_CR); + + spin_unlock_irqrestore(&priv->lock, flags); time_left = wait_for_completion_timeout(&priv->comp, adap->timeout); @@ -408,6 +422,7 @@ static int uniphier_fi2c_master_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs, int num) { struct i2c_msg *msg, *emsg = msgs + num; + bool repeat = false; int ret; ret = uniphier_fi2c_check_bus_busy(adap); @@ -418,9 +433,11 @@ static int uniphier_fi2c_master_xfer(struct i2c_adapter *adap, /* Emit STOP if it is the last message or I2C_M_STOP is set. */ bool stop = (msg + 1 == emsg) || (msg->flags & I2C_M_STOP); - ret = uniphier_fi2c_master_xfer_one(adap, msg, stop); + ret = uniphier_fi2c_master_xfer_one(adap, msg, repeat, stop); if (ret) return ret; + + repeat = !stop; } return num; From patchwork Tue Oct 16 03:01:49 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Masahiro Yamada X-Patchwork-Id: 148901 Delivered-To: patch@linaro.org Received: by 2002:a2e:8595:0:0:0:0:0 with SMTP id b21-v6csp4543373lji; Mon, 15 Oct 2018 20:02:38 -0700 (PDT) X-Google-Smtp-Source: ACcGV62pw7x7QezRuZGksjlqOi86AmvwnyFo4eOLQ9szH8hnlC6LggmkV4TgXR4fUnBTSZzW9bpI X-Received: by 2002:a63:ed55:: with SMTP id m21-v6mr18577042pgk.147.1539658958243; Mon, 15 Oct 2018 20:02:38 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1539658958; cv=none; d=google.com; s=arc-20160816; b=H6yEIP0c/j39qbpXjbnfNQnyGoq8h4OFstffitQIaMZh34dlSNselKI61qfMQyygWf rkcc40MM7CBWWW4Gyogwkrumjwn7ddCDvx+IORM8GMacRPFC9nPokPfaJamVXVdzeQ2B MEl76UCpQBCRdFuLQCCv/jDfVYsmmqGogHvNiSE5uAcKyjyhrbvk2Z6muoXrlpjl+CtP lB8MyjyrjtCU01XCixaQyPORqm5Sbijbn+4mQ7JP5I2TIsQDFWJPmxd3abuchU03LO3C UUIIe1DOi3b0Ahq8cYNfTjqbhQz4dSPXSDpNI3te6O44mSAn2pQ0A+vTZrs8lmZzWAcP ra+A== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature:dkim-filter; bh=ZxktTlt0uvBW/TQJyZzElfrrpdv27cPqcb9+fDo0GgM=; b=G7Oaxhjuhknia2ittHQyRsFFg+qK3VCNQWjLmwLEA8kNyDPowTgRop87/ZhuiwuJ5F lF9tytM+YTwcit7+gzD7Vnrao+neGeWBHOibfdHkBbADXx9TXog5JXjPacD7gOHn9tjn GnDaYg4api16BwK1my7iauxGR8da0yI2Zwv18r7Aoi8G3qR/RTT/JzMwsRTipFW+QP2/ 6xJWU/PyvFv63uPm9WmH0AhPWq2cNakqX5yTRoX3GfuAP6ftQDuYB2IA+F41B36NIq77 y5FZ8AJmrgiqNTJPBuFLcFlKbi/GMveHOOvIFd1kVWKEHnpSZZJvy9yd1rcb75cf2n0O za+g== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@nifty.com header.s=dec2015msa header.b="O/pPABwg"; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id d16-v6si12611701pgd.555.2018.10.15.20.02.37; Mon, 15 Oct 2018 20:02:38 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@nifty.com header.s=dec2015msa header.b="O/pPABwg"; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727378AbeJPKun (ORCPT + 32 others); Tue, 16 Oct 2018 06:50:43 -0400 Received: from conuserg-12.nifty.com ([210.131.2.79]:45901 "EHLO conuserg-12.nifty.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726987AbeJPKum (ORCPT ); Tue, 16 Oct 2018 06:50:42 -0400 Received: from pug.e01.socionext.com (p14092-ipngnfx01kyoto.kyoto.ocn.ne.jp [153.142.97.92]) (authenticated) by conuserg-12.nifty.com with ESMTP id w9G31q7G017707; Tue, 16 Oct 2018 12:01:54 +0900 DKIM-Filter: OpenDKIM Filter v2.10.3 conuserg-12.nifty.com w9G31q7G017707 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nifty.com; s=dec2015msa; t=1539658914; bh=ZxktTlt0uvBW/TQJyZzElfrrpdv27cPqcb9+fDo0GgM=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=O/pPABwgfSvRnjkopXRsQUdWzrIAHkbAUdbQNhHlVgefn9NPMp14lL7gsML0hd6Dh ogp+Z4+ChZpj4yBhaPslRuHowITUNaSHhADxeV5d2e4djxo6xteMNDBkqmF8SDRukf wi2PqaWt0gL/aTDm150hvr8UU2fgSx6dfCo7f1GmkHnB1/6PICv+gX4aPUsS3XHUmt Wra/UA89rU4WEC4e1E76jzhe6jSAzX8DZQj7JqW0TMk5iNl55TUatoR/7bGCQpCV7l sy8fbgvRQ6Wzi5NJthgzngpEVLA5mC2LEaz5Vqymm9qVx79ZE26EmXD+8W0CbHR50r zn2Xt7bpNy2Vg== X-Nifty-SrcIP: [153.142.97.92] From: Masahiro Yamada To: Wolfram Sang , linux-i2c@vger.kernel.org Cc: Masahiro Yamada , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH 3/3] i2c: uniphier-f: fix race condition when IRQ is cleared Date: Tue, 16 Oct 2018 12:01:49 +0900 Message-Id: <1539658909-26691-4-git-send-email-yamada.masahiro@socionext.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1539658909-26691-1-git-send-email-yamada.masahiro@socionext.com> References: <1539658909-26691-1-git-send-email-yamada.masahiro@socionext.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The current IRQ handler clears all the IRQ status bits when it bails out. This is dangerous because it might clear away the status bits that have just been set while processing the current handler. If this happens, the IRQ event for the latest transfer is lost forever. The IRQ status bits must be cleared *before* the next transfer is kicked. Fixes: 6a62974b667f ("i2c: uniphier_f: add UniPhier FIFO-builtin I2C driver") Signed-off-by: Masahiro Yamada --- drivers/i2c/busses/i2c-uniphier-f.c | 11 ++++++----- 1 file changed, 6 insertions(+), 5 deletions(-) -- 2.7.4 diff --git a/drivers/i2c/busses/i2c-uniphier-f.c b/drivers/i2c/busses/i2c-uniphier-f.c index 0677153..dd38474 100644 --- a/drivers/i2c/busses/i2c-uniphier-f.c +++ b/drivers/i2c/busses/i2c-uniphier-f.c @@ -143,9 +143,10 @@ static void uniphier_fi2c_set_irqs(struct uniphier_fi2c_priv *priv) writel(priv->enabled_irqs, priv->membase + UNIPHIER_FI2C_IE); } -static void uniphier_fi2c_clear_irqs(struct uniphier_fi2c_priv *priv) +static void uniphier_fi2c_clear_irqs(struct uniphier_fi2c_priv *priv, + u32 mask) { - writel(-1, priv->membase + UNIPHIER_FI2C_IC); + writel(mask, priv->membase + UNIPHIER_FI2C_IC); } static void uniphier_fi2c_stop(struct uniphier_fi2c_priv *priv) @@ -172,6 +173,8 @@ static irqreturn_t uniphier_fi2c_interrupt(int irq, void *dev_id) "interrupt: enabled_irqs=%04x, irq_status=%04x\n", priv->enabled_irqs, irq_status); + uniphier_fi2c_clear_irqs(priv, irq_status); + if (irq_status & UNIPHIER_FI2C_INT_STOP) goto complete; @@ -250,8 +253,6 @@ static irqreturn_t uniphier_fi2c_interrupt(int irq, void *dev_id) } handled: - uniphier_fi2c_clear_irqs(priv); - spin_unlock(&priv->lock); return IRQ_HANDLED; @@ -340,7 +341,7 @@ static int uniphier_fi2c_master_xfer_one(struct i2c_adapter *adap, priv->flags |= UNIPHIER_FI2C_STOP; reinit_completion(&priv->comp); - uniphier_fi2c_clear_irqs(priv); + uniphier_fi2c_clear_irqs(priv, U32_MAX); writel(UNIPHIER_FI2C_RST_TBRST | UNIPHIER_FI2C_RST_RBRST, priv->membase + UNIPHIER_FI2C_RST); /* reset TX/RX FIFO */