From patchwork Sat Aug 28 14:02:02 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nicolas Frattaroli X-Patchwork-Id: 503823 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.7 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4222FC432BE for ; Sat, 28 Aug 2021 14:02:36 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 21F1B60ED3 for ; Sat, 28 Aug 2021 14:02:36 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234365AbhH1ODZ (ORCPT ); Sat, 28 Aug 2021 10:03:25 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:53888 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234389AbhH1ODY (ORCPT ); Sat, 28 Aug 2021 10:03:24 -0400 Received: from mail-ed1-x531.google.com (mail-ed1-x531.google.com [IPv6:2a00:1450:4864:20::531]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 231E5C061756; Sat, 28 Aug 2021 07:02:34 -0700 (PDT) Received: by mail-ed1-x531.google.com with SMTP id dm15so14262484edb.10; Sat, 28 Aug 2021 07:02:34 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=/HwvasmqWTeaBN7HIdpoZgoqAcwnUTfnLYi+w6FCWyc=; b=LiBbEEI49LqvFweuIGCWs+mxPZLxlpGk4gcL0Lt0mj4+xLGCzNBhqO90Mn2sp8O8dE B3562wA0y0ddaoqc7nLkEVE3g0xTz144MhYgfApp6QIJf9Nm8rjEe75W1YsFgNoOfhKm ti85tkUk6+1C6ADu1F19urVsrUm11rV6B0gXy54XtW5MSnsgXaXPVaycRMv+WO4hU4I7 d3UzCpcKbYZ3jXiMWUlzijoA7r0UYOki8CVX+4VOqZnBRwlPvYoSvUksNCejfVvavAKP +XpdeTSSPXDOZxJ59kvNoUSWsh/SfKemLX0VixN10GKYzhitxU+jbXlWvPrYo5B2pX73 hZUg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=/HwvasmqWTeaBN7HIdpoZgoqAcwnUTfnLYi+w6FCWyc=; b=hvVOv7LOmexnorknZp649rERnyBMlhFstJWpQv12gA4J2S3tSt1f2CnWQ4Jv0LB7xn jgoiP+AEKidp3EqvGd+8cy+aPqKVWudLHyq9qQ5hKBEEW9kPjS/Lxxpi7OWT9DdK8V3a PBDqToq9ssEMpGxZZzcqNorQ8/KbGGcjoU0VvlmwG+5Xd14aPhTpJ3x58Ta8Pt9WEJ1c +CBjubD3y2qi53p4HXmSD18cyy1iK5PgErvoSCAB0ychNL/9wwLtmFLqQh7QPbgP0EDd u8hMDzj9TVcRjRIjvWBxqxpQmbodzs10sweWZxjeoPnX7ssHpM3b8dAGhH+zOJPg4st8 XIsA== X-Gm-Message-State: AOAM533O7uhlnhneS4W+WhAkpH6ANoy7xVg1qT22Ymczb8LNC/x3wP2T qGWvtayR1tJzbBY0DfrGCes= X-Google-Smtp-Source: ABdhPJzH3S+Y3NHfuXZM5Ir87DyKg2zfCCWNg5KaxMNUIgRuMqbXx3RlYDhall/te3ioSxFZCUUVSQ== X-Received: by 2002:a50:eb95:: with SMTP id y21mr3138318edr.139.1630159352639; Sat, 28 Aug 2021 07:02:32 -0700 (PDT) Received: from localhost.localdomain (84-72-105-84.dclient.hispeed.ch. [84.72.105.84]) by smtp.gmail.com with ESMTPSA id cn16sm4953982edb.87.2021.08.28.07.02.31 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 28 Aug 2021 07:02:32 -0700 (PDT) From: Nicolas Frattaroli To: Nicolas Frattaroli , Liam Girdwood , Mark Brown , Rob Herring , Heiko Stuebner Cc: linux-rockchip@lists.infradead.org, alsa-devel@alsa-project.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v3 2/4] dt-bindings: sound: add rockchip i2s-tdm binding Date: Sat, 28 Aug 2021 16:02:02 +0200 Message-Id: <20210828140205.21973-3-frattaroli.nicolas@gmail.com> X-Mailer: git-send-email 2.33.0 In-Reply-To: <20210828140205.21973-1-frattaroli.nicolas@gmail.com> References: <20210828140205.21973-1-frattaroli.nicolas@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org This adds the YAML bindings for the Rockchip I2S/TDM audio driver. Signed-off-by: Nicolas Frattaroli --- .../bindings/sound/rockchip,i2s-tdm.yaml | 218 ++++++++++++++++++ MAINTAINERS | 1 + 2 files changed, 219 insertions(+) create mode 100644 Documentation/devicetree/bindings/sound/rockchip,i2s-tdm.yaml diff --git a/Documentation/devicetree/bindings/sound/rockchip,i2s-tdm.yaml b/Documentation/devicetree/bindings/sound/rockchip,i2s-tdm.yaml new file mode 100644 index 000000000000..ab8731779805 --- /dev/null +++ b/Documentation/devicetree/bindings/sound/rockchip,i2s-tdm.yaml @@ -0,0 +1,218 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/sound/rockchip,i2s-tdm.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Rockchip I2S/TDM Controller + +description: + The Rockchip I2S/TDM Controller is a Time Division Multiplexed + audio interface found in various Rockchip SoCs, allowing up + to 8 channels of audio over a serial interface. + +maintainers: + - Nicolas Frattaroli + +properties: + compatible: + enum: + - rockchip,px30-i2s-tdm + - rockchip,rk1808-i2s-tdm + - rockchip,rk3308-i2s-tdm + - rockchip,rk3568-i2s-tdm + - rockchip,rv1126-i2s-tdm + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + dmas: + minItems: 1 + maxItems: 2 + + dma-names: + minItems: 1 + maxItems: 2 + items: + enum: + - rx + - tx + + clocks: + minItems: 3 + items: + - description: clock for TX + - description: clock for RX + - description: AHB clock driving the interface + - description: + Parent clock for mclk_tx (only required when using mclk-calibrate) + - description: + Parent clock for mclk_rx (only required when using mclk-calibrate) + - description: + Clock for sample rates that are an integer multiple of 8000 + (only required when using mclk-calibrate) + - description: + Clock for sample rates that are an integer multiple of 11025 + (only required when using mclk-calibrate) + + clock-names: + minItems: 3 + items: + - const: mclk_tx + - const: mclk_rx + - const: hclk + - const: mclk_tx_src + - const: mclk_rx_src + - const: mclk_root0 + - const: mclk_root1 + + rockchip,frame-width: + $ref: /schemas/types.yaml#/definitions/uint32 + default: 64 + minimum: 32 + maximum: 512 + description: + Width of a frame, usually slot width multiplied by number of slots. + Must be even. + + resets: + items: + - description: reset for TX + - description: reset for RX + + reset-names: + items: + - const: tx-m + - const: rx-m + + rockchip,cru: + $ref: /schemas/types.yaml#/definitions/phandle + description: + The phandle of the cru. + Required if neither trcm-sync-tx-only nor trcm-sync-rx-only are specified. + + rockchip,grf: + $ref: /schemas/types.yaml#/definitions/phandle + description: + The phandle of the syscon node for the GRF register. + + rockchip,mclk-calibrate: + description: + Switch between two root clocks depending on the audio sample rate. + For integer multiples of 8000 (e.g. 48000 Hz), mclk_root0 is used. + For integer multiples of 11025 (e.g. 44100 Hz), mclk_root1 is used. + type: boolean + + rockchip,trcm-sync-tx-only: + type: boolean + description: Use TX BCLK/LRCK for both TX and RX. + + rockchip,trcm-sync-rx-only: + type: boolean + description: Use RX BCLK/LRCK for both TX and RX. + + "#sound-dai-cells": + const: 0 + + rockchip,i2s-rx-route: + $ref: /schemas/types.yaml#/definitions/uint32-array + description: + Defines the mapping of I2S RX sdis to I2S data bus lines. + By default, they are mapped one-to-one. + items: + - description: which sdi to connect to data line 0 + - description: which sdi to connect to data line 1 + - description: which sdi to connect to data line 2 + - description: which sdi to connect to data line 3 + + rockchip,i2s-tx-route: + $ref: /schemas/types.yaml#/definitions/uint32-array + description: + Defines the mapping of I2S TX sdos to I2S data bus lines. + By default, they are mapped one-to-one. + items: + - description: which sdo to connect to data line 0 + - description: which sdo to connect to data line 1 + - description: which sdo to connect to data line 2 + - description: which sdo to connect to data line 3 + + rockchip,tdm-fsync-half-frame: + description: Whether to use half frame fsync. + type: boolean + + rockchip,io-multiplex: + description: + Specify that the GPIO lines on the I2S bus are multiplexed such that + the direction (input/output) needs to be dynamically adjusted. + type: boolean + + +required: + - compatible + - reg + - interrupts + - dmas + - dma-names + - clocks + - clock-names + - resets + - reset-names + - rockchip,grf + - "#sound-dai-cells" + +allOf: + - if: + properties: + rockchip,trcm-sync-tx-only: false + rockchip,trcm-sync-rx-only: false + then: + required: + - rockchip,cru + +additionalProperties: false + +examples: + - | + #include + #include + #include + #include + + foo { + #address-cells = <2>; + #size-cells = <2>; + i2s@fe410000 { + compatible = "rockchip,rk3568-i2s-tdm"; + reg = <0x0 0xfe410000 0x0 0x1000>; + interrupts = ; + clocks = <&cru MCLK_I2S1_8CH_TX>, <&cru MCLK_I2S1_8CH_RX>, + <&cru HCLK_I2S1_8CH>; + clock-names = "mclk_tx", "mclk_rx", "hclk"; + dmas = <&dmac1 3>, <&dmac1 2>; + dma-names = "rx", "tx"; + resets = <&cru SRST_M_I2S1_8CH_TX>, <&cru SRST_M_I2S1_8CH_RX>; + reset-names = "tx-m", "rx-m"; + rockchip,trcm-sync-tx-only; + rockchip,cru = <&cru>; + rockchip,grf = <&grf>; + #sound-dai-cells = <0>; + pinctrl-names = "default"; + pinctrl-0 = + <&i2s1m0_sclktx + &i2s1m0_sclkrx + &i2s1m0_lrcktx + &i2s1m0_lrckrx + &i2s1m0_sdi0 + &i2s1m0_sdi1 + &i2s1m0_sdi2 + &i2s1m0_sdi3 + &i2s1m0_sdo0 + &i2s1m0_sdo1 + &i2s1m0_sdo2 + &i2s1m0_sdo3>; + status = "okay"; + }; + }; diff --git a/MAINTAINERS b/MAINTAINERS index 5d459d42672c..d2be16a85009 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -16053,6 +16053,7 @@ ROCKCHIP I2S TDM DRIVER M: Nicolas Frattaroli L: linux-rockchip@lists.infradead.org S: Maintained +F: Documentation/devicetree/bindings/sound/rockchip,i2s-tdm.yaml F: sound/soc/rockchip/rockchip_i2s_tdm.* ROCKCHIP ISP V1 DRIVER From patchwork Sat Aug 28 14:02:04 2021 Content-Type: text/plain; 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[84.72.105.84]) by smtp.gmail.com with ESMTPSA id cn16sm4953982edb.87.2021.08.28.07.02.41 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 28 Aug 2021 07:02:41 -0700 (PDT) From: Nicolas Frattaroli To: Rob Herring , Heiko Stuebner Cc: Nicolas Frattaroli , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v3 4/4] arm64: dts: rockchip: add analog audio on Quartz64 Date: Sat, 28 Aug 2021 16:02:04 +0200 Message-Id: <20210828140205.21973-5-frattaroli.nicolas@gmail.com> X-Mailer: git-send-email 2.33.0 In-Reply-To: <20210828140205.21973-1-frattaroli.nicolas@gmail.com> References: <20210828140205.21973-1-frattaroli.nicolas@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org On the Quartz64 Model A, the I2S1 TDM controller is connected to the rk817 codec in I2S mode. Enabling it and adding the necessary simple-sound-card and codec nodes allows for analog audio output on the PINE64 Quartz64 Model A SBC. Signed-off-by: Nicolas Frattaroli --- .../boot/dts/rockchip/rk3566-quartz64-a.dts | 35 ++++++++++++++++++- 1 file changed, 34 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts b/arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts index b239f314b38a..c974b0e22ac0 100644 --- a/arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts +++ b/arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts @@ -50,6 +50,20 @@ led-diy { }; }; + rk817-sound { + compatible = "simple-audio-card"; + simple-audio-card,format = "i2s"; + simple-audio-card,name = "Analog RK817"; + simple-audio-card,mclk-fs = <256>; + + simple-audio-card,cpu { + sound-dai = <&i2s1_8ch>; + }; + simple-audio-card,codec { + sound-dai = <&rk817>; + }; + }; + vcc12v_dcin: vcc12v_dcin { compatible = "regulator-fixed"; regulator-name = "vcc12v_dcin"; @@ -174,8 +188,13 @@ rk817: pmic@20 { interrupts = ; clock-output-names = "rk808-clkout1", "rk808-clkout2"; + #sound-dai-cells = <0>; + clock-names = "mclk"; + clocks = <&cru I2S1_MCLKOUT_TX>; + assigned-clocks = <&cru I2S1_MCLKOUT_TX>; + assigned-clock-parents = <&cru CLK_I2S1_8CH_TX>; pinctrl-names = "default"; - pinctrl-0 = <&pmic_int_l>; + pinctrl-0 = <&pmic_int_l>, <&i2s1m0_mclk>; rockchip,system-power-controller; wakeup-source; #clock-cells = <1>; @@ -364,9 +383,23 @@ regulator-state-mem { }; }; }; + + rk817_codec: codec { + }; + }; }; +&i2s1_8ch { + status = "okay"; + rockchip,trcm-sync-tx-only; + pinctrl-names = "default"; + pinctrl-0 = <&i2s1m0_sclktx + &i2s1m0_lrcktx + &i2s1m0_sdi0 + &i2s1m0_sdo0>; +}; + &mdio1 { rgmii_phy1: ethernet-phy@0 { compatible = "ethernet-phy-ieee802.3-c22";