From patchwork Fri Aug 27 13:11:50 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rui Miguel Silva X-Patchwork-Id: 503398 Delivered-To: patch@linaro.org Received: by 2002:a02:6f15:0:0:0:0:0 with SMTP id x21csp1254162jab; Fri, 27 Aug 2021 06:12:17 -0700 (PDT) X-Google-Smtp-Source: ABdhPJy5gCorXUFLlp0WBloaUyH3Q9cIHMVAkWVhBhfU0rqu+WCU2tuKs6buIZSmg8Ojc15wh7uT X-Received: by 2002:a92:d646:: with SMTP id x6mr6685266ilp.280.1630069937236; Fri, 27 Aug 2021 06:12:17 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1630069937; cv=none; d=google.com; s=arc-20160816; b=Er5OAjIviiIQiPj+px6VXkPwtFqlhAWz8gCLOTjOF4V4vEjaq2HSctQ+95Z0gEtz6S ZeMEhyb8PoYuFVXlHmmsO5KObWtfpRg0BpKbfGzJlmzasDSoEPa2ILz6JKeFGX/CPfz+ qynKUfcpqTOBWkhJPGdXS4Fm/99dHBJaGhw+PTp1bg0ScqObZ3D/137IlroHDLTVk/nY wJGUSBpOT1CU3C1HwXGXrAEKJ+hSsiuNySRQutfAYXbR3S8ET6LbquGQJWuZ1MxSe70v pIKfbNl3KaLpUMzpu/tIWCK/v4goz9fL71MWnv3iJ/mAQ3cABdziVmnKI5zrD8fwV7JH RcLg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=bx8Arm/Vs5CpHd4yeLjhHeHRFARmgA3I8g7M84xbgA4=; b=znVdVclFF/BkLh4xrBrIhSLZWXlHQENXKm2TWPSiUq6918c19CoeNRSVaxtnJsQ22v IptdaycAmjZJmeAS3FyOuksHCnn0MBnzuL5aGf7hAfGPE9FsVatShlizBl1rdGfQgo+n Q13W9TMhGibRsHDK4H9zO1ThmBjd1ilZBUjYe9p5+VIUiDWTPfd9V2+eMGFfuobPWc6q 82l+7fjhRTbTF0l6qrizDpTB6AU+kykJF5TQLryPAbUcQzSCT3tDjnakez88VYQjHDk7 9nJExqD4o55MTLXWxCgdXBqnRthpduq1Qw/xKOg/0YkXaSt8YZMQ9+Ul6UlHR3/0su3b YODg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=JllIXhxf; spf=pass (google.com: domain of linux-usb-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-usb-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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[109.49.46.234]) by smtp.gmail.com with ESMTPSA id c7sm5279349wmq.13.2021.08.27.06.12.09 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 27 Aug 2021 06:12:09 -0700 (PDT) From: Rui Miguel Silva To: Greg Kroah-Hartman , Dietmar Eggemann Cc: linux-usb@vger.kernel.org, Rui Miguel Silva Subject: [PATCH v2 1/5] usb: isp1760: fix memory pool initialization Date: Fri, 27 Aug 2021 14:11:50 +0100 Message-Id: <20210827131154.4151862-2-rui.silva@linaro.org> X-Mailer: git-send-email 2.33.0 In-Reply-To: <20210827131154.4151862-1-rui.silva@linaro.org> References: <20210827131154.4151862-1-rui.silva@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-usb@vger.kernel.org The loops to setup the memory pool were skipping some blocks, that was not visible on the ISP1763 because it has fewer blocks than the ISP1761. But won testing on that IP from the family that would be an issue. Reported-by: Dietmar Eggemann Signed-off-by: Rui Miguel Silva Tested-by: Dietmar Eggemann --- drivers/usb/isp1760/isp1760-hcd.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) -- 2.33.0 diff --git a/drivers/usb/isp1760/isp1760-hcd.c b/drivers/usb/isp1760/isp1760-hcd.c index bf8ab3fe2e5a..b3a55c5d2155 100644 --- a/drivers/usb/isp1760/isp1760-hcd.c +++ b/drivers/usb/isp1760/isp1760-hcd.c @@ -588,8 +588,8 @@ static void init_memory(struct isp1760_hcd *priv) payload_addr = PAYLOAD_OFFSET; - for (i = 0, curr = 0; i < ARRAY_SIZE(mem->blocks); i++) { - for (j = 0; j < mem->blocks[i]; j++, curr++) { + for (i = 0, curr = 0; i < ARRAY_SIZE(mem->blocks); i++, curr += j) { + for (j = 0; j < mem->blocks[i]; j++) { priv->memory_pool[curr + j].start = payload_addr; priv->memory_pool[curr + j].size = mem->blocks_size[i]; priv->memory_pool[curr + j].free = 1; From patchwork Fri Aug 27 13:11:51 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rui Miguel Silva X-Patchwork-Id: 503399 Delivered-To: patch@linaro.org Received: by 2002:a02:6f15:0:0:0:0:0 with SMTP id x21csp1254174jab; Fri, 27 Aug 2021 06:12:18 -0700 (PDT) X-Google-Smtp-Source: ABdhPJwIWWcy5IQufm4uFfXZhn7mfCUgnbwjsS4v1ywDaG0M0GM16Z7c28V/7nsP5R8hG3cDTmMq X-Received: by 2002:a92:3f06:: with SMTP id m6mr6962772ila.182.1630069937930; Fri, 27 Aug 2021 06:12:17 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1630069937; cv=none; d=google.com; s=arc-20160816; b=Umu8EWYMJ7cMphSfNOkbUWMyf5HAuvUrZJBSLuWr00pVrrQZonpPRNGb+bYgLdMmpU Ff4BWH8THm+dhkI3cASmFvzP/DEk/H05OMQXRJf8WUKdG481ebNcPfVpfJHY2nwn/a5c jpgPm4aq8KoC0gGhtUlhswEmgo5AVdWYCCB5rni0qS+jXGnap6Tihe+boBTX063AiRmf JROffJsihz/RownQEMWjfCIVsIX+ia6KJ2vKw206JZ4VhquCy5W+h9Tt0IWI2MXkRrlH p419Ugt6YhkeJcZXDdNgYq2cdFU0h8pRJ235piayvxQJV6VFV+JRYGBtvw1ih7HS55MX 6okw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=Y607GohRHj140++t/bVDBujNiOGNimlRlENuyUmlv6A=; b=uQ2Z3cMXqL1L//YI0656DehfoLWPI5CvBgFOHy80tTg8296VcBlsnKgCfdG8DFlgPQ BBxS4+WOGVFBiKwkZjvNflNxE54Un3KWPhkY2Bwyc0H6BCbAUZeKb48x7zy9lx1Pvxl6 2VhK0+ywCWb4JcPRsGs8+VixYxPea8AjT7iGEGGYIcRKgQU9K1utRGlsMZINnemUM3Ub aPgl7Z13o0p+z42Ruuj/JBGakfThu1mngp0x9nYfW0E8rTDYteo8GemWU8GVk/mWaCxZ 5q8Pm3oXI93xYNJxZ1mQdt+znoEA7jkZAM2w3Vfo+eNQQAjj0N5wZB/JexywGqRriBHY xROw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=C7nHbTlL; spf=pass (google.com: domain of linux-usb-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-usb-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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[109.49.46.234]) by smtp.gmail.com with ESMTPSA id c7sm5279349wmq.13.2021.08.27.06.12.12 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 27 Aug 2021 06:12:12 -0700 (PDT) From: Rui Miguel Silva To: Greg Kroah-Hartman , Dietmar Eggemann Cc: linux-usb@vger.kernel.org, Rui Miguel Silva Subject: [PATCH v2 2/5] usb: isp1760: fix qtd fill length Date: Fri, 27 Aug 2021 14:11:51 +0100 Message-Id: <20210827131154.4151862-3-rui.silva@linaro.org> X-Mailer: git-send-email 2.33.0 In-Reply-To: <20210827131154.4151862-1-rui.silva@linaro.org> References: <20210827131154.4151862-1-rui.silva@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-usb@vger.kernel.org When trying to send bulks bigger than the biggest block size we need to split them over several qtd. Fix this limiting the maximum qtd size to largest block size. Reported-by: Dietmar Eggemann Signed-off-by: Rui Miguel Silva Tested-by: Dietmar Eggemann --- drivers/usb/isp1760/isp1760-hcd.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) -- 2.33.0 diff --git a/drivers/usb/isp1760/isp1760-hcd.c b/drivers/usb/isp1760/isp1760-hcd.c index b3a55c5d2155..fba21122bb00 100644 --- a/drivers/usb/isp1760/isp1760-hcd.c +++ b/drivers/usb/isp1760/isp1760-hcd.c @@ -1829,9 +1829,11 @@ static void packetize_urb(struct usb_hcd *hcd, goto cleanup; if (len > mem->blocks_size[ISP176x_BLOCK_NUM - 1]) - len = mem->blocks_size[ISP176x_BLOCK_NUM - 1]; + this_qtd_len = mem->blocks_size[ISP176x_BLOCK_NUM - 1]; + else + this_qtd_len = len; - this_qtd_len = qtd_fill(qtd, buf, len); + this_qtd_len = qtd_fill(qtd, buf, this_qtd_len); list_add_tail(&qtd->qtd_list, head); len -= this_qtd_len; From patchwork Fri Aug 27 13:11:52 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rui Miguel Silva X-Patchwork-Id: 503400 Delivered-To: patch@linaro.org Received: by 2002:a02:6f15:0:0:0:0:0 with SMTP id x21csp1254192jab; Fri, 27 Aug 2021 06:12:18 -0700 (PDT) X-Google-Smtp-Source: ABdhPJx1DarQO25/+AEyYYS48Z8+1KAhxQqh3tzki4LcC1weaTbl358DNkdIONP8y+Pi0znGp/cw X-Received: by 2002:a05:6638:2384:: with SMTP id q4mr8105351jat.54.1630069938708; Fri, 27 Aug 2021 06:12:18 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1630069938; cv=none; d=google.com; s=arc-20160816; b=CYl9tjd7TfS4IV+WL0/70fqtSsMdZJRLT4ziVfShyssJtIqorSXbe89pLaQNyk8LOg XjeaBfB6Ux1kx1pyLKIBjAKsXpH62e869BMMRztDAnKQ+wPDaYz9U9oNMryn20rr8pPW JcPIPljiV2CAShZgqHA8VITewvxyGkH7v6ZqCZWLvflcQjuZcg0NQTyIgThFob2sPV6U YejokRH2h+pFbbp//6iufv9qfrFwkmQoukrYfzdqaLhAA+7eFcBN0v5lswxOOjTDLOF4 WjpXIJpjae1qMiyqpNpjJX7UX3fyTnaylYHi4l4WQg6lcbUFXjU8hOLbLS0DqN/gFsua g/7Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=V0J3NHw/qq4gMRkEFJJLpm8VQ/DzEM7Z7FaIoqZdQD4=; b=kQGCKuSVNN59oP/Mhi0NbCMTNhFah9rdoseodc5FG4ZjKQIafQdvQhnIOxsgzefZt2 5uhwFAjrNPo5c52gHS4tR2beQk0YZ+3QRenZCQ9GjD23iN/6F8eOJeB40HJvWkMPhVVE /NNd+r4dMsBwNuGT+512iAYjJ01ML0E39Jox2qAGogqURntHHKoJ4jz2F1gOa8+ynx7f QFRaBAKPogg8EjE3xhhLYRuJJT0C+xsyXss/1iIFEHQKbaQ11izvE6YAJjOS6w3JHYdR yJI/wx3x44ARJie1942JsR+0qqYArjwYtatx9gx5OP0/Ftn6NvpdeGuXEU3r32w+vM7I 3QCA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=pJySKRul; spf=pass (google.com: domain of linux-usb-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-usb-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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[109.49.46.234]) by smtp.gmail.com with ESMTPSA id c7sm5279349wmq.13.2021.08.27.06.12.14 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 27 Aug 2021 06:12:14 -0700 (PDT) From: Rui Miguel Silva To: Greg Kroah-Hartman , Dietmar Eggemann Cc: linux-usb@vger.kernel.org, Rui Miguel Silva Subject: [PATCH v2 3/5] usb: isp1760: write to status and address register Date: Fri, 27 Aug 2021 14:11:52 +0100 Message-Id: <20210827131154.4151862-4-rui.silva@linaro.org> X-Mailer: git-send-email 2.33.0 In-Reply-To: <20210827131154.4151862-1-rui.silva@linaro.org> References: <20210827131154.4151862-1-rui.silva@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-usb@vger.kernel.org We were already writing directly the port status register to trigger changes in isp1763. The same is needed in other IP from the family, including also to setup the read address before reading from device. Reported-by: Dietmar Eggemann Signed-off-by: Rui Miguel Silva Tested-by: Dietmar Eggemann --- drivers/usb/isp1760/isp1760-hcd.c | 23 +++++++++++------------ 1 file changed, 11 insertions(+), 12 deletions(-) -- 2.33.0 diff --git a/drivers/usb/isp1760/isp1760-hcd.c b/drivers/usb/isp1760/isp1760-hcd.c index fba21122bb00..79d571f1429b 100644 --- a/drivers/usb/isp1760/isp1760-hcd.c +++ b/drivers/usb/isp1760/isp1760-hcd.c @@ -182,7 +182,7 @@ struct urb_listitem { struct urb *urb; }; -static const u32 isp1763_hc_portsc1_fields[] = { +static const u32 isp176x_hc_portsc1_fields[] = { [PORT_OWNER] = BIT(13), [PORT_POWER] = BIT(12), [PORT_LSTATUS] = BIT(10), @@ -205,27 +205,28 @@ static u32 isp1760_hcd_read(struct usb_hcd *hcd, u32 field) } /* - * We need, in isp1763, to write directly the values to the portsc1 + * We need, in isp176x, to write directly the values to the portsc1 * register so it will make the other values to trigger. */ static void isp1760_hcd_portsc1_set_clear(struct isp1760_hcd *priv, u32 field, u32 val) { - u32 bit = isp1763_hc_portsc1_fields[field]; - u32 port_status = readl(priv->base + ISP1763_HC_PORTSC1); + u32 bit = isp176x_hc_portsc1_fields[field]; + u16 portsc1_reg = priv->is_isp1763 ? ISP1763_HC_PORTSC1 : + ISP176x_HC_PORTSC1; + u32 port_status = readl(priv->base + portsc1_reg); if (val) - writel(port_status | bit, priv->base + ISP1763_HC_PORTSC1); + writel(port_status | bit, priv->base + portsc1_reg); else - writel(port_status & ~bit, priv->base + ISP1763_HC_PORTSC1); + writel(port_status & ~bit, priv->base + portsc1_reg); } static void isp1760_hcd_write(struct usb_hcd *hcd, u32 field, u32 val) { struct isp1760_hcd *priv = hcd_to_priv(hcd); - if (unlikely(priv->is_isp1763 && - (field >= PORT_OWNER && field <= PORT_CONNECT))) + if (unlikely((field >= PORT_OWNER && field <= PORT_CONNECT))) return isp1760_hcd_portsc1_set_clear(priv, field, val); isp1760_field_write(priv->fields, field, val); @@ -367,8 +368,7 @@ static void isp1760_mem_read(struct usb_hcd *hcd, u32 src_offset, void *dst, { struct isp1760_hcd *priv = hcd_to_priv(hcd); - isp1760_hcd_write(hcd, MEM_BANK_SEL, ISP_BANK_0); - isp1760_hcd_write(hcd, MEM_START_ADDR, src_offset); + isp1760_reg_write(priv->regs, ISP176x_HC_MEMORY, src_offset); ndelay(100); bank_reads8(priv->base, src_offset, ISP_BANK_0, dst, bytes); @@ -496,8 +496,7 @@ static void isp1760_ptd_read(struct usb_hcd *hcd, u32 ptd_offset, u32 slot, u16 src_offset = ptd_offset + slot * sizeof(*ptd); struct isp1760_hcd *priv = hcd_to_priv(hcd); - isp1760_hcd_write(hcd, MEM_BANK_SEL, ISP_BANK_0); - isp1760_hcd_write(hcd, MEM_START_ADDR, src_offset); + isp1760_reg_write(priv->regs, ISP176x_HC_MEMORY, src_offset); ndelay(90); bank_reads8(priv->base, src_offset, ISP_BANK_0, (void *)ptd, From patchwork Fri Aug 27 13:11:53 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rui Miguel Silva X-Patchwork-Id: 503401 Delivered-To: patch@linaro.org Received: by 2002:a02:6f15:0:0:0:0:0 with SMTP id x21csp1254203jab; Fri, 27 Aug 2021 06:12:19 -0700 (PDT) X-Google-Smtp-Source: ABdhPJyo3PvAAXwCBfthO3RZ05P8DCF7M0pgnkMagAo9Sefg5jnF2IS/0lvR/dmd0l+S3dzZLH/7 X-Received: by 2002:a05:6638:d1:: with SMTP id w17mr4547575jao.33.1630069939379; Fri, 27 Aug 2021 06:12:19 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1630069939; cv=none; d=google.com; s=arc-20160816; b=HS0OBjWYH7gYiFfTinqwffeyxgMIibZvM1s4fclDu7SeFnRcvJUIRP311du3uQmSqp HQ7towZIhjmP8OSaWcMSDx5h/AcjXfAmc69p0b5un0mJL5JNZUwu+dmKCpve44NcHn5f t8+sO8lsOvCG4X5gYwm9qFlErGpnG81tfQiQTnjdsjEoKKfUexcK6ZoF8TuXKBjppHlv 5TkgAzs4jgitUDcq3wfEIvk2SXJyQ8aEMCgNEiVxg/3Do2GALgeTWFqk0Bw4GtMYOs6R QFs1PCWPw6qvL0MmfBPHnGw9AVN1wQI80S/9ltnxNfYhVEn2qq43DoDHBQYSNv12oQLA jybA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=JhkbsWN6yF+zzjQkKyGIO7BRErUtHsxjPq+kPs7GZWc=; b=ZTWzXI1VJ4mkVeKd5nWoPsOmD+rUUfF8Ed3X+lhy1+AgGxyDUGuQwT28mLKo90CPJS 2PagHczZ2GYpXSnIX8WyKzKagZdoPblvjQSdRtW9aSmNNdEEunjyCRxpXW+Ktu8U8OMK rUU9pGgPSFBkQ6LaR6yND0Fi4JvDuCjQVTBbRbJy+yFwbbWh3uRgay2MBsoDWYWRVsHe gsI3uZ7o0FmRxc/ojeAtA/h3HjLfm7E13K6RLBueJt1PiZTLAeofW9WzZbuOozszLYhK XCAalje8TgOdD4S6EehptF48XXXYvFZ6O6xrTKlR+Io2wAq4sgVt0LLE3xeUS03px0Kt yd3w== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=Jh73rVA7; spf=pass (google.com: domain of linux-usb-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-usb-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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[109.49.46.234]) by smtp.gmail.com with ESMTPSA id c7sm5279349wmq.13.2021.08.27.06.12.15 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 27 Aug 2021 06:12:15 -0700 (PDT) From: Rui Miguel Silva To: Greg Kroah-Hartman , Dietmar Eggemann Cc: linux-usb@vger.kernel.org, Rui Miguel Silva Subject: [PATCH v2 4/5] usb: isp1760: use the right irq status bit Date: Fri, 27 Aug 2021 14:11:53 +0100 Message-Id: <20210827131154.4151862-5-rui.silva@linaro.org> X-Mailer: git-send-email 2.33.0 In-Reply-To: <20210827131154.4151862-1-rui.silva@linaro.org> References: <20210827131154.4151862-1-rui.silva@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-usb@vger.kernel.org Instead of using the fields enum values to check interrupts trigged, use the correct bit values. Reported-by: Dietmar Eggemann Signed-off-by: Rui Miguel Silva Tested-by: Dietmar Eggemann --- drivers/usb/isp1760/isp1760-udc.c | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) -- 2.33.0 diff --git a/drivers/usb/isp1760/isp1760-udc.c b/drivers/usb/isp1760/isp1760-udc.c index a78da59d6417..5cafd23345ca 100644 --- a/drivers/usb/isp1760/isp1760-udc.c +++ b/drivers/usb/isp1760/isp1760-udc.c @@ -1363,7 +1363,7 @@ static irqreturn_t isp1760_udc_irq(int irq, void *dev) status = isp1760_udc_irq_get_status(udc); - if (status & DC_IEVBUS) { + if (status & ISP176x_DC_IEVBUS) { dev_dbg(udc->isp->dev, "%s(VBUS)\n", __func__); /* The VBUS interrupt is only triggered when VBUS appears. */ spin_lock(&udc->lock); @@ -1371,7 +1371,7 @@ static irqreturn_t isp1760_udc_irq(int irq, void *dev) spin_unlock(&udc->lock); } - if (status & DC_IEBRST) { + if (status & ISP176x_DC_IEBRST) { dev_dbg(udc->isp->dev, "%s(BRST)\n", __func__); isp1760_udc_reset(udc); @@ -1391,18 +1391,18 @@ static irqreturn_t isp1760_udc_irq(int irq, void *dev) } } - if (status & DC_IEP0SETUP) { + if (status & ISP176x_DC_IEP0SETUP) { dev_dbg(udc->isp->dev, "%s(EP0SETUP)\n", __func__); isp1760_ep0_setup(udc); } - if (status & DC_IERESM) { + if (status & ISP176x_DC_IERESM) { dev_dbg(udc->isp->dev, "%s(RESM)\n", __func__); isp1760_udc_resume(udc); } - if (status & DC_IESUSP) { + if (status & ISP176x_DC_IESUSP) { dev_dbg(udc->isp->dev, "%s(SUSP)\n", __func__); spin_lock(&udc->lock); @@ -1413,7 +1413,7 @@ static irqreturn_t isp1760_udc_irq(int irq, void *dev) spin_unlock(&udc->lock); } - if (status & DC_IEHS_STA) { + if (status & ISP176x_DC_IEHS_STA) { dev_dbg(udc->isp->dev, "%s(HS_STA)\n", __func__); udc->gadget.speed = USB_SPEED_HIGH; } From patchwork Fri Aug 27 13:11:54 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rui Miguel Silva X-Patchwork-Id: 503402 Delivered-To: patch@linaro.org Received: by 2002:a02:6f15:0:0:0:0:0 with SMTP id x21csp1254240jab; Fri, 27 Aug 2021 06:12:21 -0700 (PDT) X-Google-Smtp-Source: ABdhPJyGpeNZ7N2mefecPhw1tWDzjb8iaf5OM79m/aOFrJjRFL5OF752R/fy6s5+Qj9r31QfXvtq X-Received: by 2002:a6b:e616:: with SMTP id g22mr7632102ioh.67.1630069941420; Fri, 27 Aug 2021 06:12:21 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1630069941; cv=none; d=google.com; s=arc-20160816; b=09/caChGamk5TZArWnUGn4u6Etk2WJbBirnDT8oIhk+uE8wyGNnkLV4sBue4B78Psb af6Cy8wl6K9el62Pw5wKOeAZPtw/hlRRp3k0T7cMk8MGynudKCCtXWJNxi8xEa2rgm3V 0w7e+9uIgOR3hXsAq5JlJ4rjTLqBHJ8gMfCt/2vdU2GuRPamQeyvqiXD6+uMbpPmPD8D 0AWS8FNHHzo3KmlABV/5jFc4QGCb0n5K/LrE2KZKy+onFrvrOJRRjQieiy1auOgVnhyJ QPIoLH828bUse24H8jZNidU+cPOKHTUfV84f2zgCXB+zK8XP86Izhto9cTAYsOScRYsU Q1Kg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=WdG/2gxKlzZkSfzKRSXQY6YVvjSC5elE9cuFSMD1cWs=; b=Ufq1m8fm/vUIt7spOdGs10R64+phCFl8d8eegPVm4PUB118PpaIQQ/KH5XNG/71rvP GT+CLKd3K5sPym5Y9FNbytw2/RqH+PELzfmLAT+ZmxrwP1lDWPuZd4hK5Z5YJct+ybmK I+EYhCWVipGY75X3C6V/HeZhsQkYnHZ7ZzLqL3gQr8kbZ3IGCC9GxGzzHAW9hQcALPCg fwESJ4/BXHlGOFORZL8vQXkV2evtyAfp8ciQmvNPWZzj+9EajrzRn3D3GlhaqsOpNmAq TksoRmtz264Lx6Bdv2RMCxW8u/1zWQ1n5QwPy6eD2qaeSht6XyOQmaKqieRAbUFTyQOa iYfw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=SL3WLYw1; spf=pass (google.com: domain of linux-usb-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-usb-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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[109.49.46.234]) by smtp.gmail.com with ESMTPSA id c7sm5279349wmq.13.2021.08.27.06.12.17 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 27 Aug 2021 06:12:17 -0700 (PDT) From: Rui Miguel Silva To: Greg Kroah-Hartman , Dietmar Eggemann Cc: linux-usb@vger.kernel.org, Rui Miguel Silva Subject: [PATCH v2 5/5] usb: isp1760: otg control register access Date: Fri, 27 Aug 2021 14:11:54 +0100 Message-Id: <20210827131154.4151862-6-rui.silva@linaro.org> X-Mailer: git-send-email 2.33.0 In-Reply-To: <20210827131154.4151862-1-rui.silva@linaro.org> References: <20210827131154.4151862-1-rui.silva@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-usb@vger.kernel.org The set/clear of the otg control values is done writing to two different 16bit registers, however we setup the regmap width for isp1760/61 to 32bit value bits. So, just access the clear register address (0x376)as the high part of the otg control register set (0x374), and write the values in one go to make sure they get clear/set. Reported-by: Dietmar Eggemann Signed-off-by: Rui Miguel Silva Tested-by: Dietmar Eggemann --- drivers/usb/isp1760/isp1760-core.c | 50 ++++++++++++++++-------------- drivers/usb/isp1760/isp1760-regs.h | 16 ++++++++++ 2 files changed, 42 insertions(+), 24 deletions(-) -- 2.33.0 diff --git a/drivers/usb/isp1760/isp1760-core.c b/drivers/usb/isp1760/isp1760-core.c index cb70f9d63cdd..d1d9a7d5da17 100644 --- a/drivers/usb/isp1760/isp1760-core.c +++ b/drivers/usb/isp1760/isp1760-core.c @@ -30,6 +30,7 @@ static int isp1760_init_core(struct isp1760_device *isp) { struct isp1760_hcd *hcd = &isp->hcd; struct isp1760_udc *udc = &isp->udc; + u32 otg_ctrl; /* Low-level chip reset */ if (isp->rst_gpio) { @@ -83,16 +84,17 @@ static int isp1760_init_core(struct isp1760_device *isp) * * TODO: Really support OTG. For now we configure port 1 in device mode */ - if (((isp->devflags & ISP1760_FLAG_ISP1761) || - (isp->devflags & ISP1760_FLAG_ISP1763)) && - (isp->devflags & ISP1760_FLAG_PERIPHERAL_EN)) { - isp1760_field_set(hcd->fields, HW_DM_PULLDOWN); - isp1760_field_set(hcd->fields, HW_DP_PULLDOWN); - isp1760_field_set(hcd->fields, HW_OTG_DISABLE); - } else { - isp1760_field_set(hcd->fields, HW_SW_SEL_HC_DC); - isp1760_field_set(hcd->fields, HW_VBUS_DRV); - isp1760_field_set(hcd->fields, HW_SEL_CP_EXT); + if (isp->devflags & ISP1760_FLAG_ISP1761) { + if (isp->devflags & ISP1760_FLAG_PERIPHERAL_EN) { + otg_ctrl = (ISP176x_HW_DM_PULLDOWN_CLEAR | + ISP176x_HW_DP_PULLDOWN_CLEAR | + ISP176x_HW_OTG_DISABLE); + } else { + otg_ctrl = (ISP176x_HW_SW_SEL_HC_DC_CLEAR | + ISP176x_HW_VBUS_DRV | + ISP176x_HW_SEL_CP_EXT); + } + isp1760_reg_write(hcd->regs, ISP176x_HC_OTG_CTRL, otg_ctrl); } dev_info(isp->dev, "%s bus width: %u, oc: %s\n", @@ -235,20 +237,20 @@ static const struct reg_field isp1760_hc_reg_fields[] = { [HC_ISO_IRQ_MASK_AND] = REG_FIELD(ISP176x_HC_ISO_IRQ_MASK_AND, 0, 31), [HC_INT_IRQ_MASK_AND] = REG_FIELD(ISP176x_HC_INT_IRQ_MASK_AND, 0, 31), [HC_ATL_IRQ_MASK_AND] = REG_FIELD(ISP176x_HC_ATL_IRQ_MASK_AND, 0, 31), - [HW_OTG_DISABLE] = REG_FIELD(ISP176x_HC_OTG_CTRL_SET, 10, 10), - [HW_SW_SEL_HC_DC] = REG_FIELD(ISP176x_HC_OTG_CTRL_SET, 7, 7), - [HW_VBUS_DRV] = REG_FIELD(ISP176x_HC_OTG_CTRL_SET, 4, 4), - [HW_SEL_CP_EXT] = REG_FIELD(ISP176x_HC_OTG_CTRL_SET, 3, 3), - [HW_DM_PULLDOWN] = REG_FIELD(ISP176x_HC_OTG_CTRL_SET, 2, 2), - [HW_DP_PULLDOWN] = REG_FIELD(ISP176x_HC_OTG_CTRL_SET, 1, 1), - [HW_DP_PULLUP] = REG_FIELD(ISP176x_HC_OTG_CTRL_SET, 0, 0), - [HW_OTG_DISABLE_CLEAR] = REG_FIELD(ISP176x_HC_OTG_CTRL_CLEAR, 10, 10), - [HW_SW_SEL_HC_DC_CLEAR] = REG_FIELD(ISP176x_HC_OTG_CTRL_CLEAR, 7, 7), - [HW_VBUS_DRV_CLEAR] = REG_FIELD(ISP176x_HC_OTG_CTRL_CLEAR, 4, 4), - [HW_SEL_CP_EXT_CLEAR] = REG_FIELD(ISP176x_HC_OTG_CTRL_CLEAR, 3, 3), - [HW_DM_PULLDOWN_CLEAR] = REG_FIELD(ISP176x_HC_OTG_CTRL_CLEAR, 2, 2), - [HW_DP_PULLDOWN_CLEAR] = REG_FIELD(ISP176x_HC_OTG_CTRL_CLEAR, 1, 1), - [HW_DP_PULLUP_CLEAR] = REG_FIELD(ISP176x_HC_OTG_CTRL_CLEAR, 0, 0), + [HW_OTG_DISABLE_CLEAR] = REG_FIELD(ISP176x_HC_OTG_CTRL, 26, 26), + [HW_SW_SEL_HC_DC_CLEAR] = REG_FIELD(ISP176x_HC_OTG_CTRL, 23, 23), + [HW_VBUS_DRV_CLEAR] = REG_FIELD(ISP176x_HC_OTG_CTRL, 20, 20), + [HW_SEL_CP_EXT_CLEAR] = REG_FIELD(ISP176x_HC_OTG_CTRL, 19, 19), + [HW_DM_PULLDOWN_CLEAR] = REG_FIELD(ISP176x_HC_OTG_CTRL, 18, 18), + [HW_DP_PULLDOWN_CLEAR] = REG_FIELD(ISP176x_HC_OTG_CTRL, 17, 17), + [HW_DP_PULLUP_CLEAR] = REG_FIELD(ISP176x_HC_OTG_CTRL, 16, 16), + [HW_OTG_DISABLE] = REG_FIELD(ISP176x_HC_OTG_CTRL, 10, 10), + [HW_SW_SEL_HC_DC] = REG_FIELD(ISP176x_HC_OTG_CTRL, 7, 7), + [HW_VBUS_DRV] = REG_FIELD(ISP176x_HC_OTG_CTRL, 4, 4), + [HW_SEL_CP_EXT] = REG_FIELD(ISP176x_HC_OTG_CTRL, 3, 3), + [HW_DM_PULLDOWN] = REG_FIELD(ISP176x_HC_OTG_CTRL, 2, 2), + [HW_DP_PULLDOWN] = REG_FIELD(ISP176x_HC_OTG_CTRL, 1, 1), + [HW_DP_PULLUP] = REG_FIELD(ISP176x_HC_OTG_CTRL, 0, 0), }; static const struct reg_field isp1763_hc_reg_fields[] = { diff --git a/drivers/usb/isp1760/isp1760-regs.h b/drivers/usb/isp1760/isp1760-regs.h index 94ea60c20b2a..3a6751197e97 100644 --- a/drivers/usb/isp1760/isp1760-regs.h +++ b/drivers/usb/isp1760/isp1760-regs.h @@ -61,6 +61,7 @@ #define ISP176x_HC_INT_IRQ_MASK_AND 0x328 #define ISP176x_HC_ATL_IRQ_MASK_AND 0x32c +#define ISP176x_HC_OTG_CTRL 0x374 #define ISP176x_HC_OTG_CTRL_SET 0x374 #define ISP176x_HC_OTG_CTRL_CLEAR 0x376 @@ -179,6 +180,21 @@ enum isp176x_host_controller_fields { #define ISP176x_DC_IESUSP BIT(3) #define ISP176x_DC_IEBRST BIT(0) +#define ISP176x_HW_OTG_DISABLE_CLEAR BIT(26) +#define ISP176x_HW_SW_SEL_HC_DC_CLEAR BIT(23) +#define ISP176x_HW_VBUS_DRV_CLEAR BIT(20) +#define ISP176x_HW_SEL_CP_EXT_CLEAR BIT(19) +#define ISP176x_HW_DM_PULLDOWN_CLEAR BIT(18) +#define ISP176x_HW_DP_PULLDOWN_CLEAR BIT(17) +#define ISP176x_HW_DP_PULLUP_CLEAR BIT(16) +#define ISP176x_HW_OTG_DISABLE BIT(10) +#define ISP176x_HW_SW_SEL_HC_DC BIT(7) +#define ISP176x_HW_VBUS_DRV BIT(4) +#define ISP176x_HW_SEL_CP_EXT BIT(3) +#define ISP176x_HW_DM_PULLDOWN BIT(2) +#define ISP176x_HW_DP_PULLDOWN BIT(1) +#define ISP176x_HW_DP_PULLUP BIT(0) + #define ISP176x_DC_ENDPTYP_ISOC 0x01 #define ISP176x_DC_ENDPTYP_BULK 0x02 #define ISP176x_DC_ENDPTYP_INTERRUPT 0x03