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[209.132.180.67]) by mx.google.com with ESMTP id x8-v6si27676132pgh.454.2018.10.11.05.03.43; Thu, 11 Oct 2018 05:03:43 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-arm-msm-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=C+5c2I05; spf=pass (google.com: best guess record for domain of linux-arm-msm-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727740AbeJKTah (ORCPT + 13 others); Thu, 11 Oct 2018 15:30:37 -0400 Received: from mail-wm1-f68.google.com ([209.85.128.68]:40752 "EHLO mail-wm1-f68.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726921AbeJKTah (ORCPT ); Thu, 11 Oct 2018 15:30:37 -0400 Received: by mail-wm1-f68.google.com with SMTP id z204-v6so9159562wmc.5 for ; Thu, 11 Oct 2018 05:03:39 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=/MGODQWupRFp3ivTTqHI0aavG641+71/uDj7XngGFGg=; b=C+5c2I05jSUqxANNB3NqXT8WI2wpxGAsfPQxfTK55p8V+0WSQtmDVy8PFQyAkiMw3l ZiF1tGQCYK4Pu3JjLis3/SJc9kotg2LihaWehrllXnJScN/BEM5khS2sRBNYF7CSba7l PpE+DkRofX0SwHpNNCQWygEZTr6uORNidxi5c= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=/MGODQWupRFp3ivTTqHI0aavG641+71/uDj7XngGFGg=; b=t+c+DjYX64K3vjq/syrAhQWoE1m/hJqVnOulSdxv7Zd5/OFz/kIad5/KSSOZMRLrL8 hQVb+YGtaWOM119uaBGpeBnIiqEK0UgiN2JCV0Q+GWipX6CPQrcKfnoQPMYNtxzdEpS9 GgJQAKYYFk1d9B/hjpg1phiXJLAOBkULovtseeHDGVkUzjCp6bdxiRMbrQehgFh6GZpY vnNnD78cF6egyR0yM8O1DOU9CZ32aQp6G6obOj+v+SgYvWc0jxU+YbA0mrBWXZtuGu7h zDHRrt2FZF0acDvOsHZOwItl7evPkJeIJlEpX7FyEMJUbB0qzWhng7pdumKRCYWvBnuy bI2Q== X-Gm-Message-State: ABuFfoiTPQ/foDJoaLzdlfXK8vDBlrY+FTbJYwUsgyuHwaqdvfdDye6Z TfJ3S57qz0IYCkrytYghzXsr/w== X-Received: by 2002:a1c:f010:: with SMTP id a16-v6mr1378710wmb.5.1539259418847; Thu, 11 Oct 2018 05:03:38 -0700 (PDT) Received: from localhost.localdomain ([212.45.67.2]) by smtp.googlemail.com with ESMTPSA id 193-v6sm21983286wmj.21.2018.10.11.05.03.36 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 11 Oct 2018 05:03:38 -0700 (PDT) From: Georgi Djakov To: linux-pm@vger.kernel.org Cc: gregkh@linuxfoundation.org, rjw@rjwysocki.net, robh+dt@kernel.org, mturquette@baylibre.com, khilman@baylibre.com, vincent.guittot@linaro.org, skannan@codeaurora.org, bjorn.andersson@linaro.org, amit.kucheria@linaro.org, seansw@qti.qualcomm.com, daidavid1@codeaurora.org, evgreen@chromium.org, mark.rutland@arm.com, lorenzo.pieralisi@arm.com, abailon@baylibre.com, maxime.ripard@bootlin.com, arnd@arndb.de, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-arm-msm@vger.kernel.org, ulf.hansson@linaro.org, adrian.hunter@intel.com, linux-mmc@vger.kernel.org, georgi.djakov@linaro.org Subject: [RFC] mmc: host: sdhci-msm: Use the interconnect API Date: Thu, 11 Oct 2018 15:03:36 +0300 Message-Id: <20181011120336.9129-1-georgi.djakov@linaro.org> X-Mailer: git-send-email 2.19.1 MIME-Version: 1.0 Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org The interconnect API provides an interface for consumer drivers to express their bandwidth needs in the SoC. This data is aggregated and the on-chip interconnect hardware is configured to the appropriate power/performance profile. Use the interconnect API to get() the path between the endpoints used for data transfers by the SD host controller and report the needed bandwidth based on the clock rate, bus width and mode. Signed-off-by: Georgi Djakov --- This depends on the interconnect API: https://lkml.org/lkml/2018/8/31/444 TODO: Use macros for converting and rounding to icc units instead of converting between kilobits and kilobytes in the consumer drivers. drivers/mmc/host/sdhci-msm.c | 46 ++++++++++++++++++++++++++++++++++-- 1 file changed, 44 insertions(+), 2 deletions(-) diff --git a/drivers/mmc/host/sdhci-msm.c b/drivers/mmc/host/sdhci-msm.c index 3cc8bfee6c18..8ca99ccdb035 100644 --- a/drivers/mmc/host/sdhci-msm.c +++ b/drivers/mmc/host/sdhci-msm.c @@ -20,6 +20,7 @@ #include #include #include +#include #include #include @@ -258,6 +259,7 @@ struct sdhci_msm_host { bool mci_removed; const struct sdhci_msm_variant_ops *var_ops; const struct sdhci_msm_offset *offset; + struct icc_path *path; }; static const struct sdhci_msm_offset *sdhci_priv_msm_offset(struct sdhci_host *host) @@ -1627,6 +1629,30 @@ static const struct sdhci_msm_variant_info sdhci_msm_v5_var = { .offset = &sdhci_msm_v5_offset, }; +static int sdhci_msm_icc_update(struct sdhci_msm_host *msm_host) +{ + struct sdhci_host *host = dev_get_drvdata(&msm_host->pdev->dev); + struct mmc_host *mmc = host->mmc; + struct mmc_ios *ios = &mmc->ios; + unsigned char bus_width = 1 << ios->bus_width; + u32 bw; + + /* calculate the needed bandwidth */ + bw = host->clock; + + if (host->timing == MMC_TIMING_UHS_DDR50 || + host->timing == MMC_TIMING_MMC_DDR52) { + bw *= 2; + } + + if (bus_width == 4) + bw /= 2; + else if (bus_width == 1) + bw /= 8; + + return icc_set(msm_host->path, 0, bw / 1000); +} + static const struct of_device_id sdhci_msm_dt_match[] = { {.compatible = "qcom,sdhci-msm-v4", .data = &sdhci_msm_mci_var}, {.compatible = "qcom,sdhci-msm-v5", .data = &sdhci_msm_v5_var}, @@ -1698,16 +1724,27 @@ static int sdhci_msm_probe(struct platform_device *pdev) msm_host->saved_tuning_phase = INVALID_TUNING_PHASE; + msm_host->path = of_icc_get(&pdev->dev, "sdhc-mem"); + if (IS_ERR(msm_host->path)) { + ret = PTR_ERR(msm_host->path); + goto pltfm_free; + } + ret = sdhci_msm_icc_update(msm_host); + if (ret) { + dev_warn(&pdev->dev, "Interconnect setup failed (%d)\n", ret); + goto icc_disable; + } + /* Setup SDCC bus voter clock. */ msm_host->bus_clk = devm_clk_get(&pdev->dev, "bus"); if (!IS_ERR(msm_host->bus_clk)) { /* Vote for max. clk rate for max. performance */ ret = clk_set_rate(msm_host->bus_clk, INT_MAX); if (ret) - goto pltfm_free; + goto icc_disable; ret = clk_prepare_enable(msm_host->bus_clk); if (ret) - goto pltfm_free; + goto icc_disable; } /* Setup main peripheral bus clock */ @@ -1883,6 +1920,8 @@ static int sdhci_msm_probe(struct platform_device *pdev) bus_clk_disable: if (!IS_ERR(msm_host->bus_clk)) clk_disable_unprepare(msm_host->bus_clk); +icc_disable: + icc_put(msm_host->path); pltfm_free: sdhci_pltfm_free(pdev); return ret; @@ -1902,6 +1941,7 @@ static int sdhci_msm_remove(struct platform_device *pdev) pm_runtime_disable(&pdev->dev); pm_runtime_put_noidle(&pdev->dev); + icc_put(msm_host->path); clk_bulk_disable_unprepare(ARRAY_SIZE(msm_host->bulk_clks), msm_host->bulk_clks); if (!IS_ERR(msm_host->bus_clk)) @@ -1917,6 +1957,7 @@ static int sdhci_msm_runtime_suspend(struct device *dev) struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); struct sdhci_msm_host *msm_host = sdhci_pltfm_priv(pltfm_host); + icc_set(msm_host->path, 0, 0); clk_bulk_disable_unprepare(ARRAY_SIZE(msm_host->bulk_clks), msm_host->bulk_clks); @@ -1929,6 +1970,7 @@ static int sdhci_msm_runtime_resume(struct device *dev) struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); struct sdhci_msm_host *msm_host = sdhci_pltfm_priv(pltfm_host); + sdhci_msm_icc_update(msm_host); return clk_bulk_prepare_enable(ARRAY_SIZE(msm_host->bulk_clks), msm_host->bulk_clks); }