From patchwork Thu Aug 26 23:51:34 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Wong Vee Khee X-Patchwork-Id: 503243 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id C4C7CC43214 for ; Thu, 26 Aug 2021 23:46:09 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id AD46960E0B for ; Thu, 26 Aug 2021 23:46:09 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S243855AbhHZXqz (ORCPT ); Thu, 26 Aug 2021 19:46:55 -0400 Received: from mga07.intel.com ([134.134.136.100]:37105 "EHLO mga07.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229710AbhHZXqy (ORCPT ); Thu, 26 Aug 2021 19:46:54 -0400 X-IronPort-AV: E=McAfee;i="6200,9189,10088"; a="281583059" X-IronPort-AV: E=Sophos;i="5.84,354,1620716400"; d="scan'208";a="281583059" Received: from orsmga003.jf.intel.com ([10.7.209.27]) by orsmga105.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 26 Aug 2021 16:46:06 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.84,354,1620716400"; d="scan'208";a="426956326" Received: from linux.intel.com ([10.54.29.200]) by orsmga003.jf.intel.com with ESMTP; 26 Aug 2021 16:46:06 -0700 Received: from glass.png.intel.com (glass.png.intel.com [10.158.65.69]) by linux.intel.com (Postfix) with ESMTP id A38D15808BB; Thu, 26 Aug 2021 16:46:02 -0700 (PDT) From: Wong Vee Khee To: Giuseppe Cavallaro , Alexandre Torgue , Jose Abreu , "David S . Miller" , Jakub Kicinski , Maxime Coquelin , Vladimir Oltean , Andrew Lunn , Vivien Didelot , Florian Fainelli , Russell King , Heiner Kallweit Cc: netdev@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Vladimir Oltean , Voon Weifeng , Michael Sit Wei Hong Subject: [PATCH net-next v2 2/2] stmmac: intel: Enable 2.5Gbps on Intel AlderLake-S Date: Fri, 27 Aug 2021 07:51:34 +0800 Message-Id: <20210826235134.4051310-3-vee.khee.wong@linux.intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210826235134.4051310-1-vee.khee.wong@linux.intel.com> References: <20210826235134.4051310-1-vee.khee.wong@linux.intel.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org Intel AlderLake-S platform is capable of 2.5Gbps link speed. This patch enables the 2.5Gbps link speed by adding the callback function in the AlderLake-S PCI info struct. Signed-off-by: Wong Vee Khee --- drivers/net/ethernet/stmicro/stmmac/dwmac-intel.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-intel.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-intel.c index 8e8778cfbbad..c1db7e53e78f 100644 --- a/drivers/net/ethernet/stmicro/stmmac/dwmac-intel.c +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-intel.c @@ -770,6 +770,8 @@ static int adls_sgmii_phy0_data(struct pci_dev *pdev, { plat->bus_id = 1; plat->phy_interface = PHY_INTERFACE_MODE_SGMII; + plat->speed_mode_2500 = intel_speed_mode_2500; + plat->skip_xpcs_soft_reset = 1; /* SerDes power up and power down are done in BIOS for ADL */ @@ -785,6 +787,8 @@ static int adls_sgmii_phy1_data(struct pci_dev *pdev, { plat->bus_id = 2; plat->phy_interface = PHY_INTERFACE_MODE_SGMII; + plat->speed_mode_2500 = intel_speed_mode_2500; + plat->skip_xpcs_soft_reset = 1; /* SerDes power up and power down are done in BIOS for ADL */