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[23.128.96.18]) by mx.google.com with ESMTP id p14si17169098iov.81.2021.08.25.05.47.17; Wed, 25 Aug 2021 05:47:17 -0700 (PDT) Received-SPF: pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@gmail.com header.s=20161025 header.b=JGk+VaGW; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229873AbhHYMsB (ORCPT + 7 others); Wed, 25 Aug 2021 08:48:01 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45266 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S240915AbhHYMsB (ORCPT ); Wed, 25 Aug 2021 08:48:01 -0400 Received: from mail-pf1-x42a.google.com (mail-pf1-x42a.google.com [IPv6:2607:f8b0:4864:20::42a]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id A6A67C0613CF; Wed, 25 Aug 2021 05:47:15 -0700 (PDT) Received: by mail-pf1-x42a.google.com with SMTP id x16so21173127pfh.2; Wed, 25 Aug 2021 05:47:15 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=5LJeSUKrUYXrv15wuA7EAZJbrwJDLvOeKqmFzdUbk/I=; b=JGk+VaGW2Rgb8F1fNUJQphreHVU11FTII8bsFMCFlG5y8lYM9LMEcsBxYRVvFWGFwj OHfj/Q1f2NrjTdUlWCPZhOPmndd8lDD3GypVOekQd4p95kGqX3B3XEjN0hBGP8eEnxuz FwQpqJZie7SQVphPfHMomnr53Cm3oyraUVUBMz4b+KBrVagfSrbP9s4E3EUkZxFAeyE9 g76BKoIQbjGzcRnf5Mr0hxfmizDeoYY3bvphk8FZOizbq8T4gbkJRUdhlf9gMLWUSVig e4pdMTFKrjHWZJGRitPBRoFUEdPS3Lo3sDCJRaKBFTkjOKDHQiw/YnAimrufWpMV1NN3 3S/g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references:mime-version:content-transfer-encoding; bh=5LJeSUKrUYXrv15wuA7EAZJbrwJDLvOeKqmFzdUbk/I=; b=LvYnee1w37OZsm53zpGZ0J9tM8xKZuIJRCNyA0Dcr22DZgqAwoYSH7ReemRiOHG1sp le5powWOLGQjSrNQms0DUi7gLiC9f2jSj0GqMCQgM0uwwYxjPoIEAqiEbjc8JvGtqJbr hR6BRzBVzLZldkVljNH4yq5iRsE9yoe/q35SMSPnnErTs8eTr6aCvP/EPrZoZkkticHU +GRbUBFYY8QCEcFMWHdmqXru4ZUYKrZdE3lcZND8Za+TbJw40hRuF7ZyPoFnuZUZ2MhL 2W8oJuY0LaQfR2TcdMPgijaTHSdz1oVuMAEfRMu0Eq03w/r45rU9VfRblTKaez1a2wwd Uerw== X-Gm-Message-State: AOAM531V3yzAUdE5/BPbBFpmUGrCHeG0ebVdFyy5GU1f0kAOQhakGr5Y 6GK4dOMuiEAEOz5fmu+idmY= X-Received: by 2002:a63:2243:: with SMTP id t3mr41347021pgm.114.1629895635138; Wed, 25 Aug 2021 05:47:15 -0700 (PDT) Received: from localhost.localdomain ([45.124.203.15]) by smtp.gmail.com with ESMTPSA id s16sm21511301pfk.185.2021.08.25.05.47.10 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 25 Aug 2021 05:47:14 -0700 (PDT) Sender: "joel.stan@gmail.com" From: Joel Stanley To: "David S . Miller" , Jakub Kicinski , Rob Herring Cc: Karol Gugala , Mateusz Holenko , devicetree@vger.kernel.org, Florent Kermarrec , "Gabriel L . Somlo" , netdev@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v3 1/2] dt-bindings: net: Add bindings for LiteETH Date: Wed, 25 Aug 2021 22:16:54 +0930 Message-Id: <20210825124655.3104348-2-joel@jms.id.au> X-Mailer: git-send-email 2.33.0 In-Reply-To: <20210825124655.3104348-1-joel@jms.id.au> References: <20210825124655.3104348-1-joel@jms.id.au> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org LiteETH is a small footprint and configurable Ethernet core for FPGA based system on chips. The hardware is parametrised by the size and number of the slots in it's receive and send buffers. These are described as properties, with the commonly used values set as the default. Signed-off-by: Joel Stanley --- v2: - Fix dtschema check warning relating to registers - Add names to the registers to make it easier to distinguish which is what region - Add mdio description - Include ethernet-controller parent description v3: - Define names for reg-names - update example to match common case - describe the hardware using slots and slot sizes. This is how the hardware is pramaterised, and it makes more sense than trying to use the rx/tx-fifo-size properties --- .../bindings/net/litex,liteeth.yaml | 100 ++++++++++++++++++ 1 file changed, 100 insertions(+) create mode 100644 Documentation/devicetree/bindings/net/litex,liteeth.yaml -- 2.33.0 Reviewed-by: Rob Herring diff --git a/Documentation/devicetree/bindings/net/litex,liteeth.yaml b/Documentation/devicetree/bindings/net/litex,liteeth.yaml new file mode 100644 index 000000000000..62911b8e913c --- /dev/null +++ b/Documentation/devicetree/bindings/net/litex,liteeth.yaml @@ -0,0 +1,100 @@ +# SPDX-License-Identifier: GPL-2.0-or-later OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/net/litex,liteeth.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: LiteX LiteETH ethernet device + +maintainers: + - Joel Stanley + +description: | + LiteETH is a small footprint and configurable Ethernet core for FPGA based + system on chips. + + The hardware source is Open Source and can be found on at + https://github.com/enjoy-digital/liteeth/. + +allOf: + - $ref: ethernet-controller.yaml# + +properties: + compatible: + const: litex,liteeth + + reg: + minItems: 3 + items: + - description: MAC registers + - description: MDIO registers + - description: Packet buffer + + reg-names: + minItems: 3 + items: + - const: mac + - const: mdio + - const: buffer + + interrupts: + maxItems: 1 + + litex,rx-slots: + description: Number of slots in the receive buffer + $ref: /schemas/types.yaml#/definitions/uint32 + minimum: 1 + default: 2 + + litex,tx-slots: + description: Number of slots in the transmit buffer + $ref: /schemas/types.yaml#/definitions/uint32 + minimum: 1 + default: 2 + + litex,slot-size: + description: Size in bytes of a slot in the tx/rx buffer + $ref: /schemas/types.yaml#/definitions/uint32 + minimum: 0x800 + default: 0x800 + + mac-address: true + local-mac-address: true + phy-handle: true + + mdio: + $ref: mdio.yaml# + +required: + - compatible + - reg + - interrupts + +additionalProperties: false + +examples: + - | + mac: ethernet@8020000 { + compatible = "litex,liteeth"; + reg = <0x8021000 0x100>, + <0x8020800 0x100>, + <0x8030000 0x2000>; + reg-names = "mac", "mdio", "buffer"; + litex,rx-slots = <2>; + litex,tx-slots = <2>; + litex,slot-size = <0x800>; + interrupts = <0x11 0x1>; + phy-handle = <ð_phy>; + + mdio { + #address-cells = <1>; + #size-cells = <0>; + + eth_phy: ethernet-phy@0 { + reg = <0>; + }; + }; + }; +... + +# vim: set ts=2 sw=2 sts=2 tw=80 et cc=80 ft=yaml : From patchwork Wed Aug 25 12:46:55 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Joel Stanley X-Patchwork-Id: 502308 Delivered-To: patch@linaro.org Received: by 2002:a02:6f15:0:0:0:0:0 with SMTP id x21csp572504jab; Wed, 25 Aug 2021 05:47:25 -0700 (PDT) X-Google-Smtp-Source: ABdhPJzufJJvPs6kqZhpe4I9kcOlX9RGJ8zPv235sQUFxQjam8iUTGFm3reYt6YKlGfDPMa6DAsn X-Received: by 2002:a92:7312:: with SMTP id o18mr29930532ilc.56.1629895645685; Wed, 25 Aug 2021 05:47:25 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1629895645; cv=none; d=google.com; s=arc-20160816; b=qit9bHZALpVStOG4KQFcZdJJ0FiFIz0hFSCQuXMw/N/eil8/OWrPRjdZCyPik/QcZ5 jhrhlYWMCzsjAjmyxx9wh1GI7IMDbtjHPLfnPHChsrnWyT2Jyzykba+6DMz3hxn1Cy5S qG7j3d4GQNKQB21GhkGqdKSfFKalzNcuQV/tOTumf3hes/Rfr1rLB2tfNMWHl0s2p1Uc uQWn811hXUUQ05Th6GRgerEz2rIYGFg5msxQKwNYEdYZbl+y1uJmGyp3Pp7jFjXt+dxP xWjW4ORxiURQspdXb3KUTNYY0+5w03pY/WmCIqpPi/DUb9wB+lENC/WLEm239GrvUvz7 9tnA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from:sender :dkim-signature; bh=imY1sQT0/lpEGhDIGogn209SW9JcfCkHmDP9lVMvNu8=; b=Sj94uD0pwQbD3103Gdwa9XTogEGo30jIevqW3L/CZEGFFotp1oVewH011YlOhuUneg 3NGvnHi+Ykj0gxbmOKECHDMChev3H6Xn7bdtImApMPjQtrNSylO5gPFZO21eTRUofm5o 0er3P4Dw+noH7CbXOtKJX82l3OL45arAU3pS6pdz2WCT757N34YL2pKzlGDzkRMSFKAg UOG+9D8Cb/2Ulyc76Ay7epJzgtX18UoM1bsoKeNh79fHfsRRzsHU2jMh7APj7ES6cl4u lUvasmioHHCGBfLVQ3pxbfoLfM4Px09FttpkNc1tBEZHNIW9YRxxUyxaiyYyYlzdX1Vw DEVw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@gmail.com header.s=20161025 header.b=UT2J5QnY; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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Miller" , Jakub Kicinski , Rob Herring Cc: Karol Gugala , Mateusz Holenko , devicetree@vger.kernel.org, Florent Kermarrec , "Gabriel L . Somlo" , netdev@vger.kernel.org, linux-kernel@vger.kernel.org, David Shah , Stafford Horne Subject: [PATCH v3 2/2] net: Add driver for LiteX's LiteETH network interface Date: Wed, 25 Aug 2021 22:16:55 +0930 Message-Id: <20210825124655.3104348-3-joel@jms.id.au> X-Mailer: git-send-email 2.33.0 In-Reply-To: <20210825124655.3104348-1-joel@jms.id.au> References: <20210825124655.3104348-1-joel@jms.id.au> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org LiteX is a soft system-on-chip that targets FPGAs. LiteETH is a basic network device that is commonly used in LiteX designs. The driver was first written in 2017 and has been maintained by the LiteX community in various trees. Thank you to all who have contributed. Co-developed-by: Gabriel Somlo Co-developed-by: David Shah Co-developed-by: Stafford Horne Signed-off-by: Joel Stanley --- v2: - check for bad len in liteeth_rx before getting skb - use netdev_alloc_skb_ip_align - remove unused duplex/speed and mii_bus variables - set carrier off when stopping device - increment packet count in the same place as bytes - fix error return code when irq could not be found - remove request of mdio base address until it is used - fix of_property_read line wrapping/alignment - only check that reader isn't busy, and then send off next packet - drop third reset - Add an description to the kconfig text - stop tx queue when busy and re-start after tx complete irq fires - use litex accessors to support big endain socs - clean up unused includes - use standard fifo-depth properties, which are in bytes v3: - make fifo helper static - fix error messages about invalid slot sizes - use slot size from device tree instead of inferring it - update to match the latest version of the bindings, which describes the number of slots --- drivers/net/ethernet/Kconfig | 1 + drivers/net/ethernet/Makefile | 1 + drivers/net/ethernet/litex/Kconfig | 27 ++ drivers/net/ethernet/litex/Makefile | 5 + drivers/net/ethernet/litex/litex_liteeth.c | 317 +++++++++++++++++++++ 5 files changed, 351 insertions(+) create mode 100644 drivers/net/ethernet/litex/Kconfig create mode 100644 drivers/net/ethernet/litex/Makefile create mode 100644 drivers/net/ethernet/litex/litex_liteeth.c -- 2.33.0 diff --git a/drivers/net/ethernet/Kconfig b/drivers/net/ethernet/Kconfig index 1cdff1dca790..d796684ec9ca 100644 --- a/drivers/net/ethernet/Kconfig +++ b/drivers/net/ethernet/Kconfig @@ -118,6 +118,7 @@ config LANTIQ_XRX200 Support for the PMAC of the Gigabit switch (GSWIP) inside the Lantiq / Intel VRX200 VDSL SoC +source "drivers/net/ethernet/litex/Kconfig" source "drivers/net/ethernet/marvell/Kconfig" source "drivers/net/ethernet/mediatek/Kconfig" source "drivers/net/ethernet/mellanox/Kconfig" diff --git a/drivers/net/ethernet/Makefile b/drivers/net/ethernet/Makefile index cb3f9084a21b..aaa5078cd7d1 100644 --- a/drivers/net/ethernet/Makefile +++ b/drivers/net/ethernet/Makefile @@ -51,6 +51,7 @@ obj-$(CONFIG_JME) += jme.o obj-$(CONFIG_KORINA) += korina.o obj-$(CONFIG_LANTIQ_ETOP) += lantiq_etop.o obj-$(CONFIG_LANTIQ_XRX200) += lantiq_xrx200.o +obj-$(CONFIG_NET_VENDOR_LITEX) += litex/ obj-$(CONFIG_NET_VENDOR_MARVELL) += marvell/ obj-$(CONFIG_NET_VENDOR_MEDIATEK) += mediatek/ obj-$(CONFIG_NET_VENDOR_MELLANOX) += mellanox/ diff --git a/drivers/net/ethernet/litex/Kconfig b/drivers/net/ethernet/litex/Kconfig new file mode 100644 index 000000000000..265dba414b41 --- /dev/null +++ b/drivers/net/ethernet/litex/Kconfig @@ -0,0 +1,27 @@ +# +# LiteX device configuration +# + +config NET_VENDOR_LITEX + bool "LiteX devices" + default y + help + If you have a network (Ethernet) card belonging to this class, say Y. + + Note that the answer to this question doesn't directly affect the + kernel: saying N will just cause the configurator to skip all + the questions about LiteX devices. If you say Y, you will be asked + for your specific card in the following questions. + +if NET_VENDOR_LITEX + +config LITEX_LITEETH + tristate "LiteX Ethernet support" + help + If you wish to compile a kernel for hardware with a LiteX LiteEth + device then you should answer Y to this. + + LiteX is a soft system-on-chip that targets FPGAs. LiteETH is a basic + network device that is commonly used in LiteX designs. + +endif # NET_VENDOR_LITEX diff --git a/drivers/net/ethernet/litex/Makefile b/drivers/net/ethernet/litex/Makefile new file mode 100644 index 000000000000..9343b73b8e49 --- /dev/null +++ b/drivers/net/ethernet/litex/Makefile @@ -0,0 +1,5 @@ +# +# Makefile for the LiteX network device drivers. +# + +obj-$(CONFIG_LITEX_LITEETH) += litex_liteeth.o diff --git a/drivers/net/ethernet/litex/litex_liteeth.c b/drivers/net/ethernet/litex/litex_liteeth.c new file mode 100644 index 000000000000..10e6f2dedfad --- /dev/null +++ b/drivers/net/ethernet/litex/litex_liteeth.c @@ -0,0 +1,317 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * LiteX Liteeth Ethernet + * + * Copyright 2017 Joel Stanley + * + */ + +#include +#include +#include +#include +#include +#include + +#define LITEETH_WRITER_SLOT 0x00 +#define LITEETH_WRITER_LENGTH 0x04 +#define LITEETH_WRITER_ERRORS 0x08 +#define LITEETH_WRITER_EV_STATUS 0x0C +#define LITEETH_WRITER_EV_PENDING 0x10 +#define LITEETH_WRITER_EV_ENABLE 0x14 +#define LITEETH_READER_START 0x18 +#define LITEETH_READER_READY 0x1C +#define LITEETH_READER_LEVEL 0x20 +#define LITEETH_READER_SLOT 0x24 +#define LITEETH_READER_LENGTH 0x28 +#define LITEETH_READER_EV_STATUS 0x2C +#define LITEETH_READER_EV_PENDING 0x30 +#define LITEETH_READER_EV_ENABLE 0x34 +#define LITEETH_PREAMBLE_CRC 0x38 +#define LITEETH_PREAMBLE_ERRORS 0x3C +#define LITEETH_CRC_ERRORS 0x40 + +#define LITEETH_PHY_CRG_RESET 0x00 +#define LITEETH_MDIO_W 0x04 +#define LITEETH_MDIO_R 0x0C + +#define DRV_NAME "liteeth" + +struct liteeth { + void __iomem *base; + struct net_device *netdev; + struct device *dev; + u32 slot_size; + + /* Tx */ + u32 tx_slot; + u32 num_tx_slots; + void __iomem *tx_base; + + /* Rx */ + u32 rx_slot; + u32 num_rx_slots; + void __iomem *rx_base; +}; + +static int liteeth_rx(struct net_device *netdev) +{ + struct liteeth *priv = netdev_priv(netdev); + struct sk_buff *skb; + unsigned char *data; + u8 rx_slot; + int len; + + rx_slot = litex_read8(priv->base + LITEETH_WRITER_SLOT); + len = litex_read32(priv->base + LITEETH_WRITER_LENGTH); + + if (len == 0 || len > 2048) + goto rx_drop; + + skb = netdev_alloc_skb_ip_align(netdev, len); + if (!skb) { + netdev_err(netdev, "couldn't get memory\n"); + goto rx_drop; + } + + data = skb_put(skb, len); + memcpy_fromio(data, priv->rx_base + rx_slot * priv->slot_size, len); + skb->protocol = eth_type_trans(skb, netdev); + + netdev->stats.rx_packets++; + netdev->stats.rx_bytes += len; + + return netif_rx(skb); + +rx_drop: + netdev->stats.rx_dropped++; + netdev->stats.rx_errors++; + + return NET_RX_DROP; +} + +static irqreturn_t liteeth_interrupt(int irq, void *dev_id) +{ + struct net_device *netdev = dev_id; + struct liteeth *priv = netdev_priv(netdev); + u8 reg; + + reg = litex_read8(priv->base + LITEETH_READER_EV_PENDING); + if (reg) { + if (netif_queue_stopped(netdev)) + netif_wake_queue(netdev); + litex_write8(priv->base + LITEETH_READER_EV_PENDING, reg); + } + + reg = litex_read8(priv->base + LITEETH_WRITER_EV_PENDING); + if (reg) { + liteeth_rx(netdev); + litex_write8(priv->base + LITEETH_WRITER_EV_PENDING, reg); + } + + return IRQ_HANDLED; +} + +static int liteeth_open(struct net_device *netdev) +{ + struct liteeth *priv = netdev_priv(netdev); + int err; + + /* Clear pending events */ + litex_write8(priv->base + LITEETH_WRITER_EV_PENDING, 1); + litex_write8(priv->base + LITEETH_READER_EV_PENDING, 1); + + err = request_irq(netdev->irq, liteeth_interrupt, 0, netdev->name, netdev); + if (err) { + netdev_err(netdev, "failed to request irq %d\n", netdev->irq); + return err; + } + + /* Enable IRQs */ + litex_write8(priv->base + LITEETH_WRITER_EV_ENABLE, 1); + litex_write8(priv->base + LITEETH_READER_EV_ENABLE, 1); + + netif_carrier_on(netdev); + netif_start_queue(netdev); + + return 0; +} + +static int liteeth_stop(struct net_device *netdev) +{ + struct liteeth *priv = netdev_priv(netdev); + + netif_stop_queue(netdev); + netif_carrier_off(netdev); + + litex_write8(priv->base + LITEETH_WRITER_EV_ENABLE, 0); + litex_write8(priv->base + LITEETH_READER_EV_ENABLE, 0); + + free_irq(netdev->irq, netdev); + + return 0; +} + +static int liteeth_start_xmit(struct sk_buff *skb, struct net_device *netdev) +{ + struct liteeth *priv = netdev_priv(netdev); + void __iomem *txbuffer; + + if (!litex_read8(priv->base + LITEETH_READER_READY)) { + if (net_ratelimit()) + netdev_err(netdev, "LITEETH_READER_READY not ready\n"); + + netif_stop_queue(netdev); + + return NETDEV_TX_BUSY; + } + + /* Reject oversize packets */ + if (unlikely(skb->len > priv->slot_size)) { + if (net_ratelimit()) + netdev_err(netdev, "tx packet too big\n"); + + dev_kfree_skb_any(skb); + netdev->stats.tx_dropped++; + netdev->stats.tx_errors++; + + return NETDEV_TX_OK; + } + + txbuffer = priv->tx_base + priv->tx_slot * priv->slot_size; + memcpy_toio(txbuffer, skb->data, skb->len); + litex_write8(priv->base + LITEETH_READER_SLOT, priv->tx_slot); + litex_write16(priv->base + LITEETH_READER_LENGTH, skb->len); + litex_write8(priv->base + LITEETH_READER_START, 1); + + netdev->stats.tx_bytes += skb->len; + netdev->stats.tx_packets++; + + priv->tx_slot = (priv->tx_slot + 1) % priv->num_tx_slots; + dev_kfree_skb_any(skb); + + return NETDEV_TX_OK; +} + +static const struct net_device_ops liteeth_netdev_ops = { + .ndo_open = liteeth_open, + .ndo_stop = liteeth_stop, + .ndo_start_xmit = liteeth_start_xmit, +}; + +static void liteeth_setup_slots(struct liteeth *priv) +{ + struct device_node *np = priv->dev->of_node; + int err; + + err = of_property_read_u32(np, "litex,rx-slots", &priv->num_rx_slots); + if (err) { + dev_dbg(priv->dev, "unable to get litex,rx-slots, using 2\n"); + priv->num_rx_slots = 2; + } + + err = of_property_read_u32(np, "litex,tx-slots", &priv->num_tx_slots); + if (err) { + dev_dbg(priv->dev, "unable to get litex,tx-slots, using 2\n"); + priv->num_tx_slots = 2; + } + + err = of_property_read_u32(np, "litex,slot-size", &priv->slot_size); + if (err) { + dev_dbg(priv->dev, "unable to get litex,slot-size, using 0x800\n"); + priv->slot_size = 0x800; + } +} + +static int liteeth_probe(struct platform_device *pdev) +{ + struct net_device *netdev; + void __iomem *buf_base; + struct resource *res; + struct liteeth *priv; + int irq, err; + + netdev = devm_alloc_etherdev(&pdev->dev, sizeof(*priv)); + if (!netdev) + return -ENOMEM; + + SET_NETDEV_DEV(netdev, &pdev->dev); + platform_set_drvdata(pdev, netdev); + + priv = netdev_priv(netdev); + priv->netdev = netdev; + priv->dev = &pdev->dev; + + irq = platform_get_irq(pdev, 0); + if (irq < 0) { + dev_err(&pdev->dev, "Failed to get IRQ %d\n", irq); + return irq; + } + netdev->irq = irq; + + res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "mac"); + priv->base = devm_ioremap_resource(&pdev->dev, res); + if (IS_ERR(priv->base)) + return PTR_ERR(priv->base); + + res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "buffer"); + buf_base = devm_ioremap_resource(&pdev->dev, res); + if (IS_ERR(buf_base)) + return PTR_ERR(buf_base); + + liteeth_setup_slots(priv); + + /* Rx slots */ + priv->rx_base = buf_base; + priv->rx_slot = 0; + + /* Tx slots come after Rx slots */ + priv->tx_base = buf_base + priv->num_rx_slots * priv->slot_size; + priv->tx_slot = 0; + + err = of_get_mac_address(pdev->dev.of_node, netdev->dev_addr); + if (err) + eth_hw_addr_random(netdev); + + netdev->netdev_ops = &liteeth_netdev_ops; + + err = register_netdev(netdev); + if (err) { + dev_err(&pdev->dev, "Failed to register netdev %d\n", err); + return err; + } + + netdev_info(netdev, "irq %d slots: tx %d rx %d size %d\n", + netdev->irq, priv->num_tx_slots, priv->num_rx_slots, priv->slot_size); + + return 0; +} + +static int liteeth_remove(struct platform_device *pdev) +{ + struct net_device *netdev = platform_get_drvdata(pdev); + + unregister_netdev(netdev); + free_netdev(netdev); + + return 0; +} + +static const struct of_device_id liteeth_of_match[] = { + { .compatible = "litex,liteeth" }, + { } +}; +MODULE_DEVICE_TABLE(of, liteeth_of_match); + +static struct platform_driver liteeth_driver = { + .probe = liteeth_probe, + .remove = liteeth_remove, + .driver = { + .name = DRV_NAME, + .of_match_table = liteeth_of_match, + }, +}; +module_platform_driver(liteeth_driver); + +MODULE_AUTHOR("Joel Stanley "); +MODULE_LICENSE("GPL");