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[80.251.214.228]) by smtp.gmail.com with ESMTPSA id z24sm18708230pjq.43.2021.08.23.02.56.19 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 23 Aug 2021 02:56:21 -0700 (PDT) From: Shawn Guo To: Georgi Djakov Cc: AngeloGioacchino Del Regno , Bjorn Andersson , Rob Herring , devicetree@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-pm@vger.kernel.org, Shawn Guo Subject: [PATCH 1/3] dt-bindings: interconnect: sdm660: Add missing a2noc qos clocks Date: Mon, 23 Aug 2021 17:56:01 +0800 Message-Id: <20210823095603.5538-2-shawn.guo@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20210823095603.5538-1-shawn.guo@linaro.org> References: <20210823095603.5538-1-shawn.guo@linaro.org> Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org It adds the missing a2noc clocks required for QoS registers programming per downstream kernel[1]. [1] https://source.codeaurora.org/quic/la/kernel/msm-4.4/tree/arch/arm/boot/dts/qcom/sdm660-bus.dtsi?h=LA.UM.8.2.r1-04800-sdm660.0#n43 Signed-off-by: Shawn Guo --- .../bindings/interconnect/qcom,sdm660.yaml | 41 ++++++++++++++++++- 1 file changed, 39 insertions(+), 2 deletions(-) -- 2.17.1 diff --git a/Documentation/devicetree/bindings/interconnect/qcom,sdm660.yaml b/Documentation/devicetree/bindings/interconnect/qcom,sdm660.yaml index 29de7807df54..19bc3091ea40 100644 --- a/Documentation/devicetree/bindings/interconnect/qcom,sdm660.yaml +++ b/Documentation/devicetree/bindings/interconnect/qcom,sdm660.yaml @@ -72,6 +72,32 @@ allOf: contains: enum: - qcom,sdm660-a2noc + then: + properties: + clocks: + items: + - description: Bus Clock. + - description: Bus A Clock. + - description: IPA Clock. + - description: UFS AXI Clock. + - description: Aggregate2 UFS AXI Clock. + - description: Aggregate2 USB3 AXI Clock. + - description: Config NoC USB2 AXI Clock. + clock-names: + items: + - const: bus + - const: bus_a + - const: ipa + - const: ufs_axi + - const: aggre2_ufs_axi + - const: aggre2_usb3_axi + - const: cfg_noc_usb2_axi + + - if: + properties: + compatible: + contains: + enum: - qcom,sdm660-bimc - qcom,sdm660-cnoc - qcom,sdm660-gnoc @@ -123,9 +149,20 @@ examples: compatible = "qcom,sdm660-a2noc"; reg = <0x01704000 0xc100>; #interconnect-cells = <1>; - clock-names = "bus", "bus_a"; + clock-names = "bus", + "bus_a", + "ipa", + "ufs_axi", + "aggre2_ufs_axi", + "aggre2_usb3_axi", + "cfg_noc_usb2_axi"; clocks = <&rpmcc RPM_SMD_AGGR2_NOC_CLK>, - <&rpmcc RPM_SMD_AGGR2_NOC_A_CLK>; + <&rpmcc RPM_SMD_AGGR2_NOC_A_CLK>, + <&rpmcc RPM_SMD_IPA_CLK>, + <&gcc GCC_UFS_AXI_CLK>, + <&gcc GCC_AGGRE2_UFS_AXI_CLK>, + <&gcc GCC_AGGRE2_USB3_AXI_CLK>, + <&gcc GCC_CFG_NOC_USB2_AXI_CLK>; }; mnoc: interconnect@1745000 { From patchwork Mon Aug 23 09:56:02 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Shawn Guo X-Patchwork-Id: 501622 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id D9D6CC00143 for ; Mon, 23 Aug 2021 09:56:27 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id C2C136137B for ; Mon, 23 Aug 2021 09:56:27 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235870AbhHWJ5I (ORCPT ); Mon, 23 Aug 2021 05:57:08 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:50914 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232850AbhHWJ5H (ORCPT ); Mon, 23 Aug 2021 05:57:07 -0400 Received: from mail-pl1-x630.google.com (mail-pl1-x630.google.com [IPv6:2607:f8b0:4864:20::630]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id DC38CC061757 for ; Mon, 23 Aug 2021 02:56:24 -0700 (PDT) Received: by mail-pl1-x630.google.com with SMTP id e15so9823301plh.8 for ; Mon, 23 Aug 2021 02:56:24 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=YgI5dSo1rEo/T5lu/F1tJ8HTg39LuCdrSBpCETyTyKc=; b=fCVgWBkqqxB2VWxndj2ZNMXH/u9E53XphBp7R9cM0AosvnjzbBlwVUm6Z8ClH1UUki lba1retD9gqFz4AD+A1bRjssUR5FG38+dNphX6kLgLTNGPAlaRWOC9IxENZTFuQSCyHW Fu7icMrnpqzxug0ECpFphrKq22JWcqCt75t+iB9dsrTw2JNIbWlsdTtPA8H/1WmJm+qK xvUIYVHLMJX/jHmZhO0OWESPJJnwsK4SEwh4hhaECxANTSApsZYK7zhQb6FRnh5w+8PG FQsefcrAyYzRhthlGy5jGapJ2v2NbaLTD354pxsREul/54yvCPsGNpb2gH13HhZRbS3v Gxgg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=YgI5dSo1rEo/T5lu/F1tJ8HTg39LuCdrSBpCETyTyKc=; b=CkjllDrKK11SIlae7bJ7tzsrOlpIPyEpewyGAG16hwVdQPD0Fmri5t5oEehb3hufCz +8ky/WwhiwfLP2aIpQoY2oQCcyPz9pRnbdN6dYR3Z4pvZIB+ahhQf5sTgOHNj1S+T+wC h7ZV84H4LbRN9lRYZZhWn8yFLoMLfm8m/O/7tOs+h1XAGEWWmVeID2AkElOhcGHW4IM2 xm3vQjxu8b8O3G+ZaGom212YRZ63AP26dno8C2WXiSyaR1zfprRCra2aoqsIfFiJTmJT 0O9eB/+HoaC1LAFu83KfvOL8fhGC13HGykVIJnscT6J4Y/Kdi2EPphk/PipkCL8TVYW2 1ofg== X-Gm-Message-State: AOAM530srbPwMoFmrH3sx2ri8m948/rZSrOxQ2rYk2CFbHr5LL1sdSCk I38LlAUxrRfWbovb59wI7hWyWA== X-Google-Smtp-Source: ABdhPJzXhpIwSbmq3vyin7oSjRPegikoV1A3ObQFHtjf4gYuy+4iaQDvZLveI+G10hrf5CZsbCiw3A== X-Received: by 2002:a17:903:31cd:b0:134:5b6f:2ff8 with SMTP id v13-20020a17090331cd00b001345b6f2ff8mr3956135ple.46.1629712584447; Mon, 23 Aug 2021 02:56:24 -0700 (PDT) Received: from localhost.localdomain (80.251.214.228.16clouds.com. [80.251.214.228]) by smtp.gmail.com with ESMTPSA id z24sm18708230pjq.43.2021.08.23.02.56.22 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 23 Aug 2021 02:56:24 -0700 (PDT) From: Shawn Guo To: Georgi Djakov Cc: AngeloGioacchino Del Regno , Bjorn Andersson , Rob Herring , devicetree@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-pm@vger.kernel.org, Shawn Guo Subject: [PATCH 2/3] interconnect: qcom: sdm660: Add missing a2noc qos clocks Date: Mon, 23 Aug 2021 17:56:02 +0800 Message-Id: <20210823095603.5538-3-shawn.guo@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20210823095603.5538-1-shawn.guo@linaro.org> References: <20210823095603.5538-1-shawn.guo@linaro.org> Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org It adds the missing a2noc clocks required for QoS registers programming per downstream kernel[1]. Otherwise, qcom_icc_noc_set_qos_priority() call on mas_ufs or mas_usb_hs node will simply result in a hardware hang on SDM660 SoC. [1] https://source.codeaurora.org/quic/la/kernel/msm-4.4/tree/arch/arm/boot/dts/qcom/sdm660-bus.dtsi?h=LA.UM.8.2.r1-04800-sdm660.0#n43 Signed-off-by: Shawn Guo Tested-by: Bjorn Andersson --- drivers/interconnect/qcom/sdm660.c | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/drivers/interconnect/qcom/sdm660.c b/drivers/interconnect/qcom/sdm660.c index c89c991a80a0..661eb3635d21 100644 --- a/drivers/interconnect/qcom/sdm660.c +++ b/drivers/interconnect/qcom/sdm660.c @@ -174,6 +174,16 @@ static const struct clk_bulk_data bus_mm_clocks[] = { { .id = "iface" }, }; +static const struct clk_bulk_data bus_a2noc_clocks[] = { + { .id = "bus" }, + { .id = "bus_a" }, + { .id = "ipa" }, + { .id = "ufs_axi" }, + { .id = "aggre2_ufs_axi" }, + { .id = "aggre2_usb3_axi" }, + { .id = "cfg_noc_usb2_axi" }, +}; + /** * struct qcom_icc_provider - Qualcomm specific interconnect provider * @provider: generic interconnect provider @@ -811,6 +821,10 @@ static int qnoc_probe(struct platform_device *pdev) qp->bus_clks = devm_kmemdup(dev, bus_mm_clocks, sizeof(bus_mm_clocks), GFP_KERNEL); qp->num_clks = ARRAY_SIZE(bus_mm_clocks); + } else if (of_device_is_compatible(dev->of_node, "qcom,sdm660-a2noc")) { + qp->bus_clks = devm_kmemdup(dev, bus_a2noc_clocks, + sizeof(bus_a2noc_clocks), GFP_KERNEL); + qp->num_clks = ARRAY_SIZE(bus_a2noc_clocks); } else { if (of_device_is_compatible(dev->of_node, "qcom,sdm660-bimc")) qp->is_bimc_node = true; From patchwork Mon Aug 23 09:56:03 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Shawn Guo X-Patchwork-Id: 501542 Delivered-To: patch@linaro.org Received: by 2002:a02:6f15:0:0:0:0:0 with SMTP id x21csp2020006jab; Mon, 23 Aug 2021 02:56:29 -0700 (PDT) X-Google-Smtp-Source: ABdhPJwvHjgdkvA4+CXpE22ZO+cmyFlmAf6H471GLiRegOr/aQyLFBMqMoCtjV/8Imit3OT506eH X-Received: by 2002:a17:906:7256:: with SMTP id n22mr34343941ejk.173.1629712589550; Mon, 23 Aug 2021 02:56:29 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1629712589; cv=none; d=google.com; s=arc-20160816; b=ouZ/NlvsKGg1KqKC5iD+LWXuODHOydEGRXhjZnfeZA2s9T7iypZwdsDS57fQ9v0gTL 0QOgookP/YlwwOmUlS83ygLjzvuAj1xYtOinVtlPr60bQJ3o6QH8B82IFI1pxvrtkXV9 a5bTpy1YjJ1uEfLbo2R+M4I/ih8TAP4MOuLzbb8mU1XCeDbpTTjmFGYSvvleTmzTbS2A nRdwbXlFKKE2REBVwNeo4MmaGLqAER6fgWD7HP40YRJ9O+qeLl62kNkNRHtMM4fiAZhn cF4wAfY7iCRS461FBdbbGkbc5kG7xKH43Fp8wOYkf4BG/p4qcq2j19SZx04PZGNmv/Xb cn5w== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:references:in-reply-to:message-id:date:subject :cc:to:from:dkim-signature; bh=BE8fpo1IPS4WaWbrwgpc41ljoGnxNleD3tBDfDXUpo0=; b=kw4R0Aix/wGGBjy08YadOl5wVMPvg8SAdvHSezsKBncrVmxFUMyBijFevV2y6WzafZ PsByFNWjcPUM9ZML0L6Y9ruj9RwnOlDF2AuL2kUrElkkvV7Io7I+ivZXklmQJ3T9skA3 uJnbxdP+rJi8EuCTTFYgS/gV3c3triNoF6bSNWu0Cu9tNc+yE58ST1ojG1aZZN1lJcm2 F+Hh7zie2tXYEVdf4WHjpOyFn1kFEVW4dXRHA2IFRfKRu6xG0qe6v3ClFEvpFv3fVovq roo/6fZJKnVVRif2PfPXi5zBpL6pi31gdBoJs4qeAnrL/ulTZNdLZAe7XUqBf6cdxmfa Bo1A== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=sz+peK4y; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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[80.251.214.228]) by smtp.gmail.com with ESMTPSA id z24sm18708230pjq.43.2021.08.23.02.56.24 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 23 Aug 2021 02:56:26 -0700 (PDT) From: Shawn Guo To: Georgi Djakov Cc: AngeloGioacchino Del Regno , Bjorn Andersson , Rob Herring , devicetree@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-pm@vger.kernel.org, Shawn Guo Subject: [PATCH 3/3] arm64: dts: qcom: sdm630: Add missing a2noc qos clocks Date: Mon, 23 Aug 2021 17:56:03 +0800 Message-Id: <20210823095603.5538-4-shawn.guo@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20210823095603.5538-1-shawn.guo@linaro.org> References: <20210823095603.5538-1-shawn.guo@linaro.org> Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org It adds the missing a2noc clocks required for QoS registers programming per downstream kernel[1]. [1] https://source.codeaurora.org/quic/la/kernel/msm-4.4/tree/arch/arm/boot/dts/qcom/sdm660-bus.dtsi?h=LA.UM.8.2.r1-04800-sdm660.0#n43 Signed-off-by: Shawn Guo --- arch/arm64/boot/dts/qcom/sdm630.dtsi | 17 ++++++++++++++--- 1 file changed, 14 insertions(+), 3 deletions(-) -- 2.17.1 diff --git a/arch/arm64/boot/dts/qcom/sdm630.dtsi b/arch/arm64/boot/dts/qcom/sdm630.dtsi index 9153e6616ba4..b3a7f3bf1560 100644 --- a/arch/arm64/boot/dts/qcom/sdm630.dtsi +++ b/arch/arm64/boot/dts/qcom/sdm630.dtsi @@ -652,11 +652,22 @@ a2noc: interconnect@1704000 { compatible = "qcom,sdm660-a2noc"; - reg = <0x01704000 0xc100>; + reg = <0x01704000 0x1c000>; #interconnect-cells = <1>; - clock-names = "bus", "bus_a"; + clock-names = "bus", + "bus_a", + "ipa", + "ufs_axi", + "aggre2_ufs_axi", + "aggre2_usb3_axi", + "cfg_noc_usb2_axi"; clocks = <&rpmcc RPM_SMD_AGGR2_NOC_CLK>, - <&rpmcc RPM_SMD_AGGR2_NOC_A_CLK>; + <&rpmcc RPM_SMD_AGGR2_NOC_A_CLK>, + <&rpmcc RPM_SMD_IPA_CLK>, + <&gcc GCC_UFS_AXI_CLK>, + <&gcc GCC_AGGRE2_UFS_AXI_CLK>, + <&gcc GCC_AGGRE2_USB3_AXI_CLK>, + <&gcc GCC_CFG_NOC_USB2_AXI_CLK>; }; mnoc: interconnect@1745000 {