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[77.136.240.151]) by smtp.gmail.com with ESMTPSA id t24-v6sm14080377wra.5.2018.10.05.07.36.03 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Fri, 05 Oct 2018 07:36:04 -0700 (PDT) From: Daniel Lezcano To: tglx@linutronix.de Cc: linux-kernel@vger.kernel.org, Rob Herring , Michal Simek , linux-arm-kernel@lists.infradead.org Subject: [PATCH 01/13] clocksource: Convert to using %pOFn instead of device_node.name Date: Fri, 5 Oct 2018 16:35:30 +0200 Message-Id: <1538750143-4282-1-git-send-email-daniel.lezcano@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <20181005143253.GE1881@mai> References: <20181005143253.GE1881@mai> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Rob Herring In preparation to remove the node name pointer from struct device_node, convert printf users to use the %pOFn format specifier. Cc: Daniel Lezcano Cc: Thomas Gleixner Cc: Michal Simek Cc: linux-arm-kernel@lists.infradead.org Signed-off-by: Rob Herring Signed-off-by: Daniel Lezcano --- drivers/clocksource/asm9260_timer.c | 2 +- drivers/clocksource/cadence_ttc_timer.c | 2 +- drivers/clocksource/dw_apb_timer_of.c | 8 ++++---- drivers/clocksource/pxa_timer.c | 6 +++--- drivers/clocksource/time-orion.c | 8 ++++---- drivers/clocksource/timer-integrator-ap.c | 2 +- drivers/clocksource/timer-sp804.c | 2 +- drivers/clocksource/zevio-timer.c | 8 ++++---- 8 files changed, 19 insertions(+), 19 deletions(-) -- 2.7.4 Acked-by: Michal Simek diff --git a/drivers/clocksource/asm9260_timer.c b/drivers/clocksource/asm9260_timer.c index 38cd2fe..fbaee04 100644 --- a/drivers/clocksource/asm9260_timer.c +++ b/drivers/clocksource/asm9260_timer.c @@ -193,7 +193,7 @@ static int __init asm9260_timer_init(struct device_node *np) priv.base = of_io_request_and_map(np, 0, np->name); if (IS_ERR(priv.base)) { - pr_err("%s: unable to map resource\n", np->name); + pr_err("%pOFn: unable to map resource\n", np); return PTR_ERR(priv.base); } diff --git a/drivers/clocksource/cadence_ttc_timer.c b/drivers/clocksource/cadence_ttc_timer.c index 29d5175..b334029 100644 --- a/drivers/clocksource/cadence_ttc_timer.c +++ b/drivers/clocksource/cadence_ttc_timer.c @@ -535,7 +535,7 @@ static int __init ttc_timer_init(struct device_node *timer) if (ret) return ret; - pr_info("%s #0 at %p, irq=%d\n", timer->name, timer_baseaddr, irq); + pr_info("%pOFn #0 at %p, irq=%d\n", timer, timer_baseaddr, irq); return 0; } diff --git a/drivers/clocksource/dw_apb_timer_of.c b/drivers/clocksource/dw_apb_timer_of.c index 69866cd..fabaa29 100644 --- a/drivers/clocksource/dw_apb_timer_of.c +++ b/drivers/clocksource/dw_apb_timer_of.c @@ -33,7 +33,7 @@ static void __init timer_get_base_and_rate(struct device_node *np, *base = of_iomap(np, 0); if (!*base) - panic("Unable to map regs for %s", np->name); + panic("Unable to map regs for %pOFn", np); /* * Not all implementations use a periphal clock, so don't panic @@ -42,8 +42,8 @@ static void __init timer_get_base_and_rate(struct device_node *np, pclk = of_clk_get_by_name(np, "pclk"); if (!IS_ERR(pclk)) if (clk_prepare_enable(pclk)) - pr_warn("pclk for %s is present, but could not be activated\n", - np->name); + pr_warn("pclk for %pOFn is present, but could not be activated\n", + np); timer_clk = of_clk_get_by_name(np, "timer"); if (IS_ERR(timer_clk)) @@ -57,7 +57,7 @@ static void __init timer_get_base_and_rate(struct device_node *np, try_clock_freq: if (of_property_read_u32(np, "clock-freq", rate) && of_property_read_u32(np, "clock-frequency", rate)) - panic("No clock nor clock-frequency property for %s", np->name); + panic("No clock nor clock-frequency property for %pOFn", np); } static void __init add_clockevent(struct device_node *event_timer) diff --git a/drivers/clocksource/pxa_timer.c b/drivers/clocksource/pxa_timer.c index 08cd6eaf..3958379 100644 --- a/drivers/clocksource/pxa_timer.c +++ b/drivers/clocksource/pxa_timer.c @@ -191,13 +191,13 @@ static int __init pxa_timer_dt_init(struct device_node *np) /* timer registers are shared with watchdog timer */ timer_base = of_iomap(np, 0); if (!timer_base) { - pr_err("%s: unable to map resource\n", np->name); + pr_err("%pOFn: unable to map resource\n", np); return -ENXIO; } clk = of_clk_get(np, 0); if (IS_ERR(clk)) { - pr_crit("%s: unable to get clk\n", np->name); + pr_crit("%pOFn: unable to get clk\n", np); return PTR_ERR(clk); } @@ -210,7 +210,7 @@ static int __init pxa_timer_dt_init(struct device_node *np) /* we are only interested in OS-timer0 irq */ irq = irq_of_parse_and_map(np, 0); if (irq <= 0) { - pr_crit("%s: unable to parse OS-timer0 irq\n", np->name); + pr_crit("%pOFn: unable to parse OS-timer0 irq\n", np); return -EINVAL; } diff --git a/drivers/clocksource/time-orion.c b/drivers/clocksource/time-orion.c index 1220206..7d487107 100644 --- a/drivers/clocksource/time-orion.c +++ b/drivers/clocksource/time-orion.c @@ -129,13 +129,13 @@ static int __init orion_timer_init(struct device_node *np) /* timer registers are shared with watchdog timer */ timer_base = of_iomap(np, 0); if (!timer_base) { - pr_err("%s: unable to map resource\n", np->name); + pr_err("%pOFn: unable to map resource\n", np); return -ENXIO; } clk = of_clk_get(np, 0); if (IS_ERR(clk)) { - pr_err("%s: unable to get clk\n", np->name); + pr_err("%pOFn: unable to get clk\n", np); return PTR_ERR(clk); } @@ -148,7 +148,7 @@ static int __init orion_timer_init(struct device_node *np) /* we are only interested in timer1 irq */ irq = irq_of_parse_and_map(np, 1); if (irq <= 0) { - pr_err("%s: unable to parse timer1 irq\n", np->name); + pr_err("%pOFn: unable to parse timer1 irq\n", np); return -EINVAL; } @@ -174,7 +174,7 @@ static int __init orion_timer_init(struct device_node *np) /* setup timer1 as clockevent timer */ ret = setup_irq(irq, &orion_clkevt_irq); if (ret) { - pr_err("%s: unable to setup irq\n", np->name); + pr_err("%pOFn: unable to setup irq\n", np); return ret; } diff --git a/drivers/clocksource/timer-integrator-ap.c b/drivers/clocksource/timer-integrator-ap.c index 62d2469..76e526f 100644 --- a/drivers/clocksource/timer-integrator-ap.c +++ b/drivers/clocksource/timer-integrator-ap.c @@ -190,7 +190,7 @@ static int __init integrator_ap_timer_init_of(struct device_node *node) clk = of_clk_get(node, 0); if (IS_ERR(clk)) { - pr_err("No clock for %s\n", node->name); + pr_err("No clock for %pOFn\n", node); return PTR_ERR(clk); } clk_prepare_enable(clk); diff --git a/drivers/clocksource/timer-sp804.c b/drivers/clocksource/timer-sp804.c index e01222e..052b230 100644 --- a/drivers/clocksource/timer-sp804.c +++ b/drivers/clocksource/timer-sp804.c @@ -249,7 +249,7 @@ static int __init sp804_of_init(struct device_node *np) if (of_clk_get_parent_count(np) == 3) { clk2 = of_clk_get(np, 1); if (IS_ERR(clk2)) { - pr_err("sp804: %s clock not found: %d\n", np->name, + pr_err("sp804: %pOFn clock not found: %d\n", np, (int)PTR_ERR(clk2)); clk2 = NULL; } diff --git a/drivers/clocksource/zevio-timer.c b/drivers/clocksource/zevio-timer.c index f746893..6127e80 100644 --- a/drivers/clocksource/zevio-timer.c +++ b/drivers/clocksource/zevio-timer.c @@ -148,12 +148,12 @@ static int __init zevio_timer_add(struct device_node *node) of_address_to_resource(node, 0, &res); scnprintf(timer->clocksource_name, sizeof(timer->clocksource_name), - "%llx.%s_clocksource", - (unsigned long long)res.start, node->name); + "%llx.%pOFn_clocksource", + (unsigned long long)res.start, node); scnprintf(timer->clockevent_name, sizeof(timer->clockevent_name), - "%llx.%s_clockevent", - (unsigned long long)res.start, node->name); + "%llx.%pOFn_clockevent", + (unsigned long long)res.start, node); if (timer->interrupt_regs && irqnr) { timer->clkevt.name = timer->clockevent_name; From patchwork Fri Oct 5 14:35:31 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Lezcano X-Patchwork-Id: 148181 Delivered-To: patch@linaro.org Received: by 2002:a2e:8595:0:0:0:0:0 with SMTP id b21-v6csp527576lji; Fri, 5 Oct 2018 07:36:12 -0700 (PDT) X-Google-Smtp-Source: ACcGV62zgWn1KgCNvbM51ZWCoIgoCUNMQUk8L+G+4XRTQkeZHi0OKRNPIRHZVYflyCIQMPDc/Hih X-Received: by 2002:a17:902:694a:: with SMTP id k10-v6mr11854113plt.166.1538750172004; Fri, 05 Oct 2018 07:36:12 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1538750171; cv=none; d=google.com; s=arc-20160816; b=tRvX/AzJqPHZVxpEq1Sl2gnSqke3EFGH13K3oI7FVq9Edl5hPc5ecnNWrzzX/4up8q 6kDjVTuCA6POqpqkMk20g053ggcBXVsqDY5bQNOlmpVJNkHW9YKv9ipzrFXaTWlmdVgc sDb926Li4T+JWzPBQHnul2nPne1hfMT4TdiwBZ8rdsU9Ad2u5ct1TmAHPO08xxJtZN+f yiu73l2v9FOj2wRXxo9m+kk+SMCouTFfZYhgvd0ydpyRAmDcPj9oTeGaJObF/ON6j0fI rnDlCr8dnVCIf8jn/e4dQF8GJFrz+Wbjrkti6Gd6VE3zFmWPYYzst50F+zwrfuFNAuAd 5Afw== ARC-Message-Signature: i=1; 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[77.136.240.151]) by smtp.gmail.com with ESMTPSA id t24-v6sm14080377wra.5.2018.10.05.07.36.05 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Fri, 05 Oct 2018 07:36:05 -0700 (PDT) From: Daniel Lezcano To: tglx@linutronix.de Cc: linux-kernel@vger.kernel.org, Kuninori Morimoto Subject: [PATCH 02/13] clocksource/drivers/renesas-ostm: Convert to SPDX identifiers Date: Fri, 5 Oct 2018 16:35:31 +0200 Message-Id: <1538750143-4282-2-git-send-email-daniel.lezcano@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1538750143-4282-1-git-send-email-daniel.lezcano@linaro.org> References: <20181005143253.GE1881@mai> <1538750143-4282-1-git-send-email-daniel.lezcano@linaro.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Kuninori Morimoto This patch updates license to use SPDX-License-Identifier instead of verbose license text. Signed-off-by: Kuninori Morimoto Reviewed-by: Simon Horman Signed-off-by: Daniel Lezcano --- drivers/clocksource/renesas-ostm.c | 11 +---------- 1 file changed, 1 insertion(+), 10 deletions(-) -- 2.7.4 diff --git a/drivers/clocksource/renesas-ostm.c b/drivers/clocksource/renesas-ostm.c index 6cffd7c..61d5f3b 100644 --- a/drivers/clocksource/renesas-ostm.c +++ b/drivers/clocksource/renesas-ostm.c @@ -1,18 +1,9 @@ +// SPDX-License-Identifier: GPL-2.0 /* * Renesas Timer Support - OSTM * * Copyright (C) 2017 Renesas Electronics America, Inc. * Copyright (C) 2017 Chris Brandt - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * */ #include From patchwork Fri Oct 5 14:35:32 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Lezcano X-Patchwork-Id: 148182 Delivered-To: patch@linaro.org Received: by 2002:a2e:8595:0:0:0:0:0 with SMTP id b21-v6csp527616lji; Fri, 5 Oct 2018 07:36:14 -0700 (PDT) X-Google-Smtp-Source: ACcGV63YRfujAab2VORY5K93Bc0utKOhlDtBosYyjsLHi5kLa8WKxs5jYJNp/2CnDrBt8+xr/N/I X-Received: by 2002:a65:498b:: with SMTP id r11-v6mr10426353pgs.153.1538750174464; Fri, 05 Oct 2018 07:36:14 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1538750174; cv=none; d=google.com; s=arc-20160816; b=fxOyOjzXokeKUAXuwsDhE7XuHaHt3LWyz8VUY17E2zYfGWLbNo7LGq9J3RsUk3V7IO OvEZ10k8yFid8zmvXwoGGhSCW4RBnZOraEUZDR2pkCjsADbHKghQWuc51fD4ReB7yPsa 7V3mx0d2BCciaxIDNs/hhHw3OTILy8NlxMiuG5CjsRl3C5fcJ2GUiskXlZ8uPjBXLFsZ IfISXVPLM6Ch59maPa0/VM4k1ZmPSWi8hsnPw4G/1CDBpGPGqc75Vz5AcsNYd0UIr0rH eW5gnnkEHXSOSeXckWgGSfMymsWcJrJjAkWRuzobu1/aZ2yaZXxS86fsDZIy9fVW7ALp 1XLA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature; bh=NpC2myP4enAh1elLwx8oabXUJ3NuAsB2wIpuUzakzrk=; b=ytBm4lNw5h8ZhatHJn5qSEWB3VZ93EzEdKtAEbdrX3K3YXF9uGo0N1GueS+5kS+hVV oGeH5DlNYWhfXHSeyeEPnF1rCoUOW8ztE/z6EkYvcJDLxDxCocsxLczWpyrAEM77GLZm uorH+qf2DhJRvxKw8NO35WJeTZpGQYIbAYxsfk4lXZon9axDTbL6g9rmLz0rwfiTPUwA ENb9JiIXboFoyatHdap60Q7hQMif/yVZ+K5Fj5CZoxSr3QnJ9jBdNEjtZku1++NVk8Li 9zPOqRK/1aISuq72BPyMeYVYEHELajde1bEReuGRWAvz0OKvcZS7bOdVrFvQ/v7OgoLi ocIg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=GRUMqaP6; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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[77.136.240.151]) by smtp.gmail.com with ESMTPSA id t24-v6sm14080377wra.5.2018.10.05.07.36.06 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Fri, 05 Oct 2018 07:36:07 -0700 (PDT) From: Daniel Lezcano To: tglx@linutronix.de Cc: linux-kernel@vger.kernel.org, Kuninori Morimoto Subject: [PATCH 03/13] clocksource/drivers/sh_cmt: Convert to SPDX identifiers Date: Fri, 5 Oct 2018 16:35:32 +0200 Message-Id: <1538750143-4282-3-git-send-email-daniel.lezcano@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1538750143-4282-1-git-send-email-daniel.lezcano@linaro.org> References: <20181005143253.GE1881@mai> <1538750143-4282-1-git-send-email-daniel.lezcano@linaro.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Kuninori Morimoto This patch updates license to use SPDX-License-Identifier instead of verbose license text. Signed-off-by: Kuninori Morimoto Reviewed-by: Simon Horman Signed-off-by: Daniel Lezcano --- drivers/clocksource/sh_cmt.c | 10 +--------- 1 file changed, 1 insertion(+), 9 deletions(-) -- 2.7.4 diff --git a/drivers/clocksource/sh_cmt.c b/drivers/clocksource/sh_cmt.c index bbbf37c..6f65cf8 100644 --- a/drivers/clocksource/sh_cmt.c +++ b/drivers/clocksource/sh_cmt.c @@ -1,16 +1,8 @@ +// SPDX-License-Identifier: GPL-2.0 /* * SuperH Timer Support - CMT * * Copyright (C) 2008 Magnus Damm - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. */ #include From patchwork Fri Oct 5 14:35:33 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Lezcano X-Patchwork-Id: 148183 Delivered-To: patch@linaro.org Received: by 2002:a2e:8595:0:0:0:0:0 with SMTP id b21-v6csp527634lji; Fri, 5 Oct 2018 07:36:16 -0700 (PDT) X-Google-Smtp-Source: ACcGV62wiZwhAwGEB1iFlgEfCTgx1CdDlAj6/t9t/dUpaYW49gvb77zLGKt5XLo41cpNcY14CiA0 X-Received: by 2002:a17:902:e111:: with SMTP id cc17-v6mr11909799plb.175.1538750175838; Fri, 05 Oct 2018 07:36:15 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1538750175; cv=none; d=google.com; s=arc-20160816; b=trkJfiuUYglTmRkHsGSei6W4GxWq+dP0RLV0MvNO2Omrg6ExV1b/vhMh92XaRP25A/ dWhEUgMmTOw7IFhcvo1YFCyu/yABUO+HxjyR8Fxuyx7O7YLbdaB8KTB2kAhagWrX7WaT M1cI0jdknYOKSG/cmj8gkLP08GnZ1tVMkN4WVJhLoFA/d0hcgpsoDh+cXjSisR8VdR3v BPDKGnCDyxJra5CgKS8Yte60iNxZacuRdYBMO+qFZUkVBKpt3MAF+HCgw3+MqXM9EU5l tcKC4EgY7XjAJwWDnoRxRSXHpV3nLlkr9uayAP7tpKSxc/CmwTTiVgrBwEkIjP3L9SO3 P0CA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature; bh=vSrYxtFz1N3wcfgTO4N+fFrZV9HHfo3EByRhA0R0oWU=; b=jjLfSj1tnQz+BL9KT2IcOQrbZwqM7schZ0eB/TJESscnHw+w5Tz3ojdcaTqxb8/Lq0 inP0OLlZlXpfbxUTeXXf3pY6rkMOgfOpWKRmXa2AKvtlYUlXo9HHa4v0LwYe47m5Bnuq 0kyHZziQOwdW9yD13Iuyqk/aOeggU0cvpXtNhiiSeHf8Td+V2ilbZtfdgQTDrvfacOoq JhJC8VVn6OoBn0t6qafHkQPzCvhiAJHFXUdiA5m2J7Z5Av1ZhE6JbudrWIj/wAmZFcyF 6tE3kRuhvDy/Qg9v3ubqBZHXLLxMYQsWlRN1VeHjGo1YxKcEX3UPHEA3I89ohTLUUtAP MFag== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=IIcK5CjK; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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[77.136.240.151]) by smtp.gmail.com with ESMTPSA id t24-v6sm14080377wra.5.2018.10.05.07.36.08 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Fri, 05 Oct 2018 07:36:09 -0700 (PDT) From: Daniel Lezcano To: tglx@linutronix.de Cc: linux-kernel@vger.kernel.org, Kuninori Morimoto Subject: [PATCH 04/13] clocksource/drivers/sh_mtu2: Convert to SPDX identifiers Date: Fri, 5 Oct 2018 16:35:33 +0200 Message-Id: <1538750143-4282-4-git-send-email-daniel.lezcano@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1538750143-4282-1-git-send-email-daniel.lezcano@linaro.org> References: <20181005143253.GE1881@mai> <1538750143-4282-1-git-send-email-daniel.lezcano@linaro.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Kuninori Morimoto This patch updates license to use SPDX-License-Identifier instead of verbose license text. Signed-off-by: Kuninori Morimoto Reviewed-by: Simon Horman Signed-off-by: Daniel Lezcano --- drivers/clocksource/sh_mtu2.c | 10 +--------- 1 file changed, 1 insertion(+), 9 deletions(-) -- 2.7.4 diff --git a/drivers/clocksource/sh_mtu2.c b/drivers/clocksource/sh_mtu2.c index 6812e09..354b27d 100644 --- a/drivers/clocksource/sh_mtu2.c +++ b/drivers/clocksource/sh_mtu2.c @@ -1,16 +1,8 @@ +// SPDX-License-Identifier: GPL-2.0 /* * SuperH Timer Support - MTU2 * * Copyright (C) 2009 Magnus Damm - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. */ #include From patchwork Fri Oct 5 14:35:34 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Lezcano X-Patchwork-Id: 148184 Delivered-To: patch@linaro.org Received: by 2002:a2e:8595:0:0:0:0:0 with SMTP id b21-v6csp527655lji; Fri, 5 Oct 2018 07:36:17 -0700 (PDT) X-Google-Smtp-Source: ACcGV61bfpapxTpMbHafp/P2u/sLXcMlzKyqDZ+IgAiW7xWCoizpKpEdcG9pQq4AfornawHhE2w9 X-Received: by 2002:a17:902:9b84:: with SMTP id y4-v6mr12091247plp.332.1538750176940; Fri, 05 Oct 2018 07:36:16 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1538750176; cv=none; d=google.com; s=arc-20160816; b=N5j5RX98a41y3LpF/PbW39WGqeWVH6eBBz/TI0D5i9bQXxCr+gC22zwwiMjI57jDaE NyCDclP4dvdnmZbToK2wx9VrCnHXrs/l/4Nr8RFwxORjGt00gU/+AQ0Lur6erPMsFOkA PbiEOCB/WRXQ5rf9pa6P9x7G9W6Xa6TmSxzacK2U0e3PJmNowXXuI+PSgjFcotBo/kS/ L58lfRXWuiW5OhHnBV7oLZ1SnaQx8UHjkMlddnemBwq7QR4+ASKt/WGEFb9kbGiCu/5C zSAu138N+LuBB/h3aTSLAGx6PHktkyKNjmgs2aNzER+8GvxY1eX8YIaFOvH4RumJH7hs LaTA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature; bh=sXoDlSPIn523AVdKM/v0uZychMluY0rp5+e9GQuiKvI=; b=Y7Wqsw9GnoWudXfNgHbNEd0BZee9EhavUmY9orf71/yEMOdNno8RJM4DqZZBAUGc7A Aiy8yj7I4FyvniORY/XOK0tP7DYIYZJ3PzIxsx4A0jlPT0FmmFw8sY/GiIBoJIQunkBN usuLMppmh7qhuVcpn52B1BO/IMBFELKiYRYOPwpcTSq2UELDefGvnmbVPVeX9NadyYev UhTV6r4VCCiOJUPp5qwxCKXkxci2/tiHIHV9BpTJS0uwsX7JmG24jJrkbmWDLupD1LLL spRyf2SDzEs14mOMpjhPBcZmeGjP73+wNqgPFDUxrmKA+6xx0gyo8Epf3camFtCXZ9Hi gvOg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=ct2Jcbwh; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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[77.136.240.151]) by smtp.gmail.com with ESMTPSA id t24-v6sm14080377wra.5.2018.10.05.07.36.10 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Fri, 05 Oct 2018 07:36:10 -0700 (PDT) From: Daniel Lezcano To: tglx@linutronix.de Cc: linux-kernel@vger.kernel.org, Kuninori Morimoto Subject: [PATCH 05/13] clocksource/drivers/sh_tmu: Convert to SPDX identifiers Date: Fri, 5 Oct 2018 16:35:34 +0200 Message-Id: <1538750143-4282-5-git-send-email-daniel.lezcano@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1538750143-4282-1-git-send-email-daniel.lezcano@linaro.org> References: <20181005143253.GE1881@mai> <1538750143-4282-1-git-send-email-daniel.lezcano@linaro.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Kuninori Morimoto This patch updates license to use SPDX-License-Identifier instead of verbose license text. Signed-off-by: Kuninori Morimoto Reviewed-by: Simon Horman Signed-off-by: Daniel Lezcano --- drivers/clocksource/sh_tmu.c | 10 +--------- 1 file changed, 1 insertion(+), 9 deletions(-) -- 2.7.4 diff --git a/drivers/clocksource/sh_tmu.c b/drivers/clocksource/sh_tmu.c index c74a6c54..49f1c80 100644 --- a/drivers/clocksource/sh_tmu.c +++ b/drivers/clocksource/sh_tmu.c @@ -1,16 +1,8 @@ +// SPDX-License-Identifier: GPL-2.0 /* * SuperH Timer Support - TMU * * Copyright (C) 2009 Magnus Damm - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. */ #include From patchwork Fri Oct 5 14:35:35 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Lezcano X-Patchwork-Id: 148186 Delivered-To: patch@linaro.org Received: by 2002:a2e:8595:0:0:0:0:0 with SMTP id b21-v6csp527722lji; Fri, 5 Oct 2018 07:36:21 -0700 (PDT) X-Google-Smtp-Source: ACcGV62od42S44QSl19GPeo3A89nohU2c+MYtrxFxNJspgNvY00+FMoO9I4Hoz9qut4jTW4o7iLA X-Received: by 2002:a63:31c8:: with SMTP id x191-v6mr10127766pgx.229.1538750180930; Fri, 05 Oct 2018 07:36:20 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1538750180; cv=none; d=google.com; s=arc-20160816; b=x1Ye34JecCRXsk4Yb4zxe/DE8W4BLyXy3Z6YvwxIVLL9j1Z+/zxt23GwBoxjKP6e03 9D8Gl4jPj6UQrYtPK+8rFusXKMDT7wi7xaMNbrrZyMPs19QZl/iR0MFwK1oYsfATFj9C BHd7USF6s/SDkDbE+zuP6KLq0Y3ICCLx+eb+EgRhUZnRt9bsCrIIbzoYGcmurPzJjFm1 qJWWITWI5LahXelQSYAZ7djbaB14lOpUD+a7f2V/+IxA3E6mT0FNeSXjoO4RuVgw11uO urdNIErFaZKgAOaWJuQxzvAhV6N7CHGxM8RDndOiVsAgynBL3lJ5Y7vm1pzJcMdW+aNP HmnQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature; bh=oY/BSvM3JhSLmZavwAUTIkYFQ1yxQX6GUR+M3B9L5+8=; b=fiuq1utAKshFdRGKFBe5Hf+y+9dIxu2Xzo9ywTjEYarLn0TSoZkaEAk0xuEy+J2kd3 32z3IYc3fxcuQklBtt10pkWJYlMayjU7TfnNE4sUM/rnKCwesJfLiDe3tS64AycxmbW5 Avc7e2YWOsyvnimH0Dk0CWFKsWNdTsBJC2gmkz1Ez4hiPN3FmHHIJjRCjLaziJzszZrP wSIt/nH03RXHWwSqzrGa7zgn6++ZFkeRroskm0AmH3hMeQOs6yuqd0k5g5B/2KcgQpLb duvMt9LMjaAz6W6D7f/bZHoKY8ue6CHOK8qrFpwCwd+rQ1f6xGPxI3sCAhGJO2fhu+Qs qdlQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=Ywj6zKJo; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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[77.136.240.151]) by smtp.gmail.com with ESMTPSA id t24-v6sm14080377wra.5.2018.10.05.07.36.11 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Fri, 05 Oct 2018 07:36:12 -0700 (PDT) From: Daniel Lezcano To: tglx@linutronix.de Cc: linux-kernel@vger.kernel.org, Sergei Shtylyov Subject: [PATCH 06/13] clocksource/drivers/sh_cmt: Fixup for 64-bit machines Date: Fri, 5 Oct 2018 16:35:35 +0200 Message-Id: <1538750143-4282-6-git-send-email-daniel.lezcano@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1538750143-4282-1-git-send-email-daniel.lezcano@linaro.org> References: <20181005143253.GE1881@mai> <1538750143-4282-1-git-send-email-daniel.lezcano@linaro.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Sergei Shtylyov When trying to use CMT for clockevents on R-Car gen3 SoCs, I noticed that 'max_delta_ns' for the broadcast timer (CMT) was shown as 1000 in /proc/timer_list. It turned out that when calculating it, the driver did 1 << 32 (causing what I think was undefined behavior) resulting in a zero delta, later clamped to 1000 by cev_delta2ns(). The root cause turned out to be that the driver abused *unsigned long* for the CMT register values (which are 16/32-bit), so that the calculation of 'ch->max_match_value' in sh_cmt_setup_channel() used the wrong branch. Using more proper 'u32' instead fixed 'max_delta_ns' and even fixed the switching an active clocksource to CMT (which caused the system to turn non-interactive before). Signed-off-by: Sergei Shtylyov Reviewed-by: Geert Uytterhoeven Signed-off-by: Daniel Lezcano --- drivers/clocksource/sh_cmt.c | 72 ++++++++++++++++++++------------------------ 1 file changed, 33 insertions(+), 39 deletions(-) -- 2.7.4 diff --git a/drivers/clocksource/sh_cmt.c b/drivers/clocksource/sh_cmt.c index 6f65cf8..efaf00d 100644 --- a/drivers/clocksource/sh_cmt.c +++ b/drivers/clocksource/sh_cmt.c @@ -70,18 +70,17 @@ struct sh_cmt_info { unsigned int channels_mask; unsigned long width; /* 16 or 32 bit version of hardware block */ - unsigned long overflow_bit; - unsigned long clear_bits; + u32 overflow_bit; + u32 clear_bits; /* callbacks for CMSTR and CMCSR access */ - unsigned long (*read_control)(void __iomem *base, unsigned long offs); + u32 (*read_control)(void __iomem *base, unsigned long offs); void (*write_control)(void __iomem *base, unsigned long offs, - unsigned long value); + u32 value); /* callbacks for CMCNT and CMCOR access */ - unsigned long (*read_count)(void __iomem *base, unsigned long offs); - void (*write_count)(void __iomem *base, unsigned long offs, - unsigned long value); + u32 (*read_count)(void __iomem *base, unsigned long offs); + void (*write_count)(void __iomem *base, unsigned long offs, u32 value); }; struct sh_cmt_channel { @@ -95,9 +94,9 @@ struct sh_cmt_channel { unsigned int timer_bit; unsigned long flags; - unsigned long match_value; - unsigned long next_match_value; - unsigned long max_match_value; + u32 match_value; + u32 next_match_value; + u32 max_match_value; raw_spinlock_t lock; struct clock_event_device ced; struct clocksource cs; @@ -152,24 +151,22 @@ struct sh_cmt_device { #define SH_CMT32_CMCSR_CKS_RCLK1 (7 << 0) #define SH_CMT32_CMCSR_CKS_MASK (7 << 0) -static unsigned long sh_cmt_read16(void __iomem *base, unsigned long offs) +static u32 sh_cmt_read16(void __iomem *base, unsigned long offs) { return ioread16(base + (offs << 1)); } -static unsigned long sh_cmt_read32(void __iomem *base, unsigned long offs) +static u32 sh_cmt_read32(void __iomem *base, unsigned long offs) { return ioread32(base + (offs << 2)); } -static void sh_cmt_write16(void __iomem *base, unsigned long offs, - unsigned long value) +static void sh_cmt_write16(void __iomem *base, unsigned long offs, u32 value) { iowrite16(value, base + (offs << 1)); } -static void sh_cmt_write32(void __iomem *base, unsigned long offs, - unsigned long value) +static void sh_cmt_write32(void __iomem *base, unsigned long offs, u32 value) { iowrite32(value, base + (offs << 2)); } @@ -234,7 +231,7 @@ static const struct sh_cmt_info sh_cmt_info[] = { #define CMCNT 1 /* channel register */ #define CMCOR 2 /* channel register */ -static inline unsigned long sh_cmt_read_cmstr(struct sh_cmt_channel *ch) +static inline u32 sh_cmt_read_cmstr(struct sh_cmt_channel *ch) { if (ch->iostart) return ch->cmt->info->read_control(ch->iostart, 0); @@ -242,8 +239,7 @@ static inline unsigned long sh_cmt_read_cmstr(struct sh_cmt_channel *ch) return ch->cmt->info->read_control(ch->cmt->mapbase, 0); } -static inline void sh_cmt_write_cmstr(struct sh_cmt_channel *ch, - unsigned long value) +static inline void sh_cmt_write_cmstr(struct sh_cmt_channel *ch, u32 value) { if (ch->iostart) ch->cmt->info->write_control(ch->iostart, 0, value); @@ -251,39 +247,35 @@ static inline void sh_cmt_write_cmstr(struct sh_cmt_channel *ch, ch->cmt->info->write_control(ch->cmt->mapbase, 0, value); } -static inline unsigned long sh_cmt_read_cmcsr(struct sh_cmt_channel *ch) +static inline u32 sh_cmt_read_cmcsr(struct sh_cmt_channel *ch) { return ch->cmt->info->read_control(ch->ioctrl, CMCSR); } -static inline void sh_cmt_write_cmcsr(struct sh_cmt_channel *ch, - unsigned long value) +static inline void sh_cmt_write_cmcsr(struct sh_cmt_channel *ch, u32 value) { ch->cmt->info->write_control(ch->ioctrl, CMCSR, value); } -static inline unsigned long sh_cmt_read_cmcnt(struct sh_cmt_channel *ch) +static inline u32 sh_cmt_read_cmcnt(struct sh_cmt_channel *ch) { return ch->cmt->info->read_count(ch->ioctrl, CMCNT); } -static inline void sh_cmt_write_cmcnt(struct sh_cmt_channel *ch, - unsigned long value) +static inline void sh_cmt_write_cmcnt(struct sh_cmt_channel *ch, u32 value) { ch->cmt->info->write_count(ch->ioctrl, CMCNT, value); } -static inline void sh_cmt_write_cmcor(struct sh_cmt_channel *ch, - unsigned long value) +static inline void sh_cmt_write_cmcor(struct sh_cmt_channel *ch, u32 value) { ch->cmt->info->write_count(ch->ioctrl, CMCOR, value); } -static unsigned long sh_cmt_get_counter(struct sh_cmt_channel *ch, - int *has_wrapped) +static u32 sh_cmt_get_counter(struct sh_cmt_channel *ch, u32 *has_wrapped) { - unsigned long v1, v2, v3; - int o1, o2; + u32 v1, v2, v3; + u32 o1, o2; o1 = sh_cmt_read_cmcsr(ch) & ch->cmt->info->overflow_bit; @@ -303,7 +295,8 @@ static unsigned long sh_cmt_get_counter(struct sh_cmt_channel *ch, static void sh_cmt_start_stop_ch(struct sh_cmt_channel *ch, int start) { - unsigned long flags, value; + unsigned long flags; + u32 value; /* start stop register shared by multiple timer channels */ raw_spin_lock_irqsave(&ch->cmt->lock, flags); @@ -410,11 +403,11 @@ static void sh_cmt_disable(struct sh_cmt_channel *ch) static void sh_cmt_clock_event_program_verify(struct sh_cmt_channel *ch, int absolute) { - unsigned long new_match; - unsigned long value = ch->next_match_value; - unsigned long delay = 0; - unsigned long now = 0; - int has_wrapped; + u32 value = ch->next_match_value; + u32 new_match; + u32 delay = 0; + u32 now = 0; + u32 has_wrapped; now = sh_cmt_get_counter(ch, &has_wrapped); ch->flags |= FLAG_REPROGRAM; /* force reprogram */ @@ -611,9 +604,10 @@ static struct sh_cmt_channel *cs_to_sh_cmt(struct clocksource *cs) static u64 sh_cmt_clocksource_read(struct clocksource *cs) { struct sh_cmt_channel *ch = cs_to_sh_cmt(cs); - unsigned long flags, raw; + unsigned long flags; unsigned long value; - int has_wrapped; + u32 has_wrapped; + u32 raw; raw_spin_lock_irqsave(&ch->lock, flags); value = ch->total_cycles; From patchwork Fri Oct 5 14:35:36 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Lezcano X-Patchwork-Id: 148185 Delivered-To: patch@linaro.org Received: by 2002:a2e:8595:0:0:0:0:0 with SMTP id b21-v6csp527705lji; Fri, 5 Oct 2018 07:36:19 -0700 (PDT) X-Google-Smtp-Source: ACcGV615nTpL5GkDKZgeMFtJhYRSaBi0Q6mNlUvPjtu48M9fg6bShXts2exOp2yDwc37ns3RVoTa X-Received: by 2002:a17:902:b78c:: with SMTP id e12-v6mr11875723pls.67.1538750179524; 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[77.136.240.151]) by smtp.gmail.com with ESMTPSA id t24-v6sm14080377wra.5.2018.10.05.07.36.13 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Fri, 05 Oct 2018 07:36:14 -0700 (PDT) From: Daniel Lezcano To: tglx@linutronix.de Cc: linux-kernel@vger.kernel.org, Sergei Shtylyov , Geert Uytterhoeven Subject: [PATCH 07/13] clocksource/drivers/sh_cmt: Fix clocksource width for 32-bit machines Date: Fri, 5 Oct 2018 16:35:36 +0200 Message-Id: <1538750143-4282-7-git-send-email-daniel.lezcano@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1538750143-4282-1-git-send-email-daniel.lezcano@linaro.org> References: <20181005143253.GE1881@mai> <1538750143-4282-1-git-send-email-daniel.lezcano@linaro.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Sergei Shtylyov The driver seems to abuse *unsigned long* not only for the (32-bit) register values but also for the 'sh_cmt_channel::total_cycles' which needs to always be 64-bit -- as a result, the clocksource's mask is needlessly clamped down to 32-bits on the 32-bit machines... Fixes: 19bdc9d061bc ("clocksource: sh_cmt clocksource support") Reported-by: Geert Uytterhoeven Signed-off-by: Sergei Shtylyov Reviewed-by: Simon Horman Reviewed-by: Geert Uytterhoeven Signed-off-by: Daniel Lezcano --- drivers/clocksource/sh_cmt.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) -- 2.7.4 diff --git a/drivers/clocksource/sh_cmt.c b/drivers/clocksource/sh_cmt.c index efaf00d..0c74489 100644 --- a/drivers/clocksource/sh_cmt.c +++ b/drivers/clocksource/sh_cmt.c @@ -100,7 +100,7 @@ struct sh_cmt_channel { raw_spinlock_t lock; struct clock_event_device ced; struct clocksource cs; - unsigned long total_cycles; + u64 total_cycles; bool cs_enabled; }; @@ -605,8 +605,8 @@ static u64 sh_cmt_clocksource_read(struct clocksource *cs) { struct sh_cmt_channel *ch = cs_to_sh_cmt(cs); unsigned long flags; - unsigned long value; u32 has_wrapped; + u64 value; u32 raw; raw_spin_lock_irqsave(&ch->lock, flags); @@ -680,7 +680,7 @@ static int sh_cmt_register_clocksource(struct sh_cmt_channel *ch, cs->disable = sh_cmt_clocksource_disable; cs->suspend = sh_cmt_clocksource_suspend; cs->resume = sh_cmt_clocksource_resume; - cs->mask = CLOCKSOURCE_MASK(sizeof(unsigned long) * 8); + cs->mask = CLOCKSOURCE_MASK(sizeof(u64) * 8); cs->flags = CLOCK_SOURCE_IS_CONTINUOUS; dev_info(&ch->cmt->pdev->dev, "ch%u: used as clock source\n", From patchwork Fri Oct 5 14:35:37 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Lezcano X-Patchwork-Id: 148187 Delivered-To: patch@linaro.org Received: by 2002:a2e:8595:0:0:0:0:0 with SMTP id b21-v6csp527753lji; Fri, 5 Oct 2018 07:36:22 -0700 (PDT) X-Google-Smtp-Source: ACcGV63tM7C4rMXuQ/t5oqOHZtodjpKpk2qMllYirhWj8PlYH11kc/E/w/jF1YIpFgwpZykXqAKD X-Received: by 2002:a17:902:ea:: with SMTP id a97-v6mr11983104pla.164.1538750182108; Fri, 05 Oct 2018 07:36:22 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1538750182; cv=none; d=google.com; s=arc-20160816; b=nrTv0c/dMR5GkHQGzN48AbyyE0RMMEugJKSh1pDHXV9nQQLEyxYv0tm5HPqwH2Zb7+ B4SoMDszZqnFw9PFcWU6P/vi7C1oS69ddBzYXCuNH2S3InPmd80mHmHYb+t520AZDfLE 7zNS+d0Q0UhU44TCkfDZfiuTfddKHsqaJr+uXCcYJSuyGhYx3wK3ZK8YzWgjHEDjB4xA 8KRdVNrddzQMINK5Zo87hr0s/21TS5bXKsYEpijRgeYEMX0hXT/nfIVQnv4DrdQkBeNZ QX9uQZrLxdcPJvTPbazfCJprYWTy4jHHFiIyB4sk6SxezN4WXcMH1VkQVZzOXHVsqPwY bL+Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature; bh=+YjDGmsA1iZ1aDYCWmgdgfOmrNf1zKrdDsjB+ghLQOs=; b=gVM4hNhBDYkqfH3B1Uh4AgUwiOtj9bwA8ERqHc2fVYVgyIUiDhFv8cHpeES1ktlK1a iL221pMEKzzam0UUhggqQOKv8GMGlo9+SDOsZOkttrnFKt7Rch3Z3WkqTZil+3/mlHrm RMmA+bMTRpHtuktMu9zomPyy3LpcYb2P0xys7K29ZIcYjOIu+Y8k4VFJjq4Z5g7ggUsb 40MVticQ/NQRilpLuc1ydZOtsdlbc9IAi2lVBSN0KwpyJYIg9CmGzS7Fd49fvvb/ndLk 8jGeqKb5ymuV8XkhwzDBJckcF39brAsxjLw8pm88tlBqmqineHuajwesAVublYnz4rC6 ZN5A== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="C/nZwPDs"; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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[77.136.240.151]) by smtp.gmail.com with ESMTPSA id t24-v6sm14080377wra.5.2018.10.05.07.36.15 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Fri, 05 Oct 2018 07:36:15 -0700 (PDT) From: Daniel Lezcano To: tglx@linutronix.de Cc: linux-kernel@vger.kernel.org, Sergei Shtylyov Subject: [PATCH 08/13] clocksource/drivers/sh_cmt: Properly line-wrap sh_cmt_of_table[] initializer Date: Fri, 5 Oct 2018 16:35:37 +0200 Message-Id: <1538750143-4282-8-git-send-email-daniel.lezcano@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1538750143-4282-1-git-send-email-daniel.lezcano@linaro.org> References: <20181005143253.GE1881@mai> <1538750143-4282-1-git-send-email-daniel.lezcano@linaro.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Sergei Shtylyov There's no good reason for the sh_cmt_of_table[] initializer to violate the 80-column limit, especially after the commit 8d50e9476bb4 ("clocksource/drivers/sh_cmt: Mark "renesas,cmt-48-gen2" deprecated") partially fixed it -- fix the R-Car gen2 related entries as well. Signed-off-by: Sergei Shtylyov Reviewed-by: Chris Paterson Reviewed-by: Geert Uytterhoeven Signed-off-by: Daniel Lezcano --- drivers/clocksource/sh_cmt.c | 10 ++++++++-- 1 file changed, 8 insertions(+), 2 deletions(-) -- 2.7.4 diff --git a/drivers/clocksource/sh_cmt.c b/drivers/clocksource/sh_cmt.c index 0c74489..71624dc 100644 --- a/drivers/clocksource/sh_cmt.c +++ b/drivers/clocksource/sh_cmt.c @@ -927,8 +927,14 @@ static const struct of_device_id sh_cmt_of_table[] __maybe_unused = { .compatible = "renesas,cmt-48-gen2", .data = &sh_cmt_info[SH_CMT0_RCAR_GEN2] }, - { .compatible = "renesas,rcar-gen2-cmt0", .data = &sh_cmt_info[SH_CMT0_RCAR_GEN2] }, - { .compatible = "renesas,rcar-gen2-cmt1", .data = &sh_cmt_info[SH_CMT1_RCAR_GEN2] }, + { + .compatible = "renesas,rcar-gen2-cmt0", + .data = &sh_cmt_info[SH_CMT0_RCAR_GEN2] + }, + { + .compatible = "renesas,rcar-gen2-cmt1", + .data = &sh_cmt_info[SH_CMT1_RCAR_GEN2] + }, { } }; MODULE_DEVICE_TABLE(of, sh_cmt_of_table); From patchwork Fri Oct 5 14:35:38 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Lezcano X-Patchwork-Id: 148188 Delivered-To: patch@linaro.org Received: by 2002:a2e:8595:0:0:0:0:0 with SMTP id b21-v6csp527786lji; Fri, 5 Oct 2018 07:36:24 -0700 (PDT) X-Google-Smtp-Source: ACcGV62uZi/HyWvMtt+kS7rq0sVA5gNSkoO62orTPwhyecaN4JMil30UbayIAq7woXWg6i2FzuH5 X-Received: by 2002:a62:594f:: with SMTP id n76-v6mr12520230pfb.42.1538750183875; Fri, 05 Oct 2018 07:36:23 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1538750183; cv=none; d=google.com; s=arc-20160816; b=PrcBfZ0PCGcjTkopXm/zRMgMQ4aq3EYLtX8Z5q+tCi+g0Whc0F3rM/DHEWuvedmk49 DvQGl6xWR5hoLLU27PbdHGiYhR0tHTcDXKXA/4d0qRHiRxWEQJoNPjK3yoWCF4Vf9jWp clzE0bf0H+S8qwxWAS39/Gx+QIPm6paU/ILkMURrQq44SzT6GjKJRKf44P22PGGH9/yx O49zOG3v0mfjat0DK/YyyYk8gzjJUOCJy1piAN1frLHyUxjU05xx7SUUrav1jAMLa+g2 qfBeY22N++sYGwka0txTWoEZF6WrJtedOgkIOUA6gspdvFGpsA4KYyJoiCULJKrOpD0X AjjQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature; bh=DTMX8jL6TWNlZ6h6upwqRAMpW5ePKDtJanTF8iF+j0U=; b=l4CeFvXgOAT8Wa8i3zcZJoziNApqfDKkX0g1omC2drPRpQDDBgjVS+cEuhwWeuiX29 lVDOMx2+lEO9C09adIRs6gC5MyVNJTiVaTHLnrsbiEvuek7MDAX63+SlmfSvHsZ/fPHG WY6mPEXG+moVYQYhMMPRZbDZJOLeoHBSoJPPw/8y76kxABHSNA4TYFozYQ4vSTkbUmAp 7H3YFRaCzneeEBCM4+pcQsXEvbuTlhis2HHHJEqyRdSB7QRg7mXN7KgJY+cm1z0MQQ2W MjeY47F6RyM4SaCrB35YqtdKlTja4So9GxvWTVrBY/gXrWp8psQ5nuBD7lCBd9QS4LdD KhPw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=kx9w9rMM; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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[77.136.240.151]) by smtp.gmail.com with ESMTPSA id t24-v6sm14080377wra.5.2018.10.05.07.36.16 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Fri, 05 Oct 2018 07:36:17 -0700 (PDT) From: Daniel Lezcano To: tglx@linutronix.de Cc: linux-kernel@vger.kernel.org, Sergei Shtylyov , Rob Herring , Mark Rutland , devicetree@vger.kernel.org (open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS) Subject: [PATCH 09/13] dt-bindings: timer: renesas: cmt: document R-Car gen3 support Date: Fri, 5 Oct 2018 16:35:38 +0200 Message-Id: <1538750143-4282-9-git-send-email-daniel.lezcano@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1538750143-4282-1-git-send-email-daniel.lezcano@linaro.org> References: <20181005143253.GE1881@mai> <1538750143-4282-1-git-send-email-daniel.lezcano@linaro.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Sergei Shtylyov Document support for the R-Car gen3 CMT types 0/1 bindings -- they seem to be the same CMT types 0/1 as in the R-Car gen2 SoCs. Also document R8A779{7|8}0 bindings as these are the R-Car gen3 SoCs for which the initial support was done. Signed-off-by: Sergei Shtylyov Reviewed-by: Geert Uytterhoeven Signed-off-by: Daniel Lezcano --- Documentation/devicetree/bindings/timer/renesas,cmt.txt | 7 +++++++ 1 file changed, 7 insertions(+) -- 2.7.4 diff --git a/Documentation/devicetree/bindings/timer/renesas,cmt.txt b/Documentation/devicetree/bindings/timer/renesas,cmt.txt index b40add2..49948fc 100644 --- a/Documentation/devicetree/bindings/timer/renesas,cmt.txt +++ b/Documentation/devicetree/bindings/timer/renesas,cmt.txt @@ -34,6 +34,10 @@ Required Properties: - "renesas,r8a7793-cmt1" for the 48-bit CMT1 device included in r8a7793. - "renesas,r8a7794-cmt0" for the 32-bit CMT0 device included in r8a7794. - "renesas,r8a7794-cmt1" for the 48-bit CMT1 device included in r8a7794. + - "renesas,r8a77970-cmt0" for the 32-bit CMT0 device included in r8a77970. + - "renesas,r8a77970-cmt1" for the 48-bit CMT1 device included in r8a77970. + - "renesas,r8a77980-cmt0" for the 32-bit CMT0 device included in r8a77980. + - "renesas,r8a77980-cmt1" for the 48-bit CMT1 device included in r8a77980. - "renesas,rcar-gen2-cmt0" for 32-bit CMT0 devices included in R-Car Gen2 and RZ/G1. @@ -41,6 +45,9 @@ Required Properties: and RZ/G1. These are fallbacks for r8a73a4, R-Car Gen2 and RZ/G1 entries listed above. + - "renesas,rcar-gen3-cmt0" for 32-bit CMT0 devices included in R-Car Gen3. + - "renesas,rcar-gen3-cmt1" for 48-bit CMT1 devices included in R-Car Gen3. + These are fallbacks for R-Car Gen3 entries listed above. - reg: base address and length of the registers block for the timer module. - interrupts: interrupt-specifier for the timer, one per channel. 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[77.136.240.151]) by smtp.gmail.com with ESMTPSA id t24-v6sm14080377wra.5.2018.10.05.07.36.18 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Fri, 05 Oct 2018 07:36:18 -0700 (PDT) From: Daniel Lezcano To: tglx@linutronix.de Cc: linux-kernel@vger.kernel.org, Sergei Shtylyov Subject: [PATCH 10/13] clocksource/drivers/sh_cmt: Add R-Car gen3 support Date: Fri, 5 Oct 2018 16:35:39 +0200 Message-Id: <1538750143-4282-10-git-send-email-daniel.lezcano@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1538750143-4282-1-git-send-email-daniel.lezcano@linaro.org> References: <20181005143253.GE1881@mai> <1538750143-4282-1-git-send-email-daniel.lezcano@linaro.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Sergei Shtylyov Add support for the R-Car gen3 CMT types 0/1 -- they seem to be the same CMT types 0/1 as in R-Car gen2 SoCs. Signed-off-by: Sergei Shtylyov Reviewed-by: Geert Uytterhoeven Signed-off-by: Daniel Lezcano --- drivers/clocksource/sh_cmt.c | 8 ++++++++ 1 file changed, 8 insertions(+) -- 2.7.4 diff --git a/drivers/clocksource/sh_cmt.c b/drivers/clocksource/sh_cmt.c index 71624dc..55d3e03 100644 --- a/drivers/clocksource/sh_cmt.c +++ b/drivers/clocksource/sh_cmt.c @@ -935,6 +935,14 @@ static const struct of_device_id sh_cmt_of_table[] __maybe_unused = { .compatible = "renesas,rcar-gen2-cmt1", .data = &sh_cmt_info[SH_CMT1_RCAR_GEN2] }, + { + .compatible = "renesas,rcar-gen3-cmt0", + .data = &sh_cmt_info[SH_CMT0_RCAR_GEN2] + }, + { + .compatible = "renesas,rcar-gen3-cmt1", + .data = &sh_cmt_info[SH_CMT1_RCAR_GEN2] + }, { } }; MODULE_DEVICE_TABLE(of, sh_cmt_of_table); From patchwork Fri Oct 5 14:35:40 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Daniel Lezcano X-Patchwork-Id: 148190 Delivered-To: patch@linaro.org Received: by 2002:a2e:8595:0:0:0:0:0 with SMTP id b21-v6csp528161lji; Fri, 5 Oct 2018 07:36:44 -0700 (PDT) X-Google-Smtp-Source: ACcGV63PAZO1DvMPOLcN+CeVtx5iXHGL7cVkigtAReQ9AnKhPjHekmuQTwQNSsVyNe67olcg+pn2 X-Received: by 2002:a17:902:124:: with SMTP id 33-v6mr12021360plb.205.1538750203939; Fri, 05 Oct 2018 07:36:43 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1538750203; cv=none; d=google.com; s=arc-20160816; b=opTnIfLs4ODBff+qfB6OO0y0iFEyDY0gIJNhg3Hsf+zD41JKJABzdRum4W3WQw/DWl 4hx7dVnCOgzB5btOc7IuXoeoH6KBibmnSGivpVJw48xBGchFRQkNExMuLpM4YOjdxEct idO9cnOslRcER1SvHb+tnelA/9jJkzob0SNhB7skr+/ag/rOifQVofwrqbo4WImsZ7lS d93YfDcdfYfSiatLGB8fdyjknWAetYdMSkIgfeoNoCwrjFAOmB9O2AEEoQjK4JXQp0Y2 jweTqLboXnD5/gayaw60YRVdxQX46PuBIH4CvIXlkdvXu9i9e9Z9Q4/VntrI8eF5w2ue RXTA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=6oEYYRTGl97aVrSRSe9qBL/xkxCMGDRbGRcC+nSH3b8=; b=BrEBtGNKdNh6lmWM714SFeasglNBtJEAzwoi01ZJLorvhjl233wJKDhmtn3PsBGX7K EiXrNjF5pbBbAuIuihRbIlaLgnQUGOyqTCAamlKtgcBSxLvvIdq9gH3mTDwA/18AY9iI VS8XowCNvEmaD7YZTw8dXPiKXPpukTpqwiuf+Eu6c2Vpj8o+oAwyMRFgyfBC0ai2niPt /neTGFpxWWdq9jISZo7Qoul3d6HBU5GPcctJZLB4Vc9kWjwyF0G6F2GCgSf1mP5Z6Cs/ Vv7IWYsKNKq/hS8QpkzIF5bARjxJTJmsFo5zmcoijdWpB3a7BEBu1Bw8pf/+NOPffonU gg4w== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=iVejPYlV; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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[77.136.240.151]) by smtp.gmail.com with ESMTPSA id t24-v6sm14080377wra.5.2018.10.05.07.36.36 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Fri, 05 Oct 2018 07:36:37 -0700 (PDT) From: Daniel Lezcano To: tglx@linutronix.de Cc: linux-kernel@vger.kernel.org, =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= , Vladimir Zapolskiy , Liviu Dudau , Mauro Carvalho Chehab , Greg Kroah-Hartman , "David S. Miller" , Andrew Morton , Arnd Bergmann Subject: [PATCH 11/13] clocksource/drivers: Unify the names to timer-* format Date: Fri, 5 Oct 2018 16:35:40 +0200 Message-Id: <1538750143-4282-11-git-send-email-daniel.lezcano@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1538750143-4282-1-git-send-email-daniel.lezcano@linaro.org> References: <20181005143253.GE1881@mai> <1538750143-4282-1-git-send-email-daniel.lezcano@linaro.org> MIME-Version: 1.0 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org In order to make some housekeeping in the directory, this patch renames drivers to the timer-* format in order to unify their names. There is no functional changes. Acked-by: Uwe Kleine-König Acked-by: Vladimir Zapolskiy Acked-by: Liviu Dudau Signed-off-by: Daniel Lezcano --- MAINTAINERS | 10 ++++----- drivers/clocksource/Makefile | 26 +++++++++++----------- ...{time-armada-370-xp.c => timer-armada-370-xp.c} | 0 .../{cadence_ttc_timer.c => timer-cadence-ttc.c} | 0 .../clocksource/{time-efm32.c => timer-efm32.c} | 0 .../{fsl_ftm_timer.c => timer-fsl-ftm.c} | 0 .../{time-lpc32xx.c => timer-lpc32xx.c} | 0 .../clocksource/{time-orion.c => timer-orion.c} | 0 drivers/clocksource/{owl-timer.c => timer-owl.c} | 0 .../{time-pistachio.c => timer-pistachio.c} | 0 drivers/clocksource/{qcom-timer.c => timer-qcom.c} | 0 .../clocksource/{versatile.c => timer-versatile.c} | 0 .../clocksource/{vf_pit_timer.c => timer-vf-pit.c} | 0 .../clocksource/{vt8500_timer.c => timer-vt8500.c} | 0 .../clocksource/{zevio-timer.c => timer-zevio.c} | 0 15 files changed, 18 insertions(+), 18 deletions(-) rename drivers/clocksource/{time-armada-370-xp.c => timer-armada-370-xp.c} (100%) rename drivers/clocksource/{cadence_ttc_timer.c => timer-cadence-ttc.c} (100%) rename drivers/clocksource/{time-efm32.c => timer-efm32.c} (100%) rename drivers/clocksource/{fsl_ftm_timer.c => timer-fsl-ftm.c} (100%) rename drivers/clocksource/{time-lpc32xx.c => timer-lpc32xx.c} (100%) rename drivers/clocksource/{time-orion.c => timer-orion.c} (100%) rename drivers/clocksource/{owl-timer.c => timer-owl.c} (100%) rename drivers/clocksource/{time-pistachio.c => timer-pistachio.c} (100%) rename drivers/clocksource/{qcom-timer.c => timer-qcom.c} (100%) rename drivers/clocksource/{versatile.c => timer-versatile.c} (100%) rename drivers/clocksource/{vf_pit_timer.c => timer-vf-pit.c} (100%) rename drivers/clocksource/{vt8500_timer.c => timer-vt8500.c} (100%) rename drivers/clocksource/{zevio-timer.c => timer-zevio.c} (100%) -- 2.7.4 diff --git a/MAINTAINERS b/MAINTAINERS index a5b256b..67e877c 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -1181,7 +1181,7 @@ N: owl F: arch/arm/mach-actions/ F: arch/arm/boot/dts/owl-* F: arch/arm64/boot/dts/actions/ -F: drivers/clocksource/owl-* +F: drivers/clocksource/timer-owl* F: drivers/pinctrl/actions/* F: drivers/soc/actions/ F: include/dt-bindings/power/owl-* @@ -1604,7 +1604,7 @@ L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) S: Maintained F: arch/arm/boot/dts/lpc43* F: drivers/clk/nxp/clk-lpc18xx* -F: drivers/clocksource/time-lpc32xx.c +F: drivers/clocksource/timer-lpc32xx.c F: drivers/i2c/busses/i2c-lpc2k.c F: drivers/memory/pl172.c F: drivers/mtd/spi-nor/nxp-spifi.c @@ -2220,7 +2220,7 @@ F: arch/arm/mach-vexpress/ F: */*/vexpress* F: */*/*/vexpress* F: drivers/clk/versatile/clk-vexpress-osc.c -F: drivers/clocksource/versatile.c +F: drivers/clocksource/timer-versatile.c N: mps2 ARM/VFP SUPPORT @@ -2242,7 +2242,7 @@ M: Tony Prisk L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) S: Maintained F: arch/arm/mach-vt8500/ -F: drivers/clocksource/vt8500_timer.c +F: drivers/clocksource/timer-vt8500.c F: drivers/i2c/busses/i2c-wmt.c F: drivers/mmc/host/wmt-sdmmc.c F: drivers/pwm/pwm-vt8500.c @@ -2307,7 +2307,7 @@ F: drivers/cpuidle/cpuidle-zynq.c F: drivers/block/xsysace.c N: zynq N: xilinx -F: drivers/clocksource/cadence_ttc_timer.c +F: drivers/clocksource/timer-cadence-ttc.c F: drivers/i2c/busses/i2c-cadence.c F: drivers/mmc/host/sdhci-of-arasan.c F: drivers/edac/synopsys_edac.c diff --git a/drivers/clocksource/Makefile b/drivers/clocksource/Makefile index db51b24..e33b21d 100644 --- a/drivers/clocksource/Makefile +++ b/drivers/clocksource/Makefile @@ -23,8 +23,8 @@ obj-$(CONFIG_FTTMR010_TIMER) += timer-fttmr010.o obj-$(CONFIG_ROCKCHIP_TIMER) += rockchip_timer.o obj-$(CONFIG_CLKSRC_NOMADIK_MTU) += nomadik-mtu.o obj-$(CONFIG_CLKSRC_DBX500_PRCMU) += clksrc-dbx500-prcmu.o -obj-$(CONFIG_ARMADA_370_XP_TIMER) += time-armada-370-xp.o -obj-$(CONFIG_ORION_TIMER) += time-orion.o +obj-$(CONFIG_ARMADA_370_XP_TIMER) += timer-armada-370-xp.o +obj-$(CONFIG_ORION_TIMER) += timer-orion.o obj-$(CONFIG_BCM2835_TIMER) += bcm2835_timer.o obj-$(CONFIG_CLPS711X_TIMER) += clps711x-timer.o obj-$(CONFIG_ATLAS7_TIMER) += timer-atlas7.o @@ -36,25 +36,25 @@ obj-$(CONFIG_SUN4I_TIMER) += sun4i_timer.o obj-$(CONFIG_SUN5I_HSTIMER) += timer-sun5i.o obj-$(CONFIG_MESON6_TIMER) += meson6_timer.o obj-$(CONFIG_TEGRA_TIMER) += tegra20_timer.o -obj-$(CONFIG_VT8500_TIMER) += vt8500_timer.o -obj-$(CONFIG_NSPIRE_TIMER) += zevio-timer.o +obj-$(CONFIG_VT8500_TIMER) += timer-vt8500.o +obj-$(CONFIG_NSPIRE_TIMER) += timer-zevio.o obj-$(CONFIG_BCM_KONA_TIMER) += bcm_kona_timer.o -obj-$(CONFIG_CADENCE_TTC_TIMER) += cadence_ttc_timer.o -obj-$(CONFIG_CLKSRC_EFM32) += time-efm32.o +obj-$(CONFIG_CADENCE_TTC_TIMER) += timer-cadence-ttc.o +obj-$(CONFIG_CLKSRC_EFM32) += timer-efm32.o obj-$(CONFIG_CLKSRC_STM32) += timer-stm32.o obj-$(CONFIG_CLKSRC_EXYNOS_MCT) += exynos_mct.o -obj-$(CONFIG_CLKSRC_LPC32XX) += time-lpc32xx.o +obj-$(CONFIG_CLKSRC_LPC32XX) += timer-lpc32xx.o obj-$(CONFIG_CLKSRC_MPS2) += mps2-timer.o obj-$(CONFIG_CLKSRC_SAMSUNG_PWM) += samsung_pwm_timer.o -obj-$(CONFIG_FSL_FTM_TIMER) += fsl_ftm_timer.o -obj-$(CONFIG_VF_PIT_TIMER) += vf_pit_timer.o -obj-$(CONFIG_CLKSRC_QCOM) += qcom-timer.o +obj-$(CONFIG_FSL_FTM_TIMER) += timer-fsl-ftm.o +obj-$(CONFIG_VF_PIT_TIMER) += timer-vf-pit.o +obj-$(CONFIG_CLKSRC_QCOM) += timer-qcom.o obj-$(CONFIG_MTK_TIMER) += timer-mediatek.o -obj-$(CONFIG_CLKSRC_PISTACHIO) += time-pistachio.o +obj-$(CONFIG_CLKSRC_PISTACHIO) += timer-pistachio.o obj-$(CONFIG_CLKSRC_TI_32K) += timer-ti-32k.o obj-$(CONFIG_CLKSRC_NPS) += timer-nps.o obj-$(CONFIG_OXNAS_RPS_TIMER) += timer-oxnas-rps.o -obj-$(CONFIG_OWL_TIMER) += owl-timer.o +obj-$(CONFIG_OWL_TIMER) += timer-owl.o obj-$(CONFIG_SPRD_TIMER) += timer-sprd.o obj-$(CONFIG_NPCM7XX_TIMER) += timer-npcm7xx.o @@ -66,7 +66,7 @@ obj-$(CONFIG_ARM_TIMER_SP804) += timer-sp804.o obj-$(CONFIG_ARCH_HAS_TICK_BROADCAST) += dummy_timer.o obj-$(CONFIG_KEYSTONE_TIMER) += timer-keystone.o obj-$(CONFIG_INTEGRATOR_AP_TIMER) += timer-integrator-ap.o -obj-$(CONFIG_CLKSRC_VERSATILE) += versatile.o +obj-$(CONFIG_CLKSRC_VERSATILE) += timer-versatile.o obj-$(CONFIG_CLKSRC_MIPS_GIC) += mips-gic-timer.o obj-$(CONFIG_CLKSRC_TANGO_XTAL) += tango_xtal.o obj-$(CONFIG_CLKSRC_IMX_GPT) += timer-imx-gpt.o diff --git a/drivers/clocksource/time-armada-370-xp.c b/drivers/clocksource/timer-armada-370-xp.c similarity index 100% rename from drivers/clocksource/time-armada-370-xp.c rename to drivers/clocksource/timer-armada-370-xp.c diff --git a/drivers/clocksource/cadence_ttc_timer.c b/drivers/clocksource/timer-cadence-ttc.c similarity index 100% rename from drivers/clocksource/cadence_ttc_timer.c rename to drivers/clocksource/timer-cadence-ttc.c diff --git a/drivers/clocksource/time-efm32.c b/drivers/clocksource/timer-efm32.c similarity index 100% rename from drivers/clocksource/time-efm32.c rename to drivers/clocksource/timer-efm32.c diff --git a/drivers/clocksource/fsl_ftm_timer.c b/drivers/clocksource/timer-fsl-ftm.c similarity index 100% rename from drivers/clocksource/fsl_ftm_timer.c rename to drivers/clocksource/timer-fsl-ftm.c diff --git a/drivers/clocksource/time-lpc32xx.c b/drivers/clocksource/timer-lpc32xx.c similarity index 100% rename from drivers/clocksource/time-lpc32xx.c rename to drivers/clocksource/timer-lpc32xx.c diff --git a/drivers/clocksource/time-orion.c b/drivers/clocksource/timer-orion.c similarity index 100% rename from drivers/clocksource/time-orion.c rename to drivers/clocksource/timer-orion.c diff --git a/drivers/clocksource/owl-timer.c b/drivers/clocksource/timer-owl.c similarity index 100% rename from drivers/clocksource/owl-timer.c rename to drivers/clocksource/timer-owl.c diff --git a/drivers/clocksource/time-pistachio.c b/drivers/clocksource/timer-pistachio.c similarity index 100% rename from drivers/clocksource/time-pistachio.c rename to drivers/clocksource/timer-pistachio.c diff --git a/drivers/clocksource/qcom-timer.c b/drivers/clocksource/timer-qcom.c similarity index 100% rename from drivers/clocksource/qcom-timer.c rename to drivers/clocksource/timer-qcom.c diff --git a/drivers/clocksource/versatile.c b/drivers/clocksource/timer-versatile.c similarity index 100% rename from drivers/clocksource/versatile.c rename to drivers/clocksource/timer-versatile.c diff --git a/drivers/clocksource/vf_pit_timer.c b/drivers/clocksource/timer-vf-pit.c similarity index 100% rename from drivers/clocksource/vf_pit_timer.c rename to drivers/clocksource/timer-vf-pit.c diff --git a/drivers/clocksource/vt8500_timer.c b/drivers/clocksource/timer-vt8500.c similarity index 100% rename from drivers/clocksource/vt8500_timer.c rename to drivers/clocksource/timer-vt8500.c diff --git a/drivers/clocksource/zevio-timer.c b/drivers/clocksource/timer-zevio.c similarity index 100% rename from drivers/clocksource/zevio-timer.c rename to drivers/clocksource/timer-zevio.c From patchwork Fri Oct 5 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[77.136.240.151]) by smtp.gmail.com with ESMTPSA id t24-v6sm14080377wra.5.2018.10.05.07.36.38 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Fri, 05 Oct 2018 07:36:38 -0700 (PDT) From: Daniel Lezcano To: tglx@linutronix.de Cc: linux-kernel@vger.kernel.org, John Stultz , Stephen Boyd Subject: [PATCH 12/13] clocksource: Remove obsolete CLOCKSOURCE_OF_DECLARE Date: Fri, 5 Oct 2018 16:35:41 +0200 Message-Id: <1538750143-4282-12-git-send-email-daniel.lezcano@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1538750143-4282-1-git-send-email-daniel.lezcano@linaro.org> References: <20181005143253.GE1881@mai> <1538750143-4282-1-git-send-email-daniel.lezcano@linaro.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The macro CLOCKSOURCE_OF_DECLARE was renamed more TIMER_OF_DECLARE, and we kept an alias CLOCKSOURCE_OF_DECLARE in order to smooth the transition for drivers. This change was done 1.5 year ago, we can reasonably remove this backward compatible macro as it is no longer used anywhere. Signed-off-by: Daniel Lezcano --- include/linux/clocksource.h | 3 --- 1 file changed, 3 deletions(-) -- 2.7.4 diff --git a/include/linux/clocksource.h b/include/linux/clocksource.h index 3089189..4c58c1e 100644 --- a/include/linux/clocksource.h +++ b/include/linux/clocksource.h @@ -257,9 +257,6 @@ extern int clocksource_i8253_init(void); #define TIMER_OF_DECLARE(name, compat, fn) \ OF_DECLARE_1_RET(timer, name, compat, fn) -#define CLOCKSOURCE_OF_DECLARE(name, compat, fn) \ - TIMER_OF_DECLARE(name, compat, fn) - #ifdef CONFIG_TIMER_PROBE extern void timer_probe(void); #else From patchwork Fri Oct 5 14:35:42 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Lezcano X-Patchwork-Id: 148192 Delivered-To: patch@linaro.org Received: by 2002:a2e:8595:0:0:0:0:0 with SMTP id b21-v6csp528199lji; Fri, 5 Oct 2018 07:36:46 -0700 (PDT) X-Google-Smtp-Source: ACcGV60cxtGUwUGUUSAlYAERZ0+EklAajio9fwVoBuP0IRbzVquW3nqWA9wuFf20SDfkSj0rQCiR X-Received: by 2002:a17:902:7043:: with SMTP id h3-v6mr12035002plt.103.1538750206466; Fri, 05 Oct 2018 07:36:46 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1538750206; cv=none; d=google.com; s=arc-20160816; b=LLZeEOoOpVBECqp/Hl1MQXGdUvi8QdOfbYKgjdvx3k0Yem3+Obw3FZt8C2Z5TpcEYW IMl94z/2/y5TOO4zwV/AT+QSYkoA8tETxDq+dnwr3UTujLjJp1dVM+9vAbK4agGU+Svo LE771pM4yADkFDDx+EFwT7VuHzRDOIEwGKidqkyvRRBt0xg3S1WMLHn6gUaqOzX8CEgQ l9pvCILWSEuG3Aq617D9Wgud/kveyZAo1oOpoYQnC/NAf/eREVWIFYzjn33MHHHsY8X0 2pEDVjw1RAcAeoyvRfNosQxOrFJXbd5b1/xqPY51r/W85T3c/BB3LP0aD5izkJv8GjfN WtUA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature; bh=VhnOKWzkRDC+3They8IdOyuR0e/vVZiouL/bg+aJfrs=; b=qOj609eB3E+T5wobpJcG34ViG1Umf09Xc/yzZLRsX4t3fY/YZpeQcv0EbTySiakOIm rziZRcTv5GPGqH2/HJERk9C1n0/dT/0Ji0aVlVpjnuIPuAGdiAZ9TQVbWloFP+GR/YS6 ecYcN8uMaOXU2Xfet6q6tfaj6VE+0TwEzKJ1NrqIe6Rs8OkURxurN3oJDhx+AyY2bzl7 /zx8YA58byk5v2z9bHYq6eYqAJkMCmd3Cjox6vRCJT7lJyGTtpiUys0NU2vGYk67UYlP hFhnnC85bebOA7cdXh7G8Uwy0G7ncY2FLuM75aYBRUdLsOM83n4QxJnqRaEz7tI5WduZ CxYA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=IJhJWd6D; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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[77.136.240.151]) by smtp.gmail.com with ESMTPSA id t24-v6sm14080377wra.5.2018.10.05.07.36.40 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Fri, 05 Oct 2018 07:36:40 -0700 (PDT) From: Daniel Lezcano To: tglx@linutronix.de Cc: linux-kernel@vger.kernel.org, Dinh Nguyen , Marek Vasut Subject: [PATCH 13/13] clocksource/drivers/dw_apb: Add reset control Date: Fri, 5 Oct 2018 16:35:42 +0200 Message-Id: <1538750143-4282-13-git-send-email-daniel.lezcano@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1538750143-4282-1-git-send-email-daniel.lezcano@linaro.org> References: <20181005143253.GE1881@mai> <1538750143-4282-1-git-send-email-daniel.lezcano@linaro.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Dinh Nguyen Add code to retrieve the reset property from the dw-apb timers and if the property is available, the safe operation is to assert the timer into reset, and followed by a deassert of the timer reset (brings the timer out of reset). This patch is needed for systems where the bootloader has left the timer not used in reset. - Trivial conflict with commit a74bd1ad7a: "Convert to using %pOFn instead of device_node.name" Signed-off-by: Marek Vasut Signed-off-by: Dinh Nguyen Signed-off-by: Daniel Lezcano --- drivers/clocksource/dw_apb_timer_of.c | 12 ++++++++++++ 1 file changed, 12 insertions(+) -- 2.7.4 diff --git a/drivers/clocksource/dw_apb_timer_of.c b/drivers/clocksource/dw_apb_timer_of.c index fabaa29..db410ac 100644 --- a/drivers/clocksource/dw_apb_timer_of.c +++ b/drivers/clocksource/dw_apb_timer_of.c @@ -22,6 +22,7 @@ #include #include #include +#include #include static void __init timer_get_base_and_rate(struct device_node *np, @@ -29,6 +30,7 @@ static void __init timer_get_base_and_rate(struct device_node *np, { struct clk *timer_clk; struct clk *pclk; + struct reset_control *rstc; *base = of_iomap(np, 0); @@ -36,6 +38,16 @@ static void __init timer_get_base_and_rate(struct device_node *np, panic("Unable to map regs for %pOFn", np); /* + * Reset the timer if the reset control is available, wiping + * out the state the firmware may have left it + */ + rstc = of_reset_control_get(np, NULL); + if (!IS_ERR(rstc)) { + reset_control_assert(rstc); + reset_control_deassert(rstc); + } + + /* * Not all implementations use a periphal clock, so don't panic * if it's not present */