From patchwork Thu Aug 19 18:25:43 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Krzysztof Kozlowski X-Patchwork-Id: 499870 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id CAD9BC4338F for ; Thu, 19 Aug 2021 18:25:56 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id B1687604AC for ; Thu, 19 Aug 2021 18:25:56 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234119AbhHSS0a (ORCPT ); Thu, 19 Aug 2021 14:26:30 -0400 Received: from smtp-relay-canonical-1.canonical.com ([185.125.188.121]:51208 "EHLO smtp-relay-canonical-1.canonical.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233792AbhHSS03 (ORCPT ); Thu, 19 Aug 2021 14:26:29 -0400 Received: from mail-ej1-f72.google.com (mail-ej1-f72.google.com [209.85.218.72]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by smtp-relay-canonical-1.canonical.com (Postfix) with ESMTPS id 55D89411ED for ; Thu, 19 Aug 2021 18:25:52 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=canonical.com; s=20210705; t=1629397552; bh=18gxinZ2DJ3ZX3sOmqcOCSJNbRAwMTizB8l2gxtZoPE=; h=From:To:Cc:Subject:Date:Message-Id:MIME-Version; b=SZk6KOD5V9YTN0Cw/Thp0y2Q0l1GUMflznCj0lSG51CTcN3jyyCl8C1Yst5CPiJoD zFgOD3iZAp5AMgz7X1XMfeVCIlriK05eoS4l7VNNqaoPLhGHYeUJhAFfL67HspGP0T jWJWYbdgQBJgBZZCaM4abW3a2otkIBFBWXriudvk5RcAobPsL0sfG/b8JktevavCzW psRD0JHPev9muFlTxsarqdjdu2xW1larPXcCoHCXa2mJ8HopO5DbSp2AY8w1qiFY55 38ciRvA5fUP28LGF/aHVUjCmNqXEBjqQYUZYm1uKX3haVyUX2K2sUiafCzRwfcExlD n1iVT2LM8Efrg== Received: by mail-ej1-f72.google.com with SMTP id kf21-20020a17090776d5b02905af6ad96f02so2610393ejc.12 for ; Thu, 19 Aug 2021 11:25:52 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=18gxinZ2DJ3ZX3sOmqcOCSJNbRAwMTizB8l2gxtZoPE=; b=GTXlHOhsF8ovqQ/AEDr6CpQbp8QNWUeI4kpN0PvrsFN4NJW/ZFaJdZblxiXHRYwVtV F5uN8cF/Kg86qD5flGeDB3q19uADdK7brqg1r+rrL9nXM05J9RX9GSroAlts6cZZhF43 3dXCWCR1P9Srg3c4sfnlJHeEaAydwYlL46Cx9DbDXAjVS6YZ4ZS7J4FBWcIYnHk6sIz4 djtF7P3xgwM2IzmNr/STTOQU/02F/mfnR4V+naK+uEw3pAyHX1IBC8bwUBNAMwYYBPiS Emz7OIzqixs78pHzKgSkr8BV3igKH1ZXjJB86cWNkU4Pd0BOFtI/7zm9HEiAI/EYtT6f O2Jw== X-Gm-Message-State: AOAM532JK/c3MPwXEjWKkceYaPnUUQs/WjHCICI2DIuzEOer58ZE0TGc VKj/pPNscyPVBsJjEj4nS2HkQEXHE/KKw/Vb2Z0OwCm6JG3xO1XG0F50g+UfFHr+bfHP3chNyP6 P64yCGjSbzb12q8Pg0Pw2sRgPv134jpVztuwh12w= X-Received: by 2002:a17:907:b09:: with SMTP id h9mr17380462ejl.278.1629397551903; Thu, 19 Aug 2021 11:25:51 -0700 (PDT) X-Google-Smtp-Source: ABdhPJy7N24ysDGZlQgoW7Q3735rlAtsbuXMRGfEm8M+0rgtPEoc9ckI8wE0kjehikBR8CWot0sT5Q== X-Received: by 2002:a17:907:b09:: with SMTP id h9mr17380445ejl.278.1629397551791; Thu, 19 Aug 2021 11:25:51 -0700 (PDT) Received: from localhost.localdomain ([86.32.42.198]) by smtp.gmail.com with ESMTPSA id n2sm2212108edi.32.2021.08.19.11.25.50 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 19 Aug 2021 11:25:51 -0700 (PDT) From: Krzysztof Kozlowski To: Jean Delvare , Guenter Roeck , Rob Herring , Jiri Kosina , linux-hwmon@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Krzysztof Kozlowski Subject: [PATCH 1/2] dt-bindings: hwmon: merge max1619 into trivial devices Date: Thu, 19 Aug 2021 20:25:43 +0200 Message-Id: <20210819182544.224121-1-krzysztof.kozlowski@canonical.com> X-Mailer: git-send-email 2.30.2 MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Ther Maxim max1619 bindings are trivial, so simply merge it into trivial-devices.yaml. Signed-off-by: Krzysztof Kozlowski --- Documentation/devicetree/bindings/hwmon/max1619.txt | 12 ------------ .../devicetree/bindings/trivial-devices.yaml | 2 ++ 2 files changed, 2 insertions(+), 12 deletions(-) delete mode 100644 Documentation/devicetree/bindings/hwmon/max1619.txt diff --git a/Documentation/devicetree/bindings/hwmon/max1619.txt b/Documentation/devicetree/bindings/hwmon/max1619.txt deleted file mode 100644 index c70dbbe1e56f..000000000000 --- a/Documentation/devicetree/bindings/hwmon/max1619.txt +++ /dev/null @@ -1,12 +0,0 @@ -Bindings for MAX1619 Temperature Sensor - -Required properties: -- compatible : "maxim,max1619" -- reg : I2C address, one of 0x18, 0x19, 0x1a, 0x29, 0x2a, 0x2b, 0x4c, or - 0x4d, 0x4e - -Example: - temp@4c { - compatible = "maxim,max1619"; - reg = <0x4c>; - }; diff --git a/Documentation/devicetree/bindings/trivial-devices.yaml b/Documentation/devicetree/bindings/trivial-devices.yaml index fb03febc6616..1e4b3464d734 100644 --- a/Documentation/devicetree/bindings/trivial-devices.yaml +++ b/Documentation/devicetree/bindings/trivial-devices.yaml @@ -147,6 +147,8 @@ properties: - maxim,ds1803-100 # Low-Power, 4-/12-Channel, 2-Wire Serial, 12-Bit ADCs - maxim,max1237 + # Temperature Sensor, I2C interface + - maxim,max1619 # 10-bit 10 kOhm linear programable voltage divider - maxim,max5481 # 10-bit 50 kOhm linear programable voltage divider From patchwork Thu Aug 19 18:23:11 2021 Content-Type: text/plain; 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Thu, 19 Aug 2021 11:23:19 -0700 (PDT) Received: from localhost.localdomain ([86.32.42.198]) by smtp.gmail.com with ESMTPSA id c28sm1602113ejc.102.2021.08.19.11.23.17 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 19 Aug 2021 11:23:18 -0700 (PDT) From: Krzysztof Kozlowski To: Rob Herring , Maxime Ripard , Chen-Yu Tsai , Jernej Skrabec , Heiko Stuebner , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, linux-kernel@vger.kernel.org, linux-rockchip@lists.infradead.org Cc: Krzysztof Kozlowski Subject: [PATCH 2/2] arm64: dts: rockchip: align operating-points table name with dtschema Date: Thu, 19 Aug 2021 20:23:11 +0200 Message-Id: <20210819182311.223443-2-krzysztof.kozlowski@canonical.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20210819182311.223443-1-krzysztof.kozlowski@canonical.com> References: <20210819182311.223443-1-krzysztof.kozlowski@canonical.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Align the name of operating-points node to dtschema to fix warnings like: opp-table0: $nodename:0: 'opp-table0' does not match '^opp-table(-[a-z0-9]+)?$' Signed-off-by: Krzysztof Kozlowski --- arch/arm64/boot/dts/rockchip/px30.dtsi | 4 ++-- arch/arm64/boot/dts/rockchip/rk3308.dtsi | 2 +- arch/arm64/boot/dts/rockchip/rk3328.dtsi | 2 +- arch/arm64/boot/dts/rockchip/rk3399-op1-opp.dtsi | 6 +++--- arch/arm64/boot/dts/rockchip/rk3399-opp.dtsi | 6 +++--- arch/arm64/boot/dts/rockchip/rk356x.dtsi | 2 +- 6 files changed, 11 insertions(+), 11 deletions(-) diff --git a/arch/arm64/boot/dts/rockchip/px30.dtsi b/arch/arm64/boot/dts/rockchip/px30.dtsi index 64f643145688..5dbe6bd3b189 100644 --- a/arch/arm64/boot/dts/rockchip/px30.dtsi +++ b/arch/arm64/boot/dts/rockchip/px30.dtsi @@ -110,7 +110,7 @@ CLUSTER_SLEEP: cluster-sleep { }; }; - cpu0_opp_table: cpu0-opp-table { + cpu0_opp_table: opp-table-0 { compatible = "operating-points-v2"; opp-shared; @@ -1014,7 +1014,7 @@ nfc: nand-controller@ff3b0000 { status = "disabled"; }; - gpu_opp_table: opp-table2 { + gpu_opp_table: opp-table-1 { compatible = "operating-points-v2"; opp-200000000 { diff --git a/arch/arm64/boot/dts/rockchip/rk3308.dtsi b/arch/arm64/boot/dts/rockchip/rk3308.dtsi index ce6f4a28d169..7ba9ce4e9826 100644 --- a/arch/arm64/boot/dts/rockchip/rk3308.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3308.dtsi @@ -99,7 +99,7 @@ l2: l2-cache { }; }; - cpu0_opp_table: cpu0-opp-table { + cpu0_opp_table: opp-table-0 { compatible = "operating-points-v2"; opp-shared; diff --git a/arch/arm64/boot/dts/rockchip/rk3328.dtsi b/arch/arm64/boot/dts/rockchip/rk3328.dtsi index becc1c61b182..1c1608d8de01 100644 --- a/arch/arm64/boot/dts/rockchip/rk3328.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3328.dtsi @@ -105,7 +105,7 @@ l2: l2-cache0 { }; }; - cpu0_opp_table: opp_table0 { + cpu0_opp_table: opp-table-0 { compatible = "operating-points-v2"; opp-shared; diff --git a/arch/arm64/boot/dts/rockchip/rk3399-op1-opp.dtsi b/arch/arm64/boot/dts/rockchip/rk3399-op1-opp.dtsi index 69cc9b05baa5..2180e0f75003 100644 --- a/arch/arm64/boot/dts/rockchip/rk3399-op1-opp.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3399-op1-opp.dtsi @@ -4,7 +4,7 @@ */ / { - cluster0_opp: opp-table0 { + cluster0_opp: opp-table-0 { compatible = "operating-points-v2"; opp-shared; @@ -39,7 +39,7 @@ opp06 { }; }; - cluster1_opp: opp-table1 { + cluster1_opp: opp-table-1 { compatible = "operating-points-v2"; opp-shared; @@ -82,7 +82,7 @@ opp08 { }; }; - gpu_opp_table: opp-table2 { + gpu_opp_table: opp-table-2 { compatible = "operating-points-v2"; opp00 { diff --git a/arch/arm64/boot/dts/rockchip/rk3399-opp.dtsi b/arch/arm64/boot/dts/rockchip/rk3399-opp.dtsi index da41cd81ebb7..fee5e7111279 100644 --- a/arch/arm64/boot/dts/rockchip/rk3399-opp.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3399-opp.dtsi @@ -4,7 +4,7 @@ */ / { - cluster0_opp: opp-table0 { + cluster0_opp: opp-table-0 { compatible = "operating-points-v2"; opp-shared; @@ -35,7 +35,7 @@ opp05 { }; }; - cluster1_opp: opp-table1 { + cluster1_opp: opp-table-1 { compatible = "operating-points-v2"; opp-shared; @@ -74,7 +74,7 @@ opp07 { }; }; - gpu_opp_table: opp-table2 { + gpu_opp_table: opp-table-2 { compatible = "operating-points-v2"; opp00 { diff --git a/arch/arm64/boot/dts/rockchip/rk356x.dtsi b/arch/arm64/boot/dts/rockchip/rk356x.dtsi index d89831bee1eb..949322df3b88 100644 --- a/arch/arm64/boot/dts/rockchip/rk356x.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk356x.dtsi @@ -83,7 +83,7 @@ cpu3: cpu@300 { }; }; - cpu0_opp_table: cpu0-opp-table { + cpu0_opp_table: opp-table-0 { compatible = "operating-points-v2"; opp-shared;