From patchwork Thu Aug 12 14:07:57 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Hari Prasath Gujulan Elango X-Patchwork-Id: 496747 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.5 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 965BCC4338F for ; Thu, 12 Aug 2021 14:08:08 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 6E3CD60EB5 for ; Thu, 12 Aug 2021 14:08:08 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S237010AbhHLOIc (ORCPT ); Thu, 12 Aug 2021 10:08:32 -0400 Received: from esa.microchip.iphmx.com ([68.232.153.233]:7727 "EHLO esa.microchip.iphmx.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S236956AbhHLOIc (ORCPT ); Thu, 12 Aug 2021 10:08:32 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1628777287; x=1660313287; h=from:to:cc:subject:date:message-id:mime-version; bh=p0EZrYR3bmKudOTePlI57y+XvEl2pslcz4rbLPhHVW0=; b=T/YUscArP2chnoPBBdVUeUGkC5ZWBQl3/+g3vrYqeLtk6drYfGNWNGf2 VSPG2nQcx47cn5OzBikMRcGOmZ/RlghEGpnZnB1vF+n8MwdVsjm/c+BG2 LikNkHaS+tBufKU5GK90PsB4LwVXscg/FlE5jv4HRUk+HsFTc2Gt7uLrv xK7fec7mWdo9j6rZN9ioYLshqxc4xx3W4seu9G1/fyQk1h7pafm3Alnm8 tpD1Xlj9EPzVUQvONX6x3lWEs8KNINuwRRFppMJummZWMH1Jd8QITptg4 6ohC9IIlqCekWJarDMgIo78PjYMhBv/LwfYQiZzsjoMd82r72nMZ2gIYo Q==; IronPort-SDR: INc926UWL/x9IkCie/fyCB58bKtFh1I/jq1RbOcE0m8Cunty/Xbw4eRd6mcEZRRmywDPHRsNiC wXvP0LjRRaKcTBNmYptCdws4cegarndo/bMM3/V8/4MhHs5oUYVd1V8NLdVb10QeEVBRL7wc4z Vq7tRhmqbC/Kp9sdwWVIqXcCGj/6UTl+asoF84cF+l5IlZmlkmnX3gcj39WQsfZ7BaX7OKaP3h 58OQ/d+5Mhw+Pr6CWS/kIkICL0tZ0EujrEMGnQHiuDrvdnbbeRt+PRs+Kk3qg3K14vLHP4ZSh5 XM9BtpJAbYHJEpgVVIqaQpJ/ X-IronPort-AV: E=Sophos;i="5.84,316,1620716400"; d="scan'208";a="139830325" Received: from smtpout.microchip.com (HELO email.microchip.com) ([198.175.253.82]) by esa1.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 12 Aug 2021 07:08:06 -0700 Received: from chn-vm-ex02.mchp-main.com (10.10.85.144) by chn-vm-ex03.mchp-main.com (10.10.85.151) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2176.2; Thu, 12 Aug 2021 07:08:05 -0700 Received: from che-lt-i63539u.amer.actel.com (10.10.115.15) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server id 15.1.2176.2 via Frontend Transport; Thu, 12 Aug 2021 07:08:01 -0700 From: Hari Prasath To: , , , , , , , CC: Subject: [PATCH 1/2] ARM: at91: dts: sama5d29: Add dtsi file for sama5d29 Date: Thu, 12 Aug 2021 19:37:57 +0530 Message-ID: <20210812140758.28273-1-Hari.PrasathGE@microchip.com> X-Mailer: git-send-email 2.17.1 MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org A new dtsi file for sama5d29 SoC is added which basically inherits the sama5d2 dtsi with the mac controller compatible property updated. Signed-off-by: Hari Prasath Acked-by: Nicolas Ferre --- arch/arm/boot/dts/sama5d29.dtsi | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) create mode 100644 arch/arm/boot/dts/sama5d29.dtsi diff --git a/arch/arm/boot/dts/sama5d29.dtsi b/arch/arm/boot/dts/sama5d29.dtsi new file mode 100644 index 000000000000..e8cc73c0619f --- /dev/null +++ b/arch/arm/boot/dts/sama5d29.dtsi @@ -0,0 +1,16 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * sama5d29.dtsi - Device Tree Include file for SAMA5D29 SoC of the SAMA5D2 + * family. + * + * Copyright (C) 2021 Microchip Technology, Inc. and its subsidiaries + * + * Author: Hari Prasath + * + */ + +#include "sama5d2.dtsi" + +&macb0 { +compatible = "atmel,sama5d29-gem"; +}; From patchwork Thu Aug 12 14:07:58 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Hari Prasath Gujulan Elango X-Patchwork-Id: 496166 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.5 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2C8F2C4338F for ; Thu, 12 Aug 2021 14:08:21 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 07A226104F for ; Thu, 12 Aug 2021 14:08:20 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S237882AbhHLOIp (ORCPT ); Thu, 12 Aug 2021 10:08:45 -0400 Received: from esa.microchip.iphmx.com ([68.232.154.123]:31383 "EHLO esa.microchip.iphmx.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S237854AbhHLOIo (ORCPT ); Thu, 12 Aug 2021 10:08:44 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1628777299; x=1660313299; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version; bh=pmcxOQ+Qr7k+X6ziNFRPuhucl2XjO3oV1ys2iXot8CU=; b=apVwOlfo17MBkSEjnqflJ7zvczRwHej1O6eQ2HD/zf9V2bN2EOULm5IC HZOeEVYYoHpJKIO4sg4fWqMRdTSfsqyJ38kV7MMqWMKxnZzFzkSsVWVyL mEnnpeMxSHXs2SbaGONW5WtI/M+2oo1VklRvQmUWGk7YkUSOnCOQ81AGA f2+SeLeTvUYwAlIwAK6Yhk8l2pdFi5goHr1nclj3V5nE8Urx/0j7pli8X IGFkdwm87TOLArIGTF3rmXdFOu2Iht2LLwG8Q6thaYHUc7eVNsaeTcKwW HU/56hP6MUtcobX+ipXRBZ5CgRVlWBM2+4ephKUZixto93U+GhteSUKYB g==; IronPort-SDR: QKG8GjeuWu+w6TuKzq6jkt4EZH3vD8C2JHpM079IpL4zXw5QdmQikzbhax+RFmJ7Q0u1jcZKv3 fsx0QBIG7uWSujs9jSNhbDIiuBf/zni3aIN++/VVAfLB6NM99cxxmKw0WxHVO0P8CB8eqZyZG5 5l2hfdiYLrDZbmMK00AJK42pSO9wjLMbd3qdoo8illdRI4W3O49IMtlD2Kxuw8FVL3Yy5th7Fu ibHJCukIm/sU8HjR/mzD/7j7/MOIfH9TJecM278G8qbejU8J0s+WTRcTb7e0cyFaPGt0+zFJsH ptOTMuGhxPfsV++f6it0LjJv X-IronPort-AV: E=Sophos;i="5.84,316,1620716400"; d="scan'208";a="65610479" Received: from smtpout.microchip.com (HELO email.microchip.com) ([198.175.253.82]) by esa6.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 12 Aug 2021 07:08:15 -0700 Received: from chn-vm-ex02.mchp-main.com (10.10.87.72) by chn-vm-ex02.mchp-main.com (10.10.87.72) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2176.2; Thu, 12 Aug 2021 07:08:15 -0700 Received: from che-lt-i63539u.amer.actel.com (10.10.115.15) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server id 15.1.2176.2 via Frontend Transport; Thu, 12 Aug 2021 07:08:10 -0700 From: Hari Prasath To: , , , , , , , CC: Subject: [PATCH 2/2] ARM: at91: dts: at91-sama5d2_xplained: Add comments for sama5d29 Date: Thu, 12 Aug 2021 19:37:58 +0530 Message-ID: <20210812140758.28273-2-Hari.PrasathGE@microchip.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20210812140758.28273-1-Hari.PrasathGE@microchip.com> References: <20210812140758.28273-1-Hari.PrasathGE@microchip.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add comments for the end user for modifying the DTS file for instantiating the sama5d29 SoC. Signed-off-by: Hari Prasath --- arch/arm/boot/dts/at91-sama5d2_xplained.dts | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/arch/arm/boot/dts/at91-sama5d2_xplained.dts b/arch/arm/boot/dts/at91-sama5d2_xplained.dts index 627b7bf88d83..faa30063d9a9 100644 --- a/arch/arm/boot/dts/at91-sama5d2_xplained.dts +++ b/arch/arm/boot/dts/at91-sama5d2_xplained.dts @@ -6,6 +6,11 @@ * 2015 Nicolas Ferre */ /dts-v1/; +/* + * Replace the line below with "sama5d29.dtsi" in order to instantiate the + * sama5d29 SoC of the sama5d2 family.Otherwise, leave it unchanged when + * using sama5d27 SoC for instance. + */ #include "sama5d2.dtsi" #include "sama5d2-pinfunc.h" #include