From patchwork Wed Aug 11 02:57:47 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: =?utf-8?b?WXVuZmVpIERvbmcgKOiRo+S6kemjnik=?= X-Patchwork-Id: 495458 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.7 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, UNPARSEABLE_RELAY, URIBL_BLOCKED, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6328EC4338F for ; Wed, 11 Aug 2021 02:58:50 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 40F9860F25 for ; Wed, 11 Aug 2021 02:58:50 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232697AbhHKC7G (ORCPT ); Tue, 10 Aug 2021 22:59:06 -0400 Received: from mailgw01.mediatek.com ([60.244.123.138]:51500 "EHLO mailgw01.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S232496AbhHKC7E (ORCPT ); Tue, 10 Aug 2021 22:59:04 -0400 X-UUID: d99c4dfd565c426d82bfe2da17f27fc9-20210811 X-UUID: d99c4dfd565c426d82bfe2da17f27fc9-20210811 Received: from mtkexhb01.mediatek.inc [(172.21.101.102)] by mailgw01.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-SHA384 256/256) with ESMTP id 2127040903; Wed, 11 Aug 2021 10:58:36 +0800 Received: from MTKCAS06.mediatek.inc (172.21.101.30) by mtkmbs02n2.mediatek.inc (172.21.101.101) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Wed, 11 Aug 2021 10:58:34 +0800 Received: from localhost.localdomain (10.17.3.153) by MTKCAS06.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Wed, 11 Aug 2021 10:58:33 +0800 From: Yunfei Dong To: Yunfei Dong , Alexandre Courbot , Hans Verkuil , Tzung-Bi Shih , Tiffany Lin , Andrew-CT Chen , Mauro Carvalho Chehab , Rob Herring , Matthias Brugger , Tomasz Figa CC: Hsin-Yi Wang , Fritz Koenig , Irui Wang , , , , , , , , George Sun Subject: [PATCH v5, 01/15] media: mtk-vcodec: Get numbers of register bases from DT Date: Wed, 11 Aug 2021 10:57:47 +0800 Message-ID: <20210811025801.21597-2-yunfei.dong@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20210811025801.21597-1-yunfei.dong@mediatek.com> References: <20210811025801.21597-1-yunfei.dong@mediatek.com> MIME-Version: 1.0 X-MTK: N Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org Different platform may has different numbers of register bases. Gets the numbers of register bases from DT (sizeof(u32) * 4 bytes for each). Signed-off-by: Yunfei Dong Reviewed-by: Tzung-Bi Shih --- v5: no changes --- .../platform/mtk-vcodec/mtk_vcodec_dec_drv.c | 37 ++++++++++++++----- 1 file changed, 28 insertions(+), 9 deletions(-) diff --git a/drivers/media/platform/mtk-vcodec/mtk_vcodec_dec_drv.c b/drivers/media/platform/mtk-vcodec/mtk_vcodec_dec_drv.c index 55ae198dbcf9..983e0f2831af 100644 --- a/drivers/media/platform/mtk-vcodec/mtk_vcodec_dec_drv.c +++ b/drivers/media/platform/mtk-vcodec/mtk_vcodec_dec_drv.c @@ -78,6 +78,30 @@ static irqreturn_t mtk_vcodec_dec_irq_handler(int irq, void *priv) return IRQ_HANDLED; } +static int mtk_vcodec_get_reg_bases(struct mtk_vcodec_dev *dev) +{ + struct platform_device *pdev = dev->plat_dev; + int reg_num, i; + + /* Sizeof(u32) * 4 bytes for each register base. */ + reg_num = of_property_count_elems_of_size(pdev->dev.of_node, "reg", + sizeof(u32) * 4); + if (reg_num <= 0 || reg_num > NUM_MAX_VDEC_REG_BASE) { + dev_err(&pdev->dev, "Invalid register property size: %d\n", reg_num); + return -EINVAL; + } + + for (i = 0; i < reg_num; i++) { + dev->reg_base[i] = devm_platform_ioremap_resource(pdev, i); + if (IS_ERR(dev->reg_base[i])) + return PTR_ERR(dev->reg_base[i]); + + mtk_v4l2_debug(2, "reg[%d] base=%p", i, dev->reg_base[i]); + } + + return 0; +} + static int fops_vcodec_open(struct file *file) { struct mtk_vcodec_dev *dev = video_drvdata(file); @@ -206,7 +230,7 @@ static int mtk_vcodec_probe(struct platform_device *pdev) struct resource *res; phandle rproc_phandle; enum mtk_vcodec_fw_type fw_type; - int i, ret; + int ret; dev = devm_kzalloc(&pdev->dev, sizeof(*dev), GFP_KERNEL); if (!dev) @@ -238,14 +262,9 @@ static int mtk_vcodec_probe(struct platform_device *pdev) goto err_dec_pm; } - for (i = 0; i < NUM_MAX_VDEC_REG_BASE; i++) { - dev->reg_base[i] = devm_platform_ioremap_resource(pdev, i); - if (IS_ERR((__force void *)dev->reg_base[i])) { - ret = PTR_ERR((__force void *)dev->reg_base[i]); - goto err_res; - } - mtk_v4l2_debug(2, "reg[%d] base=%p", i, dev->reg_base[i]); - } + ret = mtk_vcodec_get_reg_bases(dev); + if (ret) + goto err_res; res = platform_get_resource(pdev, IORESOURCE_IRQ, 0); if (res == NULL) { From patchwork Wed Aug 11 02:57:49 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: =?utf-8?b?WXVuZmVpIERvbmcgKOiRo+S6kemjnik=?= X-Patchwork-Id: 495456 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.7 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, UNPARSEABLE_RELAY, URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id E275CC43216 for ; Wed, 11 Aug 2021 02:58:55 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id C34F360EC0 for ; Wed, 11 Aug 2021 02:58:55 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232952AbhHKC7Q (ORCPT ); Tue, 10 Aug 2021 22:59:16 -0400 Received: from mailgw01.mediatek.com ([60.244.123.138]:51626 "EHLO mailgw01.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S232628AbhHKC7H (ORCPT ); Tue, 10 Aug 2021 22:59:07 -0400 X-UUID: 449135ad8d1d44f59e054162256eef93-20210811 X-UUID: 449135ad8d1d44f59e054162256eef93-20210811 Received: from mtkcas10.mediatek.inc [(172.21.101.39)] by mailgw01.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-SHA384 256/256) with ESMTP id 1263967609; Wed, 11 Aug 2021 10:58:39 +0800 Received: from MTKCAS06.mediatek.inc (172.21.101.30) by mtkmbs07n2.mediatek.inc (172.21.101.141) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Wed, 11 Aug 2021 10:58:37 +0800 Received: from localhost.localdomain (10.17.3.153) by MTKCAS06.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Wed, 11 Aug 2021 10:58:36 +0800 From: Yunfei Dong To: Yunfei Dong , Alexandre Courbot , Hans Verkuil , Tzung-Bi Shih , Tiffany Lin , Andrew-CT Chen , Mauro Carvalho Chehab , Rob Herring , Matthias Brugger , Tomasz Figa CC: Hsin-Yi Wang , Fritz Koenig , Irui Wang , , , , , , , , George Sun Subject: [PATCH v5, 03/15] media: mtk-vcodec: Refactor vcodec pm interface Date: Wed, 11 Aug 2021 10:57:49 +0800 Message-ID: <20210811025801.21597-4-yunfei.dong@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20210811025801.21597-1-yunfei.dong@mediatek.com> References: <20210811025801.21597-1-yunfei.dong@mediatek.com> MIME-Version: 1.0 X-MTK: N Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org Using the needed param for pm init/release function and remove unused param mtkdev in 'struct mtk_vcodec_pm'. Signed-off-by: Yunfei Dong Reviewed-by: Tzung-Bi Shih --- v5: no changes --- .../platform/mtk-vcodec/mtk_vcodec_dec_drv.c | 6 ++--- .../platform/mtk-vcodec/mtk_vcodec_dec_pm.c | 22 ++++++++----------- .../platform/mtk-vcodec/mtk_vcodec_dec_pm.h | 5 +++-- .../platform/mtk-vcodec/mtk_vcodec_drv.h | 1 - .../platform/mtk-vcodec/mtk_vcodec_enc_pm.c | 1 - 5 files changed, 15 insertions(+), 20 deletions(-) diff --git a/drivers/media/platform/mtk-vcodec/mtk_vcodec_dec_drv.c b/drivers/media/platform/mtk-vcodec/mtk_vcodec_dec_drv.c index 8db9cdc66043..dd749d41c75a 100644 --- a/drivers/media/platform/mtk-vcodec/mtk_vcodec_dec_drv.c +++ b/drivers/media/platform/mtk-vcodec/mtk_vcodec_dec_drv.c @@ -249,7 +249,7 @@ static int mtk_vcodec_probe(struct platform_device *pdev) if (IS_ERR(dev->fw_handler)) return PTR_ERR(dev->fw_handler); - ret = mtk_vcodec_init_dec_pm(dev); + ret = mtk_vcodec_init_dec_pm(dev->plat_dev, &dev->pm); if (ret < 0) { dev_err(&pdev->dev, "Failed to get mt vcodec clock source"); goto err_dec_pm; @@ -379,7 +379,7 @@ static int mtk_vcodec_probe(struct platform_device *pdev) err_dec_alloc: v4l2_device_unregister(&dev->v4l2_dev); err_res: - mtk_vcodec_release_dec_pm(dev); + mtk_vcodec_release_dec_pm(&dev->pm); err_dec_pm: mtk_vcodec_fw_release(dev->fw_handler); return ret; @@ -422,7 +422,7 @@ static int mtk_vcodec_dec_remove(struct platform_device *pdev) video_unregister_device(dev->vfd_dec); v4l2_device_unregister(&dev->v4l2_dev); - mtk_vcodec_release_dec_pm(dev); + mtk_vcodec_release_dec_pm(&dev->pm); mtk_vcodec_fw_release(dev->fw_handler); return 0; } diff --git a/drivers/media/platform/mtk-vcodec/mtk_vcodec_dec_pm.c b/drivers/media/platform/mtk-vcodec/mtk_vcodec_dec_pm.c index 6038db96f71c..20bd157a855c 100644 --- a/drivers/media/platform/mtk-vcodec/mtk_vcodec_dec_pm.c +++ b/drivers/media/platform/mtk-vcodec/mtk_vcodec_dec_pm.c @@ -13,18 +13,15 @@ #include "mtk_vcodec_dec_pm.h" #include "mtk_vcodec_util.h" -int mtk_vcodec_init_dec_pm(struct mtk_vcodec_dev *mtkdev) +int mtk_vcodec_init_dec_pm(struct platform_device *pdev, + struct mtk_vcodec_pm *pm) { struct device_node *node; - struct platform_device *pdev; - struct mtk_vcodec_pm *pm; + struct platform_device *larb_pdev; struct mtk_vcodec_clk *dec_clk; struct mtk_vcodec_clk_info *clk_info; int i = 0, ret = 0; - pdev = mtkdev->plat_dev; - pm = &mtkdev->pm; - pm->mtkdev = mtkdev; dec_clk = &pm->vdec_clk; node = of_parse_phandle(pdev->dev.of_node, "mediatek,larb", 0); if (!node) { @@ -32,13 +29,12 @@ int mtk_vcodec_init_dec_pm(struct mtk_vcodec_dev *mtkdev) return -1; } - pdev = of_find_device_by_node(node); + larb_pdev = of_find_device_by_node(node); of_node_put(node); - if (WARN_ON(!pdev)) { + if (WARN_ON(!larb_pdev)) { return -1; } - pm->larbvdec = &pdev->dev; - pdev = mtkdev->plat_dev; + pm->larbvdec = &larb_pdev->dev; pm->dev = &pdev->dev; dec_clk->clk_num = @@ -82,10 +78,10 @@ int mtk_vcodec_init_dec_pm(struct mtk_vcodec_dev *mtkdev) return ret; } -void mtk_vcodec_release_dec_pm(struct mtk_vcodec_dev *dev) +void mtk_vcodec_release_dec_pm(struct mtk_vcodec_pm *pm) { - pm_runtime_disable(dev->pm.dev); - put_device(dev->pm.larbvdec); + pm_runtime_disable(pm->dev); + put_device(pm->larbvdec); } int mtk_vcodec_dec_pw_on(struct mtk_vcodec_pm *pm) diff --git a/drivers/media/platform/mtk-vcodec/mtk_vcodec_dec_pm.h b/drivers/media/platform/mtk-vcodec/mtk_vcodec_dec_pm.h index 280aeaefdb65..a3df6aef6cb9 100644 --- a/drivers/media/platform/mtk-vcodec/mtk_vcodec_dec_pm.h +++ b/drivers/media/platform/mtk-vcodec/mtk_vcodec_dec_pm.h @@ -9,8 +9,9 @@ #include "mtk_vcodec_drv.h" -int mtk_vcodec_init_dec_pm(struct mtk_vcodec_dev *dev); -void mtk_vcodec_release_dec_pm(struct mtk_vcodec_dev *dev); +int mtk_vcodec_init_dec_pm(struct platform_device *pdev, + struct mtk_vcodec_pm *pm); +void mtk_vcodec_release_dec_pm(struct mtk_vcodec_pm *pm); int mtk_vcodec_dec_pw_on(struct mtk_vcodec_pm *pm); void mtk_vcodec_dec_pw_off(struct mtk_vcodec_pm *pm); diff --git a/drivers/media/platform/mtk-vcodec/mtk_vcodec_drv.h b/drivers/media/platform/mtk-vcodec/mtk_vcodec_drv.h index 3b1e5e3a450e..973b0b3649c6 100644 --- a/drivers/media/platform/mtk-vcodec/mtk_vcodec_drv.h +++ b/drivers/media/platform/mtk-vcodec/mtk_vcodec_drv.h @@ -195,7 +195,6 @@ struct mtk_vcodec_pm { struct mtk_vcodec_clk venc_clk; struct device *larbvenc; struct device *dev; - struct mtk_vcodec_dev *mtkdev; }; /** diff --git a/drivers/media/platform/mtk-vcodec/mtk_vcodec_enc_pm.c b/drivers/media/platform/mtk-vcodec/mtk_vcodec_enc_pm.c index 1b2e4930ed27..0c8c8f86788c 100644 --- a/drivers/media/platform/mtk-vcodec/mtk_vcodec_enc_pm.c +++ b/drivers/media/platform/mtk-vcodec/mtk_vcodec_enc_pm.c @@ -26,7 +26,6 @@ int mtk_vcodec_init_enc_pm(struct mtk_vcodec_dev *mtkdev) pdev = mtkdev->plat_dev; pm = &mtkdev->pm; memset(pm, 0, sizeof(struct mtk_vcodec_pm)); - pm->mtkdev = mtkdev; pm->dev = &pdev->dev; dev = &pdev->dev; enc_clk = &pm->venc_clk; From patchwork Wed Aug 11 02:57:50 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: =?utf-8?b?WXVuZmVpIERvbmcgKOiRo+S6kemjnik=?= X-Patchwork-Id: 495457 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.7 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, UNPARSEABLE_RELAY, URIBL_BLOCKED, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 03784C4320E for ; Wed, 11 Aug 2021 02:58:53 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id D305260EC0 for ; Wed, 11 Aug 2021 02:58:52 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232834AbhHKC7O (ORCPT ); Tue, 10 Aug 2021 22:59:14 -0400 Received: from mailgw01.mediatek.com ([60.244.123.138]:51644 "EHLO mailgw01.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S232772AbhHKC7I (ORCPT ); Tue, 10 Aug 2021 22:59:08 -0400 X-UUID: a490474438dc434eb22c175b191ab11a-20210811 X-UUID: a490474438dc434eb22c175b191ab11a-20210811 Received: from mtkcas07.mediatek.inc [(172.21.101.84)] by mailgw01.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-SHA384 256/256) with ESMTP id 1515056436; Wed, 11 Aug 2021 10:58:40 +0800 Received: from MTKCAS06.mediatek.inc (172.21.101.30) by mtkmbs02n2.mediatek.inc (172.21.101.101) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Wed, 11 Aug 2021 10:58:38 +0800 Received: from localhost.localdomain (10.17.3.153) by MTKCAS06.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Wed, 11 Aug 2021 10:58:37 +0800 From: Yunfei Dong To: Yunfei Dong , Alexandre Courbot , Hans Verkuil , Tzung-Bi Shih , Tiffany Lin , Andrew-CT Chen , Mauro Carvalho Chehab , Rob Herring , Matthias Brugger , Tomasz Figa CC: Hsin-Yi Wang , Fritz Koenig , Irui Wang , , , , , , , , George Sun Subject: [PATCH v5, 04/15] media: mtk-vcodec: Use component framework to manage each hardware information Date: Wed, 11 Aug 2021 10:57:50 +0800 Message-ID: <20210811025801.21597-5-yunfei.dong@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20210811025801.21597-1-yunfei.dong@mediatek.com> References: <20210811025801.21597-1-yunfei.dong@mediatek.com> MIME-Version: 1.0 X-MTK: N Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org Uses component framework to manage each hardware information which includes irq/power/clk. The hardware includes LAT0, LAT1 and CORE. Signed-off-by: Yunfei Dong --- v5: Fix platform_set_drvdata in error place. --- drivers/media/platform/mtk-vcodec/Makefile | 1 + .../platform/mtk-vcodec/mtk_vcodec_dec.h | 1 + .../platform/mtk-vcodec/mtk_vcodec_dec_drv.c | 194 +++++++++++++++--- .../platform/mtk-vcodec/mtk_vcodec_dec_hw.c | 184 +++++++++++++++++ .../platform/mtk-vcodec/mtk_vcodec_dec_hw.h | 49 +++++ .../mtk-vcodec/mtk_vcodec_dec_stateful.c | 1 + .../mtk-vcodec/mtk_vcodec_dec_stateless.c | 1 + .../platform/mtk-vcodec/mtk_vcodec_drv.h | 19 ++ 8 files changed, 416 insertions(+), 34 deletions(-) create mode 100644 drivers/media/platform/mtk-vcodec/mtk_vcodec_dec_hw.c create mode 100644 drivers/media/platform/mtk-vcodec/mtk_vcodec_dec_hw.h diff --git a/drivers/media/platform/mtk-vcodec/Makefile b/drivers/media/platform/mtk-vcodec/Makefile index ca8e9e7a9c4e..edeb3b66e9e9 100644 --- a/drivers/media/platform/mtk-vcodec/Makefile +++ b/drivers/media/platform/mtk-vcodec/Makefile @@ -15,6 +15,7 @@ mtk-vcodec-dec-y := vdec/vdec_h264_if.o \ mtk_vcodec_dec_stateful.o \ mtk_vcodec_dec_stateless.o \ mtk_vcodec_dec_pm.o \ + mtk_vcodec_dec_hw.o \ mtk-vcodec-enc-y := venc/venc_vp8_if.o \ venc/venc_h264_if.o \ diff --git a/drivers/media/platform/mtk-vcodec/mtk_vcodec_dec.h b/drivers/media/platform/mtk-vcodec/mtk_vcodec_dec.h index 9fbd24186c1a..c509224cbff4 100644 --- a/drivers/media/platform/mtk-vcodec/mtk_vcodec_dec.h +++ b/drivers/media/platform/mtk-vcodec/mtk_vcodec_dec.h @@ -66,6 +66,7 @@ extern const struct v4l2_ioctl_ops mtk_vdec_ioctl_ops; extern const struct v4l2_m2m_ops mtk_vdec_m2m_ops; extern const struct media_device_ops mtk_vcodec_media_ops; +extern struct platform_driver mtk_vdec_comp_driver; /* * mtk_vdec_lock/mtk_vdec_unlock are for ctx instance to diff --git a/drivers/media/platform/mtk-vcodec/mtk_vcodec_dec_drv.c b/drivers/media/platform/mtk-vcodec/mtk_vcodec_dec_drv.c index dd749d41c75a..4c6f4d7612fa 100644 --- a/drivers/media/platform/mtk-vcodec/mtk_vcodec_dec_drv.c +++ b/drivers/media/platform/mtk-vcodec/mtk_vcodec_dec_drv.c @@ -5,6 +5,7 @@ * Tiffany Lin */ +#include #include #include #include @@ -18,19 +19,90 @@ #include "mtk_vcodec_drv.h" #include "mtk_vcodec_dec.h" +#include "mtk_vcodec_dec_hw.h" #include "mtk_vcodec_dec_pm.h" #include "mtk_vcodec_intr.h" -#include "mtk_vcodec_util.h" #include "mtk_vcodec_fw.h" -#define VDEC_HW_ACTIVE 0x10 -#define VDEC_IRQ_CFG 0x11 -#define VDEC_IRQ_CLR 0x10 -#define VDEC_IRQ_CFG_REG 0xa4 - module_param(mtk_v4l2_dbg_level, int, 0644); module_param(mtk_vcodec_dbg, bool, 0644); +static struct of_device_id mtk_vdec_drv_ids[] = { + { + .compatible = "mediatek,mtk-vcodec-lat", + .data = (void *)MTK_VDEC_LAT0, + }, + { + .compatible = "mediatek,mtk-vcodec-core", + .data = (void *)MTK_VDEC_CORE, + }, + {}, +}; + +static inline int mtk_vdec_compare_of(struct device *dev, void *data) +{ + return dev->of_node == data; +} + +static inline void mtk_vdec_release_of(struct device *dev, void *data) +{ + of_node_put(data); +} + +static inline int mtk_vdec_bind(struct device *dev) +{ + struct mtk_vcodec_dev *data = dev_get_drvdata(dev); + + return component_bind_all(dev, data); +} + +static inline void mtk_vdec_unbind(struct device *dev) +{ + struct mtk_vcodec_dev *data = dev_get_drvdata(dev); + + component_unbind_all(dev, data); +} + +static const struct component_master_ops mtk_vdec_ops = { + .bind = mtk_vdec_bind, + .unbind = mtk_vdec_unbind, +}; + +static struct component_match *mtk_vcodec_match_add( + struct mtk_vcodec_dev *vdec_dev) + { + struct platform_device *pdev = vdec_dev->plat_dev; + struct component_match *match = NULL; + struct device_node *comp_node; + enum mtk_vdec_hw_id comp_idx; + const struct of_device_id *of_id; + int i; + + for (i = 0; i < ARRAY_SIZE(mtk_vdec_drv_ids); i++) { + of_id = &mtk_vdec_drv_ids[i]; + comp_node = of_find_compatible_node(NULL, NULL, + of_id->compatible); + if (!comp_node) + continue; + + if (!of_device_is_available(comp_node)) { + of_node_put(comp_node); + dev_err(&pdev->dev, "Fail to get MMSYS node\n"); + continue; + } + + comp_idx = (enum mtk_vdec_hw_id)of_id->data; + mtk_v4l2_debug(4, "Get component:hw_id(%d),vdec_dev(0x%p),comp_node(0x%p)\n", + comp_idx, vdec_dev, comp_node); + vdec_dev->component_node[comp_idx] = comp_node; + + component_match_add_release(&pdev->dev, &match, mtk_vdec_release_of, + mtk_vdec_compare_of, comp_node); + } + + return match; +} + static irqreturn_t mtk_vcodec_dec_irq_handler(int irq, void *priv) { struct mtk_vcodec_dev *dev = priv; @@ -95,6 +167,58 @@ static int mtk_vcodec_get_reg_bases(struct mtk_vcodec_dev *dev) return 0; } +static int mtk_vcodec_init_master(struct mtk_vcodec_dev *dev) +{ + struct platform_device *pdev = dev->plat_dev; + struct component_match *match; + int ret; + + match = mtk_vcodec_match_add(dev); + if (IS_ERR_OR_NULL(match)) + return -EINVAL; + + ret = component_master_add_with_match(&pdev->dev, &mtk_vdec_ops, match); + if (ret < 0) + return ret; + + return 0; +} + +static int mtk_vcodec_init_dec_params(struct mtk_vcodec_dev *dev) +{ + struct platform_device *pdev = dev->plat_dev; + int ret; + + ret = mtk_vcodec_get_reg_bases(dev); + if (ret) + return ret; + + if (!dev->vdec_pdata->is_comp_supported) { + dev->dec_irq = platform_get_irq(pdev, 0); + if (dev->dec_irq < 0) { + dev_err(&pdev->dev, "failed to get irq number"); + return dev->dec_irq; + } + + irq_set_status_flags(dev->dec_irq, IRQ_NOAUTOEN); + ret = devm_request_irq(&pdev->dev, dev->dec_irq, + mtk_vcodec_dec_irq_handler, 0, pdev->name, dev); + if (ret) { + dev_err(&pdev->dev, "failed to install dev->dec_irq %d (%d)", + dev->dec_irq, ret); + return ret; + } + + ret = mtk_vcodec_init_dec_pm(pdev, &dev->pm); + if (ret < 0) { + dev_err(&pdev->dev, "failed to get mt vcodec clock source"); + return ret; + } + } + + return 0; +} + static int fops_vcodec_open(struct file *file) { struct mtk_vcodec_dev *dev = video_drvdata(file); @@ -220,7 +344,6 @@ static int mtk_vcodec_probe(struct platform_device *pdev) { struct mtk_vcodec_dev *dev; struct video_device *vfd_dec; - struct resource *res; phandle rproc_phandle; enum mtk_vcodec_fw_type fw_type; int ret; @@ -249,32 +372,10 @@ static int mtk_vcodec_probe(struct platform_device *pdev) if (IS_ERR(dev->fw_handler)) return PTR_ERR(dev->fw_handler); - ret = mtk_vcodec_init_dec_pm(dev->plat_dev, &dev->pm); - if (ret < 0) { - dev_err(&pdev->dev, "Failed to get mt vcodec clock source"); - goto err_dec_pm; - } - - ret = mtk_vcodec_get_reg_bases(dev); - if (ret) - goto err_res; - - res = platform_get_resource(pdev, IORESOURCE_IRQ, 0); - if (res == NULL) { - dev_err(&pdev->dev, "failed to get irq resource"); - ret = -ENOENT; - goto err_res; - } - - dev->dec_irq = platform_get_irq(pdev, 0); - irq_set_status_flags(dev->dec_irq, IRQ_NOAUTOEN); - ret = devm_request_irq(&pdev->dev, dev->dec_irq, - mtk_vcodec_dec_irq_handler, 0, pdev->name, dev); + ret = mtk_vcodec_init_dec_params(dev); if (ret) { - dev_err(&pdev->dev, "Failed to install dev->dec_irq %d (%d)", - dev->dec_irq, - ret); - goto err_res; + dev_err(&pdev->dev, "Failed to init pm and registers"); + goto err_dec_pm; } mutex_init(&dev->dec_mutex); @@ -362,8 +463,14 @@ static int mtk_vcodec_probe(struct platform_device *pdev) mtk_v4l2_debug(0, "decoder registered as /dev/video%d", vfd_dec->num); - return 0; + if (dev->vdec_pdata->is_comp_supported) { + ret = mtk_vcodec_init_master(dev); + if (ret < 0) + goto err_component_match; + } + return 0; +err_component_match: err_dec_reg: if (dev->vdec_pdata->uses_stateless_api) media_device_unregister(&dev->mdev_dec); @@ -382,6 +489,7 @@ static int mtk_vcodec_probe(struct platform_device *pdev) mtk_vcodec_release_dec_pm(&dev->pm); err_dec_pm: mtk_vcodec_fw_release(dev->fw_handler); + return ret; } @@ -436,7 +544,25 @@ static struct platform_driver mtk_vcodec_dec_driver = { }, }; -module_platform_driver(mtk_vcodec_dec_driver); +static struct platform_driver * const mtk_vdec_drivers[] = { + &mtk_vdec_comp_driver, + &mtk_vcodec_dec_driver, +}; + +static int __init mtk_vdec_init(void) +{ + return platform_register_drivers(mtk_vdec_drivers, + ARRAY_SIZE(mtk_vdec_drivers)); +} + +static void __exit mtk_vdec_exit(void) +{ + platform_unregister_drivers(mtk_vdec_drivers, + ARRAY_SIZE(mtk_vdec_drivers)); +} + +module_init(mtk_vdec_init); +module_exit(mtk_vdec_exit); MODULE_LICENSE("GPL v2"); MODULE_DESCRIPTION("Mediatek video codec V4L2 decoder driver"); diff --git a/drivers/media/platform/mtk-vcodec/mtk_vcodec_dec_hw.c b/drivers/media/platform/mtk-vcodec/mtk_vcodec_dec_hw.c new file mode 100644 index 000000000000..5e1b7670ba5b --- /dev/null +++ b/drivers/media/platform/mtk-vcodec/mtk_vcodec_dec_hw.c @@ -0,0 +1,184 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (c) 2021 MediaTek Inc. + * Author: Yunfei Dong + */ + +#include +#include +#include +#include +#include +#include +#include + +#include "mtk_vcodec_drv.h" +#include "mtk_vcodec_dec.h" +#include "mtk_vcodec_dec_hw.h" +#include "mtk_vcodec_dec_pm.h" +#include "mtk_vcodec_intr.h" +#include "mtk_vcodec_util.h" + +static int mtk_vdec_comp_bind(struct device *dev, struct device *master, + void *data) +{ + struct mtk_vdec_comp_dev *comp_dev = dev_get_drvdata(dev); + struct mtk_vcodec_dev *master_dev = data; + int i; + + for (i = 0; i < MTK_VDEC_HW_MAX; i++) { + if (dev->of_node != master_dev->component_node[i]) + continue; + + master_dev->comp_dev[i] = comp_dev; + comp_dev->comp_idx = i; + comp_dev->master_dev = master_dev; + break; + } + + if (i == MTK_VDEC_HW_MAX) { + dev_err(dev, "Failed to get component node\n"); + return -EINVAL; + } + + comp_dev->reg_base[VDEC_COMP_SYS] = + master_dev->reg_base[VDEC_COMP_SYS]; + return 0; +} + +static void mtk_vdec_comp_unbind(struct device *dev, struct device *master, + void *data) +{ + struct mtk_vdec_comp_dev *comp_dev = dev_get_drvdata(dev); + + comp_dev->reg_base[VDEC_COMP_SYS] = NULL; +} + +static const struct component_ops mtk_vdec_hw_component_ops = { + .bind = mtk_vdec_comp_bind, + .unbind = mtk_vdec_comp_unbind, +}; + +static irqreturn_t mtk_vdec_comp_irq_handler(int irq, void *priv) +{ + struct mtk_vdec_comp_dev *dev = priv; + struct mtk_vcodec_ctx *ctx; + u32 cg_status; + unsigned int dec_done_status; + void __iomem *vdec_misc_addr = dev->reg_base[VDEC_COMP_MISC] + + VDEC_IRQ_CFG_REG; + + ctx = mtk_vcodec_get_curr_ctx(dev->master_dev); + + /* check if HW active or not */ + cg_status = readl(dev->reg_base[VDEC_COMP_SYS]); + if ((cg_status & VDEC_HW_ACTIVE) != 0) { + mtk_v4l2_err("vdec active is not 0x0 (0x%08x)", + cg_status); + return IRQ_HANDLED; + } + + dec_done_status = readl(vdec_misc_addr); + if ((dec_done_status & MTK_VDEC_IRQ_STATUS_DEC_SUCCESS) != + MTK_VDEC_IRQ_STATUS_DEC_SUCCESS) + return IRQ_HANDLED; + + /* clear interrupt */ + writel(dec_done_status | VDEC_IRQ_CFG, vdec_misc_addr); + writel(dec_done_status & ~VDEC_IRQ_CLR, vdec_misc_addr); + + wake_up_ctx(ctx, MTK_INST_IRQ_RECEIVED); + + mtk_v4l2_debug(3, "wake up ctx %d, dec_done_status=%x", + ctx->id, dec_done_status); + + return IRQ_HANDLED; +} + +static int mtk_vdec_comp_init_irq(struct mtk_vdec_comp_dev *dev) +{ + struct platform_device *pdev = dev->plat_dev; + int ret; + + dev->dec_irq = platform_get_irq(pdev, 0); + if (dev->dec_irq < 0) { + dev_err(&pdev->dev, "Failed to get irq resource"); + return dev->dec_irq; + } + + irq_set_status_flags(dev->dec_irq, IRQ_NOAUTOEN); + ret = devm_request_irq(&pdev->dev, dev->dec_irq, + mtk_vdec_comp_irq_handler, 0, pdev->name, dev); + if (ret) { + dev_err(&pdev->dev, "Failed to install dev->dec_irq %d (%d)", + dev->dec_irq, ret); + return ret; + } + + return 0; +} + +static int mtk_vdec_comp_probe(struct platform_device *pdev) +{ + struct mtk_vdec_comp_dev *dev; + int ret; + + dev = devm_kzalloc(&pdev->dev, sizeof(*dev), GFP_KERNEL); + if (!dev) + return -ENOMEM; + + dev->plat_dev = pdev; + ret = mtk_vcodec_init_dec_pm(pdev, &dev->pm); + if (ret) { + dev_err(&pdev->dev, "Failed to get mt vcodec clock source"); + return ret; + } + + dev->reg_base[VDEC_COMP_MISC] = + devm_platform_ioremap_resource(pdev, 0); + if (IS_ERR((__force void *)dev->reg_base[VDEC_COMP_MISC])) { + ret = PTR_ERR((__force void *)dev->reg_base[VDEC_COMP_MISC]); + goto err; + } + + if (of_get_property(pdev->dev.of_node, "dma-ranges", NULL)) + dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(34)); + + ret = mtk_vdec_comp_init_irq(dev); + if (ret) { + dev_err(&pdev->dev, "Failed to register irq handler.\n"); + goto err; + } + + platform_set_drvdata(pdev, dev); + + ret = component_add(&pdev->dev, &mtk_vdec_hw_component_ops); + if (ret) { + dev_err(&pdev->dev, "Failed to add component: %d\n", ret); + goto err; + } + + return 0; +err: + mtk_vcodec_release_dec_pm(&dev->pm); + return ret; +} + +static const struct of_device_id mtk_vdec_comp_ids[] = { + { + .compatible = "mediatek,mtk-vcodec-lat", + }, + { + .compatible = "mediatek,mtk-vcodec-core", + }, + {}, +}; +MODULE_DEVICE_TABLE(of, mtk_vdec_comp_ids); + +struct platform_driver mtk_vdec_comp_driver = { + .probe = mtk_vdec_comp_probe, + .driver = { + .name = "mtk-vdec-comp", + .of_match_table = mtk_vdec_comp_ids, + }, +}; diff --git a/drivers/media/platform/mtk-vcodec/mtk_vcodec_dec_hw.h b/drivers/media/platform/mtk-vcodec/mtk_vcodec_dec_hw.h new file mode 100644 index 000000000000..8d6e818a3474 --- /dev/null +++ b/drivers/media/platform/mtk-vcodec/mtk_vcodec_dec_hw.h @@ -0,0 +1,49 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (c) 2021 MediaTek Inc. + * Author: Yunfei Dong + */ + +#ifndef _MTK_VCODEC_DEC_HW_H_ +#define _MTK_VCODEC_DEC_HW_H_ + +#include +#include + +#include "mtk_vcodec_drv.h" + +#define VDEC_HW_ACTIVE 0x10 +#define VDEC_IRQ_CFG 0x11 +#define VDEC_IRQ_CLR 0x10 +#define VDEC_IRQ_CFG_REG 0xa4 + +/** + * enum mtk_comp_hw_reg_idx - component register base index + */ +enum mtk_comp_hw_reg_idx { + VDEC_COMP_SYS, + VDEC_COMP_MISC, + VDEC_COMP_MAX +}; + +/** + * struct mtk_vdec_comp_dev - component framwork driver data + * @plat_dev: platform device + * @master_dev: master device + * @reg_base: Mapped address of MTK Vcodec registers. + * + * @dec_irq: decoder irq resource + * @pm: power management control + * @comp_idx: component index + */ +struct mtk_vdec_comp_dev { + struct platform_device *plat_dev; + struct mtk_vcodec_dev *master_dev; + void __iomem *reg_base[VDEC_COMP_MAX]; + + int dec_irq; + struct mtk_vcodec_pm pm; + int comp_idx; +}; + +#endif /* _MTK_VCODEC_DEC_HW_H_ */ diff --git a/drivers/media/platform/mtk-vcodec/mtk_vcodec_dec_stateful.c b/drivers/media/platform/mtk-vcodec/mtk_vcodec_dec_stateful.c index 59c24b22ab6d..4f9a80ce15d8 100644 --- a/drivers/media/platform/mtk-vcodec/mtk_vcodec_dec_stateful.c +++ b/drivers/media/platform/mtk-vcodec/mtk_vcodec_dec_stateful.c @@ -623,4 +623,5 @@ const struct mtk_vcodec_dec_pdata mtk_vdec_8173_pdata = { .num_framesizes = NUM_SUPPORTED_FRAMESIZE, .worker = mtk_vdec_worker, .flush_decoder = mtk_vdec_flush_decoder, + .is_comp_supported = false, }; diff --git a/drivers/media/platform/mtk-vcodec/mtk_vcodec_dec_stateless.c b/drivers/media/platform/mtk-vcodec/mtk_vcodec_dec_stateless.c index 8f4a1f0a0769..762633572b49 100644 --- a/drivers/media/platform/mtk-vcodec/mtk_vcodec_dec_stateless.c +++ b/drivers/media/platform/mtk-vcodec/mtk_vcodec_dec_stateless.c @@ -357,4 +357,5 @@ const struct mtk_vcodec_dec_pdata mtk_vdec_8183_pdata = { .uses_stateless_api = true, .worker = mtk_vdec_worker, .flush_decoder = mtk_vdec_flush_decoder, + .is_comp_supported = false, }; diff --git a/drivers/media/platform/mtk-vcodec/mtk_vcodec_drv.h b/drivers/media/platform/mtk-vcodec/mtk_vcodec_drv.h index 973b0b3649c6..e530757a9b5a 100644 --- a/drivers/media/platform/mtk-vcodec/mtk_vcodec_drv.h +++ b/drivers/media/platform/mtk-vcodec/mtk_vcodec_drv.h @@ -93,6 +93,17 @@ enum mtk_fmt_type { MTK_FMT_FRAME = 2, }; +/** + * struct mtk_vdec_hw_id - Hardware index used to separate + * different hardware + */ +enum mtk_vdec_hw_id { + MTK_VDEC_CORE, + MTK_VDEC_LAT0, + MTK_VDEC_LAT1, + MTK_VDEC_HW_MAX, +}; + /* * struct mtk_video_fmt - Structure used to store information about pixelformats */ @@ -331,6 +342,7 @@ enum mtk_chip { * * @chip: chip this decoder is compatible with * + * @is_comp_supported: true: using compoent framework, false: not support * @uses_stateless_api: whether the decoder uses the stateless API with requests */ @@ -352,6 +364,7 @@ struct mtk_vcodec_dec_pdata { enum mtk_chip chip; + bool is_comp_supported; bool uses_stateless_api; }; @@ -422,6 +435,9 @@ struct mtk_vcodec_enc_pdata { * @pm: power management control * @dec_capability: used to identify decode capability, ex: 4k * @enc_capability: used to identify encode capability + * + * @comp_dev: component hardware device + * @component_node: component node */ struct mtk_vcodec_dev { struct v4l2_device v4l2_dev; @@ -459,6 +475,9 @@ struct mtk_vcodec_dev { struct mtk_vcodec_pm pm; unsigned int dec_capability; unsigned int enc_capability; + + void *comp_dev[MTK_VDEC_HW_MAX]; + struct device_node *component_node[MTK_VDEC_HW_MAX]; }; static inline struct mtk_vcodec_ctx *fh_to_ctx(struct v4l2_fh *fh) From patchwork Wed Aug 11 02:57:54 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: =?utf-8?b?WXVuZmVpIERvbmcgKOiRo+S6kemjnik=?= X-Patchwork-Id: 495451 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.7 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, UNPARSEABLE_RELAY, URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 39F89C4338F for ; Wed, 11 Aug 2021 03:00:13 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 13F3E60ED8 for ; Wed, 11 Aug 2021 03:00:13 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232905AbhHKDAW (ORCPT ); Tue, 10 Aug 2021 23:00:22 -0400 Received: from mailgw02.mediatek.com ([210.61.82.184]:49408 "EHLO mailgw02.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S232854AbhHKC7L (ORCPT ); Tue, 10 Aug 2021 22:59:11 -0400 X-UUID: 3a478e5c715148b88ee2f3c707a3a89e-20210811 X-UUID: 3a478e5c715148b88ee2f3c707a3a89e-20210811 Received: from mtkcas11.mediatek.inc [(172.21.101.40)] by mailgw02.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-SHA384 256/256) with ESMTP id 1860942628; Wed, 11 Aug 2021 10:58:44 +0800 Received: from MTKCAS06.mediatek.inc (172.21.101.30) by mtkmbs02n1.mediatek.inc (172.21.101.77) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Wed, 11 Aug 2021 10:58:43 +0800 Received: from localhost.localdomain (10.17.3.153) by MTKCAS06.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Wed, 11 Aug 2021 10:58:42 +0800 From: Yunfei Dong To: Yunfei Dong , Alexandre Courbot , Hans Verkuil , Tzung-Bi Shih , Tiffany Lin , Andrew-CT Chen , Mauro Carvalho Chehab , Rob Herring , Matthias Brugger , Tomasz Figa CC: Hsin-Yi Wang , Fritz Koenig , Irui Wang , , , , , , , , George Sun Subject: [PATCH v5, 08/15] media: mtk-vcodec: Add msg queue feature for lat and core architecture Date: Wed, 11 Aug 2021 10:57:54 +0800 Message-ID: <20210811025801.21597-9-yunfei.dong@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20210811025801.21597-1-yunfei.dong@mediatek.com> References: <20210811025801.21597-1-yunfei.dong@mediatek.com> MIME-Version: 1.0 X-MTK: N Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org For lat and core architecture, lat thread will send message to core thread when lat decode done. Core hardware will use the message from lat to decode, then free message to lat thread when decode done. Signed-off-by: Yunfei Dong --- v5: no changes --- drivers/media/platform/mtk-vcodec/Makefile | 1 + .../platform/mtk-vcodec/mtk_vcodec_drv.h | 5 + .../platform/mtk-vcodec/vdec_msg_queue.c | 258 ++++++++++++++++++ .../platform/mtk-vcodec/vdec_msg_queue.h | 151 ++++++++++ 4 files changed, 415 insertions(+) create mode 100644 drivers/media/platform/mtk-vcodec/vdec_msg_queue.c create mode 100644 drivers/media/platform/mtk-vcodec/vdec_msg_queue.h diff --git a/drivers/media/platform/mtk-vcodec/Makefile b/drivers/media/platform/mtk-vcodec/Makefile index edeb3b66e9e9..5000e59da576 100644 --- a/drivers/media/platform/mtk-vcodec/Makefile +++ b/drivers/media/platform/mtk-vcodec/Makefile @@ -11,6 +11,7 @@ mtk-vcodec-dec-y := vdec/vdec_h264_if.o \ mtk_vcodec_dec_drv.o \ vdec_drv_if.o \ vdec_vpu_if.o \ + vdec_msg_queue.o \ mtk_vcodec_dec.o \ mtk_vcodec_dec_stateful.o \ mtk_vcodec_dec_stateless.o \ diff --git a/drivers/media/platform/mtk-vcodec/mtk_vcodec_drv.h b/drivers/media/platform/mtk-vcodec/mtk_vcodec_drv.h index 08fd43106fc7..4ad0566e715d 100644 --- a/drivers/media/platform/mtk-vcodec/mtk_vcodec_drv.h +++ b/drivers/media/platform/mtk-vcodec/mtk_vcodec_drv.h @@ -15,7 +15,9 @@ #include #include #include + #include "mtk_vcodec_util.h" +#include "vdec_msg_queue.h" #define MTK_VCODEC_DRV_NAME "mtk_vcodec_drv" #define MTK_VCODEC_DEC_NAME "mtk-vcodec-dec" @@ -282,6 +284,8 @@ struct vdec_pic_info { * @decoded_frame_cnt: number of decoded frames * @lock: protect variables accessed by V4L2 threads and worker thread such as * mtk_video_dec_buf. + * + * @msg_queue: msg queue used to store lat buffer information. */ struct mtk_vcodec_ctx { enum mtk_instance_type type; @@ -325,6 +329,7 @@ struct mtk_vcodec_ctx { int decoded_frame_cnt; struct mutex lock; + struct vdec_msg_queue msg_queue; }; enum mtk_chip { diff --git a/drivers/media/platform/mtk-vcodec/vdec_msg_queue.c b/drivers/media/platform/mtk-vcodec/vdec_msg_queue.c new file mode 100644 index 000000000000..d66ed98c79a9 --- /dev/null +++ b/drivers/media/platform/mtk-vcodec/vdec_msg_queue.c @@ -0,0 +1,258 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (c) 2021 MediaTek Inc. + * Author: Yunfei Dong + */ + +#include +#include +#include + +#include "mtk_vcodec_dec_pm.h" +#include "mtk_vcodec_drv.h" +#include "vdec_msg_queue.h" + +#define VDEC_LAT_SLICE_HEADER_SZ (640 * 1024) +#define VDEC_ERR_MAP_SZ_AVC ((8192 / 16) * (4352 / 16) / 8) + +/* lat write decoded hardware information to trans buffer, + * and core will read the trans buffer to decode again. The + * trans buffer size of FHD and 4K bitstreams are different. + */ +static int vde_msg_queue_get_trans_size(int width, int height) +{ + if (width > 1920 || height > 1088) + return (30 * 1024 * 1024); + else + return 6 * 1024 * 1024; +} + +void vdec_msg_queue_init_ctx(struct vdec_msg_queue_ctx *ctx, + int hardware_index) +{ + init_waitqueue_head(&ctx->ready_to_use); + INIT_LIST_HEAD(&ctx->ready_queue); + spin_lock_init(&ctx->ready_lock); + ctx->ready_num = 0; + ctx->hardware_index = hardware_index; +} + +int vdec_msg_queue_init( + struct vdec_msg_queue *msg_queue, + struct mtk_vcodec_ctx *ctx, + core_decode_cb_t core_decode, + int private_size) +{ + struct vdec_lat_buf *lat_buf; + int i, err; + + /* already init msg queue */ + if (msg_queue->wdma_addr.size) + return 0; + + vdec_msg_queue_init_ctx(&msg_queue->lat_ctx, MTK_VDEC_LAT0); + msg_queue->wdma_addr.size = vde_msg_queue_get_trans_size( + ctx->picinfo.buf_w, ctx->picinfo.buf_h); + + err = mtk_vcodec_mem_alloc(ctx, &msg_queue->wdma_addr); + if (err) { + mtk_v4l2_err("failed to allocate wdma_addr buf"); + return -ENOMEM; + } + msg_queue->wdma_rptr_addr = msg_queue->wdma_addr.dma_addr; + msg_queue->wdma_wptr_addr = msg_queue->wdma_addr.dma_addr; + + for (i = 0; i < NUM_BUFFER_COUNT; i++) { + lat_buf = &msg_queue->lat_buf[i]; + + lat_buf->wdma_err_addr.size = VDEC_ERR_MAP_SZ_AVC; + err = mtk_vcodec_mem_alloc(ctx, &lat_buf->wdma_err_addr); + if (err) { + mtk_v4l2_err("failed to allocate wdma_err_addr buf[%d]", i); + goto mem_alloc_err; + } + + lat_buf->slice_bc_addr.size = VDEC_LAT_SLICE_HEADER_SZ; + err = mtk_vcodec_mem_alloc(ctx, &lat_buf->slice_bc_addr); + if (err) { + mtk_v4l2_err("failed to allocate wdma_addr buf[%d]", i); + goto mem_alloc_err; + } + + lat_buf->private_data = kzalloc(private_size, GFP_KERNEL); + if (!lat_buf->private_data) { + mtk_v4l2_err("failed to allocate private_data[%d]", i); + goto mem_alloc_err; + } + + lat_buf->ctx = ctx; + lat_buf->core_decode = core_decode; + vdec_msg_queue_qbuf(&msg_queue->lat_ctx, lat_buf); + } + return 0; + +mem_alloc_err: + vdec_msg_queue_deinit(msg_queue, ctx); + return -ENOMEM; +} + +static struct list_head *vdec_get_buf_list(int hardware_index, + struct vdec_lat_buf *buf) +{ + switch (hardware_index) { + case MTK_VDEC_CORE: + return &buf->core_list; + case MTK_VDEC_LAT0: + return &buf->lat_list; + default: + return NULL; + } +} + +void vdec_msg_queue_qbuf(struct vdec_msg_queue_ctx *ctx, + struct vdec_lat_buf *buf) +{ + struct list_head *head; + + head = vdec_get_buf_list(ctx->hardware_index, buf); + if (!head) { + mtk_v4l2_err("fail to qbuf: %d",ctx->hardware_index); + return; + } + + spin_lock(&ctx->ready_lock); + list_add_tail(head, &ctx->ready_queue); + ctx->ready_num++; + + wake_up_all(&ctx->ready_to_use); + + mtk_v4l2_debug(3, "enqueue buf type: %d addr: 0x%p num: %d", + ctx->hardware_index, buf, ctx->ready_num); + spin_unlock(&ctx->ready_lock); +} + +static bool vdec_msg_queue_wait_event(struct vdec_msg_queue_ctx *ctx) +{ + long timeout_jiff; + int ret; + + if (ctx->hardware_index == MTK_VDEC_CORE) { + ret = wait_event_freezable(ctx->ready_to_use, + !list_empty(&ctx->ready_queue)); + if (ret) + return false; + } else { + timeout_jiff = msecs_to_jiffies(1500); + ret = wait_event_timeout(ctx->ready_to_use, + !list_empty(&ctx->ready_queue), timeout_jiff); + if (!ret) + return false; + } + + return true; +} + +struct vdec_lat_buf *vdec_msg_queue_dqbuf(struct vdec_msg_queue_ctx *ctx) +{ + struct vdec_lat_buf *buf; + struct list_head *head; + int ret; + + spin_lock(&ctx->ready_lock); + if (list_empty(&ctx->ready_queue)) { + mtk_v4l2_debug(3, "queue is NULL, type:%d num: %d", + ctx->hardware_index, ctx->ready_num); + spin_unlock(&ctx->ready_lock); + ret = vdec_msg_queue_wait_event(ctx); + if (!ret) + return NULL; + spin_lock(&ctx->ready_lock); + } + + if (ctx->hardware_index == MTK_VDEC_CORE) + buf = list_first_entry(&ctx->ready_queue, + struct vdec_lat_buf, core_list); + else + buf = list_first_entry(&ctx->ready_queue, + struct vdec_lat_buf, lat_list); + + head = vdec_get_buf_list(ctx->hardware_index, buf); + if (!head) { + mtk_v4l2_err("fail to dqbuf: %d",ctx->hardware_index); + return NULL; + } + list_del(head); + + ctx->ready_num--; + mtk_v4l2_debug(3, "dqueue buf type:%d addr: 0x%p num: %d", + ctx->hardware_index, buf, ctx->ready_num); + spin_unlock(&ctx->ready_lock); + + return buf; +} + +void vdec_msg_queue_update_ube_rptr(struct vdec_msg_queue *msg_queue, + uint64_t ube_rptr) +{ + spin_lock(&msg_queue->lat_ctx.ready_lock); + msg_queue->wdma_rptr_addr = ube_rptr; + mtk_v4l2_debug(3, "update ube rprt (0x%llx)", ube_rptr); + spin_unlock(&msg_queue->lat_ctx.ready_lock); +} + +void vdec_msg_queue_update_ube_wptr(struct vdec_msg_queue *msg_queue, + uint64_t ube_wptr) +{ + spin_lock(&msg_queue->lat_ctx.ready_lock); + msg_queue->wdma_wptr_addr = ube_wptr; + mtk_v4l2_debug(3, "update ube wprt: (0x%llx 0x%llx) offset: 0x%llx", + msg_queue->wdma_rptr_addr, msg_queue->wdma_wptr_addr, ube_wptr); + spin_unlock(&msg_queue->lat_ctx.ready_lock); +} + +bool vdec_msg_queue_wait_lat_buf_full(struct vdec_msg_queue *msg_queue) +{ + long timeout_jiff; + int ret; + + timeout_jiff = msecs_to_jiffies(1000 * (NUM_BUFFER_COUNT + 2)); + + ret = wait_event_timeout(msg_queue->lat_ctx.ready_to_use, + msg_queue->lat_ctx.ready_num == NUM_BUFFER_COUNT, + timeout_jiff); + if (ret) { + mtk_v4l2_debug(3, "success to get lat buf: %d", + msg_queue->lat_ctx.ready_num); + return true; + } + mtk_v4l2_err("failed with lat buf isn't full: %d", + msg_queue->lat_ctx.ready_num); + return false; +} + +void vdec_msg_queue_deinit( + struct vdec_msg_queue *msg_queue, + struct mtk_vcodec_ctx *ctx) +{ + struct vdec_lat_buf *lat_buf; + struct mtk_vcodec_mem *mem; + int i; + + mem = &msg_queue->wdma_addr; + if (mem->va) + mtk_vcodec_mem_free(ctx, mem); + for (i = 0; i < NUM_BUFFER_COUNT; i++) { + lat_buf = &msg_queue->lat_buf[i]; + + mem = &lat_buf->wdma_err_addr; + if (mem->va) + mtk_vcodec_mem_free(ctx, mem); + + mem = &lat_buf->slice_bc_addr; + if (mem->va) + mtk_vcodec_mem_free(ctx, mem); + + if (lat_buf->private_data) + kfree(lat_buf->private_data); + } +} diff --git a/drivers/media/platform/mtk-vcodec/vdec_msg_queue.h b/drivers/media/platform/mtk-vcodec/vdec_msg_queue.h new file mode 100644 index 000000000000..1905ce713592 --- /dev/null +++ b/drivers/media/platform/mtk-vcodec/vdec_msg_queue.h @@ -0,0 +1,151 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (c) 2021 MediaTek Inc. + * Author: Yunfei Dong + */ + +#ifndef _VDEC_MSG_QUEUE_H_ +#define _VDEC_MSG_QUEUE_H_ + +#include +#include +#include +#include + +#include "mtk_vcodec_util.h" + +#define NUM_BUFFER_COUNT 3 + +struct vdec_lat_buf; +struct mtk_vcodec_ctx; +struct mtk_vcodec_dev; +typedef int (*core_decode_cb_t)(struct vdec_lat_buf *lat_buf); + +/** + * struct vdec_msg_queue_ctx - represents a queue for buffers ready to be + * processed + * @ready_used: ready used queue used to signalize when get a job queue + * @ready_queue: list of ready lat buffer queues + * @ready_lock: spin lock to protect the lat buffer usage + * @ready_num: number of buffers ready to be processed + * @hardware_index: hardware id that this queue is used for + */ +struct vdec_msg_queue_ctx { + wait_queue_head_t ready_to_use; + struct list_head ready_queue; + spinlock_t ready_lock; + int ready_num; + int hardware_index; +}; + +/** + * struct vdec_lat_buf - lat buffer message used to store lat + * info for core decode + * @wdma_err_addr: wdma error address used for lat hardware + * @slice_bc_addr: slice bc address used for lat hardware + * @ts_info: need to set timestamp from output to capture + * + * @private_data: shared information used to lat and core hardware + * @ctx: mtk vcodec context information + * @core_decode: different codec use different decode callback function + * @lat_list: add lat buffer to lat head list + * @core_list: add lat buffer to core head list + */ +struct vdec_lat_buf { + struct mtk_vcodec_mem wdma_err_addr; + struct mtk_vcodec_mem slice_bc_addr; + struct vb2_v4l2_buffer ts_info; + + void *private_data; + struct mtk_vcodec_ctx *ctx; + core_decode_cb_t core_decode; + struct list_head lat_list; + struct list_head core_list; +}; + +/** + * struct vdec_msg_queue - used to store lat buffer message + * @lat_buf: lat buffer used to store lat buffer information + * @wdma_addr: wdma address used for ube + * @wdma_rptr_addr: ube read point + * @wdma_wptr_addr: ube write point + * @lat_ctx: used to store lat buffer list + */ +struct vdec_msg_queue { + struct vdec_lat_buf lat_buf[NUM_BUFFER_COUNT]; + + struct mtk_vcodec_mem wdma_addr; + uint64_t wdma_rptr_addr; + uint64_t wdma_wptr_addr; + + struct vdec_msg_queue_ctx lat_ctx; +}; + +/** + * vdec_msg_queue_init - init lat buffer information. + * @msg_queue: used to store the lat buffer information + * @ctx: v4l2 ctx + * @core_decode: core decode callback for each codec + * @private_size: the private data size used to share with core + */ +int vdec_msg_queue_init( + struct vdec_msg_queue *msg_queue, + struct mtk_vcodec_ctx *ctx, + core_decode_cb_t core_decode, + int private_size); + +/** + * vdec_msg_queue_init_ctx - used to init msg queue context information. + * @ctx: message queue context + * @hardware_index: hardware index + */ +void vdec_msg_queue_init_ctx(struct vdec_msg_queue_ctx *ctx, + int hardware_index); + +/** + * vdec_msg_queue_qbuf - enqueue lat buffer to queue list. + * @ctx: message queue context + * @buf: current lat buffer + */ +void vdec_msg_queue_qbuf(struct vdec_msg_queue_ctx *ctx, + struct vdec_lat_buf *buf); + +/** + * vdec_msg_queue_dqbuf - dequeue lat buffer from queue list. + * @ctx: message queue context + */ +struct vdec_lat_buf *vdec_msg_queue_dqbuf(struct vdec_msg_queue_ctx *ctx); + +/** + * vdec_msg_queue_update_ube_rptr - used to updata the ube read point. + * @msg_queue: used to store the lat buffer information + * @ube_rptr: current ube read point + */ +void vdec_msg_queue_update_ube_rptr(struct vdec_msg_queue *msg_queue, + uint64_t ube_rptr); + +/** + * vdec_msg_queue_update_ube_wptr - used to updata the ube write point. + * @msg_queue: used to store the lat buffer information + * @ube_wptr: current ube write point + */ +void vdec_msg_queue_update_ube_wptr(struct vdec_msg_queue *msg_queue, + uint64_t ube_wptr); + +/** + * vdec_msg_queue_wait_lat_buf_full - used to check whether all lat buffer + * in lat list. + * @msg_queue: used to store the lat buffer information + */ +bool vdec_msg_queue_wait_lat_buf_full(struct vdec_msg_queue *msg_queue); + +/** + * vdec_msg_queue_deinit - deinit lat buffer information. + * @msg_queue: used to store the lat buffer information + * @ctx: v4l2 ctx + */ +void vdec_msg_queue_deinit( + struct vdec_msg_queue *msg_queue, + struct mtk_vcodec_ctx *ctx); + +#endif From patchwork Wed Aug 11 02:57:56 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: =?utf-8?b?WXVuZmVpIERvbmcgKOiRo+S6kemjnik=?= X-Patchwork-Id: 495453 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.7 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, UNPARSEABLE_RELAY, URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5E543C43214 for ; Wed, 11 Aug 2021 02:59:07 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 4012A60F11 for ; Wed, 11 Aug 2021 02:59:07 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233329AbhHKC72 (ORCPT ); Tue, 10 Aug 2021 22:59:28 -0400 Received: from mailgw02.mediatek.com ([210.61.82.184]:49560 "EHLO mailgw02.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S232184AbhHKC7O (ORCPT ); Tue, 10 Aug 2021 22:59:14 -0400 X-UUID: 63d2133adb9b4011a188ccf9173ae07f-20210811 X-UUID: 63d2133adb9b4011a188ccf9173ae07f-20210811 Received: from mtkmbs10n1.mediatek.inc [(172.21.101.34)] by mailgw02.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 1962693669; Wed, 11 Aug 2021 10:58:47 +0800 Received: from MTKCAS06.mediatek.inc (172.21.101.30) by mtkmbs02n1.mediatek.inc (172.21.101.77) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Wed, 11 Aug 2021 10:58:45 +0800 Received: from localhost.localdomain (10.17.3.153) by MTKCAS06.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Wed, 11 Aug 2021 10:58:44 +0800 From: Yunfei Dong To: Yunfei Dong , Alexandre Courbot , Hans Verkuil , Tzung-Bi Shih , Tiffany Lin , Andrew-CT Chen , Mauro Carvalho Chehab , Rob Herring , Matthias Brugger , Tomasz Figa CC: Hsin-Yi Wang , Fritz Koenig , Irui Wang , , , , , , , , George Sun Subject: [PATCH v5, 10/15] media: mtk-vcodec: Add new interface to lock different hardware Date: Wed, 11 Aug 2021 10:57:56 +0800 Message-ID: <20210811025801.21597-11-yunfei.dong@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20210811025801.21597-1-yunfei.dong@mediatek.com> References: <20210811025801.21597-1-yunfei.dong@mediatek.com> MIME-Version: 1.0 X-MTK: N Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org For add new hardware, not only need to lock lat hardware, also need to lock core hardware in case of different instance start to decoder at the same time. Signed-off-by: Yunfei Dong --- v5: no changes --- drivers/media/platform/mtk-vcodec/mtk_vcodec_dec.c | 4 ++-- drivers/media/platform/mtk-vcodec/mtk_vcodec_dec_drv.c | 6 +++--- drivers/media/platform/mtk-vcodec/mtk_vcodec_drv.h | 2 +- 3 files changed, 6 insertions(+), 6 deletions(-) diff --git a/drivers/media/platform/mtk-vcodec/mtk_vcodec_dec.c b/drivers/media/platform/mtk-vcodec/mtk_vcodec_dec.c index 2b334a8a81c6..130ecef2e766 100644 --- a/drivers/media/platform/mtk-vcodec/mtk_vcodec_dec.c +++ b/drivers/media/platform/mtk-vcodec/mtk_vcodec_dec.c @@ -105,12 +105,12 @@ static int vidioc_decoder_cmd(struct file *file, void *priv, void mtk_vdec_unlock(struct mtk_vcodec_ctx *ctx) { - mutex_unlock(&ctx->dev->dec_mutex); + mutex_unlock(&ctx->dev->dec_mutex[ctx->hw_id]); } void mtk_vdec_lock(struct mtk_vcodec_ctx *ctx) { - mutex_lock(&ctx->dev->dec_mutex); + mutex_lock(&ctx->dev->dec_mutex[ctx->hw_id]); } void mtk_vcodec_dec_release(struct mtk_vcodec_ctx *ctx) diff --git a/drivers/media/platform/mtk-vcodec/mtk_vcodec_dec_drv.c b/drivers/media/platform/mtk-vcodec/mtk_vcodec_dec_drv.c index 109f7de126a1..e448cb238c7f 100644 --- a/drivers/media/platform/mtk-vcodec/mtk_vcodec_dec_drv.c +++ b/drivers/media/platform/mtk-vcodec/mtk_vcodec_dec_drv.c @@ -373,7 +373,7 @@ static int mtk_vcodec_probe(struct platform_device *pdev) struct video_device *vfd_dec; phandle rproc_phandle; enum mtk_vcodec_fw_type fw_type; - int ret; + int i, ret; dev = devm_kzalloc(&pdev->dev, sizeof(*dev), GFP_KERNEL); if (!dev) @@ -405,8 +405,8 @@ static int mtk_vcodec_probe(struct platform_device *pdev) goto err_dec_pm; } - mutex_init(&dev->dec_mutex); - mutex_init(&dev->dev_mutex); + for (i = 0; i < MTK_VDEC_HW_MAX; i++) + mutex_init(&dev->dec_mutex[i]); spin_lock_init(&dev->irqlock); snprintf(dev->v4l2_dev.name, sizeof(dev->v4l2_dev.name), "%s", diff --git a/drivers/media/platform/mtk-vcodec/mtk_vcodec_drv.h b/drivers/media/platform/mtk-vcodec/mtk_vcodec_drv.h index a8242389ad24..f1e63acaec76 100644 --- a/drivers/media/platform/mtk-vcodec/mtk_vcodec_drv.h +++ b/drivers/media/platform/mtk-vcodec/mtk_vcodec_drv.h @@ -496,7 +496,7 @@ struct mtk_vcodec_dev { int dec_irq; int enc_irq; - struct mutex dec_mutex; + struct mutex dec_mutex[MTK_VDEC_HW_MAX]; struct mutex enc_mutex; struct mtk_vcodec_pm pm; From patchwork Wed Aug 11 02:57:57 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: =?utf-8?b?WXVuZmVpIERvbmcgKOiRo+S6kemjnik=?= X-Patchwork-Id: 495455 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.7 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, UNPARSEABLE_RELAY, URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2ED75C19F3B for ; Wed, 11 Aug 2021 02:58:59 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 0E88A60EDF for ; Wed, 11 Aug 2021 02:58:59 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232772AbhHKC7U (ORCPT ); Tue, 10 Aug 2021 22:59:20 -0400 Received: from mailgw02.mediatek.com ([210.61.82.184]:49460 "EHLO mailgw02.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S232930AbhHKC7N (ORCPT ); Tue, 10 Aug 2021 22:59:13 -0400 X-UUID: 07daf252713e4e95841729c138d816c2-20210811 X-UUID: 07daf252713e4e95841729c138d816c2-20210811 Received: from mtkexhb01.mediatek.inc [(172.21.101.102)] by mailgw02.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-SHA384 256/256) with ESMTP id 1820966461; Wed, 11 Aug 2021 10:58:48 +0800 Received: from MTKCAS06.mediatek.inc (172.21.101.30) by mtkmbs07n2.mediatek.inc (172.21.101.141) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Wed, 11 Aug 2021 10:58:46 +0800 Received: from localhost.localdomain (10.17.3.153) by MTKCAS06.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Wed, 11 Aug 2021 10:58:45 +0800 From: Yunfei Dong To: Yunfei Dong , Alexandre Courbot , Hans Verkuil , Tzung-Bi Shih , Tiffany Lin , Andrew-CT Chen , Mauro Carvalho Chehab , Rob Herring , Matthias Brugger , Tomasz Figa CC: Hsin-Yi Wang , Fritz Koenig , Irui Wang , , , , , , , , George Sun Subject: [PATCH v5, 11/15] media: mtk-vcodec: Add core thread Date: Wed, 11 Aug 2021 10:57:57 +0800 Message-ID: <20210811025801.21597-12-yunfei.dong@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20210811025801.21597-1-yunfei.dong@mediatek.com> References: <20210811025801.21597-1-yunfei.dong@mediatek.com> MIME-Version: 1.0 X-MTK: N Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org Core thread: 1. Gets lat_buf from core msg queue. 2. Proceeds core decode. 3. Puts the lat_buf back to lat msg queue. Both H264 and VP9 rely on the core thread. Signed-off-by: Yunfei Dong --- v5: no changes --- .../platform/mtk-vcodec/mtk_vcodec_dec_drv.c | 12 +++++++ .../platform/mtk-vcodec/mtk_vcodec_drv.h | 7 ++++ .../platform/mtk-vcodec/vdec_msg_queue.c | 32 +++++++++++++++++++ .../platform/mtk-vcodec/vdec_msg_queue.h | 6 ++++ 4 files changed, 57 insertions(+) diff --git a/drivers/media/platform/mtk-vcodec/mtk_vcodec_dec_drv.c b/drivers/media/platform/mtk-vcodec/mtk_vcodec_dec_drv.c index e448cb238c7f..002352fcf8de 100644 --- a/drivers/media/platform/mtk-vcodec/mtk_vcodec_dec_drv.c +++ b/drivers/media/platform/mtk-vcodec/mtk_vcodec_dec_drv.c @@ -405,6 +405,18 @@ static int mtk_vcodec_probe(struct platform_device *pdev) goto err_dec_pm; } + if (VDEC_LAT_ARCH(dev->vdec_pdata->hw_arch)) { + vdec_msg_queue_init_ctx(&dev->msg_queue_core_ctx, + MTK_VDEC_CORE); + dev->kthread_core = kthread_run(vdec_msg_queue_core_thead, dev, + "mtk-%s", "core"); + if (IS_ERR(dev->kthread_core)) { + dev_err(&pdev->dev, "Failed to create core thread"); + ret = PTR_ERR(dev->kthread_core); + goto err_res; + } + } + for (i = 0; i < MTK_VDEC_HW_MAX; i++) mutex_init(&dev->dec_mutex[i]); spin_lock_init(&dev->irqlock); diff --git a/drivers/media/platform/mtk-vcodec/mtk_vcodec_drv.h b/drivers/media/platform/mtk-vcodec/mtk_vcodec_drv.h index f1e63acaec76..b6f030a6e55f 100644 --- a/drivers/media/platform/mtk-vcodec/mtk_vcodec_drv.h +++ b/drivers/media/platform/mtk-vcodec/mtk_vcodec_drv.h @@ -27,6 +27,7 @@ #define MTK_VCODEC_MAX_PLANES 3 #define MTK_V4L2_BENCHMARK 0 #define WAIT_INTR_TIMEOUT_MS 1000 +#define VDEC_LAT_ARCH(hw_arch) ((hw_arch) >= MTK_VDEC_LAT_SINGLE_CORE) /* * enum mtk_hw_reg_idx - MTK hw register base index @@ -465,6 +466,9 @@ struct mtk_vcodec_enc_pdata { * * @comp_dev: component hardware device * @component_node: component node + * + * @kthread_core: thread used for core hardware decode + * @msg_queue_core_ctx: msg queue context used for core thread */ struct mtk_vcodec_dev { struct v4l2_device v4l2_dev; @@ -505,6 +509,9 @@ struct mtk_vcodec_dev { void *comp_dev[MTK_VDEC_HW_MAX]; struct device_node *component_node[MTK_VDEC_HW_MAX]; + + struct task_struct *kthread_core; + struct vdec_msg_queue_ctx msg_queue_core_ctx; }; static inline struct mtk_vcodec_ctx *fh_to_ctx(struct v4l2_fh *fh) diff --git a/drivers/media/platform/mtk-vcodec/vdec_msg_queue.c b/drivers/media/platform/mtk-vcodec/vdec_msg_queue.c index d66ed98c79a9..665f571eab4b 100644 --- a/drivers/media/platform/mtk-vcodec/vdec_msg_queue.c +++ b/drivers/media/platform/mtk-vcodec/vdec_msg_queue.c @@ -256,3 +256,35 @@ void vdec_msg_queue_deinit( kfree(lat_buf->private_data); } } + +int vdec_msg_queue_core_thead(void *data) +{ + struct mtk_vcodec_dev *dev = data; + struct vdec_lat_buf *lat_buf; + struct mtk_vcodec_ctx *ctx; + + set_freezable(); + for (;;) { + try_to_freeze(); + if (kthread_should_stop()) + break; + + lat_buf = vdec_msg_queue_dqbuf(&dev->msg_queue_core_ctx); + if (!lat_buf) + continue; + + ctx = lat_buf->ctx; + mtk_vcodec_set_curr_ctx(dev, ctx, MTK_VDEC_CORE); + + if (!lat_buf->core_decode) + mtk_v4l2_err("Core decode callback func is NULL"); + else + lat_buf->core_decode(lat_buf); + + mtk_vcodec_set_curr_ctx(dev, NULL, MTK_VDEC_CORE); + vdec_msg_queue_qbuf(&ctx->msg_queue.lat_ctx, lat_buf); + } + + mtk_v4l2_debug(3, "Video Capture Thread End"); + return 0; +} diff --git a/drivers/media/platform/mtk-vcodec/vdec_msg_queue.h b/drivers/media/platform/mtk-vcodec/vdec_msg_queue.h index 1905ce713592..b5745b144140 100644 --- a/drivers/media/platform/mtk-vcodec/vdec_msg_queue.h +++ b/drivers/media/platform/mtk-vcodec/vdec_msg_queue.h @@ -148,4 +148,10 @@ void vdec_msg_queue_deinit( struct vdec_msg_queue *msg_queue, struct mtk_vcodec_ctx *ctx); +/** + * vdec_msg_queue_core_thead - used for core decoder. + * @data: private data used for each codec + */ +int vdec_msg_queue_core_thead(void *data); + #endif From patchwork Wed Aug 11 02:57:59 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: =?utf-8?b?WXVuZmVpIERvbmcgKOiRo+S6kemjnik=?= X-Patchwork-Id: 495454 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.7 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, UNPARSEABLE_RELAY, URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 94879C4338F for ; Wed, 11 Aug 2021 02:59:04 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 75E2060EC0 for ; Wed, 11 Aug 2021 02:59:04 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233060AbhHKC7W (ORCPT ); Tue, 10 Aug 2021 22:59:22 -0400 Received: from mailgw01.mediatek.com ([60.244.123.138]:51912 "EHLO mailgw01.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S232709AbhHKC7Q (ORCPT ); Tue, 10 Aug 2021 22:59:16 -0400 X-UUID: 98f9882fdec24e66aee29548b7533d53-20210811 X-UUID: 98f9882fdec24e66aee29548b7533d53-20210811 Received: from mtkmbs10n2.mediatek.inc [(172.21.101.183)] by mailgw01.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 1280915687; Wed, 11 Aug 2021 10:58:50 +0800 Received: from MTKCAS06.mediatek.inc (172.21.101.30) by mtkmbs02n1.mediatek.inc (172.21.101.77) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Wed, 11 Aug 2021 10:58:49 +0800 Received: from localhost.localdomain (10.17.3.153) by MTKCAS06.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Wed, 11 Aug 2021 10:58:48 +0800 From: Yunfei Dong To: Yunfei Dong , Alexandre Courbot , Hans Verkuil , Tzung-Bi Shih , Tiffany Lin , Andrew-CT Chen , Mauro Carvalho Chehab , Rob Herring , Matthias Brugger , Tomasz Figa CC: Hsin-Yi Wang , Fritz Koenig , Irui Wang , , , , , , , , George Sun Subject: [PATCH v5, 13/15] dt-bindings: media: mtk-vcodec: Adds decoder dt-bindings for mt8192 Date: Wed, 11 Aug 2021 10:57:59 +0800 Message-ID: <20210811025801.21597-14-yunfei.dong@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20210811025801.21597-1-yunfei.dong@mediatek.com> References: <20210811025801.21597-1-yunfei.dong@mediatek.com> MIME-Version: 1.0 X-MTK: N Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org Adds decoder dt-bindings for mt8192. Signed-off-by: Yunfei Dong --- v5: no changes This patch depends on "Mediatek MT8192 clock support"[1]. The definition of decoder clocks are in mt8192-clk.h, need to include them in case of build fail [1]. [1]https://patchwork.kernel.org/project/linux-mediatek/list/?series=511175 --- .../media/mediatek,vcodec-comp-decoder.yaml | 172 ++++++++++++++++++ 1 file changed, 172 insertions(+) create mode 100644 Documentation/devicetree/bindings/media/mediatek,vcodec-comp-decoder.yaml diff --git a/Documentation/devicetree/bindings/media/mediatek,vcodec-comp-decoder.yaml b/Documentation/devicetree/bindings/media/mediatek,vcodec-comp-decoder.yaml new file mode 100644 index 000000000000..083c89933917 --- /dev/null +++ b/Documentation/devicetree/bindings/media/mediatek,vcodec-comp-decoder.yaml @@ -0,0 +1,172 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iommu/mediatek,vcodec-comp-decoder.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Mediatek Video Decode Accelerator With Component + +maintainers: + - Yunfei Dong + +description: |+ + Mediatek Video Decode is the video decode hardware present in Mediatek + SoCs which supports high resolution decoding functionalities. Required + master and component node. + +properties: + compatible: + oneOf: + - enum: + - mediatek,mt8192-vcodec-dec # for lat hardware + - mediatek,mtk-vcodec-lat # for core hardware + - mediatek,mtk-vcodec-core + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + clocks: + maxItems: 5 + + clock-names: + items: + - const: vdec-sel + - const: vdec-soc-vdec + - const: vdec-soc-lat + - const: vdec-vdec + - const: vdec-top + + assigned-clocks: true + + assigned-clock-parents: true + + power-domains: + maxItems: 1 + + iommus: + minItems: 1 + maxItems: 32 + description: | + List of the hardware port in respective IOMMU block for current Socs. + Refer to bindings/iommu/mediatek,iommu.yaml. + + dma-ranges: + maxItems: 1 + description: | + Describes the physical address space of IOMMU maps to memory. + + mediatek,scp: + $ref: /schemas/types.yaml#/definitions/phandle + maxItems: 1 + description: + Describes point to scp. + +required: + - compatible + - reg + - iommus + - dma-ranges + +allOf: + - if: #master node + properties: + compatible: + contains: + enum: + - mediatek,mt8192-vcodec-dec # for lat hardware + + then: + required: + - mediatek,scp + + - if: #component node + properties: + compatible: + contains: + enum: + - mediatek,mtk-vcodec-lat # for core hardware + - mediatek,mtk-vcodec-core + + then: + required: + - interrupts + - clocks + - clock-names + - assigned-clocks + - assigned-clock-parents + - power-domains + + +additionalProperties: false + +examples: + - | + #include + #include + #include + #include + #include + + vcodec_dec: vcodec_dec@16000000 { + compatible = "mediatek,mt8192-vcodec-dec"; + reg = <0 0x16000000 0 0x1000>; /* VDEC_SYS */ + mediatek,scp = <&scp>; + iommus = <&iommu0 M4U_PORT_L4_VDEC_MC_EXT>; + dma-ranges = <0x1 0x0 0x0 0x40000000 0x0 0xfff00000>; + }; + + vcodec_lat: vcodec_lat@0x16010000 { + compatible = "mediatek,mtk-vcodec-lat"; + reg = <0 0x16010000 0 0x800>; /* VDEC_MISC */ + interrupts = ; + iommus = <&iommu0 M4U_PORT_L5_VDEC_LAT0_VLD_EXT>, + <&iommu0 M4U_PORT_L5_VDEC_LAT0_VLD2_EXT>, + <&iommu0 M4U_PORT_L5_VDEC_LAT0_AVC_MV_EXT>, + <&iommu0 M4U_PORT_L5_VDEC_LAT0_PRED_RD_EXT>, + <&iommu0 M4U_PORT_L5_VDEC_LAT0_TILE_EXT>, + <&iommu0 M4U_PORT_L5_VDEC_LAT0_WDMA_EXT>, + <&iommu0 M4U_PORT_L5_VDEC_LAT0_RG_CTRL_DMA_EXT>, + <&iommu0 M4U_PORT_L5_VDEC_UFO_ENC_EXT>; + dma-ranges = <0x1 0x0 0x0 0x40000000 0x0 0xfff00000>; + clocks = <&topckgen CLK_TOP_VDEC_SEL>, + <&vdecsys_soc CLK_VDEC_SOC_VDEC>, + <&vdecsys_soc CLK_VDEC_SOC_LAT>, + <&vdecsys_soc CLK_VDEC_SOC_LARB1>, + <&topckgen CLK_TOP_MAINPLL_D4>; + clock-names = "vdec-sel", "vdec-soc-vdec", "vdec-soc-lat", + "vdec-vdec", "vdec-top"; + assigned-clocks = <&topckgen CLK_TOP_VDEC_SEL>; + assigned-clock-parents = <&topckgen CLK_TOP_MAINPLL_D4>; + power-domains = <&spm MT8192_POWER_DOMAIN_VDEC>; + }; + + vcodec_core: vcodec_core@0x16025000 { + compatible = "mediatek,mtk-vcodec-core"; + reg = <0 0x16025000 0 0x1000>; /* VDEC_CORE_MISC */ + interrupts = ; + iommus = <&iommu0 M4U_PORT_L4_VDEC_MC_EXT>, + <&iommu0 M4U_PORT_L4_VDEC_UFO_EXT>, + <&iommu0 M4U_PORT_L4_VDEC_PP_EXT>, + <&iommu0 M4U_PORT_L4_VDEC_PRED_RD_EXT>, + <&iommu0 M4U_PORT_L4_VDEC_PRED_WR_EXT>, + <&iommu0 M4U_PORT_L4_VDEC_PPWRAP_EXT>, + <&iommu0 M4U_PORT_L4_VDEC_TILE_EXT>, + <&iommu0 M4U_PORT_L4_VDEC_VLD_EXT>, + <&iommu0 M4U_PORT_L4_VDEC_VLD2_EXT>, + <&iommu0 M4U_PORT_L4_VDEC_AVC_MV_EXT>, + <&iommu0 M4U_PORT_L4_VDEC_RG_CTRL_DMA_EXT>; + dma-ranges = <0x1 0x0 0x0 0x40000000 0x0 0xfff00000>; + clocks = <&topckgen CLK_TOP_VDEC_SEL>, + <&vdecsys CLK_VDEC_VDEC>, + <&vdecsys CLK_VDEC_LAT>, + <&vdecsys CLK_VDEC_LARB1>, + <&topckgen CLK_TOP_MAINPLL_D4>; + clock-names = "vdec-sel", "vdec-soc-vdec", "vdec-soc-lat", + "vdec-vdec", "vdec-top"; + assigned-clocks = <&topckgen CLK_TOP_VDEC_SEL>; + assigned-clock-parents = <&topckgen CLK_TOP_MAINPLL_D4>; + power-domains = <&spm MT8192_POWER_DOMAIN_VDEC2>; + }; From patchwork Wed Aug 11 02:58:01 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: =?utf-8?b?WXVuZmVpIERvbmcgKOiRo+S6kemjnik=?= X-Patchwork-Id: 495452 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.7 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, UNPARSEABLE_RELAY, URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id BD8CBC432BE for ; Wed, 11 Aug 2021 02:59:17 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id A1B8B60230 for ; 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Wed, 11 Aug 2021 10:58:50 +0800 From: Yunfei Dong To: Yunfei Dong , Alexandre Courbot , Hans Verkuil , Tzung-Bi Shih , Tiffany Lin , Andrew-CT Chen , Mauro Carvalho Chehab , Rob Herring , Matthias Brugger , Tomasz Figa CC: Hsin-Yi Wang , Fritz Koenig , Irui Wang , , , , , , , , George Sun Subject: [PATCH v5, 15/15] media: mtk-vcodec: Use codec type to separate different hardware Date: Wed, 11 Aug 2021 10:58:01 +0800 Message-ID: <20210811025801.21597-16-yunfei.dong@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20210811025801.21597-1-yunfei.dong@mediatek.com> References: <20210811025801.21597-1-yunfei.dong@mediatek.com> MIME-Version: 1.0 X-MTK: N Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org There are just one core thread, in order to separeate different hardware, using codec type to separeate it in scp driver. Signed-off-by: Yunfei Dong --- v5: no changes --- .../media/platform/mtk-vcodec/vdec_ipi_msg.h | 12 ++++--- .../media/platform/mtk-vcodec/vdec_vpu_if.c | 34 ++++++++++++++++--- .../media/platform/mtk-vcodec/vdec_vpu_if.h | 4 +++ 3 files changed, 41 insertions(+), 9 deletions(-) diff --git a/drivers/media/platform/mtk-vcodec/vdec_ipi_msg.h b/drivers/media/platform/mtk-vcodec/vdec_ipi_msg.h index 9d8079c4f976..c488f0c40190 100644 --- a/drivers/media/platform/mtk-vcodec/vdec_ipi_msg.h +++ b/drivers/media/platform/mtk-vcodec/vdec_ipi_msg.h @@ -35,6 +35,8 @@ enum vdec_ipi_msgid { * @msg_id : vdec_ipi_msgid * @vpu_inst_addr : VPU decoder instance address. Used if ABI version < 2. * @inst_id : instance ID. Used if the ABI version >= 2. + * @codec_type : Codec fourcc + * @reserved : reserved param */ struct vdec_ap_ipi_cmd { uint32_t msg_id; @@ -42,6 +44,8 @@ struct vdec_ap_ipi_cmd { uint32_t vpu_inst_addr; uint32_t inst_id; }; + uint32_t codec_type; + uint32_t reserved; }; /** @@ -59,12 +63,12 @@ struct vdec_vpu_ipi_ack { /** * struct vdec_ap_ipi_init - for AP_IPIMSG_DEC_INIT * @msg_id : AP_IPIMSG_DEC_INIT - * @reserved : Reserved field + * @codec_type : Codec fourcc * @ap_inst_addr : AP video decoder instance address */ struct vdec_ap_ipi_init { uint32_t msg_id; - uint32_t reserved; + uint32_t codec_type; uint64_t ap_inst_addr; }; @@ -77,7 +81,7 @@ struct vdec_ap_ipi_init { * H264 decoder [0]:buf_sz [1]:nal_start * VP8 decoder [0]:width/height * VP9 decoder [0]:profile, [1][2] width/height - * @reserved : Reserved field + * @codec_type : Codec fourcc */ struct vdec_ap_ipi_dec_start { uint32_t msg_id; @@ -86,7 +90,7 @@ struct vdec_ap_ipi_dec_start { uint32_t inst_id; }; uint32_t data[3]; - uint32_t reserved; + uint32_t codec_type; }; /** diff --git a/drivers/media/platform/mtk-vcodec/vdec_vpu_if.c b/drivers/media/platform/mtk-vcodec/vdec_vpu_if.c index bfd8e87dceff..c84fac52fe26 100644 --- a/drivers/media/platform/mtk-vcodec/vdec_vpu_if.c +++ b/drivers/media/platform/mtk-vcodec/vdec_vpu_if.c @@ -100,18 +100,29 @@ static void vpu_dec_ipi_handler(void *data, unsigned int len, void *priv) static int vcodec_vpu_send_msg(struct vdec_vpu_inst *vpu, void *msg, int len) { - int err; + int err, id, msgid; - mtk_vcodec_debug(vpu, "id=%X", *(uint32_t *)msg); + msgid = *(uint32_t *)msg; + mtk_vcodec_debug(vpu, "id=%X", msgid); vpu->failure = 0; vpu->signaled = 0; - err = mtk_vcodec_fw_ipi_send(vpu->ctx->dev->fw_handler, vpu->id, msg, + if (vpu->ctx->dev->vdec_pdata->hw_arch == MTK_VDEC_LAT_SINGLE_CORE) { + if (msgid == AP_IPIMSG_DEC_CORE || + msgid == AP_IPIMSG_DEC_CORE_END) + id = vpu->core_id; + else + id = vpu->id; + } else { + id = vpu->id; + } + + err = mtk_vcodec_fw_ipi_send(vpu->ctx->dev->fw_handler, id, msg, len, 2000); if (err) { mtk_vcodec_err(vpu, "send fail vpu_id=%d msg_id=%X status=%d", - vpu->id, *(uint32_t *)msg, err); + id, msgid, err); return err; } @@ -131,6 +142,7 @@ static int vcodec_send_ap_ipi(struct vdec_vpu_inst *vpu, unsigned int msg_id) msg.vpu_inst_addr = vpu->inst_addr; else msg.inst_id = vpu->inst_id; + msg.codec_type = vpu->codec_type; err = vcodec_vpu_send_msg(vpu, &msg, sizeof(msg)); mtk_vcodec_debug(vpu, "- id=%X ret=%d", msg_id, err); @@ -149,14 +161,25 @@ int vpu_dec_init(struct vdec_vpu_inst *vpu) err = mtk_vcodec_fw_ipi_register(vpu->ctx->dev->fw_handler, vpu->id, vpu->handler, "vdec", NULL); - if (err != 0) { + if (err) { mtk_vcodec_err(vpu, "vpu_ipi_register fail status=%d", err); return err; } + if (vpu->ctx->dev->vdec_pdata->hw_arch == MTK_VDEC_LAT_SINGLE_CORE) { + err = mtk_vcodec_fw_ipi_register(vpu->ctx->dev->fw_handler, + vpu->core_id, vpu->handler, + "vdec", NULL); + if (err) { + mtk_vcodec_err(vpu, "vpu_ipi_register core fail status=%d", err); + return err; + } + } + memset(&msg, 0, sizeof(msg)); msg.msg_id = AP_IPIMSG_DEC_INIT; msg.ap_inst_addr = (unsigned long)vpu; + msg.codec_type = vpu->codec_type; mtk_vcodec_debug(vpu, "vdec_inst=%p", vpu); @@ -187,6 +210,7 @@ int vpu_dec_start(struct vdec_vpu_inst *vpu, uint32_t *data, unsigned int len) for (i = 0; i < len; i++) msg.data[i] = data[i]; + msg.codec_type = vpu->codec_type; err = vcodec_vpu_send_msg(vpu, (void *)&msg, sizeof(msg)); mtk_vcodec_debug(vpu, "- ret=%d", err); diff --git a/drivers/media/platform/mtk-vcodec/vdec_vpu_if.h b/drivers/media/platform/mtk-vcodec/vdec_vpu_if.h index ae24b75d1649..802660770a87 100644 --- a/drivers/media/platform/mtk-vcodec/vdec_vpu_if.h +++ b/drivers/media/platform/mtk-vcodec/vdec_vpu_if.h @@ -14,6 +14,7 @@ struct mtk_vcodec_ctx; /** * struct vdec_vpu_inst - VPU instance for video codec * @id : ipi msg id for each decoder + * @core_id : core id used to separate different hardware * @vsi : driver structure allocated by VPU side and shared to AP side * for control and info share * @failure : VPU execution result status, 0: success, others: fail @@ -26,9 +27,11 @@ struct mtk_vcodec_ctx; * @dev : platform device of VPU * @wq : wait queue to wait VPU message ack * @handler : ipi handler for each decoder + * @codec_type : used codec type to separate different codecs */ struct vdec_vpu_inst { int id; + int core_id; void *vsi; int32_t failure; uint32_t inst_addr; @@ -38,6 +41,7 @@ struct vdec_vpu_inst { struct mtk_vcodec_ctx *ctx; wait_queue_head_t wq; mtk_vcodec_ipi_handler handler; + unsigned int codec_type; }; /**