From patchwork Mon Aug 9 12:05:42 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Krzysztof Kozlowski X-Patchwork-Id: 494139 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-23.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI, MENTIONS_GIT_HOSTING, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id E1BF8C4338F for ; Mon, 9 Aug 2021 12:07:35 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id B9A3360240 for ; Mon, 9 Aug 2021 12:07:35 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234509AbhHIMHz (ORCPT ); Mon, 9 Aug 2021 08:07:55 -0400 Received: from smtp-relay-canonical-0.canonical.com ([185.125.188.120]:45214 "EHLO smtp-relay-canonical-0.canonical.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233471AbhHIMHy (ORCPT ); Mon, 9 Aug 2021 08:07:54 -0400 Received: from mail-ej1-f72.google.com (mail-ej1-f72.google.com [209.85.218.72]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by smtp-relay-canonical-0.canonical.com (Postfix) with ESMTPS id A03E03F04D for ; Mon, 9 Aug 2021 12:07:33 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=canonical.com; s=20210705; t=1628510853; bh=2daM3RukL8uFtRevasOftGMEg/bNtv3suJb8BFZCflI=; h=From:To:Cc:Subject:Date:Message-Id:MIME-Version; b=HrJXgGxQbNRB/JIy3TLD9IYpDCAdMOkQC+uEfu87uJaeWcrn04AgoTPn7s6U1CSF/ 5Ddc96djkSQupaf4no/BNja2RdIkWkUSxh8yypCnuVCqc85x2wdDsVHyzCItYUNuFN tOfcjCwuruhydHqVTnKaohK5EdVH/sF6v0S0iQuiCQ9iq6z60u6jpYjfvXl9oifRKY iz03B4aaBVbY6/q2xwDcOQGvcjNVoHEiXyffQEXNGHFW3WwFuOBlWjN4AAHuklMOct yIvtOftxY13LDZeGpWiN5lbXINWzBaOdgCL+w4bROBVdd51uSofaHdRRquBqoBU02m 9Rthojrkn0eCg== Received: by mail-ej1-f72.google.com with SMTP id k22-20020a1709061596b02905a370b2f477so4436105ejd.17 for ; Mon, 09 Aug 2021 05:07:33 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=2daM3RukL8uFtRevasOftGMEg/bNtv3suJb8BFZCflI=; b=StEpGuJpUxbVfx7jtDH15ZxnMUAgTuxo3PoUooVsdbE7fHgGsgMitvQ8AhiVxZmEL7 b4DLxjzFXI7rZW85B8ksMuBeI2zfoBiXZROJtpdLOA12WePq6cz0mOmBPXqPwu//HdTT X1u5Fxzb/VOl/NJjo5Czc6Jg3M8ikR2nIjqh8I/0MxQqiUUGqVBK7nUecyx6FNu6gU9G yVI0v0uLSRgFTfkLYR6ZkF65KcVfK2y9MDmDAGKEhk5Pmxa3agxekwGyT1dEbiFSIrL4 I96rVWytEV0TJU7TGfVlJ556D8T13kPbyKxFXTX3pjxXIOkT8weUVeAQz8Xyl9k+rMCs F2Tw== X-Gm-Message-State: AOAM531YVQT+vgA747HgOiBkHuASDZbClFUPoM9/XuP2jaWFdPI4a74i /gx3cAdiX6JzRJArMPJTy7ZzFj4nztG5ZmaGrB/Wz3GFhv3YqygYmSeVSsBelwD/wAW+xdvKl0E nTty/Saf4Vd9sygV54QsdEc557o1G92rs5SLB8sTJrSUepSF4 X-Received: by 2002:a17:906:d52:: with SMTP id r18mr21995414ejh.47.1628510853332; Mon, 09 Aug 2021 05:07:33 -0700 (PDT) X-Google-Smtp-Source: ABdhPJzOfuGtnOAZvjuBVRJBY5cSEj1w1cOneBCKbYYYklM3mbay8F5lsgcyWvB6Nbuj78CYpk7/Ag== X-Received: by 2002:a17:906:d52:: with SMTP id r18mr21995394ejh.47.1628510853144; Mon, 09 Aug 2021 05:07:33 -0700 (PDT) Received: from localhost.localdomain ([86.32.42.198]) by smtp.gmail.com with ESMTPSA id i6sm8084863edt.28.2021.08.09.05.07.31 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 09 Aug 2021 05:07:32 -0700 (PDT) From: Krzysztof Kozlowski To: Sylwester Nawrocki , Tomasz Figa , Chanwoo Choi , Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , linux-samsung-soc@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Cc: Sam Protsenko Subject: [PATCH 1/3] dt-bindings: clock: samsung: convert Exynos5250 to dtschema Date: Mon, 9 Aug 2021 14:05:42 +0200 Message-Id: <20210809120544.56596-1-krzysztof.kozlowski@canonical.com> X-Mailer: git-send-email 2.30.2 MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org Convert Samsung Exynos5250 clock controller bindings to DT schema format using json-schema. Signed-off-by: Krzysztof Kozlowski --- .../bindings/clock/exynos5250-clock.txt | 41 ---------------- .../bindings/clock/samsung,exynos-clock.yaml | 48 +++++++++++++++++++ MAINTAINERS | 1 + 3 files changed, 49 insertions(+), 41 deletions(-) delete mode 100644 Documentation/devicetree/bindings/clock/exynos5250-clock.txt create mode 100644 Documentation/devicetree/bindings/clock/samsung,exynos-clock.yaml diff --git a/Documentation/devicetree/bindings/clock/exynos5250-clock.txt b/Documentation/devicetree/bindings/clock/exynos5250-clock.txt deleted file mode 100644 index aff266a12eeb..000000000000 --- a/Documentation/devicetree/bindings/clock/exynos5250-clock.txt +++ /dev/null @@ -1,41 +0,0 @@ -* Samsung Exynos5250 Clock Controller - -The Exynos5250 clock controller generates and supplies clock to various -controllers within the Exynos5250 SoC. - -Required Properties: - -- compatible: should be one of the following. - - "samsung,exynos5250-clock" - controller compatible with Exynos5250 SoC. - -- reg: physical base address of the controller and length of memory mapped - region. - -- #clock-cells: should be 1. - -Each clock is assigned an identifier and client nodes can use this identifier -to specify the clock which they consume. - -All available clocks are defined as preprocessor macros in -dt-bindings/clock/exynos5250.h header and can be used in device -tree sources. - -Example 1: An example of a clock controller node is listed below. - - clock: clock-controller@10010000 { - compatible = "samsung,exynos5250-clock"; - reg = <0x10010000 0x30000>; - #clock-cells = <1>; - }; - -Example 2: UART controller node that consumes the clock generated by the clock - controller. Refer to the standard clock bindings for information - about 'clocks' and 'clock-names' property. - - serial@13820000 { - compatible = "samsung,exynos4210-uart"; - reg = <0x13820000 0x100>; - interrupts = <0 54 0>; - clocks = <&clock CLK_UART2>, <&clock CLK_SCLK_UART2>; - clock-names = "uart", "clk_uart_baud0"; - }; diff --git a/Documentation/devicetree/bindings/clock/samsung,exynos-clock.yaml b/Documentation/devicetree/bindings/clock/samsung,exynos-clock.yaml new file mode 100644 index 000000000000..cd6567bd8cc7 --- /dev/null +++ b/Documentation/devicetree/bindings/clock/samsung,exynos-clock.yaml @@ -0,0 +1,48 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/clock/samsung,exynos-clock.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Samsung Exynos SoC clock controller + +maintainers: + - Chanwoo Choi + - Krzysztof Kozlowski + - Sylwester Nawrocki + - Tomasz Figa + +description: | + All available clocks are defined as preprocessor macros in + dt-bindings/clock/ headers. + +properties: + compatible: + const: samsung,exynos5250-clock + + assigned-clocks: true + assigned-clock-parents: true + assigned-clock-rates: true + clocks: true + + "#clock-cells": + const: 1 + + reg: + maxItems: 1 + +required: + - compatible + - "#clock-cells" + - reg + +additionalProperties: false + +examples: + - | + #include + clock: clock-controller@10010000 { + compatible = "samsung,exynos5250-clock"; + reg = <0x10010000 0x30000>; + #clock-cells = <1>; + }; diff --git a/MAINTAINERS b/MAINTAINERS index 36aee8517ab0..2dbacacac3f5 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -16491,6 +16491,7 @@ L: linux-samsung-soc@vger.kernel.org S: Supported T: git git://git.kernel.org/pub/scm/linux/kernel/git/snawrocki/clk.git F: Documentation/devicetree/bindings/clock/exynos*.txt +F: Documentation/devicetree/bindings/clock/samsung,*.yaml F: Documentation/devicetree/bindings/clock/samsung,s3c* F: Documentation/devicetree/bindings/clock/samsung,s5p* F: drivers/clk/samsung/ From patchwork Mon Aug 9 12:05:43 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Krzysztof Kozlowski X-Patchwork-Id: 494676 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 354E8C41537 for ; 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Mon, 09 Aug 2021 05:07:34 -0700 (PDT) X-Google-Smtp-Source: ABdhPJwl0z9zY6TIRsWFOr2u74gnQQlWSGYod2iNeNyrZ86XebFxOWaMyJnUCR3NQeVehyALnrzY2g== X-Received: by 2002:aa7:dc02:: with SMTP id b2mr28698690edu.46.1628510854621; Mon, 09 Aug 2021 05:07:34 -0700 (PDT) Received: from localhost.localdomain ([86.32.42.198]) by smtp.gmail.com with ESMTPSA id i6sm8084863edt.28.2021.08.09.05.07.33 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 09 Aug 2021 05:07:34 -0700 (PDT) From: Krzysztof Kozlowski To: Sylwester Nawrocki , Tomasz Figa , Chanwoo Choi , Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , linux-samsung-soc@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Cc: Sam Protsenko Subject: [PATCH 2/3] dt-bindings: clock: samsung: add bindings for Exynos external clock Date: Mon, 9 Aug 2021 14:05:43 +0200 Message-Id: <20210809120544.56596-2-krzysztof.kozlowski@canonical.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20210809120544.56596-1-krzysztof.kozlowski@canonical.com> References: <20210809120544.56596-1-krzysztof.kozlowski@canonical.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org Document the bindings for Samsung Exynos external to SoC (oscclk/XXTI/XusbXTI) clock provided on boards. The bindings are already implemented in most of the Exynos clock drivers and DTS files. Signed-off-by: Krzysztof Kozlowski --- .../clock/samsung,exynos-ext-clock.yaml | 46 +++++++++++++++++++ 1 file changed, 46 insertions(+) create mode 100644 Documentation/devicetree/bindings/clock/samsung,exynos-ext-clock.yaml diff --git a/Documentation/devicetree/bindings/clock/samsung,exynos-ext-clock.yaml b/Documentation/devicetree/bindings/clock/samsung,exynos-ext-clock.yaml new file mode 100644 index 000000000000..64d027dbe3b2 --- /dev/null +++ b/Documentation/devicetree/bindings/clock/samsung,exynos-ext-clock.yaml @@ -0,0 +1,46 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/clock/samsung,exynos-ext-clock.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Samsung SoC external/osc/XXTI/XusbXTI clock + +maintainers: + - Chanwoo Choi + - Krzysztof Kozlowski + - Sylwester Nawrocki + - Tomasz Figa + +description: | + Samsung SoCs require an external clock supplied through XXTI or XusbXTI pins. + +properties: + compatible: + enum: + - samsung,clock-xxti + - samsung,clock-xusbxti + - samsung,exynos5420-oscclk + + "#clock-cells": + const: 0 + + clock-frequency: true + + clock-output-names: + maxItems: 1 + +required: + - compatible + - clock-frequency + +additionalProperties: false + +examples: + - | + fixed-rate-clocks { + clock { + compatible = "samsung,clock-xxti"; + clock-frequency = <24000000>; + }; + }; From patchwork Mon Aug 9 12:05:44 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Krzysztof Kozlowski X-Patchwork-Id: 494138 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 27E9AC432BE for ; Mon, 9 Aug 2021 12:07:43 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 0EAF360F35 for ; Mon, 9 Aug 2021 12:07:43 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235379AbhHIMIB (ORCPT ); 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Mon, 09 Aug 2021 05:07:35 -0700 (PDT) Received: from localhost.localdomain ([86.32.42.198]) by smtp.gmail.com with ESMTPSA id i6sm8084863edt.28.2021.08.09.05.07.34 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 09 Aug 2021 05:07:35 -0700 (PDT) From: Krzysztof Kozlowski To: Sylwester Nawrocki , Tomasz Figa , Chanwoo Choi , Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , linux-samsung-soc@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Cc: Sam Protsenko Subject: [PATCH 3/3] dt-bindings: clock: samsung: convert Exynos542x to dtschema Date: Mon, 9 Aug 2021 14:05:44 +0200 Message-Id: <20210809120544.56596-3-krzysztof.kozlowski@canonical.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20210809120544.56596-1-krzysztof.kozlowski@canonical.com> References: <20210809120544.56596-1-krzysztof.kozlowski@canonical.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org Merge Exynos542x clock controller bindings to existing DT schema. Signed-off-by: Krzysztof Kozlowski --- .../bindings/clock/exynos5420-clock.txt | 42 ------------------- .../bindings/clock/samsung,exynos-clock.yaml | 11 ++++- 2 files changed, 10 insertions(+), 43 deletions(-) delete mode 100644 Documentation/devicetree/bindings/clock/exynos5420-clock.txt diff --git a/Documentation/devicetree/bindings/clock/exynos5420-clock.txt b/Documentation/devicetree/bindings/clock/exynos5420-clock.txt deleted file mode 100644 index 717a7b1531c7..000000000000 --- a/Documentation/devicetree/bindings/clock/exynos5420-clock.txt +++ /dev/null @@ -1,42 +0,0 @@ -* Samsung Exynos5420 Clock Controller - -The Exynos5420 clock controller generates and supplies clock to various -controllers within the Exynos5420 SoC and for the Exynos5800 SoC. - -Required Properties: - -- compatible: should be one of the following. - - "samsung,exynos5420-clock" - controller compatible with Exynos5420 SoC. - - "samsung,exynos5800-clock" - controller compatible with Exynos5800 SoC. - -- reg: physical base address of the controller and length of memory mapped - region. - -- #clock-cells: should be 1. - -Each clock is assigned an identifier and client nodes can use this identifier -to specify the clock which they consume. - -All available clocks are defined as preprocessor macros in -dt-bindings/clock/exynos5420.h header and can be used in device -tree sources. - -Example 1: An example of a clock controller node is listed below. - - clock: clock-controller@10010000 { - compatible = "samsung,exynos5420-clock"; - reg = <0x10010000 0x30000>; - #clock-cells = <1>; - }; - -Example 2: UART controller node that consumes the clock generated by the clock - controller. Refer to the standard clock bindings for information - about 'clocks' and 'clock-names' property. - - serial@13820000 { - compatible = "samsung,exynos4210-uart"; - reg = <0x13820000 0x100>; - interrupts = <0 54 0>; - clocks = <&clock CLK_UART2>, <&clock CLK_SCLK_UART2>; - clock-names = "uart", "clk_uart_baud0"; - }; diff --git a/Documentation/devicetree/bindings/clock/samsung,exynos-clock.yaml b/Documentation/devicetree/bindings/clock/samsung,exynos-clock.yaml index cd6567bd8cc7..b0f58a1cf6cb 100644 --- a/Documentation/devicetree/bindings/clock/samsung,exynos-clock.yaml +++ b/Documentation/devicetree/bindings/clock/samsung,exynos-clock.yaml @@ -18,7 +18,16 @@ description: | properties: compatible: - const: samsung,exynos5250-clock + oneOf: + - enum: + - samsung,exynos5250-clock + - samsung,exynos5420-clock + - samsung,exynos5800-clock + - items: + - enum: + - samsung,exynos5420-clock + - samsung,exynos5800-clock + - const: syscon assigned-clocks: true assigned-clock-parents: true