From patchwork Thu Aug 5 02:59:45 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ezequiel Garcia X-Patchwork-Id: 492997 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.7 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, UNPARSEABLE_RELAY, URIBL_BLOCKED, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4CDCAC4338F for ; Thu, 5 Aug 2021 03:01:12 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 2FD1B60560 for ; Thu, 5 Aug 2021 03:01:12 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S238069AbhHEDBY (ORCPT ); Wed, 4 Aug 2021 23:01:24 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55144 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S238373AbhHEDBP (ORCPT ); Wed, 4 Aug 2021 23:01:15 -0400 Received: from bhuna.collabora.co.uk (bhuna.collabora.co.uk [IPv6:2a00:1098:0:82:1000:25:2eeb:e3e3]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 63A84C061798 for ; Wed, 4 Aug 2021 20:01:02 -0700 (PDT) Received: from [127.0.0.1] (localhost [127.0.0.1]) (Authenticated sender: ezequiel) with ESMTPSA id 6E6B41F43B34 From: Ezequiel Garcia To: devicetree@vger.kernel.org, linux-rockchip@lists.infradead.org Cc: Rob Herring , Heiko Stuebner , Kever Yang , Benjamin Gaignard , Peter Geis , Johan Jonker , Ezequiel Garcia Subject: [PATCH v3 1/4] dt-bindings: gpu: mali-bifrost: Allow up to two clocks Date: Wed, 4 Aug 2021 23:59:45 -0300 Message-Id: <20210805025948.10900-2-ezequiel@collabora.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20210805025948.10900-1-ezequiel@collabora.com> References: <20210805025948.10900-1-ezequiel@collabora.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Commit b681af0bc1cc ("drm: panfrost: add optional bus_clock") added an optional bus_clock to support Allwinner H6 T-720 GPU. Increase the max clock items in the dt-binding to reflect this. Signed-off-by: Ezequiel Garcia --- .../devicetree/bindings/gpu/arm,mali-bifrost.yaml | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/gpu/arm,mali-bifrost.yaml b/Documentation/devicetree/bindings/gpu/arm,mali-bifrost.yaml index 0f73f436bea7..01532140096e 100644 --- a/Documentation/devicetree/bindings/gpu/arm,mali-bifrost.yaml +++ b/Documentation/devicetree/bindings/gpu/arm,mali-bifrost.yaml @@ -38,7 +38,12 @@ properties: - const: gpu clocks: - maxItems: 1 + minItems: 1 + maxItems: 2 + + clock-names: + minItems: 1 + maxItems: 2 mali-supply: true From patchwork Thu Aug 5 02:59:46 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ezequiel Garcia X-Patchwork-Id: 492424 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.7 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, UNPARSEABLE_RELAY, URIBL_BLOCKED, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 03691C432BE for ; Thu, 5 Aug 2021 03:01:13 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id DAAD860D07 for ; Thu, 5 Aug 2021 03:01:12 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S238364AbhHEDBY (ORCPT ); Wed, 4 Aug 2021 23:01:24 -0400 Received: from bhuna.collabora.co.uk ([46.235.227.227]:50286 "EHLO bhuna.collabora.co.uk" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S238388AbhHEDBV (ORCPT ); Wed, 4 Aug 2021 23:01:21 -0400 Received: from [127.0.0.1] (localhost [127.0.0.1]) (Authenticated sender: ezequiel) with ESMTPSA id CE5C11F43B32 From: Ezequiel Garcia To: devicetree@vger.kernel.org, linux-rockchip@lists.infradead.org Cc: Rob Herring , Heiko Stuebner , Kever Yang , Benjamin Gaignard , Peter Geis , Johan Jonker , Ezequiel Garcia Subject: [PATCH v3 2/4] dt-bindings: gpu: mali-bifrost: Add RK3568 compatible Date: Wed, 4 Aug 2021 23:59:46 -0300 Message-Id: <20210805025948.10900-3-ezequiel@collabora.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20210805025948.10900-1-ezequiel@collabora.com> References: <20210805025948.10900-1-ezequiel@collabora.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org The Rockchip RK3568 SoC has a Bifrost Mali-G52 GPU, add a compatible string for it. Signed-off-by: Ezequiel Garcia --- Documentation/devicetree/bindings/gpu/arm,mali-bifrost.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/gpu/arm,mali-bifrost.yaml b/Documentation/devicetree/bindings/gpu/arm,mali-bifrost.yaml index 01532140096e..6afe7030b859 100644 --- a/Documentation/devicetree/bindings/gpu/arm,mali-bifrost.yaml +++ b/Documentation/devicetree/bindings/gpu/arm,mali-bifrost.yaml @@ -20,6 +20,7 @@ properties: - mediatek,mt8183-mali - realtek,rtd1619-mali - rockchip,px30-mali + - rockchip,rk3568-mali - const: arm,mali-bifrost # Mali Bifrost GPU model/revision is fully discoverable reg: From patchwork Thu Aug 5 02:59:47 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ezequiel Garcia X-Patchwork-Id: 492996 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.7 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, UNPARSEABLE_RELAY, URIBL_BLOCKED, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 73A37C4338F for ; Thu, 5 Aug 2021 03:01:16 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 5B6AA60184 for ; Thu, 5 Aug 2021 03:01:16 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S238369AbhHEDB1 (ORCPT ); Wed, 4 Aug 2021 23:01:27 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55190 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235958AbhHEDB0 (ORCPT ); Wed, 4 Aug 2021 23:01:26 -0400 Received: from bhuna.collabora.co.uk (bhuna.collabora.co.uk [IPv6:2a00:1098:0:82:1000:25:2eeb:e3e3]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 408DFC061765 for ; Wed, 4 Aug 2021 20:01:13 -0700 (PDT) Received: from [127.0.0.1] (localhost [127.0.0.1]) (Authenticated sender: ezequiel) with ESMTPSA id ADE851F43B3C From: Ezequiel Garcia To: devicetree@vger.kernel.org, linux-rockchip@lists.infradead.org Cc: Rob Herring , Heiko Stuebner , Kever Yang , Benjamin Gaignard , Peter Geis , Johan Jonker , Ezequiel Garcia Subject: [PATCH v3 3/4] arm64: dts: rockchip: Add GPU node for rk3568 Date: Wed, 4 Aug 2021 23:59:47 -0300 Message-Id: <20210805025948.10900-4-ezequiel@collabora.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20210805025948.10900-1-ezequiel@collabora.com> References: <20210805025948.10900-1-ezequiel@collabora.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Rockchip SoCs RK3566 and RK3568 have a Mali Gondul core which is based on the Bifrost architecture. It has one shader core and two execution engines. Quoting the datasheet: Mali-G52 1-Core-2EE * Support 1600Mpix/s fill rate when 800MHz clock frequency * Support 38.4GLOPs when 800MHz clock frequency Signed-off-by: Ezequiel Garcia --- arch/arm64/boot/dts/rockchip/rk356x.dtsi | 50 ++++++++++++++++++++++++ 1 file changed, 50 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk356x.dtsi b/arch/arm64/boot/dts/rockchip/rk356x.dtsi index bef747fb1fe2..f8173ba63be0 100644 --- a/arch/arm64/boot/dts/rockchip/rk356x.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk356x.dtsi @@ -121,6 +121,40 @@ opp-1800000000 { }; }; + gpu_opp_table: gpu-opp-table { + compatible = "operating-points-v2"; + + opp-200000000 { + opp-hz = /bits/ 64 <200000000>; + opp-microvolt = <825000>; + }; + + opp-300000000 { + opp-hz = /bits/ 64 <300000000>; + opp-microvolt = <825000>; + }; + + opp-400000000 { + opp-hz = /bits/ 64 <400000000>; + opp-microvolt = <825000>; + }; + + opp-600000000 { + opp-hz = /bits/ 64 <600000000>; + opp-microvolt = <825000>; + }; + + opp-700000000 { + opp-hz = /bits/ 64 <700000000>; + opp-microvolt = <900000>; + }; + + opp-800000000 { + opp-hz = /bits/ 64 <800000000>; + opp-microvolt = <1000000>; + }; + }; + firmware { scmi: scmi { compatible = "arm,scmi-smc"; @@ -332,6 +366,22 @@ power-domain@RK3568_PD_RKVENC { }; }; + gpu: gpu@fde60000 { + compatible = "rockchip,rk3568-mali", "arm,mali-bifrost"; + reg = <0x0 0xfde60000 0x0 0x4000>; + + interrupts = , + , + ; + interrupt-names = "job", "mmu", "gpu"; + clocks = <&scmi_clk 1>, <&cru CLK_GPU>; + clock-names = "core", "bus"; + operating-points-v2 = <&gpu_opp_table>; + #cooling-cells = <2>; + power-domains = <&power RK3568_PD_GPU>; + status = "disabled"; + }; + sdmmc2: mmc@fe000000 { compatible = "rockchip,rk3568-dw-mshc", "rockchip,rk3288-dw-mshc"; reg = <0x0 0xfe000000 0x0 0x4000>; From patchwork Thu Aug 5 02:59:48 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ezequiel Garcia X-Patchwork-Id: 492423 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.7 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, UNPARSEABLE_RELAY, URIBL_BLOCKED, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 65FD6C432BE for ; Thu, 5 Aug 2021 03:01:18 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 4FDDE60560 for ; Thu, 5 Aug 2021 03:01:18 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235755AbhHEDBb (ORCPT ); Wed, 4 Aug 2021 23:01:31 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55218 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231617AbhHEDBa (ORCPT ); Wed, 4 Aug 2021 23:01:30 -0400 Received: from bhuna.collabora.co.uk (bhuna.collabora.co.uk [IPv6:2a00:1098:0:82:1000:25:2eeb:e3e3]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E26E9C061765 for ; Wed, 4 Aug 2021 20:01:16 -0700 (PDT) Received: from [127.0.0.1] (localhost [127.0.0.1]) (Authenticated sender: ezequiel) with ESMTPSA id B63181F43B34 From: Ezequiel Garcia To: devicetree@vger.kernel.org, linux-rockchip@lists.infradead.org Cc: Rob Herring , Heiko Stuebner , Kever Yang , Benjamin Gaignard , Peter Geis , Johan Jonker , Ezequiel Garcia Subject: [PATCH v3 4/4] arm64: dts: rockchip: Enable the GPU on Quartz64 Model A Date: Wed, 4 Aug 2021 23:59:48 -0300 Message-Id: <20210805025948.10900-5-ezequiel@collabora.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20210805025948.10900-1-ezequiel@collabora.com> References: <20210805025948.10900-1-ezequiel@collabora.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Enable the GPU core on the Pine64 Quartz64 Model A. Signed-off-by: Ezequiel Garcia --- arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts b/arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts index b239f314b38a..2114c7404a07 100644 --- a/arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts +++ b/arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts @@ -147,6 +147,11 @@ &gmac1m0_clkinout status = "okay"; }; +&gpu { + mali-supply = <&vdd_gpu>; + status = "okay"; +}; + &i2c0 { status = "okay";