From patchwork Thu Sep 20 19:17:36 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mathieu Poirier X-Patchwork-Id: 147122 Delivered-To: patch@linaro.org Received: by 2002:a2e:1648:0:0:0:0:0 with SMTP id 8-v6csp2375831ljw; Thu, 20 Sep 2018 12:18:26 -0700 (PDT) X-Google-Smtp-Source: ANB0VdbItAalQU8r6TIFH/h0m5/TpKJ+NuGpI7gPiZxQhMkOhgHiMaQBXbwJVl/8SmYwvyNJMalp X-Received: by 2002:a17:902:6f10:: with SMTP id w16-v6mr40226559plk.216.1537471106126; Thu, 20 Sep 2018 12:18:26 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1537471106; cv=none; d=google.com; s=arc-20160816; b=dHITgpHDnbpP8MbfJZIC86GrRQBNyoGjoGs+kj1VhYRmPfOZYBVWCF874snF5euvHC DtGRSvWIqafFUwCLYDwuwUsYsUDgPMBl3xVthKjQdoXgvVXgMw69gCwZaREjvZDm8bO9 zxN90HSVlVTsD7XfdMApEygI3WxJGCUkE+Qb/sjQNVaK/UFtUwljDf9VaguWPmSVcs9D HsQMKm2NO2FeWmOFd/lBidjx9HUet2RROLoEXBYG13a8mx2ofvm87xHhcUyBGadLWmDy kAnTnPfFx5iNQdRRV0jc3w4ViFyXdx/fg0UbIthCBnWuGZPJJtBtppAv/+EIQQvYqMMs +GBw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature; bh=gcLCDx5D6wD8A3b7yK58PSHPfb+H13w3trkFLuJ5fBM=; b=x1vmrXAxjs0Gk1xBFx30HrI/3uGDYDaX2q2ZMxfw3RBclsKgdcnEmObNa1+6WvZS7u JbzDsoOKKzjKOcFr0AvlrTyUffcLYibLJxCeVrfSDDlzufzVxe2fx5GrcPzqH81W+J68 Gk92htkS9QvJ2rNJ8FVaEvUbyIEqTB3AKptHgpCq8JB+UK+xCSBUwL1ubD83nMaxcxi9 xFJoI4i8++lK/aCPjSM/pjmS4jTqmAXD+1CV5hW1saGLkebbGE9BvL+JCKPSQ5LF1kch sObJPmTlpPTxgeGyj84MaI72O6L7DwP5vo2XI5kqUzh12kfEI1eCl1IjkTx65IXHK9kA DlJw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=CYLR1rKw; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id q2-v6si24665685pgd.303.2018.09.20.12.18.25; Thu, 20 Sep 2018 12:18:26 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=CYLR1rKw; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2388614AbeIUBDW (ORCPT + 32 others); Thu, 20 Sep 2018 21:03:22 -0400 Received: from mail-pf1-f195.google.com ([209.85.210.195]:37683 "EHLO mail-pf1-f195.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2388566AbeIUBDV (ORCPT ); Thu, 20 Sep 2018 21:03:21 -0400 Received: by mail-pf1-f195.google.com with SMTP id h69-v6so4825643pfd.4 for ; Thu, 20 Sep 2018 12:18:23 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=gcLCDx5D6wD8A3b7yK58PSHPfb+H13w3trkFLuJ5fBM=; b=CYLR1rKwtRNoTrId7loK8npSAiyBYHfQoe//GEvC1gwd2gmO/YEXx9lqkkLba8/WUO RvsuPQQ9EnCIgwtpaD9Suz65DM8SNX5Ma7Vc9RJLENGzVlNty4RDmQznTi7H6igdpLec gRfQe3xRTwhvqEzMo0WWCC+37IBsWvwQKKVnk= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=gcLCDx5D6wD8A3b7yK58PSHPfb+H13w3trkFLuJ5fBM=; b=kc2BGTWT/iA3vfUMGh33afrBvguz2q56brXGLuxiOVFxSfHHVOCYSS0lTk+f+uwZtB 7wzqYDLkIzcqtQZ081XUFfPQN3IuSAAlXqDnATu3z/h/HSOifvPQQcK574ke5Seivfsc 1+ByxGHVvTjar9PE9N3ntwuk1zzRJFtUXvcGAKok0Wz2Fdsh48VUwarjEFYe6Km2lSde DYCaNPR9C6dWPQTl65OiIsxVBpp18q6IUnO9Wd68sB21j5jlhJd8+l8PqdlZ0nqCTgrt XYjKr3LmyHwKMwVOgrXvVO0tlA5MP0l2nUhzhc2TEMy7/FCuMBoVL8wmdtIzJje55YJX GhSA== X-Gm-Message-State: APzg51BPd0mZ2I1GnFtlV2+AfnZCWK3XrATZOXFBRjZnqhMa/yggiuOa N8gp/4i/zh3LPArqLUWtU2pl66uCcH8= X-Received: by 2002:a63:3dc6:: with SMTP id k189-v6mr38015235pga.191.1537471102750; Thu, 20 Sep 2018 12:18:22 -0700 (PDT) Received: from localhost.localdomain ([209.121.128.187]) by smtp.gmail.com with ESMTPSA id k13-v6sm4424443pgf.37.2018.09.20.12.18.21 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 20 Sep 2018 12:18:21 -0700 (PDT) From: Mathieu Poirier To: gregkh@linuxfoundation.org Cc: linux-kernel@vger.kernel.org Subject: [PATCH 01/44] coresight: Document error handling in coresight_register Date: Thu, 20 Sep 2018 13:17:36 -0600 Message-Id: <1537471099-19781-2-git-send-email-mathieu.poirier@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1537471099-19781-1-git-send-email-mathieu.poirier@linaro.org> References: <1537471099-19781-1-git-send-email-mathieu.poirier@linaro.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Suzuki K Poulose commit 6403587a930c ("coresight: use put_device() instead of kfree()") fixes the double freeing of resources and ensures that the device refcount is dropped properly. Add a comment to explain this to help the readers and prevent people trying to "unfix" it again. While at it, rename the labels for better readability. Cc: Mathieu Poirier Cc: Arvind Yadav Signed-off-by: Suzuki K Poulose Signed-off-by: Mathieu Poirier --- drivers/hwtracing/coresight/coresight.c | 18 +++++++++++------- 1 file changed, 11 insertions(+), 7 deletions(-) -- 2.7.4 diff --git a/drivers/hwtracing/coresight/coresight.c b/drivers/hwtracing/coresight/coresight.c index 3e07fd335f8c..9fd0c387e678 100644 --- a/drivers/hwtracing/coresight/coresight.c +++ b/drivers/hwtracing/coresight/coresight.c @@ -1006,7 +1006,7 @@ struct coresight_device *coresight_register(struct coresight_desc *desc) csdev = kzalloc(sizeof(*csdev), GFP_KERNEL); if (!csdev) { ret = -ENOMEM; - goto err_kzalloc_csdev; + goto err_out; } if (desc->type == CORESIGHT_DEV_TYPE_LINK || @@ -1022,7 +1022,7 @@ struct coresight_device *coresight_register(struct coresight_desc *desc) refcnts = kcalloc(nr_refcnts, sizeof(*refcnts), GFP_KERNEL); if (!refcnts) { ret = -ENOMEM; - goto err_kzalloc_refcnts; + goto err_free_csdev; } csdev->refcnt = refcnts; @@ -1035,7 +1035,7 @@ struct coresight_device *coresight_register(struct coresight_desc *desc) conns = kcalloc(csdev->nr_outport, sizeof(*conns), GFP_KERNEL); if (!conns) { ret = -ENOMEM; - goto err_kzalloc_conns; + goto err_free_refcnts; } for (i = 0; i < csdev->nr_outport; i++) { @@ -1062,7 +1062,11 @@ struct coresight_device *coresight_register(struct coresight_desc *desc) ret = device_register(&csdev->dev); if (ret) { put_device(&csdev->dev); - goto err_kzalloc_csdev; + /* + * All resources are free'd explicitly via + * coresight_device_release(), triggered from put_device(). + */ + goto err_out; } mutex_lock(&coresight_mutex); @@ -1074,11 +1078,11 @@ struct coresight_device *coresight_register(struct coresight_desc *desc) return csdev; -err_kzalloc_conns: +err_free_refcnts: kfree(refcnts); -err_kzalloc_refcnts: +err_free_csdev: kfree(csdev); -err_kzalloc_csdev: +err_out: return ERR_PTR(ret); } EXPORT_SYMBOL_GPL(coresight_register); From patchwork Thu Sep 20 19:17:37 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mathieu Poirier X-Patchwork-Id: 147123 Delivered-To: patch@linaro.org Received: by 2002:a2e:1648:0:0:0:0:0 with SMTP id 8-v6csp2375877ljw; Thu, 20 Sep 2018 12:18:28 -0700 (PDT) X-Google-Smtp-Source: ANB0VdZ0pBDDY6rGq6kQRK4sjkT3aIt+entw9znrRLZ45cT0/2zus0ol/D9TLBzPNBpwHJf6V2jl X-Received: by 2002:a62:47d1:: with SMTP id p78-v6mr42733900pfi.197.1537471108155; Thu, 20 Sep 2018 12:18:28 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1537471108; cv=none; d=google.com; s=arc-20160816; b=XbYDwLU7+ljXHzxc56jfaF5kWJ9mMf9MbMmgwY++YosAQFcDsMb4ejA07u4ILqfv1R Yrea8ZXp/WiPwap6B5IOyfTmhoFw8tYDvLCu7UQL78Q1MzOargmLlqVBWTwqfNa1mtO4 kjjZlnExhWhyGcNVrYY4g2PlfL9fpkmnRt1poTC79cJubMrF17oWsbUMVQmSsBg7hb3g O6bBP3Ug8rNpa4Fjp/ZbzffZ8MvCsprVgA0LHdN3xSMPfsJ0i+d7scK2hRgJFQkPSEtw R5rPkpjLqzuDbCGR0aeJQeoJZSgCc92jAXNfafupIz84jdWaf2Q9BXvjwdaeNnF+XI1Z WsZA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature; bh=K210pcF1deFGvxqr7d7Nkhqm4/GdyjS5AJj692buw54=; b=NmPBX2bCiMVmJXa1V3qo40yvP3WWnrkjxAPyhuxYGVo7fAhNIqagl245L3iKv1JmhG pYXAvzk67PJLXU9d6/ALCWHn6dQVCQmMFWkbLpP61wTUQsU+5CM7o/TKXzZMLkZMIUHy p2BimLOQArDGm6jCbf0ftcSE8MxOhcJsp7hzX0V7Bmo7VU9EF9L77E1s2dJ5hZuYlU0A iQKvu0b3Y+iumnBqgiwUR/7lqRGlQqLiKXBXoOYHfC/2pYXWAOEPFquWm6Cv8UfjG+Y9 dgg6ww6fa6Gd5DpEeX9F+ib3CG869zS/rbs5HvyFmYtL76Rcr0znSq48csxf4STmOaf2 B6tA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=WJRmzXds; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id q2-v6si24665685pgd.303.2018.09.20.12.18.27; Thu, 20 Sep 2018 12:18:28 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=WJRmzXds; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2388632AbeIUBDY (ORCPT + 32 others); Thu, 20 Sep 2018 21:03:24 -0400 Received: from mail-pg1-f193.google.com ([209.85.215.193]:41091 "EHLO mail-pg1-f193.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2388566AbeIUBDX (ORCPT ); Thu, 20 Sep 2018 21:03:23 -0400 Received: by mail-pg1-f193.google.com with SMTP id s15-v6so4878133pgv.8 for ; Thu, 20 Sep 2018 12:18:24 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=K210pcF1deFGvxqr7d7Nkhqm4/GdyjS5AJj692buw54=; b=WJRmzXdsShVNUf6r/SFr1Fdmk3D8UaKvgE/iD9CulnqBx6dPjhK8oy6yh8RmuPfT76 0B4tmo5z97GCmIt8cJVcPeThw0hWJGR9j9ucR7Q1fRESHULsyLstVKU83cm4XYmmxJeL MeFPTs/hn4RMe0L3UYBgsRPqOa002vFbg71c0= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=K210pcF1deFGvxqr7d7Nkhqm4/GdyjS5AJj692buw54=; b=k+4x6A1alGt4pfdFB/kH1lu2fWygBZPnQHQWqcTldHAwsF5XDCBfs7m0LKYsAemSJs agHRxcDm0tWKDCAnvrqZ4bwN+9BnRY0U8T454lamMkQW46R6s7JgoxbREq9M6Z8ebF6F kvWlZv7iMM6dMjrivwv++FV5q9hYQznBmAXOZooelijyTlJ9qhVnley5aGygqB6lIBVr 4r3YHkvE8TT+F+n4sOVTh/apvI7w1bGcSDtKYdkyzDZVyqrPVuRPP9o6hO8sKuor9lBp HXGKrTT1PKLY8osL+ulMIUnKdJogSS3zBjRea9HLWOh3wnWOKfpjPsNzHfJeOisVF9L/ icFw== X-Gm-Message-State: APzg51AlP1uYFL7M6v1Bi1NYV7UMXsHcMUrBhOXtl2fQLCfXrnhmb7Tu eQDNAdO3QPxNSw+KaMY6Mv2WDA== X-Received: by 2002:a62:fcd2:: with SMTP id e201-v6mr43149852pfh.101.1537471104263; Thu, 20 Sep 2018 12:18:24 -0700 (PDT) Received: from localhost.localdomain ([209.121.128.187]) by smtp.gmail.com with ESMTPSA id k13-v6sm4424443pgf.37.2018.09.20.12.18.22 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 20 Sep 2018 12:18:23 -0700 (PDT) From: Mathieu Poirier To: gregkh@linuxfoundation.org Cc: linux-kernel@vger.kernel.org Subject: [PATCH 02/44] coresight: platform: Refactor graph endpoint parsing Date: Thu, 20 Sep 2018 13:17:37 -0600 Message-Id: <1537471099-19781-3-git-send-email-mathieu.poirier@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1537471099-19781-1-git-send-email-mathieu.poirier@linaro.org> References: <1537471099-19781-1-git-send-email-mathieu.poirier@linaro.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Suzuki K Poulose Refactor the of graph endpoint parsing code, to make the error handling easier. Cc: Mathieu Poirier Signed-off-by: Suzuki K Poulose Signed-off-by: Mathieu Poirier --- drivers/hwtracing/coresight/of_coresight.c | 138 +++++++++++++++++------------ 1 file changed, 83 insertions(+), 55 deletions(-) -- 2.7.4 diff --git a/drivers/hwtracing/coresight/of_coresight.c b/drivers/hwtracing/coresight/of_coresight.c index 6880bee195c8..70205f3eae8e 100644 --- a/drivers/hwtracing/coresight/of_coresight.c +++ b/drivers/hwtracing/coresight/of_coresight.c @@ -114,17 +114,70 @@ int of_coresight_get_cpu(const struct device_node *node) } EXPORT_SYMBOL_GPL(of_coresight_get_cpu); +/* + * of_coresight_parse_endpoint : Parse the given output endpoint @ep + * and fill the connection information in @pdata[@i]. + * + * Parses the local port, remote device name and the remote port. + * + * Returns : + * 1 - If the parsing is successful and a connection record + * was created for an output connection. + * 0 - If the parsing completed without any fatal errors. + * -Errno - Fatal error, abort the scanning. + */ +static int of_coresight_parse_endpoint(struct device *dev, + struct device_node *ep, + struct coresight_platform_data *pdata, + int i) +{ + int ret = 0; + struct of_endpoint endpoint, rendpoint; + struct device_node *rparent = NULL; + struct device_node *rport = NULL; + struct device *rdev = NULL; + + do { + /* Parse the local port details */ + if (of_graph_parse_endpoint(ep, &endpoint)) + break; + /* + * Get a handle on the remote port and parent + * attached to it. + */ + rparent = of_graph_get_remote_port_parent(ep); + if (!rparent) + break; + rport = of_graph_get_remote_port(ep); + if (!rport) + break; + if (of_graph_parse_endpoint(rport, &rendpoint)) + break; + + /* If the remote device is not available, defer probing */ + rdev = of_coresight_get_endpoint_device(rparent); + if (!rdev) { + ret = -EPROBE_DEFER; + break; + } + + pdata->outports[i] = endpoint.port; + pdata->child_names[i] = dev_name(rdev); + pdata->child_ports[i] = rendpoint.id; + /* Connection record updated */ + ret = 1; + } while (0); + + return ret; +} + struct coresight_platform_data * of_get_coresight_platform_data(struct device *dev, const struct device_node *node) { int i = 0, ret = 0; struct coresight_platform_data *pdata; - struct of_endpoint endpoint, rendpoint; - struct device *rdev; struct device_node *ep = NULL; - struct device_node *rparent = NULL; - struct device_node *rport = NULL; pdata = devm_kzalloc(dev, sizeof(*pdata), GFP_KERNEL); if (!pdata) @@ -132,64 +185,39 @@ of_get_coresight_platform_data(struct device *dev, /* Use device name as sysfs handle */ pdata->name = dev_name(dev); + pdata->cpu = of_coresight_get_cpu(node); /* Get the number of input and output port for this component */ of_coresight_get_ports(node, &pdata->nr_inport, &pdata->nr_outport); - if (pdata->nr_outport) { - ret = of_coresight_alloc_memory(dev, pdata); - if (ret) + /* If there are no output connections, we are done */ + if (!pdata->nr_outport) + return pdata; + + ret = of_coresight_alloc_memory(dev, pdata); + if (ret) + return ERR_PTR(ret); + + /* Iterate through each port to discover topology */ + while ((ep = of_graph_get_next_endpoint(node, ep))) { + /* + * No need to deal with input ports, as processing the + * output ports connected to them will process the details. + */ + if (of_find_property(ep, "slave-mode", NULL)) + continue; + + ret = of_coresight_parse_endpoint(dev, ep, pdata, i); + switch (ret) { + case 1: + i++; /* Fall through */ + case 0: + break; + default: return ERR_PTR(ret); - - /* Iterate through each port to discover topology */ - do { - /* Get a handle on a port */ - ep = of_graph_get_next_endpoint(node, ep); - if (!ep) - break; - - /* - * No need to deal with input ports, processing for as - * processing for output ports will deal with them. - */ - if (of_find_property(ep, "slave-mode", NULL)) - continue; - - /* Get a handle on the local endpoint */ - ret = of_graph_parse_endpoint(ep, &endpoint); - - if (ret) - continue; - - /* The local out port number */ - pdata->outports[i] = endpoint.port; - - /* - * Get a handle on the remote port and parent - * attached to it. - */ - rparent = of_graph_get_remote_port_parent(ep); - rport = of_graph_get_remote_port(ep); - - if (!rparent || !rport) - continue; - - if (of_graph_parse_endpoint(rport, &rendpoint)) - continue; - - rdev = of_coresight_get_endpoint_device(rparent); - if (!rdev) - return ERR_PTR(-EPROBE_DEFER); - - pdata->child_names[i] = dev_name(rdev); - pdata->child_ports[i] = rendpoint.id; - - i++; - } while (ep); + } } - pdata->cpu = of_coresight_get_cpu(node); - return pdata; } EXPORT_SYMBOL_GPL(of_get_coresight_platform_data); From patchwork Thu Sep 20 19:17:38 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mathieu Poirier X-Patchwork-Id: 147124 Delivered-To: patch@linaro.org Received: by 2002:a2e:1648:0:0:0:0:0 with SMTP id 8-v6csp2375907ljw; Thu, 20 Sep 2018 12:18:30 -0700 (PDT) X-Google-Smtp-Source: ANB0Vdb3h6Z7X+AC0Dx5Lr2nl/S6yqShR1HVRXfRK5NlZ3dAthORQOiakeu19q8OasTnkZaMuywN X-Received: by 2002:a65:5304:: with SMTP id m4-v6mr38769580pgq.250.1537471110000; Thu, 20 Sep 2018 12:18:30 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1537471109; cv=none; d=google.com; s=arc-20160816; b=dGe7cosSydEy3UwfBI0tuetm9xMEi3bB7re5+9O2X/smEzzh9paKdD3qDMKNw6wHGm HmGCQoCwdrNQTOswVsgCf2jxd4GGwCRVoPtkxm5hjPNChEaLh9fE7KMbZXdNKWPUSFII v1avcAGz47VlPzf6+lL3GPfEd902shi9Y2fyzPHNWjEm3YSVNz6MRS9S0x5pOMdpb681 3V3F/hI3DaKU3SMayRqaNmWJxCdRyXzGIJ2Y9Ju3FVnj9CTxUMWwJfDz3QV6QH7A6fZS Pl7AP06Akyj9nfPeCzKU5ROdfcGDGeUrBGfCil1Fstjom8x2Ng62POwqLD2wnfHUzWQa lTBw== ARC-Message-Signature: i=1; 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[209.132.180.67]) by mx.google.com with ESMTP id j15-v6si24208207pgm.502.2018.09.20.12.18.29; Thu, 20 Sep 2018 12:18:29 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=W8aAZlC5; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2388646AbeIUBDZ (ORCPT + 32 others); Thu, 20 Sep 2018 21:03:25 -0400 Received: from mail-pg1-f196.google.com ([209.85.215.196]:42194 "EHLO mail-pg1-f196.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2388617AbeIUBDY (ORCPT ); Thu, 20 Sep 2018 21:03:24 -0400 Received: by mail-pg1-f196.google.com with SMTP id y4-v6so4874853pgp.9 for ; Thu, 20 Sep 2018 12:18:26 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=DQ6AeLYKgMl29948+vO+BNj/3zw6RiFnxzOn0pmvo2w=; b=W8aAZlC5ejzWl3bXMcYMponk+ydOQp/GrRVqdwtCF4bWGfFl+Xn487HB7B43L1jNke W2l7wP95SCU/Alscsv/SqryhVZJPu3YmflQi7r4qFwkZ8PGH+M46fJglrGEP4ylXNKPk W09/QfHEnh4W0w7OEnAm/JxaZOZ2BzGMlttb4= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=DQ6AeLYKgMl29948+vO+BNj/3zw6RiFnxzOn0pmvo2w=; b=dNXv0liPY+uN/Gawz//jFTBGETdyvaiqwYlQB4ooy9XeWtfHXnglv8Vo2txdx6qYNy H5ww1jkS7UpG0/Cs7ikPi7uMJmZoh5wF+druaxM2i/DAcpvhyoq7was3pLPEKqNZPi6g Ew+iPSkKB9DRebe9z8M0s9KT/x+2Eh1+62v2N+PTsPbd9bzzAm1mK0y4G5f8IyMRGrIN VqeVEG0ME1XbGU5EVJe+DQUtzICgRassPjm3iLRZbBJD4hWkiCg1cpgRgLfxYcxhQMyE GprKwHDMVVKOT1kWw6NFD8o3s7yHpM8IdZiXNZzTiaR0G48PzsoWwoAGq0ALPZn/lRaG ownQ== X-Gm-Message-State: APzg51B1IAI7NwybVZqg7X5ku673lz8OHVvU80xPue6HszoAlfDjddGb Eboy9IMN5d6KCS6xWHmVFvkT/Q== X-Received: by 2002:a62:5cc1:: with SMTP id q184-v6mr43397619pfb.241.1537471105761; Thu, 20 Sep 2018 12:18:25 -0700 (PDT) Received: from localhost.localdomain ([209.121.128.187]) by smtp.gmail.com with ESMTPSA id k13-v6sm4424443pgf.37.2018.09.20.12.18.24 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 20 Sep 2018 12:18:24 -0700 (PDT) From: Mathieu Poirier To: gregkh@linuxfoundation.org Cc: linux-kernel@vger.kernel.org Subject: [PATCH 03/44] coresight: platform: Fix refcounting for graph nodes Date: Thu, 20 Sep 2018 13:17:38 -0600 Message-Id: <1537471099-19781-4-git-send-email-mathieu.poirier@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1537471099-19781-1-git-send-email-mathieu.poirier@linaro.org> References: <1537471099-19781-1-git-send-email-mathieu.poirier@linaro.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Suzuki K Poulose The coresight driver doesn't drop the references on the remote endpoint/port nodes. Add the missing of_node_put() calls. Reported-by: Mathieu Poirier Signed-off-by: Suzuki K Poulose Signed-off-by: Mathieu Poirier --- drivers/hwtracing/coresight/of_coresight.c | 5 +++++ 1 file changed, 5 insertions(+) -- 2.7.4 diff --git a/drivers/hwtracing/coresight/of_coresight.c b/drivers/hwtracing/coresight/of_coresight.c index 70205f3eae8e..28d3aef1660b 100644 --- a/drivers/hwtracing/coresight/of_coresight.c +++ b/drivers/hwtracing/coresight/of_coresight.c @@ -168,6 +168,11 @@ static int of_coresight_parse_endpoint(struct device *dev, ret = 1; } while (0); + if (rparent) + of_node_put(rparent); + if (rport) + of_node_put(rport); + return ret; } From patchwork Thu Sep 20 19:17:39 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mathieu Poirier X-Patchwork-Id: 147125 Delivered-To: patch@linaro.org Received: by 2002:a2e:1648:0:0:0:0:0 with SMTP id 8-v6csp2375927ljw; Thu, 20 Sep 2018 12:18:31 -0700 (PDT) X-Google-Smtp-Source: ANB0VdaEvG2hbDsJHF7Qy1DOQbIyIlbsU1agtTxT2CixAvYls6adNz5/IACdHKuXFU5ky3xTs4mL X-Received: by 2002:a17:902:a405:: with SMTP id p5-v6mr40636696plq.222.1537471111546; Thu, 20 Sep 2018 12:18:31 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1537471111; cv=none; d=google.com; s=arc-20160816; b=0YE6ECxbGd7US7hXlR2i43Sg9503po2BuaBe2Hpk+Q86ZlhofYf66r+6Zd7dAcebUv I7h+f6BNCg7TtrFkV7cDfkGgmKj88whCzMQUefui4eCA5KJo0kXhlULkV6L+GepHvxos V7etWZOK91cDinERXlzUs+LO16nGSVOxUC4VXEkpIoFCusXm7iYDXeijUxWNUtWPxjHu fx1MVdB5qn7vVrKcEQrswVmSc46QTVFWI1ubX8tawwYQx9qDYUxITM/2WpDlMORgcfgn 5r4oBcqGxN+m1lJCcOAV0Gr4J+VDCe617CuNPupHbLcgJDVsXDR2EHZnOjrwwX3j917y jTbg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature; bh=eF89dC211phJ/o1YWVyp4RY+3QE6f2Ht0jxF9gJ+Hsw=; b=egx1fgdv1n7Rezl8gly0QZZ8/bev4ib4eQ4Guj5syLUVD+qf2XyxUbBlnzWmHTAnO5 77a4PgOcyBo+r+oUiRnZZUZKT79PsVTNXdUu4mkHKLktvMPqoqWsCNk/035iyLQw0yDS uk8ZrJ2S6f6QlGUKuQ5PGWonR65f3sjsQJ4Yub9RzwIYepYTK7BC5P9NvaNCCpgtd174 umeuVyYZYvpfvE5OvEFCo9nNRiRPJASIk6kEt8ay661bKo73vqTeMc7EYoJ22n6exX5Y /XFjMADct5IsnRMgUvM+X8/9qYLdZvSRNFGcFOyQW+O/+s+DglF/E+Ur+qoZd4QEeSy4 HuTQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=IOiqhG0Z; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id t13-v6si26599001pfc.194.2018.09.20.12.18.31; Thu, 20 Sep 2018 12:18:31 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=IOiqhG0Z; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2388663AbeIUBD1 (ORCPT + 32 others); Thu, 20 Sep 2018 21:03:27 -0400 Received: from mail-pf1-f193.google.com ([209.85.210.193]:44164 "EHLO mail-pf1-f193.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2388617AbeIUBD0 (ORCPT ); Thu, 20 Sep 2018 21:03:26 -0400 Received: by mail-pf1-f193.google.com with SMTP id k21-v6so4811694pff.11 for ; Thu, 20 Sep 2018 12:18:27 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=eF89dC211phJ/o1YWVyp4RY+3QE6f2Ht0jxF9gJ+Hsw=; b=IOiqhG0ZxY4l4OUYmyy3hVpYx/Li3dpgxhA74liU/HAO4yMwDnWb5CrMBpgZqmCClb e3hD4OR839R5o2VElvqYOHaLxri0nwS5JpI2mzMLuGdaEzCCl3hpnk9ECkU0ya/beQzG VldY3GY2wRKJ8TuuG8eCLcR3SAiyJuaydqEm0= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=eF89dC211phJ/o1YWVyp4RY+3QE6f2Ht0jxF9gJ+Hsw=; b=gjr2w2HfhjVh+tYZZbI1j+pRa8xMD5Nb1575YgJaZnNQUNtUahas7WKTraVf5PnK+g kY3XEZ6tkMhzQI22t6I/+wwsjfmiXkPyeHW0R2Dz4NsBsOTQk5OpMp/kgGRcLXrzMutX DNnVxbgKa+ZyFTy+OaGYFTPFi7D3DVFnfNhBGiwYmkTPv3ltYHEW/Ge8LBPkx63nHsk+ qa63HIEPMo05eANeocD8NIdZx7zEp1Ea+LyC6DIWZ3J9lQVkumdW7ABfO/mU0lJ+gR32 pel+ZdeaEu2nA9GlmYkLlZOv+toP3PuFzBcH3et+GkMLyW2Rm6okdaWQgc5GX+Zx5nW+ Kmhg== X-Gm-Message-State: APzg51BXBQRi/iSWIAjicPOKW8Wvuy94TsJ7V6/RqB0C11Jt/31SR2Ys KYwGGhTRnqW+Ti9y3fujykeQiw== X-Received: by 2002:a63:7107:: with SMTP id m7-v6mr37801119pgc.73.1537471107422; Thu, 20 Sep 2018 12:18:27 -0700 (PDT) Received: from localhost.localdomain ([209.121.128.187]) by smtp.gmail.com with ESMTPSA id k13-v6sm4424443pgf.37.2018.09.20.12.18.25 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 20 Sep 2018 12:18:26 -0700 (PDT) From: Mathieu Poirier To: gregkh@linuxfoundation.org Cc: linux-kernel@vger.kernel.org Subject: [PATCH 04/44] coresight: platform: Fix leaking device reference Date: Thu, 20 Sep 2018 13:17:39 -0600 Message-Id: <1537471099-19781-5-git-send-email-mathieu.poirier@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1537471099-19781-1-git-send-email-mathieu.poirier@linaro.org> References: <1537471099-19781-1-git-send-email-mathieu.poirier@linaro.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Suzuki K Poulose We don't drop the reference on the remote device while parsing the connection, held by bus_find_device(). Fix this by duplicating the device name and dropping the reference. Cc: Mathieu Poirier Cc: Kim Phillips Signed-off-by: Suzuki K Poulose Signed-off-by: Mathieu Poirier --- drivers/hwtracing/coresight/of_coresight.c | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) -- 2.7.4 diff --git a/drivers/hwtracing/coresight/of_coresight.c b/drivers/hwtracing/coresight/of_coresight.c index 28d3aef1660b..4b279f8fea0c 100644 --- a/drivers/hwtracing/coresight/of_coresight.c +++ b/drivers/hwtracing/coresight/of_coresight.c @@ -162,7 +162,9 @@ static int of_coresight_parse_endpoint(struct device *dev, } pdata->outports[i] = endpoint.port; - pdata->child_names[i] = dev_name(rdev); + pdata->child_names[i] = devm_kstrdup(dev, + dev_name(rdev), + GFP_KERNEL); pdata->child_ports[i] = rendpoint.id; /* Connection record updated */ ret = 1; @@ -172,6 +174,8 @@ static int of_coresight_parse_endpoint(struct device *dev, of_node_put(rparent); if (rport) of_node_put(rport); + if (rdev) + put_device(rdev); return ret; } From patchwork Thu Sep 20 19:17:40 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mathieu Poirier X-Patchwork-Id: 147126 Delivered-To: patch@linaro.org Received: by 2002:a2e:1648:0:0:0:0:0 with SMTP id 8-v6csp2375932ljw; Thu, 20 Sep 2018 12:18:32 -0700 (PDT) X-Google-Smtp-Source: ANB0Vdbl1gMEFYCpQCM4rb+Cse1qQafajX8LtRPUp/R4ibfCQK2aELeiI58Z8RwMzOQYmRCpoiiE X-Received: by 2002:a63:4909:: with SMTP id w9-v6mr1164274pga.123.1537471112185; Thu, 20 Sep 2018 12:18:32 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1537471112; cv=none; d=google.com; s=arc-20160816; b=hNYA9szf6tR09tEYO/SDJVLyqA6+rSTg0uCcp4Ij2tCFH4/3+/6vIR2SUZlKUNVjsi hnKe7eGYYCW5lmC50qRcjc2tX2D1guOLTRVwzbefdExWO/o9qUrviBezmjhN7BcDo0Dm lVLR16pCswbPMMal+BVdDjH3KDBOl+VFeU4zNbgNX1FsLScSa2BJKQx/7S66dOKhk3sm ocMPipRJwx4rzHbz6vDhgdjPo9nMny8A2f9iZ8N8QmGkCVc6zgzel/PwWh11WueKljSA ZsGRzbuI4ZlW7nmsipzq+CPIwBwEuWbRE0GgxDkfcgL1gLBw6VcO7lGnez1L0DgFL7yp LYKg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature; bh=1I05pDEl9YDQOPdvRPriVg9w4n3vH5AzvtyzOmauupU=; b=r2xEWqMuzowWm224etEqUJUe2MYBR/gNiiMDedAGU3LBW67+rTpwKxpYzTEf6zStQ7 RxejenCRL5e4WmCNTN6qDDqDn149bgl0QEnclgsGGalUiTb8CSCY0SRx0juhP77GM/Dj gTS2g/3bvQVPuj6KBtbBouzmi3zXWPKEW0N5WUXTaNlO9jVQHuoK/vtfCTIGU/yJ6Wb4 R4/yYOCO6KKFJr+4kZ9n6uOwCqqJtRm3THC3s6CcGkEr1sE6Ry1eH9VjSv6G49t86IXU IWbYJSXUVsrF2tiEhyjGs/nKtoTIsJ+MfqVjjzEm0vwtMHTFrVU5F+79fag/eGE+cWgK n04A== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=AFXnTFun; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id t13-v6si26599001pfc.194.2018.09.20.12.18.31; Thu, 20 Sep 2018 12:18:32 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=AFXnTFun; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2388679AbeIUBD2 (ORCPT + 32 others); Thu, 20 Sep 2018 21:03:28 -0400 Received: from mail-pl1-f194.google.com ([209.85.214.194]:38249 "EHLO mail-pl1-f194.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2388652AbeIUBD1 (ORCPT ); Thu, 20 Sep 2018 21:03:27 -0400 Received: by mail-pl1-f194.google.com with SMTP id u11-v6so4799553plq.5 for ; Thu, 20 Sep 2018 12:18:29 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=1I05pDEl9YDQOPdvRPriVg9w4n3vH5AzvtyzOmauupU=; b=AFXnTFunALZucfagVHzD8O6hubQF08TjXfiUNUNeDvJ1F6KOosTEBz4ucMLAc5G0Oe 7yFl5oEDsiDQipnMjDIu3CiqEpT0jzgGywiE4cfDyM792fcfRykgBYgrcMQU1vOgKiJJ 6S9vUVQD4XUKIAst+Gg5yyPlbZJKgXIPj+vUQ= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=1I05pDEl9YDQOPdvRPriVg9w4n3vH5AzvtyzOmauupU=; b=Y2pjoOs17qiabP+GbvX8W9cngQ7wDTmv4Fnu+4lb8t1Yp/8OtGIAef8TM0IBnooP0v /Pf271rlEDMcndTXvwW5zizTUKQ6VPqSST2/6n4221Q4kkIyO93pBL4RM8ODb4inAKxz 32bFPsfpUFQ0sY0xUFqdL/p26V9EfN18pCL/7JYF8Dptmk2yNPBYDBH0VPzPJo6Q8IrJ Zkwuc3dkvRXbnpIgfHreoreRAHRlcoyuo9qJK2E0v+ld2Bov+lkNlnzc/Y8SVS7cWNBO /yjASJ3Xiqpsv12BbA38xB6VnKs7/Lvth3m8wevFbf+QhbkJfTyQpy8a7gtY8qEBYT53 tfHg== X-Gm-Message-State: APzg51C/8Auz0yMSz+gbwbZr3YN5T0QkY9UbAkGn0uIc9OcvuxxF+jeQ fvCKpF90t54dkFX1qveTVOyntw== X-Received: by 2002:a17:902:d881:: with SMTP id b1-v6mr41058327plz.191.1537471108949; Thu, 20 Sep 2018 12:18:28 -0700 (PDT) Received: from localhost.localdomain ([209.121.128.187]) by smtp.gmail.com with ESMTPSA id k13-v6sm4424443pgf.37.2018.09.20.12.18.27 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 20 Sep 2018 12:18:27 -0700 (PDT) From: Mathieu Poirier To: gregkh@linuxfoundation.org Cc: linux-kernel@vger.kernel.org Subject: [PATCH 05/44] coresight: Fix remote endpoint parsing Date: Thu, 20 Sep 2018 13:17:40 -0600 Message-Id: <1537471099-19781-6-git-send-email-mathieu.poirier@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1537471099-19781-1-git-send-email-mathieu.poirier@linaro.org> References: <1537471099-19781-1-git-send-email-mathieu.poirier@linaro.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Suzuki K Poulose When parsing the remote endpoint of an output port, we do : rport = of_graph_get_remote_port(ep); rparent = of_graph_get_remote_port_parent(ep); and then parse the "remote_port" as if it was the remote endpoint, which is wrong. The code worked fine because we used endpoint number as the port number. Let us fix it and optimise a bit as: remote_ep = of_graph_get_remote_endpoint(ep); if (remote_ep) remote_parent = of_graph_get_port_parent(remote_ep); and then, parse the remote_ep for the port/endpoint details. Signed-off-by: Suzuki K Poulose Signed-off-by: Mathieu Poirier --- drivers/hwtracing/coresight/of_coresight.c | 22 +++++++++++----------- 1 file changed, 11 insertions(+), 11 deletions(-) -- 2.7.4 diff --git a/drivers/hwtracing/coresight/of_coresight.c b/drivers/hwtracing/coresight/of_coresight.c index 4b279f8fea0c..2ecdd1432b5c 100644 --- a/drivers/hwtracing/coresight/of_coresight.c +++ b/drivers/hwtracing/coresight/of_coresight.c @@ -134,7 +134,7 @@ static int of_coresight_parse_endpoint(struct device *dev, int ret = 0; struct of_endpoint endpoint, rendpoint; struct device_node *rparent = NULL; - struct device_node *rport = NULL; + struct device_node *rep = NULL; struct device *rdev = NULL; do { @@ -142,16 +142,16 @@ static int of_coresight_parse_endpoint(struct device *dev, if (of_graph_parse_endpoint(ep, &endpoint)) break; /* - * Get a handle on the remote port and parent - * attached to it. + * Get a handle on the remote endpoint and the device it is + * attached to. */ - rparent = of_graph_get_remote_port_parent(ep); - if (!rparent) + rep = of_graph_get_remote_endpoint(ep); + if (!rep) break; - rport = of_graph_get_remote_port(ep); - if (!rport) + rparent = of_graph_get_port_parent(rep); + if (!rparent) break; - if (of_graph_parse_endpoint(rport, &rendpoint)) + if (of_graph_parse_endpoint(rep, &rendpoint)) break; /* If the remote device is not available, defer probing */ @@ -165,15 +165,15 @@ static int of_coresight_parse_endpoint(struct device *dev, pdata->child_names[i] = devm_kstrdup(dev, dev_name(rdev), GFP_KERNEL); - pdata->child_ports[i] = rendpoint.id; + pdata->child_ports[i] = rendpoint.port; /* Connection record updated */ ret = 1; } while (0); if (rparent) of_node_put(rparent); - if (rport) - of_node_put(rport); + if (rep) + of_node_put(rep); if (rdev) put_device(rdev); From patchwork Thu Sep 20 19:17:41 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mathieu Poirier X-Patchwork-Id: 147127 Delivered-To: patch@linaro.org Received: by 2002:a2e:1648:0:0:0:0:0 with SMTP id 8-v6csp2375976ljw; Thu, 20 Sep 2018 12:18:34 -0700 (PDT) X-Google-Smtp-Source: ANB0VdYNnRMDrG19sT7Aoncq+HX9iOeGOSMcJWcCoBWTR94Ly5oKbjfVb5++syjG2qH3iksQRFA4 X-Received: by 2002:a62:2b50:: with SMTP id r77-v6mr42484656pfr.51.1537471114362; Thu, 20 Sep 2018 12:18:34 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1537471114; cv=none; d=google.com; s=arc-20160816; b=HuQMrGqHtDO+Pm//Th3U5soN5otGzKth2T9gDg8EQWeFMmifavmneKTdfsnt/SAenZ ainMOLoywKAswVVN+3pccmQTBZmbORljFhK7MWyGaCVdA5QoooyOm8IzD4v2y+eGSMHd 3woSh8UmDxjXcPTXTsFyYwF6yBg+HRhR0FcAvI9rFnL6CdHFt/AAnSWOVHeI6ePmyRko 9MsuI4Wx1sMeRqUgkCd6j99OjKk+MNhE8zTx8SJdianBLuO8GQJU++LU+1lrnaNsb2+h mEY6X7c+cw+ZA73ag2MCBrHWVFrtY9ooXyGyWIcteHsRl8ZHjBWCT2OXmV5pznFJvBUK 3YHA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature; bh=se2ngb5czU9sEE2MR3i6PgGpYjHvr4Xt9ePRt1rOif0=; b=S0SIKjNRzINhGZdO5DAfquVUGg0XCCmhTAF7rwls4B/8L4gB7v9vgfyBQlR352Y1qs TvWvbdRygdQBfJMCbjr4321o0u825w0QSDVZ0CGYDCoLOQhFvAXYD+BfiFAOJfZmI7kc qZTRpftK4qZwzBjrrSxn2hXoByPrtdqo4FAo6YW10x7/U341ibbRwBqb43Zw1ju4d7oR +yXcVgOWGw0jph5IPoKfeNxOYjynk51M+UkhLLijRp6LnUgcTKujGCyC1frHUICvI0cb XW66WZFOeW8VWwDHYGifuJlKe3zLPMp0Fn/hc9nTn1BI30vMH6Oaa2ixBeSUzMSS5Y5P MYzw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=NXJTDcN5; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id k17-v6si25698121pfj.321.2018.09.20.12.18.34; Thu, 20 Sep 2018 12:18:34 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=NXJTDcN5; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2388694AbeIUBDa (ORCPT + 32 others); Thu, 20 Sep 2018 21:03:30 -0400 Received: from mail-pf1-f196.google.com ([209.85.210.196]:36591 "EHLO mail-pf1-f196.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2388617AbeIUBD3 (ORCPT ); Thu, 20 Sep 2018 21:03:29 -0400 Received: by mail-pf1-f196.google.com with SMTP id b11-v6so4830433pfo.3 for ; Thu, 20 Sep 2018 12:18:31 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=se2ngb5czU9sEE2MR3i6PgGpYjHvr4Xt9ePRt1rOif0=; b=NXJTDcN5ebVyQlFFv5G0Tf9cVLs4SmPg84ZTxuck0EW4c5RUEdZXPw9C5SNTJcquK9 4KuN3wE984ejX5g2b/fkRVejX82GSdlLiu7zubCwyH4sOceixPCYQaIPe4ipBXhJnf5b DMldrEu6UGBnu/IGdnI4UkRWmqVVYdaLY8YNg= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=se2ngb5czU9sEE2MR3i6PgGpYjHvr4Xt9ePRt1rOif0=; b=Zo0/glb0zAabEHDAeaH/kQCKTbfRiqWcZqnYGM5fpo5JFLG5pj98EtJUDG8pqSiFZw JJVvWoqLCCMU32NFPUO69nFSqd+faFYVVLPt+1AXN+RnLu1o271eVgobhtZ7UMU/VCeO RoUufUR7GTcFw989eH9ZUJEImj7YoS5JXkevwRBIiFHCJwFgDY2aWs0Ii1tCqEKJln9x KDBpAWaUFygQgGoe3GJCJw+XEFCTZyTAsvXkLLSTR+N72mqO/aHFlcRyp2R4ywA+ajz1 ++iEb/Byf6CcNoh4h+YoIxrflYYGciuGlz0z4MU/thhmiW+A8sliJLCVF2HXjoZZ/4Rv c73Q== X-Gm-Message-State: APzg51ALc/QPbWE0GDuspxZv1Jj5s8A1UL00xxk8drRJumtoEEohGGyp t8/vVxyfX7VbKT23FamGVK/szw== X-Received: by 2002:a63:df04:: with SMTP id u4-v6mr39015149pgg.434.1537471110752; Thu, 20 Sep 2018 12:18:30 -0700 (PDT) Received: from localhost.localdomain ([209.121.128.187]) by smtp.gmail.com with ESMTPSA id k13-v6sm4424443pgf.37.2018.09.20.12.18.29 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 20 Sep 2018 12:18:29 -0700 (PDT) From: Mathieu Poirier To: gregkh@linuxfoundation.org Cc: linux-kernel@vger.kernel.org Subject: [PATCH 06/44] coresight: Add helper to check if the endpoint is input Date: Thu, 20 Sep 2018 13:17:41 -0600 Message-Id: <1537471099-19781-7-git-send-email-mathieu.poirier@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1537471099-19781-1-git-send-email-mathieu.poirier@linaro.org> References: <1537471099-19781-1-git-send-email-mathieu.poirier@linaro.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Suzuki K Poulose Add a helper to check if the given endpoint is input. Cc: Mathieu Poirier Signed-off-by: Suzuki K Poulose Signed-off-by: Mathieu Poirier --- drivers/hwtracing/coresight/of_coresight.c | 9 +++++++-- 1 file changed, 7 insertions(+), 2 deletions(-) -- 2.7.4 diff --git a/drivers/hwtracing/coresight/of_coresight.c b/drivers/hwtracing/coresight/of_coresight.c index 2ecdd1432b5c..44903d35009f 100644 --- a/drivers/hwtracing/coresight/of_coresight.c +++ b/drivers/hwtracing/coresight/of_coresight.c @@ -45,6 +45,11 @@ of_coresight_get_endpoint_device(struct device_node *endpoint) endpoint, of_dev_node_match); } +static inline bool of_coresight_ep_is_input(struct device_node *ep) +{ + return of_property_read_bool(ep, "slave-mode"); +} + static void of_coresight_get_ports(const struct device_node *node, int *nr_inport, int *nr_outport) { @@ -56,7 +61,7 @@ static void of_coresight_get_ports(const struct device_node *node, if (!ep) break; - if (of_property_read_bool(ep, "slave-mode")) + if (of_coresight_ep_is_input(ep)) in++; else out++; @@ -213,7 +218,7 @@ of_get_coresight_platform_data(struct device *dev, * No need to deal with input ports, as processing the * output ports connected to them will process the details. */ - if (of_find_property(ep, "slave-mode", NULL)) + if (of_coresight_ep_is_input(ep)) continue; ret = of_coresight_parse_endpoint(dev, ep, pdata, i); From patchwork Thu Sep 20 19:17:42 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mathieu Poirier X-Patchwork-Id: 147128 Delivered-To: patch@linaro.org Received: by 2002:a2e:1648:0:0:0:0:0 with SMTP id 8-v6csp2376035ljw; Thu, 20 Sep 2018 12:18:36 -0700 (PDT) X-Google-Smtp-Source: ANB0VdZ58/JLZsyx2JjlI8ffs6GGQVCeA4T8TPpb6dyb7l+8XVhHkITYjcIQ5UNapT0lzaOcAiXD X-Received: by 2002:a62:3001:: with SMTP id w1-v6mr42608780pfw.19.1537471116498; Thu, 20 Sep 2018 12:18:36 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1537471116; cv=none; d=google.com; s=arc-20160816; b=rz92wdhbG3z3lBqtEqfE2YuO8KwuDO7HzluQ6yCcFeCYdJdXxLvF0Yile87tm9esAp 5bxk4TQlgdrjAwkSV9HQ9/pmEMFh3a0hDCycGHahHdibPetiD0zZGleKOofEuZym4QFO z1SsK3hjaL8YsyKSN2nOsBlpFTwbFNWyMiPlqV+3dGIoVc3Lfyj86DJPv3TKHAYyrj8Z 3mlOx1ugUxwGL+r93sBOGEZMlIqDHxSLzKAqQ6SDg200KYxJxuQEM0cdp+LKnGMMJdH5 BYBskY4xXekoWewTbAfuK478kTCkLqFnHkTzjVmFjYEPrRDWFxC4xNefFwZyCsjwnEk4 i6iQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature; bh=+l6miTx0bPUP17QuEfmjwVvk2Jma2rGvsaL51T/exTk=; b=gDZFyp6RJp9LuEq2NyyV617snY+UOgE7eSr9jMym4ppXe2gzBBv4aje02NuWU1TSfM TwfozZHTyR/2u5noj4bVWjJFFCcqs0J2vK5nPAi7bYXfpx+HK3MD7ivjjHfvuoUyt//c vGoz5Gq7l6rm8Jl8UlSwkNOksMwP823dQcEkrDaUVkKwjpOAUMHF9IQnrufWdmQfjrs1 y/M8q9mrkAD3kemb+d+sejjz3b203TcX7kImUAJhR/pxS+fkzXB5ruwtCfJZSmLWeuZe nnamtU+vzE9cFKLkn12XiP7lGoRhfhnttd83LlfhXhH8HBKrP3Y/4vR7kMyN97CA+voA p09g== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=UiGmagt+; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id c4-v6si25560634pfa.285.2018.09.20.12.18.36; Thu, 20 Sep 2018 12:18:36 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=UiGmagt+; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2388716AbeIUBDc (ORCPT + 32 others); Thu, 20 Sep 2018 21:03:32 -0400 Received: from mail-pl1-f195.google.com ([209.85.214.195]:42107 "EHLO mail-pl1-f195.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2388617AbeIUBDb (ORCPT ); Thu, 20 Sep 2018 21:03:31 -0400 Received: by mail-pl1-f195.google.com with SMTP id g23-v6so4786269plq.9 for ; Thu, 20 Sep 2018 12:18:32 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=+l6miTx0bPUP17QuEfmjwVvk2Jma2rGvsaL51T/exTk=; b=UiGmagt+EdiUAqc2d1bwT8IVVejh37CF01kfLf9o3oruiYz12MIfmT89pGPN/mXOqY xyiFaN2O7/9x8qHsZ9i38H0ketYiXaP4fKACYPpW2RMRSWtcz1z78vL/ECntVDg8Eyle oWNCkt8Ultc6bXfKdFagrOkZ9O9hkQme1NKn0= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=+l6miTx0bPUP17QuEfmjwVvk2Jma2rGvsaL51T/exTk=; b=HtF1Qp3eKBwrv5IW/NGx8QELRMBrvNGltjzXBmPU2fQO9VsevvkWPoNmIjcf9DZMv6 T9DJQG+KAXk9poXtoVqSZ42IzWnhibs/FjSkpXqfRVkZhOlT7L/X/Gei9iz7ZFAprRtG AYZwQl5OEzNWlXvpZdnz/tAR0PN4fjIXicg/k/fAl17SRm4yuOJ3WpLOUSsNzy9gNnJL TAfp+vzGN6CJnjndCDo+eUWui8Je3pfOLyQGQaf+KiPzURHq4T30NB5mDJR2u4Gzab/A cgpp8XHREMn+qClCnfMEGb0ud6ZILNrdgU+vnwl+TnpDf27nI4sozjD7uaDumSvVnqvT 9BNw== X-Gm-Message-State: APzg51B/Z6eIYMCGH8V2gwayYFgpVsyfmMQ66asyFae5Tjb1VrGOnxTg bgUqyJl+PZNjJLCaw8dsxwGYo3H2lIs= X-Received: by 2002:a17:902:7291:: with SMTP id d17-v6mr5751917pll.260.1537471112260; Thu, 20 Sep 2018 12:18:32 -0700 (PDT) Received: from localhost.localdomain ([209.121.128.187]) by smtp.gmail.com with ESMTPSA id k13-v6sm4424443pgf.37.2018.09.20.12.18.30 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 20 Sep 2018 12:18:31 -0700 (PDT) From: Mathieu Poirier To: gregkh@linuxfoundation.org Cc: linux-kernel@vger.kernel.org Subject: [PATCH 07/44] coresight: platform: Cleanup coresight connection handling Date: Thu, 20 Sep 2018 13:17:42 -0600 Message-Id: <1537471099-19781-8-git-send-email-mathieu.poirier@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1537471099-19781-1-git-send-email-mathieu.poirier@linaro.org> References: <1537471099-19781-1-git-send-email-mathieu.poirier@linaro.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Suzuki K Poulose The platform code parses the component connections and populates a platform-description of the output connections in arrays of fields (which is never freed). This is later copied in the coresight_register to a newly allocated area, represented by coresight_connection(s). This patch cleans up the code dealing with connections by making use of the "coresight_connection" structure right at the platform code and lets the generic driver simply re-use information provided by the platform. Thus making it reader friendly as well as avoiding the wastage of unused memory. Signed-off-by: Suzuki K Poulose Signed-off-by: Mathieu Poirier --- drivers/hwtracing/coresight/coresight.c | 21 +----------- drivers/hwtracing/coresight/of_coresight.c | 53 +++++++++++------------------- include/linux/coresight.h | 9 ++--- 3 files changed, 22 insertions(+), 61 deletions(-) -- 2.7.4 diff --git a/drivers/hwtracing/coresight/coresight.c b/drivers/hwtracing/coresight/coresight.c index 9fd0c387e678..5e8880ca8078 100644 --- a/drivers/hwtracing/coresight/coresight.c +++ b/drivers/hwtracing/coresight/coresight.c @@ -995,13 +995,11 @@ postcore_initcall(coresight_init); struct coresight_device *coresight_register(struct coresight_desc *desc) { - int i; int ret; int link_subtype; int nr_refcnts = 1; atomic_t *refcnts = NULL; struct coresight_device *csdev; - struct coresight_connection *conns = NULL; csdev = kzalloc(sizeof(*csdev), GFP_KERNEL); if (!csdev) { @@ -1030,22 +1028,7 @@ struct coresight_device *coresight_register(struct coresight_desc *desc) csdev->nr_inport = desc->pdata->nr_inport; csdev->nr_outport = desc->pdata->nr_outport; - /* Initialise connections if there is at least one outport */ - if (csdev->nr_outport) { - conns = kcalloc(csdev->nr_outport, sizeof(*conns), GFP_KERNEL); - if (!conns) { - ret = -ENOMEM; - goto err_free_refcnts; - } - - for (i = 0; i < csdev->nr_outport; i++) { - conns[i].outport = desc->pdata->outports[i]; - conns[i].child_name = desc->pdata->child_names[i]; - conns[i].child_port = desc->pdata->child_ports[i]; - } - } - - csdev->conns = conns; + csdev->conns = desc->pdata->conns; csdev->type = desc->type; csdev->subtype = desc->subtype; @@ -1078,8 +1061,6 @@ struct coresight_device *coresight_register(struct coresight_desc *desc) return csdev; -err_free_refcnts: - kfree(refcnts); err_free_csdev: kfree(csdev); err_out: diff --git a/drivers/hwtracing/coresight/of_coresight.c b/drivers/hwtracing/coresight/of_coresight.c index 44903d35009f..e8fb4e124744 100644 --- a/drivers/hwtracing/coresight/of_coresight.c +++ b/drivers/hwtracing/coresight/of_coresight.c @@ -75,29 +75,13 @@ static void of_coresight_get_ports(const struct device_node *node, static int of_coresight_alloc_memory(struct device *dev, struct coresight_platform_data *pdata) { - /* List of output port on this component */ - pdata->outports = devm_kcalloc(dev, - pdata->nr_outport, - sizeof(*pdata->outports), - GFP_KERNEL); - if (!pdata->outports) - return -ENOMEM; - - /* Children connected to this component via @outports */ - pdata->child_names = devm_kcalloc(dev, - pdata->nr_outport, - sizeof(*pdata->child_names), - GFP_KERNEL); - if (!pdata->child_names) - return -ENOMEM; - - /* Port number on the child this component is connected to */ - pdata->child_ports = devm_kcalloc(dev, - pdata->nr_outport, - sizeof(*pdata->child_ports), - GFP_KERNEL); - if (!pdata->child_ports) - return -ENOMEM; + if (pdata->nr_outport) { + pdata->conns = devm_kzalloc(dev, pdata->nr_outport * + sizeof(*pdata->conns), + GFP_KERNEL); + if (!pdata->conns) + return -ENOMEM; + } return 0; } @@ -121,7 +105,7 @@ EXPORT_SYMBOL_GPL(of_coresight_get_cpu); /* * of_coresight_parse_endpoint : Parse the given output endpoint @ep - * and fill the connection information in @pdata[@i]. + * and fill the connection information in @conn * * Parses the local port, remote device name and the remote port. * @@ -133,8 +117,7 @@ EXPORT_SYMBOL_GPL(of_coresight_get_cpu); */ static int of_coresight_parse_endpoint(struct device *dev, struct device_node *ep, - struct coresight_platform_data *pdata, - int i) + struct coresight_connection *conn) { int ret = 0; struct of_endpoint endpoint, rendpoint; @@ -166,11 +149,11 @@ static int of_coresight_parse_endpoint(struct device *dev, break; } - pdata->outports[i] = endpoint.port; - pdata->child_names[i] = devm_kstrdup(dev, - dev_name(rdev), - GFP_KERNEL); - pdata->child_ports[i] = rendpoint.port; + conn->outport = endpoint.port; + conn->child_name = devm_kstrdup(dev, + dev_name(rdev), + GFP_KERNEL); + conn->child_port = rendpoint.port; /* Connection record updated */ ret = 1; } while (0); @@ -189,8 +172,9 @@ struct coresight_platform_data * of_get_coresight_platform_data(struct device *dev, const struct device_node *node) { - int i = 0, ret = 0; + int ret = 0; struct coresight_platform_data *pdata; + struct coresight_connection *conn; struct device_node *ep = NULL; pdata = devm_kzalloc(dev, sizeof(*pdata), GFP_KERNEL); @@ -212,6 +196,7 @@ of_get_coresight_platform_data(struct device *dev, if (ret) return ERR_PTR(ret); + conn = pdata->conns; /* Iterate through each port to discover topology */ while ((ep = of_graph_get_next_endpoint(node, ep))) { /* @@ -221,10 +206,10 @@ of_get_coresight_platform_data(struct device *dev, if (of_coresight_ep_is_input(ep)) continue; - ret = of_coresight_parse_endpoint(dev, ep, pdata, i); + ret = of_coresight_parse_endpoint(dev, ep, conn); switch (ret) { case 1: - i++; /* Fall through */ + conn++; /* Fall through */ case 0: break; default: diff --git a/include/linux/coresight.h b/include/linux/coresight.h index d828a6efe0b1..41e1f4333bf2 100644 --- a/include/linux/coresight.h +++ b/include/linux/coresight.h @@ -94,20 +94,15 @@ union coresight_dev_subtype { * @cpu: the CPU a source belongs to. Only applicable for ETM/PTMs. * @name: name of the component as shown under sysfs. * @nr_inport: number of input ports for this component. - * @outports: list of remote endpoint port number. - * @child_names:name of all child components connected to this device. - * @child_ports:child component port number the current component is - connected to. * @nr_outport: number of output ports for this component. + * @conns: Array of nr_outport connections from this component */ struct coresight_platform_data { int cpu; const char *name; int nr_inport; - int *outports; - const char **child_names; - int *child_ports; int nr_outport; + struct coresight_connection *conns; }; /** From patchwork Thu Sep 20 19:17:43 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mathieu Poirier X-Patchwork-Id: 147130 Delivered-To: patch@linaro.org Received: by 2002:a2e:1648:0:0:0:0:0 with SMTP id 8-v6csp2376071ljw; Thu, 20 Sep 2018 12:18:38 -0700 (PDT) X-Google-Smtp-Source: ANB0VdYmPOCWC5cJ/rcxy8jdohHjzUuOTsg8bH4utUKez1yRIkeyLtnwJlbAl8pNM/Cbiwm0dGDp X-Received: by 2002:a63:7f55:: with SMTP id p21-v6mr38259600pgn.285.1537471118076; Thu, 20 Sep 2018 12:18:38 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1537471118; cv=none; d=google.com; s=arc-20160816; b=KMLP/YYUUP64a0OgMra3/DktYHRncal90QtaQ+pvh8P6o8B7xpD18gcjghLKu6mSMz TUIonJDztZQd7TdANsp+FVoxxX9b4yQBTyU9iLEF3tAjYAaRJCWJTqAJ0P3TPz6+rt49 zjRRI7IlUKOPrlEke0EsnXUHw/ZofMMhn6oyI4zFbgbpo8BlB1uZzEA465LF7KlglQSE M0H3lUlBNmb00o6b9253/ReNp4jIq59XTMhjAvUrnW8gvWBj3udKdeFEA9x59JTY7OsZ kfhFTg/ZJvW5BLliN/s316srdRQzgzUjHXPXn1/zK3qC+zI6bA8HLE18aLeVKEa+jXoL U6Gg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature; bh=6owXGwcGPTyhuLBl4puqKPNqfc45jUohVR8z7o2dDOA=; b=L5yJrbrFdf9TBka047uIlSB9OFE5nxXhNKCCCyBmMpFJsn8TjAtmHhhKDieNzFyd+G mxkaho7T+Z5YiPvyOe/PV6dzRnkQc5LJpp5hWNtVzODfiMGzGtOpIELnzIQNVOrt8/1E DfLSFa+XDSOD2kxLtTN7wTZ3nVvrxAorNo01DeL5JodKgzfVChGDc2wqHEroJK0qRsNS TqKlhjPkszioFUQm154GIEu/TGOAeYhoRRVIujwWL53e5QPljs9Z45UXjtVS2RPIlDEY U2mOA1Ijbw25aMfrI55yiRoKAFJzpxbzHV9DHv3oJ8Z+5W0AyTF+HuCzYK/C4eY8DHv+ 6XrQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=GM3BzSMK; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id y27-v6si24472533pgl.479.2018.09.20.12.18.37; Thu, 20 Sep 2018 12:18:38 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=GM3BzSMK; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2388730AbeIUBDd (ORCPT + 32 others); Thu, 20 Sep 2018 21:03:33 -0400 Received: from mail-pl1-f194.google.com ([209.85.214.194]:42108 "EHLO mail-pl1-f194.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2388702AbeIUBDc (ORCPT ); Thu, 20 Sep 2018 21:03:32 -0400 Received: by mail-pl1-f194.google.com with SMTP id g23-v6so4786291plq.9 for ; Thu, 20 Sep 2018 12:18:34 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=6owXGwcGPTyhuLBl4puqKPNqfc45jUohVR8z7o2dDOA=; b=GM3BzSMKF6Qg9xPBO0pMHkq0LV3EnfvBxxCfmRzixYbwO+Xx39NtDG4B7UR9TmIMeV Bb33jahJ/D/tRyEdnuhzvnrwWD5ZJGeesRw/DuuyLOmz8dcUiI1vyidbRW5zfiDu3HtL J+UwOoUlrmw2/HPiDAZVPiH59fF0HBeHfBd7Y= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=6owXGwcGPTyhuLBl4puqKPNqfc45jUohVR8z7o2dDOA=; b=kgyOsQZrrUGXr4Iori204SE1J4b2oK+nPzPOVG+HCe1ru8toNSKAj29EoNWLX1veDD xd02UEyVchjZ/kmjuiaVl7JPpGbJYdvqxIU75s8imqsSgBzA37qrW1bcEt+8Ywj82TX6 Hcg5sXwJfk5h5WkgP7STm8ko2p7Ze/2qyRlKhE48yFGfoGCqtCa2NfdRhbk0I6wT5qcZ B+jiYfKW1JDGhfkNVFi/ZUh68cx22P5x4BwNdFVPkzmsOMSg7/NILmXWpABMI86rb9ut I7hir2mX/NVSwoXApqcWWY86CSFDBzcRpFFeHQvWwgHeW0GbR3zilH49mFGl5+9vSc+9 AhGg== X-Gm-Message-State: APzg51DG9RLXhql9ITGr9dzjxU40gV5neeZWPSOWIT8b2zG/mhDrEWP1 GsUuGvm5C3ZrYlGQu58uOUhW9qVvHkg= X-Received: by 2002:a17:902:bd4a:: with SMTP id b10-v6mr41016123plx.209.1537471113790; Thu, 20 Sep 2018 12:18:33 -0700 (PDT) Received: from localhost.localdomain ([209.121.128.187]) by smtp.gmail.com with ESMTPSA id k13-v6sm4424443pgf.37.2018.09.20.12.18.32 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 20 Sep 2018 12:18:32 -0700 (PDT) From: Mathieu Poirier To: gregkh@linuxfoundation.org Cc: linux-kernel@vger.kernel.org Subject: [PATCH 08/44] coresight: Cleanup coresight DT bindings Date: Thu, 20 Sep 2018 13:17:43 -0600 Message-Id: <1537471099-19781-9-git-send-email-mathieu.poirier@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1537471099-19781-1-git-send-email-mathieu.poirier@linaro.org> References: <1537471099-19781-1-git-send-email-mathieu.poirier@linaro.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Suzuki K Poulose The coresight drivers relied on default bindings for graph in DT, while reusing the "reg" field of the "ports" to indicate the actual hardware port number for the connections. This can cause duplicate ports with same addresses, but different direction. However, with the rules getting stricter for the address mismatch with the label, it is no longer possible to use the port address field for the hardware port number. This patch introduces new DT binding rules for coresight components, based on the same generic DT graph bindings, but avoiding the address duplication. - All output ports must be specified under a child node with name "out-ports". - All input ports must be specified under a childe node with name "in-ports". - Port address should match the hardware port number. The support for legacy bindings is retained, with a warning. Cc: Sudeep Holla Cc: Rob Herring Signed-off-by: Suzuki K Poulose Reviewed-by: Rob Herring Signed-off-by: Mathieu Poirier --- .../devicetree/bindings/arm/coresight.txt | 95 ++++++++++++--------- drivers/hwtracing/coresight/of_coresight.c | 98 +++++++++++++++++++--- 2 files changed, 143 insertions(+), 50 deletions(-) -- 2.7.4 diff --git a/Documentation/devicetree/bindings/arm/coresight.txt b/Documentation/devicetree/bindings/arm/coresight.txt index 5d1ad09bafb4..f39d2c6eb49c 100644 --- a/Documentation/devicetree/bindings/arm/coresight.txt +++ b/Documentation/devicetree/bindings/arm/coresight.txt @@ -54,9 +54,7 @@ its hardware characteristcs. clocks the core of that coresight component. The latter clock is optional. - * port or ports: The representation of the component's port - layout using the generic DT graph presentation found in - "bindings/graph.txt". + * port or ports: see "Graph bindings for Coresight" below. * Additional required properties for System Trace Macrocells (STM): * reg: along with the physical base address and length of the register @@ -73,7 +71,7 @@ its hardware characteristcs. AMBA markee): - "arm,coresight-replicator" - * port or ports: same as above. + * port or ports: see "Graph bindings for Coresight" below. * Optional properties for ETM/PTMs: @@ -96,6 +94,20 @@ its hardware characteristcs. * interrupts : Exactly one SPI may be listed for reporting the address error +Graph bindings for Coresight +------------------------------- + +Coresight components are interconnected to create a data path for the flow of +trace data generated from the "sources" to their collection points "sink". +Each coresight component must describe the "input" and "output" connections. +The connections must be described via generic DT graph bindings as described +by the "bindings/graph.txt", where each "port" along with an "endpoint" +component represents a hardware port and the connection. + + * All output ports must be listed inside a child node named "out-ports" + * All input ports must be listed inside a child node named "in-ports". + * Port address must match the hardware port number. + Example: 1. Sinks @@ -105,10 +117,11 @@ Example: clocks = <&oscclk6a>; clock-names = "apb_pclk"; - port { - etb_in_port: endpoint@0 { - slave-mode; - remote-endpoint = <&replicator_out_port0>; + in-ports { + port { + etb_in_port: endpoint@0 { + remote-endpoint = <&replicator_out_port0>; + }; }; }; }; @@ -119,10 +132,11 @@ Example: clocks = <&oscclk6a>; clock-names = "apb_pclk"; - port { - tpiu_in_port: endpoint@0 { - slave-mode; - remote-endpoint = <&replicator_out_port1>; + out-ports { + port { + tpiu_in_port: endpoint@0 { + remote-endpoint = <&replicator_out_port1>; + }; }; }; }; @@ -163,7 +177,7 @@ Example: */ compatible = "arm,coresight-replicator"; - ports { + out-ports { #address-cells = <1>; #size-cells = <0>; @@ -181,12 +195,11 @@ Example: remote-endpoint = <&tpiu_in_port>; }; }; + }; - /* replicator input port */ - port@2 { - reg = <0>; + in-ports { + port { replicator_in_port0: endpoint { - slave-mode; remote-endpoint = <&funnel_out_port0>; }; }; @@ -199,40 +212,36 @@ Example: clocks = <&oscclk6a>; clock-names = "apb_pclk"; - ports { - #address-cells = <1>; - #size-cells = <0>; - - /* funnel output port */ - port@0 { - reg = <0>; + out-ports { + port { funnel_out_port0: endpoint { remote-endpoint = <&replicator_in_port0>; }; }; + }; - /* funnel input ports */ - port@1 { + in-ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { reg = <0>; funnel_in_port0: endpoint { - slave-mode; remote-endpoint = <&ptm0_out_port>; }; }; - port@2 { + port@1 { reg = <1>; funnel_in_port1: endpoint { - slave-mode; remote-endpoint = <&ptm1_out_port>; }; }; - port@3 { + port@2 { reg = <2>; funnel_in_port2: endpoint { - slave-mode; remote-endpoint = <&etm0_out_port>; }; }; @@ -248,9 +257,11 @@ Example: cpu = <&cpu0>; clocks = <&oscclk6a>; clock-names = "apb_pclk"; - port { - ptm0_out_port: endpoint { - remote-endpoint = <&funnel_in_port0>; + out-ports { + port { + ptm0_out_port: endpoint { + remote-endpoint = <&funnel_in_port0>; + }; }; }; }; @@ -262,9 +273,11 @@ Example: cpu = <&cpu1>; clocks = <&oscclk6a>; clock-names = "apb_pclk"; - port { - ptm1_out_port: endpoint { - remote-endpoint = <&funnel_in_port1>; + out-ports { + port { + ptm1_out_port: endpoint { + remote-endpoint = <&funnel_in_port1>; + }; }; }; }; @@ -278,9 +291,11 @@ Example: clocks = <&soc_smc50mhz>; clock-names = "apb_pclk"; - port { - stm_out_port: endpoint { - remote-endpoint = <&main_funnel_in_port2>; + out-ports { + port { + stm_out_port: endpoint { + remote-endpoint = <&main_funnel_in_port2>; + }; }; }; }; diff --git a/drivers/hwtracing/coresight/of_coresight.c b/drivers/hwtracing/coresight/of_coresight.c index e8fb4e124744..da71c975e3f7 100644 --- a/drivers/hwtracing/coresight/of_coresight.c +++ b/drivers/hwtracing/coresight/of_coresight.c @@ -45,13 +45,13 @@ of_coresight_get_endpoint_device(struct device_node *endpoint) endpoint, of_dev_node_match); } -static inline bool of_coresight_ep_is_input(struct device_node *ep) +static inline bool of_coresight_legacy_ep_is_input(struct device_node *ep) { return of_property_read_bool(ep, "slave-mode"); } -static void of_coresight_get_ports(const struct device_node *node, - int *nr_inport, int *nr_outport) +static void of_coresight_get_ports_legacy(const struct device_node *node, + int *nr_inport, int *nr_outport) { struct device_node *ep = NULL; int in = 0, out = 0; @@ -61,7 +61,7 @@ static void of_coresight_get_ports(const struct device_node *node, if (!ep) break; - if (of_coresight_ep_is_input(ep)) + if (of_coresight_legacy_ep_is_input(ep)) in++; else out++; @@ -72,6 +72,67 @@ static void of_coresight_get_ports(const struct device_node *node, *nr_outport = out; } +static struct device_node *of_coresight_get_port_parent(struct device_node *ep) +{ + struct device_node *parent = of_graph_get_port_parent(ep); + + /* + * Skip one-level up to the real device node, if we + * are using the new bindings. + */ + if (!of_node_cmp(parent->name, "in-ports") || + !of_node_cmp(parent->name, "out-ports")) + parent = of_get_next_parent(parent); + + return parent; +} + +static inline struct device_node * +of_coresight_get_input_ports_node(const struct device_node *node) +{ + return of_get_child_by_name(node, "in-ports"); +} + +static inline struct device_node * +of_coresight_get_output_ports_node(const struct device_node *node) +{ + return of_get_child_by_name(node, "out-ports"); +} + +static inline int +of_coresight_count_ports(struct device_node *port_parent) +{ + int i = 0; + struct device_node *ep = NULL; + + while ((ep = of_graph_get_next_endpoint(port_parent, ep))) + i++; + return i; +} + +static void of_coresight_get_ports(const struct device_node *node, + int *nr_inport, int *nr_outport) +{ + struct device_node *input_ports = NULL, *output_ports = NULL; + + input_ports = of_coresight_get_input_ports_node(node); + output_ports = of_coresight_get_output_ports_node(node); + + if (input_ports || output_ports) { + if (input_ports) { + *nr_inport = of_coresight_count_ports(input_ports); + of_node_put(input_ports); + } + if (output_ports) { + *nr_outport = of_coresight_count_ports(output_ports); + of_node_put(output_ports); + } + } else { + /* Fall back to legacy DT bindings parsing */ + of_coresight_get_ports_legacy(node, nr_inport, nr_outport); + } +} + static int of_coresight_alloc_memory(struct device *dev, struct coresight_platform_data *pdata) { @@ -136,7 +197,7 @@ static int of_coresight_parse_endpoint(struct device *dev, rep = of_graph_get_remote_endpoint(ep); if (!rep) break; - rparent = of_graph_get_port_parent(rep); + rparent = of_coresight_get_port_parent(rep); if (!rparent) break; if (of_graph_parse_endpoint(rep, &rendpoint)) @@ -176,6 +237,8 @@ of_get_coresight_platform_data(struct device *dev, struct coresight_platform_data *pdata; struct coresight_connection *conn; struct device_node *ep = NULL; + const struct device_node *parent = NULL; + bool legacy_binding = false; pdata = devm_kzalloc(dev, sizeof(*pdata), GFP_KERNEL); if (!pdata) @@ -196,14 +259,29 @@ of_get_coresight_platform_data(struct device *dev, if (ret) return ERR_PTR(ret); + parent = of_coresight_get_output_ports_node(node); + /* + * If the DT uses obsoleted bindings, the ports are listed + * under the device and we need to filter out the input + * ports. + */ + if (!parent) { + legacy_binding = true; + parent = node; + dev_warn_once(dev, "Uses obsolete Coresight DT bindings\n"); + } + conn = pdata->conns; - /* Iterate through each port to discover topology */ - while ((ep = of_graph_get_next_endpoint(node, ep))) { + + /* Iterate through each output port to discover topology */ + while ((ep = of_graph_get_next_endpoint(parent, ep))) { /* - * No need to deal with input ports, as processing the - * output ports connected to them will process the details. + * Legacy binding mixes input/output ports under the + * same parent. So, skip the input ports if we are dealing + * with legacy binding, as they processed with their + * connected output ports. */ - if (of_coresight_ep_is_input(ep)) + if (legacy_binding && of_coresight_legacy_ep_is_input(ep)) continue; ret = of_coresight_parse_endpoint(dev, ep, conn); From patchwork Thu Sep 20 19:17:44 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mathieu Poirier X-Patchwork-Id: 147129 Delivered-To: patch@linaro.org Received: by 2002:a2e:1648:0:0:0:0:0 with SMTP id 8-v6csp2376084ljw; Thu, 20 Sep 2018 12:18:38 -0700 (PDT) X-Google-Smtp-Source: ANB0Vdb9xR2tF3ahk+6FnqfXN58fFz0uC3UDstr8pCYw3QLP5XD60mT6lpjWdfYOWQ7o5Z5bZ0Hi X-Received: by 2002:a17:902:aa49:: with SMTP id c9-v6mr40079200plr.195.1537471118771; Thu, 20 Sep 2018 12:18:38 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1537471118; cv=none; d=google.com; s=arc-20160816; b=xR7VkxoL16HhqnC65/mpJluwsXNp8ri7jb//S9Dj0DWuLRSmmjkPxrLfGTM4PyG9S5 0i0zv5AF4wwlhl7eDF+6RrXRs78QDo5wPnZ6WOZMFWRevbjsGxZxlzlLCUkRwXgcnjb1 vPp4q9U48ADjKdlF7nVB/eSXHa1s/7NaB77VtVM/FkIsr9p8g3i9kRR7EMVsQlVNDmXB VG1tX1gVNVjeN1FJff8c/MG5pZbGWz0oC/Ldabee11oelyiD6SQxO8QnVDKYnii2fPSt HrbjR439au7iLdwfzdanUVY1k6W1KM2LRDPRKRzmN1NTc+I+Qu60RdV0rxkzBUZvP1FP 9Qsg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature; bh=zGBDLzKG1oqzc5ywY84XT73T119/4mrlMyUfeCO+MxU=; b=GG6mYkNxbs1KWMl0PnzNKXwjkL0MtKGqW7pZqEHdZZSW0NLZvoCHflcQ6gxEV8gQJv /l/TcZJiNh1tYt6m0b6rAJNdgNbv7gcXPH1OUVqcuIeRT10rMfx8wCE0rHfNt3S1/uCZ E14+X37gaZQErkZZDu4+/ixrXWNQ7XlmgyyqfhlLz6Oxra6P8dsaf2nG37GyrjakmB11 JTdEi3mNCkyX8yyG5N9A2SPM+hWmlq4jrzD+AyHGE3Q4R/CNVmCYX8iwIV/24w+Aea3k FxScRkqYCXg8NbxA3P4fyLrfJRcgHTVw0Uat8TV6jIxyDaZfHfoEsUmRJTSKYsGKOEPm A+sw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=kwR5roM+; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id y27-v6si24472533pgl.479.2018.09.20.12.18.38; Thu, 20 Sep 2018 12:18:38 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=kwR5roM+; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2388749AbeIUBDf (ORCPT + 32 others); Thu, 20 Sep 2018 21:03:35 -0400 Received: from mail-pl1-f196.google.com ([209.85.214.196]:38256 "EHLO mail-pl1-f196.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2388702AbeIUBDe (ORCPT ); Thu, 20 Sep 2018 21:03:34 -0400 Received: by mail-pl1-f196.google.com with SMTP id u11-v6so4799653plq.5 for ; Thu, 20 Sep 2018 12:18:35 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=zGBDLzKG1oqzc5ywY84XT73T119/4mrlMyUfeCO+MxU=; b=kwR5roM+/WuD1YOY3r6vZQ+XHyFBEtu20K5Nm+jKjlTKNAuh/0EaVXIDZc240ZIOi1 usUC64kBxcQBqtFNFciLHR+NYAOG5HAzgR47PLpV0nZHY2M/KvEu1C3YJMYy7mILI2qa q5/cdI/XoY+9ff+c88f0G80BO1xdMrTebr1YY= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=zGBDLzKG1oqzc5ywY84XT73T119/4mrlMyUfeCO+MxU=; b=dZY3sWpTzDTQ/YS3o+5+X3RVutpLX3SLtNGu6S8YSjZtnkk4k0Ao5L5Yvt6BX1pZrG 1I4UJdVYztWA9pC4Ojk50B/JwDGOK/5Sv1SzrdTg/3csum4nFJWUISLIR/SmcMUwWn9t fqpZ6NJ/RQqukbM29gBeTFPy+mc7Gx4JeQBW4siYK8xGvcSQW0l/wa6oB+QDP7h9ETnk hC7gaPH9nvhsDOjsG6DD7iZEMtSYiHNvO+YebyXbozBp3CwT5I24zKe62SyrLot39xV/ N+O3aZSxwBbu8MbTHLzhcgNfqrDlj4J8HShDm/PYCR6deEzr5ah3NOzaWnLXYy/VQ1Sb +MNg== X-Gm-Message-State: APzg51C5iVLJI4POi+9uRmLE1MMr4M0iMls7r7cvoCmRHSwxOy+rxGl7 y6WuumCT/pRBupVP8nwvccAyP4d3WTI= X-Received: by 2002:a17:902:9a8a:: with SMTP id w10-v6mr39947209plp.14.1537471115263; Thu, 20 Sep 2018 12:18:35 -0700 (PDT) Received: from localhost.localdomain ([209.121.128.187]) by smtp.gmail.com with ESMTPSA id k13-v6sm4424443pgf.37.2018.09.20.12.18.33 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 20 Sep 2018 12:18:34 -0700 (PDT) From: Mathieu Poirier To: gregkh@linuxfoundation.org Cc: linux-kernel@vger.kernel.org Subject: [PATCH 09/44] coresight: Use ERR_CAST instead of ERR_PTR Date: Thu, 20 Sep 2018 13:17:44 -0600 Message-Id: <1537471099-19781-10-git-send-email-mathieu.poirier@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1537471099-19781-1-git-send-email-mathieu.poirier@linaro.org> References: <1537471099-19781-1-git-send-email-mathieu.poirier@linaro.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: zhong jiang Use ERR_CAT inlined function to replace the ERR_PTR(PTR_ERR). It make the code more concise. Signed-off-by: zhong jiang Signed-off-by: Mathieu Poirier --- drivers/hwtracing/coresight/coresight-tmc-etr.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) -- 2.7.4 diff --git a/drivers/hwtracing/coresight/coresight-tmc-etr.c b/drivers/hwtracing/coresight/coresight-tmc-etr.c index 2eda5de304c2..11963647e19a 100644 --- a/drivers/hwtracing/coresight/coresight-tmc-etr.c +++ b/drivers/hwtracing/coresight/coresight-tmc-etr.c @@ -536,7 +536,7 @@ tmc_init_etr_sg_table(struct device *dev, int node, sg_table = tmc_alloc_sg_table(dev, node, nr_tpages, nr_dpages, pages); if (IS_ERR(sg_table)) { kfree(etr_table); - return ERR_PTR(PTR_ERR(sg_table)); + return ERR_CAST(sg_table); } etr_table->sg_table = sg_table; From patchwork Thu Sep 20 19:17:45 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mathieu Poirier X-Patchwork-Id: 147131 Delivered-To: patch@linaro.org Received: by 2002:a2e:1648:0:0:0:0:0 with SMTP id 8-v6csp2376120ljw; Thu, 20 Sep 2018 12:18:41 -0700 (PDT) X-Google-Smtp-Source: ANB0Vdbtgwp44jbJhZ4sZMV/VyDn5Jlwmis81QXwFg8P/d6GsnaSbCXBNOvKVK/yCzL0QAuhtEO5 X-Received: by 2002:a63:4909:: with SMTP id w9-v6mr1164784pga.123.1537471120854; Thu, 20 Sep 2018 12:18:40 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1537471120; cv=none; d=google.com; s=arc-20160816; b=Hn2lY3seGDu20s4UrsGYXHcN0nsnQj2nxuDF2LVaLNoCFcHp04yQIx7Ipy00dVGnFE fkp/b5l57YvgjYPLUdR6ftiQqWwtQfUfpHdpoI3DugQerFLPDdSjlZyovBSIgcEqkmor vMWy55jCjnxUCpG5S2fim/WmvmMvenF1YNqyRYdplOf+yiFcexxHiyy5qOs8ths4ldcj w76fZsliM3ApCRckAjLo5A1xCe74b9sNz6RuHqB/x9Eb2++/IlZe63QE4PM36wlrBlzK FBTLXbqSgkcdn5B6+l76MxReOF0INTeh0Wu/kmgQvtRvDAnWVFCqrAGrGP0XA9FnGXNx rKKw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature; bh=ivmOX6tgxT1fHE4D3dvFMA9pX4WdQdVXEtSEe52x+DM=; b=g9TNbllUfd3oVedxdr2+s6J8SVK0EmgV2sorzjgq6tvLe7bl/CNZPWPDvy+tV82zP1 MPc605t7DPEYkzee2lPmPL54wAgGxZykimpv5aTC9Jw5jQ0cw7/cKDW1aLqSgviODMwt FvCTqNXgjB2fD3s9N7s8Ob+OI/J58R+HCY0UdYS7L41qdagmnL7ruuHLWnC2BqK4SYgv lliQRAx6M/Nf+JmSbxnp2taa7ojPd8+YWxcC+9GlfiiwNWzvXy700Tg/aqr4CQpH9C6D CIQGrqPWidNJ2UAoboAJuMDdT+D+cCSvTKYMg0hdUKLHTkR3LUXyGteNBGvHFRpMFo/s 6xZA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=eFxhI9VX; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id w20-v6si23125754pgf.434.2018.09.20.12.18.40; Thu, 20 Sep 2018 12:18:40 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=eFxhI9VX; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2388764AbeIUBDh (ORCPT + 32 others); Thu, 20 Sep 2018 21:03:37 -0400 Received: from mail-pg1-f195.google.com ([209.85.215.195]:44724 "EHLO mail-pg1-f195.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2388702AbeIUBDf (ORCPT ); Thu, 20 Sep 2018 21:03:35 -0400 Received: by mail-pg1-f195.google.com with SMTP id r1-v6so4869055pgp.11 for ; Thu, 20 Sep 2018 12:18:37 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=ivmOX6tgxT1fHE4D3dvFMA9pX4WdQdVXEtSEe52x+DM=; b=eFxhI9VX8R79nHZBuH0TWpyBnN5A+DY0+Cs4SC1yYLGIKrMvCWboYZJ3d8FX6YOBek EHXq+BVWwUR6n3bqxNZQb5GLK+e+fMYROc2mvW3CTbsEo7i7hq8UFSdElIUWEtdn+pJV HEA+AVnp2dhE/nGef1DFuYVl4nsix+4TTzvJo= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=ivmOX6tgxT1fHE4D3dvFMA9pX4WdQdVXEtSEe52x+DM=; b=YwM9SaORMhlkNE5AYOkkrKg4tDZZ+IAJYDu5F5HNezOt3d0KcQic8UrqZ1bcIAUUGW 27hAIHrRByBmEyopFaIT6NOHGITd2BnAehVEL879u1/Gpv1PReiFwbjzjXoZn12cOWuQ lRg12Zq1TfuwpcdSjVadVEn5R79zpkSqRUkBx8Mh83N8NcclVG1qBdn+NknrPRDP6C5r sl6w/zF7MdTY0QaFqF6iIWwzgn2hz5RsmJhsx5lBiCY9k/xzOsFtkohc42SFzBvIsDrg 2YYKLSxd8jlPHVRukSky0nA16RRmAgYki4L86aWAdDkoJPlUijv7QYAtl6dcdC0GvvTC 5tfw== X-Gm-Message-State: APzg51A0EGSuxOJ+uxSpbp0LQxh2r1B/dJrCFMK2DbLQnyKttCuFvft6 r4jLUH4UI9notr5OgOUg9hvyrZnJOLY= X-Received: by 2002:a62:642:: with SMTP id 63-v6mr43022850pfg.42.1537471116843; Thu, 20 Sep 2018 12:18:36 -0700 (PDT) Received: from localhost.localdomain ([209.121.128.187]) by smtp.gmail.com with ESMTPSA id k13-v6sm4424443pgf.37.2018.09.20.12.18.35 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 20 Sep 2018 12:18:35 -0700 (PDT) From: Mathieu Poirier To: gregkh@linuxfoundation.org Cc: linux-kernel@vger.kernel.org Subject: [PATCH 10/44] coresight: Fix handling of sinks Date: Thu, 20 Sep 2018 13:17:45 -0600 Message-Id: <1537471099-19781-11-git-send-email-mathieu.poirier@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1537471099-19781-1-git-send-email-mathieu.poirier@linaro.org> References: <1537471099-19781-1-git-send-email-mathieu.poirier@linaro.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Suzuki K Poulose The coresight components could be operated either in sysfs mode or in perf mode. For some of the components, the mode of operation doesn't matter as they simply relay the data to the next component in the trace path. But for sinks, they need to be able to provide the trace data back to the user. Thus we need to make sure that "mode" is handled appropriately. e.g, the sysfs mode could have multiple sources driving the trace data, while perf mode doesn't allow sharing the sink. The coresight_enable_sink() however doesn't really allow this check to trigger as it skips the "enable_sink" callback if the component is already enabled, irrespective of the mode. This could cause mixing of data from different modes or even same mode (in perf), if the sources are different. Also, if we fail to enable the sink while enabling a path (where sink is the first component enabled), we could end up in disabling the components in the "entire" path which were not enabled in this trial, causing disruptions in the existing trace paths. Cc: Mathieu Poirier Signed-off-by: Suzuki K Poulose Signed-off-by: Mathieu Poirier --- drivers/hwtracing/coresight/coresight.c | 22 +++++++++++++++------- 1 file changed, 15 insertions(+), 7 deletions(-) -- 2.7.4 diff --git a/drivers/hwtracing/coresight/coresight.c b/drivers/hwtracing/coresight/coresight.c index 5e8880ca8078..07382c55b31d 100644 --- a/drivers/hwtracing/coresight/coresight.c +++ b/drivers/hwtracing/coresight/coresight.c @@ -132,12 +132,14 @@ static int coresight_enable_sink(struct coresight_device *csdev, u32 mode) { int ret; - if (!csdev->enable) { - if (sink_ops(csdev)->enable) { - ret = sink_ops(csdev)->enable(csdev, mode); - if (ret) - return ret; - } + /* + * We need to make sure the "new" session is compatible with the + * existing "mode" of operation. + */ + if (sink_ops(csdev)->enable) { + ret = sink_ops(csdev)->enable(csdev, mode); + if (ret) + return ret; csdev->enable = true; } @@ -339,8 +341,14 @@ int coresight_enable_path(struct list_head *path, u32 mode) switch (type) { case CORESIGHT_DEV_TYPE_SINK: ret = coresight_enable_sink(csdev, mode); + /* + * Sink is the first component turned on. If we + * failed to enable the sink, there are no components + * that need disabling. Disabling the path here + * would mean we could disrupt an existing session. + */ if (ret) - goto err; + goto out; break; case CORESIGHT_DEV_TYPE_SOURCE: /* sources are enabled from either sysFS or Perf */ From patchwork Thu Sep 20 19:17:46 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mathieu Poirier X-Patchwork-Id: 147132 Delivered-To: patch@linaro.org Received: by 2002:a2e:1648:0:0:0:0:0 with SMTP id 8-v6csp2376131ljw; Thu, 20 Sep 2018 12:18:42 -0700 (PDT) X-Google-Smtp-Source: ANB0VdaiGytcTn0Z+PRh1cSn4MIgAUqA614WuOTare+w4VEFIXMcZBGDTmdFxh2TGtaOhNPJN3n2 X-Received: by 2002:a17:902:9a47:: with SMTP id x7-v6mr41007842plv.37.1537471122490; Thu, 20 Sep 2018 12:18:42 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1537471122; cv=none; d=google.com; s=arc-20160816; b=d+dxscrjptFmZqDljQc7TL9HOK22m2pz895P6wznaw0GAd/2lKQV+Bm9X1XRv/46Uq 3rwWh+DUhSP37G8fKhnlws7FQ/CykXlYaAFr+wXt9vr34Tt2NQN7Cm0iwMTDrwu5Cavr lDMM0YjE66kvYmyEnMGweXNwj7gHTSmW1Q3I9kTFeNaU0CjOjJLQy3BJvmxkNZfQwLPX UFMJTbTW2sJuTBdLcUMUw9FoFEDIl6qexyq7viuzX1xoULCgOHkYEgDyXutMUDax5x+S rFv00oNJoXozwbKAkMIqJYYiuDpRoEGQoT2+xlTicMPNpNwWO0SN9lY9TmYarsFtZq7J jVRg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature; bh=t1KhZyFjqvp9qI0UT6EcOP3PoDOXaznF3Gjt2laGV3Y=; b=AtH95dJEk82+c9YmrX309jwIaUAoOeTxJ2S2pql7EvE2yZlHUukpI4uwJJLBcrqbaW GOELZEgahYuj6n0cyfHcDeHCjgKewMD37Bef3M4d7tP7pgTmuvtrS4RUcdiq0T2kPTp4 ggarmsmsJKVvgr2DxSUqhkv+aEL4gzL+Ggfy+BauW3HoIZy33JQc6STKSMbnX6WaLQpx UjOtMJERYxoL94xqptZuZLWs5w+cp8v8Wur3o0+j2LPuIzXWXWf0F/1JLjiHRa8pyLti bBUa67DiepZpPZMuC+IdWjJTamdt1RJW5nibZic75X5Jr9YpdPSNjAAckkL9aVDnKRlW Bc7w== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=L9kS2n2d; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id m5-v6si28185689pfb.104.2018.09.20.12.18.42; Thu, 20 Sep 2018 12:18:42 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=L9kS2n2d; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2388777AbeIUBDh (ORCPT + 32 others); Thu, 20 Sep 2018 21:03:37 -0400 Received: from mail-pl1-f195.google.com ([209.85.214.195]:46420 "EHLO mail-pl1-f195.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2388760AbeIUBDh (ORCPT ); Thu, 20 Sep 2018 21:03:37 -0400 Received: by mail-pl1-f195.google.com with SMTP id t20-v6so1358161ply.13 for ; Thu, 20 Sep 2018 12:18:38 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=t1KhZyFjqvp9qI0UT6EcOP3PoDOXaznF3Gjt2laGV3Y=; b=L9kS2n2dYrjXqP0FTqo/L6z3LMjLPFZnDy1/NCam49Pu/9K5j/V+6sKe2M7p5Sp/cJ Z3hvIIYw+O79vv50spP1XsQXNliUqi2HoSqh31VVfSkKUJhGdL3H7ASB9G5B4tyKJ9tV 2AC8LCNxWzW9GZesWiMNPqxLLy02oDiLe8/Lo= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=t1KhZyFjqvp9qI0UT6EcOP3PoDOXaznF3Gjt2laGV3Y=; b=Uqj4dLrtO1Xuok4Ku4QtjjxZqAl/QRGqgoizgoRGAZ5nEdcqc304WcG7xywEuZDGlH +H1435/TntbohuNnpZ5oHV5DJwzuWe4uhuUEjValRvDE3K8+ig7pmwNGcZwYWiasNMrq 9Tk3PfwVmjfRgN/brCABNVpYLonxq+tdHKWBudcdvutdvN/9RiEPyp6QYaezREdmWffw /44frR0KRQ2vOvC9KC6bxObFgaVTw+GMld9R8SaRd47ClFIgE3MehSQ0bugrc1Iwehap kywUrAGrW83eKOg9lynR5IJBCRSLWad6Y1O/NWwdmWT6Ongpl19SARrKyooPLkzvn1rG 6mKw== X-Gm-Message-State: APzg51AxsgqJ2SPrd6dWEhw+5ckB/SW0OyP5uf6kVjdIxr92A2pstySr l5FQ2LJ7CJwdD7n1LQBw4euD6A== X-Received: by 2002:a17:902:14d:: with SMTP id 71-v6mr39564481plb.146.1537471118323; Thu, 20 Sep 2018 12:18:38 -0700 (PDT) Received: from localhost.localdomain ([209.121.128.187]) by smtp.gmail.com with ESMTPSA id k13-v6sm4424443pgf.37.2018.09.20.12.18.36 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 20 Sep 2018 12:18:37 -0700 (PDT) From: Mathieu Poirier To: gregkh@linuxfoundation.org Cc: linux-kernel@vger.kernel.org Subject: [PATCH 11/44] coresight: etb10: Fix handling of perf mode Date: Thu, 20 Sep 2018 13:17:46 -0600 Message-Id: <1537471099-19781-12-git-send-email-mathieu.poirier@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1537471099-19781-1-git-send-email-mathieu.poirier@linaro.org> References: <1537471099-19781-1-git-send-email-mathieu.poirier@linaro.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Suzuki K Poulose If the ETB is already enabled in sysfs mode, the ETB reports success even if a perf mode is requested. Fix this by checking the requested mode. Cc: Mathieu Poirier Signed-off-by: Suzuki K Poulose Signed-off-by: Mathieu Poirier --- drivers/hwtracing/coresight/coresight-etb10.c | 4 ++++ 1 file changed, 4 insertions(+) -- 2.7.4 diff --git a/drivers/hwtracing/coresight/coresight-etb10.c b/drivers/hwtracing/coresight/coresight-etb10.c index 306119eaf16a..0dad8626bcfb 100644 --- a/drivers/hwtracing/coresight/coresight-etb10.c +++ b/drivers/hwtracing/coresight/coresight-etb10.c @@ -147,6 +147,10 @@ static int etb_enable(struct coresight_device *csdev, u32 mode) if (val == CS_MODE_PERF) return -EBUSY; + /* Don't let perf disturb sysFS sessions */ + if (val == CS_MODE_SYSFS && mode == CS_MODE_PERF) + return -EBUSY; + /* Nothing to do, the tracer is already enabled. */ if (val == CS_MODE_SYSFS) goto out; From patchwork Thu Sep 20 19:17:47 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mathieu Poirier X-Patchwork-Id: 147133 Delivered-To: patch@linaro.org Received: by 2002:a2e:1648:0:0:0:0:0 with SMTP id 8-v6csp2376149ljw; Thu, 20 Sep 2018 12:18:44 -0700 (PDT) X-Google-Smtp-Source: ANB0VdYueKOnO/NMAhbgxjxlEd2tqibjH8c9ftQJtFJuQvcEky7FIzrMSJg+8Q7H1K501gWkuNTC X-Received: by 2002:a62:6003:: with SMTP id u3-v6mr43016435pfb.114.1537471123994; Thu, 20 Sep 2018 12:18:43 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1537471123; cv=none; d=google.com; s=arc-20160816; b=mPdLY9eW/QmF9R6R/OFQoAmDuFuN53e3c0Jyz1SEuu0pCuHU0YtFjeF949uN66uXzY XNiiQkR+h62p8tZ0jWCCf3C4S4ehuo01fLDb6dJXKaPd3NzevmjP6gbirvH5fPhA15p1 aRSrvjR+RfOzRXD+taznYG4C51DDkS8hj7zPXT0REIZRDlQnfuvL0WP5vnBaChKl1J7T bthKAZhsJFUcYU6ygRrj0o7lK8L/D25QsJnGIYWxV/tqPA0doDQCHggKbrSqM9ywaTwh zzf1bGi/MrfA858M6nXBQ488TWQJ8YUcmYOgDgZBqzKNZF4Tz1e1SCdM2/3TFXXQ3YI7 8LYw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature; bh=t+LSSda+KATOPPphXIMKmk0lSawpQVMOb7XobeDIV5o=; b=xCeKnGUKgKHupj0idR6LFXOz4SMq1BIRa8JM2Xf7X55gU9YDiMnmkX9MXdqz1k/Xpc lLA5WCFbMQjm93BsEYIcmJ0FOub8v9lyy8VMJvzjFOn+S6LZHW5RJDKQyvY7+4kLPNS8 BDE5zbxkrZf6HN2G6th/GZtHJVifsYxvoFCk99iwcf+3i/v6mx2jKHnkw15zT8F0YVSt ExTeRT5Psbf1cCyClv9OrH+RTsBA8INc5HdxmYPvHoYghUe1C67IrdUSARvH/01XSX9D +nudxGYalwbYSO2u/8Zc5n/+to+0+GPZKvm2UW+1mSCRSEtxpIQKWV4JctWyvYnOQHAW 3Bsg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=hQWIdICg; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id r63-v6si1883842plb.132.2018.09.20.12.18.43; Thu, 20 Sep 2018 12:18:43 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=hQWIdICg; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2388791AbeIUBDk (ORCPT + 32 others); Thu, 20 Sep 2018 21:03:40 -0400 Received: from mail-pl1-f196.google.com ([209.85.214.196]:38261 "EHLO mail-pl1-f196.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2388760AbeIUBDi (ORCPT ); Thu, 20 Sep 2018 21:03:38 -0400 Received: by mail-pl1-f196.google.com with SMTP id u11-v6so4799733plq.5 for ; Thu, 20 Sep 2018 12:18:40 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=t+LSSda+KATOPPphXIMKmk0lSawpQVMOb7XobeDIV5o=; b=hQWIdICg51flFCbl4OsdDjQTPGGVlFhFsWi3MzOyqIgy0uOGSpna+Zol84PEAOMa0p auCGLm62I/vVHZVUENVXxblv/yJYz+Voezzz72+DefByCnFjZd1GE/Fgr/tod8qUWiN2 fwR/w/F2NzJT9jfZ/rQTUdqcP/HaDsenC61vE= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=t+LSSda+KATOPPphXIMKmk0lSawpQVMOb7XobeDIV5o=; b=YE5Jv2rCWb7bTW0oFuZ2GRUz8Mfkq0EvqFJZOEg85/Ic3k0+9AZqW/wGmHcjSdJ/ML nMEb+EknZh/XDyx9mev4HlfyBO/HVmwHWKGK1jLFM0tD1/+teCyoTqXkLoL9qU/YFijf llAELxgTYOyByaANYuUHsdxrnAF+WUtYlwTyaISXNlEX9WafB43VmZrPbnIM+cK3cSxN kvcSKFClE0Lv5nMxk/CQ+MMlVO9M+jdjYFuZD7QwQ9WGJvwlcH/qFTH7d59o2JAMg2zn Aoq4+10EoV2mlvPE5Z8+PzZWkGXmF8eG6EdfPbZq2xKP7+Wz9WZKJDbU8z6XJJjGHv84 EuXw== X-Gm-Message-State: APzg51BCagIzd4kHEJcjfgpJyiWxFTUCZo6LivZo6F0I4orrcv0ZTtkc QrF7HOE/4WkvOp9guKBHFVZj92uzETc= X-Received: by 2002:a17:902:24e1:: with SMTP id l30-v6mr40912333plg.315.1537471119734; Thu, 20 Sep 2018 12:18:39 -0700 (PDT) Received: from localhost.localdomain ([209.121.128.187]) by smtp.gmail.com with ESMTPSA id k13-v6sm4424443pgf.37.2018.09.20.12.18.38 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 20 Sep 2018 12:18:38 -0700 (PDT) From: Mathieu Poirier To: gregkh@linuxfoundation.org Cc: linux-kernel@vger.kernel.org Subject: [PATCH 12/44] coresight: perf: Fix per cpu path management Date: Thu, 20 Sep 2018 13:17:47 -0600 Message-Id: <1537471099-19781-13-git-send-email-mathieu.poirier@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1537471099-19781-1-git-send-email-mathieu.poirier@linaro.org> References: <1537471099-19781-1-git-send-email-mathieu.poirier@linaro.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Suzuki K Poulose We create a coresight trace path for each online CPU when we start the event. We rely on the number of online CPUs and then go on to allocate an array matching the "number of online CPUs" for holding the path and then uses normal CPU id as the index to the array. This is problematic as we could have some offline CPUs causing us to access beyond the actual array size (e.g, on a dual SMP system, if CPU0 is offline, CPU1 could be really accessing beyond the array). The solution is to switch to per-cpu array for holding the path. Cc: Mathieu Poirier Signed-off-by: Suzuki K Poulose Signed-off-by: Mathieu Poirier --- drivers/hwtracing/coresight/coresight-etm-perf.c | 55 +++++++++++++++++------- 1 file changed, 40 insertions(+), 15 deletions(-) -- 2.7.4 diff --git a/drivers/hwtracing/coresight/coresight-etm-perf.c b/drivers/hwtracing/coresight/coresight-etm-perf.c index 677695635211..6338dd180031 100644 --- a/drivers/hwtracing/coresight/coresight-etm-perf.c +++ b/drivers/hwtracing/coresight/coresight-etm-perf.c @@ -12,6 +12,7 @@ #include #include #include +#include #include #include #include @@ -33,7 +34,7 @@ struct etm_event_data { struct work_struct work; cpumask_t mask; void *snk_config; - struct list_head **path; + struct list_head * __percpu *path; }; static DEFINE_PER_CPU(struct perf_output_handle, ctx_handle); @@ -61,6 +62,18 @@ static const struct attribute_group *etm_pmu_attr_groups[] = { NULL, }; +static inline struct list_head ** +etm_event_cpu_path_ptr(struct etm_event_data *data, int cpu) +{ + return per_cpu_ptr(data->path, cpu); +} + +static inline struct list_head * +etm_event_cpu_path(struct etm_event_data *data, int cpu) +{ + return *etm_event_cpu_path_ptr(data, cpu); +} + static void etm_event_read(struct perf_event *event) {} static int etm_addr_filters_alloc(struct perf_event *event) @@ -120,23 +133,26 @@ static void free_event_data(struct work_struct *work) */ if (event_data->snk_config) { cpu = cpumask_first(mask); - sink = coresight_get_sink(event_data->path[cpu]); + sink = coresight_get_sink(etm_event_cpu_path(event_data, cpu)); if (sink_ops(sink)->free_buffer) sink_ops(sink)->free_buffer(event_data->snk_config); } for_each_cpu(cpu, mask) { - if (!(IS_ERR_OR_NULL(event_data->path[cpu]))) - coresight_release_path(event_data->path[cpu]); + struct list_head **ppath; + + ppath = etm_event_cpu_path_ptr(event_data, cpu); + if (!(IS_ERR_OR_NULL(*ppath))) + coresight_release_path(*ppath); + *ppath = NULL; } - kfree(event_data->path); + free_percpu(event_data->path); kfree(event_data); } static void *alloc_event_data(int cpu) { - int size; cpumask_t *mask; struct etm_event_data *event_data; @@ -147,7 +163,6 @@ static void *alloc_event_data(int cpu) /* Make sure nothing disappears under us */ get_online_cpus(); - size = num_online_cpus(); mask = &event_data->mask; if (cpu != -1) @@ -164,8 +179,8 @@ static void *alloc_event_data(int cpu) * unused memory when dealing with single CPU trace scenarios is small * compared to the cost of searching through an optimized array. */ - event_data->path = kcalloc(size, - sizeof(struct list_head *), GFP_KERNEL); + event_data->path = alloc_percpu(struct list_head *); + if (!event_data->path) { kfree(event_data); return NULL; @@ -213,6 +228,7 @@ static void *etm_setup_aux(int event_cpu, void **pages, /* Setup the path for each CPU in a trace session */ for_each_cpu(cpu, mask) { + struct list_head *path; struct coresight_device *csdev; csdev = per_cpu(csdev_src, cpu); @@ -224,9 +240,11 @@ static void *etm_setup_aux(int event_cpu, void **pages, * list of devices from source to sink that can be * referenced later when the path is actually needed. */ - event_data->path[cpu] = coresight_build_path(csdev, sink); - if (IS_ERR(event_data->path[cpu])) + path = coresight_build_path(csdev, sink); + if (IS_ERR(path)) goto err; + + *etm_event_cpu_path_ptr(event_data, cpu) = path; } if (!sink_ops(sink)->alloc_buffer) @@ -255,6 +273,7 @@ static void etm_event_start(struct perf_event *event, int flags) struct etm_event_data *event_data; struct perf_output_handle *handle = this_cpu_ptr(&ctx_handle); struct coresight_device *sink, *csdev = per_cpu(csdev_src, cpu); + struct list_head *path; if (!csdev) goto fail; @@ -267,8 +286,9 @@ static void etm_event_start(struct perf_event *event, int flags) if (!event_data) goto fail; + path = etm_event_cpu_path(event_data, cpu); /* We need a sink, no need to continue without one */ - sink = coresight_get_sink(event_data->path[cpu]); + sink = coresight_get_sink(path); if (WARN_ON_ONCE(!sink || !sink_ops(sink)->set_buffer)) goto fail_end_stop; @@ -278,7 +298,7 @@ static void etm_event_start(struct perf_event *event, int flags) goto fail_end_stop; /* Nothing will happen without a path */ - if (coresight_enable_path(event_data->path[cpu], CS_MODE_PERF)) + if (coresight_enable_path(path, CS_MODE_PERF)) goto fail_end_stop; /* Tell the perf core the event is alive */ @@ -306,6 +326,7 @@ static void etm_event_stop(struct perf_event *event, int mode) struct coresight_device *sink, *csdev = per_cpu(csdev_src, cpu); struct perf_output_handle *handle = this_cpu_ptr(&ctx_handle); struct etm_event_data *event_data = perf_get_aux(handle); + struct list_head *path; if (event->hw.state == PERF_HES_STOPPED) return; @@ -313,7 +334,11 @@ static void etm_event_stop(struct perf_event *event, int mode) if (!csdev) return; - sink = coresight_get_sink(event_data->path[cpu]); + path = etm_event_cpu_path(event_data, cpu); + if (!path) + return; + + sink = coresight_get_sink(path); if (!sink) return; @@ -344,7 +369,7 @@ static void etm_event_stop(struct perf_event *event, int mode) } /* Disabling the path make its elements available to other sessions */ - coresight_disable_path(event_data->path[cpu]); + coresight_disable_path(path); } static int etm_event_add(struct perf_event *event, int mode) From patchwork Thu Sep 20 19:17:48 2018 Content-Type: text/plain; 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And this can cause a lockdep warning, like : [ 54.632093] ====================================================== [ 54.638207] WARNING: possible circular locking dependency detected [ 54.644322] 4.18.0-rc3-00042-g2d39e6356bb7-dirty #309 Not tainted [ 54.650350] ------------------------------------------------------ [ 54.656464] perf/2862 is trying to acquire lock: [ 54.661031] 000000007e21d170 (&event->mmap_mutex){+.+.}, at: perf_event_set_output+0x98/0x138 [ 54.669486] [ 54.669486] but task is already holding lock: [ 54.675256] 000000001080eb1b (&cpuctx_mutex){+.+.}, at: perf_event_ctx_lock_nested+0xf8/0x1f0 [ 54.683704] [ 54.683704] which lock already depends on the new lock. [ 54.683704] [ 54.691797] [ 54.691797] the existing dependency chain (in reverse order) is: [ 54.699201] [ 54.699201] -> #3 (&cpuctx_mutex){+.+.}: [ 54.704556] __mutex_lock+0x70/0x808 [ 54.708608] mutex_lock_nested+0x1c/0x28 [ 54.713005] perf_event_init_cpu+0x8c/0xd8 [ 54.717574] perf_event_init+0x194/0x1d4 [ 54.721971] start_kernel+0x2b8/0x42c [ 54.726107] [ 54.726107] -> #2 (pmus_lock){+.+.}: [ 54.731114] __mutex_lock+0x70/0x808 [ 54.735165] mutex_lock_nested+0x1c/0x28 [ 54.739560] perf_event_init_cpu+0x30/0xd8 [ 54.744129] cpuhp_invoke_callback+0x84/0x248 [ 54.748954] _cpu_up+0xe8/0x1c8 [ 54.752576] do_cpu_up+0xa8/0xc8 [ 54.756283] cpu_up+0x10/0x18 [ 54.759731] smp_init+0xa0/0x114 [ 54.763438] kernel_init_freeable+0x120/0x288 [ 54.768264] kernel_init+0x10/0x108 [ 54.772230] ret_from_fork+0x10/0x18 [ 54.776279] [ 54.776279] -> #1 (cpu_hotplug_lock.rw_sem){++++}: [ 54.782492] cpus_read_lock+0x34/0xb0 [ 54.786631] etm_setup_aux+0x5c/0x308 [ 54.790769] rb_alloc_aux+0x1ec/0x300 [ 54.794906] perf_mmap+0x284/0x610 [ 54.798787] mmap_region+0x388/0x570 [ 54.802838] do_mmap+0x344/0x4f8 [ 54.806544] vm_mmap_pgoff+0xe4/0x110 [ 54.810682] ksys_mmap_pgoff+0xa8/0x240 [ 54.814992] sys_mmap+0x18/0x28 [ 54.818613] el0_svc_naked+0x30/0x34 [ 54.822661] [ 54.822661] -> #0 (&event->mmap_mutex){+.+.}: [ 54.828445] lock_acquire+0x48/0x68 [ 54.832409] __mutex_lock+0x70/0x808 [ 54.836459] mutex_lock_nested+0x1c/0x28 [ 54.840855] perf_event_set_output+0x98/0x138 [ 54.845680] _perf_ioctl+0x2a0/0x6a0 [ 54.849731] perf_ioctl+0x3c/0x68 [ 54.853526] do_vfs_ioctl+0xb8/0xa20 [ 54.857577] ksys_ioctl+0x80/0xb8 [ 54.861370] sys_ioctl+0xc/0x18 [ 54.864990] el0_svc_naked+0x30/0x34 [ 54.869039] [ 54.869039] other info that might help us debug this: [ 54.869039] [ 54.876960] Chain exists of: [ 54.876960] &event->mmap_mutex --> pmus_lock --> &cpuctx_mutex [ 54.876960] [ 54.887217] Possible unsafe locking scenario: [ 54.887217] [ 54.893073] CPU0 CPU1 [ 54.897552] ---- ---- [ 54.902030] lock(&cpuctx_mutex); [ 54.905396] lock(pmus_lock); [ 54.910911] lock(&cpuctx_mutex); [ 54.916770] lock(&event->mmap_mutex); [ 54.920566] [ 54.920566] *** DEADLOCK *** [ 54.920566] [ 54.926424] 1 lock held by perf/2862: [ 54.930042] #0: 000000001080eb1b (&cpuctx_mutex){+.+.}, at: perf_event_ctx_lock_nested+0xf8/0x1f0 Since we have per-cpu array for the paths, we simply don't care about the number of online CPUs. This patch gets rid of the {get/put}_online_cpus(). Reported-by: Mathieu Poirier Signed-off-by: Suzuki K Poulose Signed-off-by: Mathieu Poirier --- drivers/hwtracing/coresight/coresight-etm-perf.c | 3 --- 1 file changed, 3 deletions(-) -- 2.7.4 diff --git a/drivers/hwtracing/coresight/coresight-etm-perf.c b/drivers/hwtracing/coresight/coresight-etm-perf.c index 6338dd180031..6beb662d230c 100644 --- a/drivers/hwtracing/coresight/coresight-etm-perf.c +++ b/drivers/hwtracing/coresight/coresight-etm-perf.c @@ -161,15 +161,12 @@ static void *alloc_event_data(int cpu) if (!event_data) return NULL; - /* Make sure nothing disappears under us */ - get_online_cpus(); mask = &event_data->mask; if (cpu != -1) cpumask_set_cpu(cpu, mask); else cpumask_copy(mask, cpu_online_mask); - put_online_cpus(); /* * Each CPU has a single path between source and destination. As such From patchwork Thu Sep 20 19:17:49 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mathieu Poirier X-Patchwork-Id: 147135 Delivered-To: patch@linaro.org Received: by 2002:a2e:1648:0:0:0:0:0 with SMTP id 8-v6csp2376198ljw; Thu, 20 Sep 2018 12:18:47 -0700 (PDT) X-Google-Smtp-Source: ANB0VdY9vDyEIgjhOnO1s3snPteEjCfOqZdVP/L1M4BqSdTxlt32nEuK2f/uutIVccxkGdJVRYi0 X-Received: by 2002:a62:1605:: with SMTP id 5-v6mr42656023pfw.11.1537471126869; Thu, 20 Sep 2018 12:18:46 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1537471126; cv=none; d=google.com; s=arc-20160816; b=C6BW5AEOOdSVLwNzs2IlsBVZ4xjSd5Wna7ujGvDxvzlwxIkMV1pGvieMuxIboO0r58 i7i949Dlg25EWSKApIaFW44PwIp11hRVqI6m0gVSQ8be9SZo1DX3bKVdpoGPf00u3V+z WrtOXJ3kPRAMBzidUwZFGDsjcBsuYYcCMWTJN+C48PNAJq8teoqravsRkDiSV1oWuzF6 Pdaw/pt4b/o35hIWdZPToJxBMKJ+ydZopQU+ZYJHPzF8+jJGxsWhlq0PdITfsopJ1IUn AvJxnopZfUAW+02/Bk1Kl4jtUQuTfh45tK2aA5nC/ndF70kltld1BJ7KWiV/5gQWE12A z9Yw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature; bh=/cufbapRdtpm9uJwj2FU3UqUyWMulu2ZwmwOUUarkR0=; b=hDpVfStVkEX2ih3jllybmvmDRRsTtgGUmCt47WEA6C4Lw6B17ByNQxuVtWTnkC8M7v rJis2xXrzYRUErEOO+Gl1g8cw23bomJNr7HNRqiqxL0OpDnJyPRFL1A8ZIso3b20pY2O Lqxq1OMQ1FaLBtd09ZNRH+JPCKskyQ5SwyyRUU9ddRHyIWEoarQ8yGr1P8Y9AAVqejqk KsUjeAVrmRPIdmRzdbqGa8xMu+Y/3qUfc/IXn4UzmqypugfykvaD6plehcu6NlHjedP5 4zr4iOm8mSMJsxCYh1laK9LbRESM9OkmFnImGp79nAXGNGH6s+Dzh4AKsoFeGeemk4bQ A1bg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=HnHx5iJH; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id p29-v6si5033791pgd.442.2018.09.20.12.18.46; Thu, 20 Sep 2018 12:18:46 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=HnHx5iJH; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2388818AbeIUBDn (ORCPT + 32 others); Thu, 20 Sep 2018 21:03:43 -0400 Received: from mail-pg1-f196.google.com ([209.85.215.196]:45620 "EHLO mail-pg1-f196.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2388779AbeIUBDm (ORCPT ); Thu, 20 Sep 2018 21:03:42 -0400 Received: by mail-pg1-f196.google.com with SMTP id t70-v6so71053pgd.12 for ; Thu, 20 Sep 2018 12:18:43 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=/cufbapRdtpm9uJwj2FU3UqUyWMulu2ZwmwOUUarkR0=; b=HnHx5iJH38dagwRLuzloFX6WVt158NVGcnSNc9YrY3xkiYhFOp1KgJHkXLZguQFuaP 989/RAuOz+ygOEQuuyN7V9/4tr/xmKVuKxw1iI5KdRPYsic9TH1mIVkMTjqTzMw3d1Oc yn0VAQ32bs03S2USVaM/39k3rcDcx7iXHy8D8= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=/cufbapRdtpm9uJwj2FU3UqUyWMulu2ZwmwOUUarkR0=; b=IBgoRM/CuXicWbrfznsxGi76h6s7j+sbFAlMFuYMhY3LvD+53miu7S0Lei4Aj5kGF7 8EufDISGFGK4U4GcCqkyq6DKceIhv67PMSra07y4fWDyZTpbYTGnrusQ8QnoGQ7MWhL9 NgJ6smB3uDZIT0DcrzU2+EGSe0yKK3iQArs1SqZluEkHNSB/F+6U4rplY0Jkrkn/elxw /Zpxy8qNEyyaMOVwQG0uMWiO4gTTS4okS4JNtE2BB1qN0S3m2QjVohlnHfPKeJH77Gb7 QVPEszyxR3GFKaUPoy32UT3rIsvy1vhdf6u0eZFHfyINkUrcGI2XyTcYBoIgRmOoD7oi 2/tg== X-Gm-Message-State: APzg51Bsstvo83trhPZ3vEijeqd8ZP2gPVf+kYVCCtoSKa2hii71xcXP s5rVcQaIV4CehNBA2jTl+/q8jg== X-Received: by 2002:a62:591a:: with SMTP id n26-v6mr42784560pfb.94.1537471122978; Thu, 20 Sep 2018 12:18:42 -0700 (PDT) Received: from localhost.localdomain ([209.121.128.187]) by smtp.gmail.com with ESMTPSA id k13-v6sm4424443pgf.37.2018.09.20.12.18.41 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 20 Sep 2018 12:18:41 -0700 (PDT) From: Mathieu Poirier To: gregkh@linuxfoundation.org Cc: linux-kernel@vger.kernel.org Subject: [PATCH 14/44] coresight: perf: Allow tracing on hotplugged CPUs Date: Thu, 20 Sep 2018 13:17:49 -0600 Message-Id: <1537471099-19781-15-git-send-email-mathieu.poirier@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1537471099-19781-1-git-send-email-mathieu.poirier@linaro.org> References: <1537471099-19781-1-git-send-email-mathieu.poirier@linaro.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Suzuki K Poulose At the moment, if there is no CPU specified for a given event, we use cpu_online_mask and try to build path for each of the CPUs in the mask. This could prevent any CPU that is turned online later to be used for the tracing. This patch changes to use the cpu_present_mask and tries to build path for as much CPUs as possible ignoring the failures in building path for some of the CPUs. If ever we try to trace on those CPUs, we fail the operation. Based on a patch from Mathieu Poirier. Cc: Mathieu Poirier Signed-off-by: Suzuki K Poulose Signed-off-by: Mathieu Poirier --- drivers/hwtracing/coresight/coresight-etm-perf.c | 44 ++++++++++++++++-------- 1 file changed, 29 insertions(+), 15 deletions(-) -- 2.7.4 diff --git a/drivers/hwtracing/coresight/coresight-etm-perf.c b/drivers/hwtracing/coresight/coresight-etm-perf.c index 6beb662d230c..afe7e7fc1a93 100644 --- a/drivers/hwtracing/coresight/coresight-etm-perf.c +++ b/drivers/hwtracing/coresight/coresight-etm-perf.c @@ -127,11 +127,9 @@ static void free_event_data(struct work_struct *work) event_data = container_of(work, struct etm_event_data, work); mask = &event_data->mask; - /* - * First deal with the sink configuration. See comment in - * etm_setup_aux() about why we take the first available path. - */ - if (event_data->snk_config) { + + /* Free the sink buffers, if there are any */ + if (event_data->snk_config && !WARN_ON(cpumask_empty(mask))) { cpu = cpumask_first(mask); sink = coresight_get_sink(etm_event_cpu_path(event_data, cpu)); if (sink_ops(sink)->free_buffer) @@ -166,7 +164,7 @@ static void *alloc_event_data(int cpu) if (cpu != -1) cpumask_set_cpu(cpu, mask); else - cpumask_copy(mask, cpu_online_mask); + cpumask_copy(mask, cpu_present_mask); /* * Each CPU has a single path between source and destination. As such @@ -218,19 +216,32 @@ static void *etm_setup_aux(int event_cpu, void **pages, * on the cmd line. As such the "enable_sink" flag in sysFS is reset. */ sink = coresight_get_enabled_sink(true); - if (!sink) + if (!sink || !sink_ops(sink)->alloc_buffer) goto err; mask = &event_data->mask; - /* Setup the path for each CPU in a trace session */ + /* + * Setup the path for each CPU in a trace session. We try to build + * trace path for each CPU in the mask. If we don't find an ETM + * for the CPU or fail to build a path, we clear the CPU from the + * mask and continue with the rest. If ever we try to trace on those + * CPUs, we can handle it and fail the session. + */ for_each_cpu(cpu, mask) { struct list_head *path; struct coresight_device *csdev; csdev = per_cpu(csdev_src, cpu); - if (!csdev) - goto err; + /* + * If there is no ETM associated with this CPU clear it from + * the mask and continue with the rest. If ever we try to trace + * on this CPU, we handle it accordingly. + */ + if (!csdev) { + cpumask_clear_cpu(cpu, mask); + continue; + } /* * Building a path doesn't enable it, it simply builds a @@ -238,17 +249,20 @@ static void *etm_setup_aux(int event_cpu, void **pages, * referenced later when the path is actually needed. */ path = coresight_build_path(csdev, sink); - if (IS_ERR(path)) - goto err; + if (IS_ERR(path)) { + cpumask_clear_cpu(cpu, mask); + continue; + } *etm_event_cpu_path_ptr(event_data, cpu) = path; } - if (!sink_ops(sink)->alloc_buffer) + /* If we don't have any CPUs ready for tracing, abort */ + cpu = cpumask_first(mask); + if (cpu >= nr_cpu_ids) goto err; - cpu = cpumask_first(mask); - /* Get the AUX specific data from the sink buffer */ + /* Allocate the sink buffer for this session */ event_data->snk_config = sink_ops(sink)->alloc_buffer(sink, cpu, pages, nr_pages, overwrite); From patchwork Thu Sep 20 19:17:50 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mathieu Poirier X-Patchwork-Id: 147136 Delivered-To: patch@linaro.org Received: by 2002:a2e:1648:0:0:0:0:0 with SMTP id 8-v6csp2376232ljw; Thu, 20 Sep 2018 12:18:48 -0700 (PDT) X-Google-Smtp-Source: ANB0VdaFPcpXRVzXftoWgi4yA4c0Mdjjg0QuKrF1/IhCJR4L8/3WX62uemlg+yMq0YXRlUx6fBV/ X-Received: by 2002:a62:a216:: with SMTP id m22-v6mr42257922pff.163.1537471128421; Thu, 20 Sep 2018 12:18:48 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1537471128; cv=none; d=google.com; s=arc-20160816; b=m018N3jsQD7fBzALbSV2SQa6NBvZGp7tK7yjT+5yg/g215ndJaZgXhu6z5VmXvDS0W ni1lTy+Dnmse7v/wsjHSim6gsQOxlNHxk6ZlgGq2A2zJm3ChSnfxeGz3WcmNZu6KGGyN 7yyefx+Mor/h3FYL48hvaPeYDlzm5l1PlQO+0R4QOXOf+coCt2cE/A2eNLlgB2PGnHxI 8fEpN1cVNYcRXOz6iQj2+pgcdz5JOhRxnoczGtD1T49hcii9KTwGSyOD9RI2xo2jpbK9 Bw+i1F1oN5CPu0ah32gltDogoDI1yepLa3EX7FVO4JlO7oT2hXyB6z28syxwY6BFKIAx P/dg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature; bh=ZRpxBhstQqFQwU6Y9NFTCaAtWvfL9rLmbEuk40AVBmc=; b=bYGJwQVFX9Brkp9B/5JTIs4owkIWLGwZeT5xAuSIVGiP6/0HtYo5QcgguqBRlGGZ2G HYFrAohMrWrPH/c/pKvyg7obqLc37u8zKE8dicE5VuhDU0+YRD2tjXqljmka3Iwr+mNs +YVIwjnYtllKY5zkqott5lcCS1My2osrcLDh0oTXFzP8HeQyt/WbuZYNOrA3Et7TIwY+ azBliKQMzmwRG9RAqn0T0A+zKFz1Ajm9blmK5shvrJviQStrJK+7OdDraHoKBKKswbMu dZRthvtlSBwkIqY7HaI3LATTor65yqd39wppYMC8fLBnxCLwcgouUpjCKFzyEhcjZOwr brHw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="DD/v9ZdU"; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id a1-v6si23828838pgg.34.2018.09.20.12.18.48; Thu, 20 Sep 2018 12:18:48 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="DD/v9ZdU"; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2388831AbeIUBDo (ORCPT + 32 others); Thu, 20 Sep 2018 21:03:44 -0400 Received: from mail-pf1-f196.google.com ([209.85.210.196]:37719 "EHLO mail-pf1-f196.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2388779AbeIUBDn (ORCPT ); Thu, 20 Sep 2018 21:03:43 -0400 Received: by mail-pf1-f196.google.com with SMTP id h69-v6so4826109pfd.4 for ; Thu, 20 Sep 2018 12:18:44 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=ZRpxBhstQqFQwU6Y9NFTCaAtWvfL9rLmbEuk40AVBmc=; b=DD/v9ZdULDaaDFJrEGuLvI68iRFEFUWmC/BLFTAAE380yYlWPLZiET2S0pNTuznmQO 6D5Jkm8lZd5Fp4bY6eR22twKi+VZ5DeDENB8ni0NZVm7wicx0AIa0OFxOoe0YLe0hhVd Sjd5nDHLwM65tvukeo8noORSddQdi7mUKZCxw= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=ZRpxBhstQqFQwU6Y9NFTCaAtWvfL9rLmbEuk40AVBmc=; b=JtxS3Bp8yI/i4xgoDcj8CwcdZ0uWLab7erBgGdneyly6MkGCk6bOpx4gzGMJpBm90w dyB/hQ7yYSjAaqZxLaZApwdG47S4Pq04N4uw1yYV6K/jzEdpNN6uQEdvmP5H/psA5fYS Tu0/X7R7i7eEysF6lpTO+bCOdUCkCK9oVUR/wMDdCdq/S5zQOa/mlxC9HUs0p/fLoLId dL4DWdhnsVCTFf58S2yfg4hAEdhb9H5czpvty9OytjBCRdhDgKhpM5gwcBVtMrM8+VtA FLEeQRhR3eL3yGdqKMiisClkWPP3Mr7rmmDe2Hb1Kl4mUGqQSmz/8tWOTYExy7kR/pnZ RVQA== X-Gm-Message-State: APzg51D/xkEzfCbs25m5JRtgRpobrZcBubXQrcZpxAESZtptSw/qLVuB J+F8qGInLs/ChOUFLudvOZBhThS0iPc= X-Received: by 2002:a62:6cc6:: with SMTP id h189-v6mr4937473pfc.23.1537471124485; Thu, 20 Sep 2018 12:18:44 -0700 (PDT) Received: from localhost.localdomain ([209.121.128.187]) by smtp.gmail.com with ESMTPSA id k13-v6sm4424443pgf.37.2018.09.20.12.18.43 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 20 Sep 2018 12:18:43 -0700 (PDT) From: Mathieu Poirier To: gregkh@linuxfoundation.org Cc: linux-kernel@vger.kernel.org Subject: [PATCH 15/44] coresight: perf: Disable trace path upon source error Date: Thu, 20 Sep 2018 13:17:50 -0600 Message-Id: <1537471099-19781-16-git-send-email-mathieu.poirier@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1537471099-19781-1-git-send-email-mathieu.poirier@linaro.org> References: <1537471099-19781-1-git-send-email-mathieu.poirier@linaro.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Suzuki K Poulose We enable the trace path, before activating the source. If we fail to enable the source, we must disable the path to make sure it is available for another session. Cc: Mathieu Poirier Signed-off-by: Suzuki K Poulose Signed-off-by: Mathieu Poirier --- drivers/hwtracing/coresight/coresight-etm-perf.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) -- 2.7.4 diff --git a/drivers/hwtracing/coresight/coresight-etm-perf.c b/drivers/hwtracing/coresight/coresight-etm-perf.c index afe7e7fc1a93..6db76ce6ba5f 100644 --- a/drivers/hwtracing/coresight/coresight-etm-perf.c +++ b/drivers/hwtracing/coresight/coresight-etm-perf.c @@ -317,11 +317,13 @@ static void etm_event_start(struct perf_event *event, int flags) /* Finally enable the tracer */ if (source_ops(csdev)->enable(csdev, event, CS_MODE_PERF)) - goto fail_end_stop; + goto fail_disable_path; out: return; +fail_disable_path: + coresight_disable_path(path); fail_end_stop: perf_aux_output_flag(handle, PERF_AUX_FLAG_TRUNCATED); perf_aux_output_end(handle, 0); From patchwork Thu Sep 20 19:17:51 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mathieu Poirier X-Patchwork-Id: 147137 Delivered-To: patch@linaro.org Received: by 2002:a2e:1648:0:0:0:0:0 with SMTP id 8-v6csp2376257ljw; Thu, 20 Sep 2018 12:18:50 -0700 (PDT) X-Google-Smtp-Source: ANB0VdbN4fCb2i6hyX1T29Qpp3geu695aK3wb/UDFOhdU120C1W7G0jK13tIMpIcQBH+uBTQAjqr X-Received: by 2002:a62:4299:: with SMTP id h25-v6mr42339002pfd.73.1537471130131; Thu, 20 Sep 2018 12:18:50 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1537471130; cv=none; d=google.com; s=arc-20160816; b=tj1HqqckGpEsehK6uux1hLiS4vU4UIbc/sy6abzjgEE2xUs7Nb+seH85vhT5cRVI+U veuVu3gvK0mSgeWCTwgl1BLCQn7tHUIs2Eas4Jl4fVo7miuc8wndlY0e9Rv3e8nc08QM 28evVjVi+4ewaYSce8kys+aj1bqBlw2uzBVtbx8lOA7QSLIpTIRNBRGfTfjL+Srpb4oe Ue8Secu8ojNcFKlkfp6Cma6Q+7czuBIGnruE7PauiD3SdVG9oo6X44gIUVUle+usgorJ APoQTjThmZv3TEUxn4vedXBetZIL8SAY55PTBImHv2K5FfLIorO/JPiKyyBH+PlXxcii dArQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature; bh=6EkMjkDx/f9fTkmGtp6dxqtX1oUpZJdV8MS3j9JBooc=; b=GbGlhAmW6PDHbiykVJ7ub5a1I5608KSKyPdXcOIGD219H6gHfWDClIoYB2EI8sKssc V5hW36fUmKZrlEaKE9jVoxupqvrNl9M23sHr1krxLfH5hmasQHg+/jLLubMtnw5W7Xtk 5xMwg9npnNMvkuWa++7DusxEekjrGw+EN//1msCy3FsqFrbBh4izGlC+f6kROb3syOOD FzPKBEV0HFQ/RVKrh3dlS7zomUskFQ57Htlh6epVPnaYWx8XXXccjXQCm54UOdVf6Kv2 nunlzx7e08uEFJDLKhDtzdKY1N1CNiGznKpV5Eex8w3Qy2qMdMSnAPRQAOXsPOpHkb+g nYDA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=FaORIfXX; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id z71-v6si25072197pff.223.2018.09.20.12.18.49; Thu, 20 Sep 2018 12:18:50 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=FaORIfXX; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2388845AbeIUBDq (ORCPT + 32 others); Thu, 20 Sep 2018 21:03:46 -0400 Received: from mail-pl1-f194.google.com ([209.85.214.194]:36701 "EHLO mail-pl1-f194.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2388833AbeIUBDp (ORCPT ); Thu, 20 Sep 2018 21:03:45 -0400 Received: by mail-pl1-f194.google.com with SMTP id p5-v6so4798339plk.3 for ; Thu, 20 Sep 2018 12:18:46 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=6EkMjkDx/f9fTkmGtp6dxqtX1oUpZJdV8MS3j9JBooc=; b=FaORIfXXNsTuQuYG4qFgxLEoYNRCRTKHJHW9Asa//G2uZnzAPtHCEmZj+xcEXzSA9v 1oAeGNiYS5m/3/EdRL6E+kdt6xTl0f5u2fn4Gnke4E7fcBUPLPljGqhyrabAkKY5CwP6 49CQpUmttI0uNOMfiNWssAWjbhidQiyUAhY5w= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=6EkMjkDx/f9fTkmGtp6dxqtX1oUpZJdV8MS3j9JBooc=; b=UleRIMn3NoScTFR5X2XOIG6eq/RlphkYNsiIs0INXDBdeRLBFmgRGKk9KhKc7/p8I1 fnt2vL4qc8NoLyUBP2Nf5GZ7b2Xgu/+4fynLwzBXwL3uRdDcO5uszQqa4vVQLdQfULlG OXC5kd8ottmlnwzCrK+UT8OJtIqLGm6n3uoz2H+hwJIyOXnYjE00JMdQABi4awT1MFzX HzGjl6KyPOWhlMu9PLTAOTiYUdVq/EmFZ73lgEx6jdQdV5WJ771dgHcadOswlsiQIBWS PwZRNPyuJQqvgeklnMETxVh2e0Uhy4uVQb4Cp9d4JSkRNu0CM6FX0neC0kEH3/HSZQJr M0XQ== X-Gm-Message-State: APzg51DP1/LDPmrkcDlLQ2CSdIpORKhl1t0/jFdmkq7B5e2H/GlBBoRy MzRuazPAa6vjjDtub7uLATUd6+Vsy1g= X-Received: by 2002:a17:902:344:: with SMTP id 62-v6mr41091619pld.164.1537471125976; Thu, 20 Sep 2018 12:18:45 -0700 (PDT) Received: from localhost.localdomain ([209.121.128.187]) by smtp.gmail.com with ESMTPSA id k13-v6sm4424443pgf.37.2018.09.20.12.18.44 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 20 Sep 2018 12:18:44 -0700 (PDT) From: Mathieu Poirier To: gregkh@linuxfoundation.org Cc: linux-kernel@vger.kernel.org Subject: [PATCH 16/44] coresight: tmc-etr: Handle driver mode specific ETR buffers Date: Thu, 20 Sep 2018 13:17:51 -0600 Message-Id: <1537471099-19781-17-git-send-email-mathieu.poirier@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1537471099-19781-1-git-send-email-mathieu.poirier@linaro.org> References: <1537471099-19781-1-git-send-email-mathieu.poirier@linaro.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Suzuki K Poulose Since the ETR could be driven either by SYSFS or by perf, it becomes complicated how we deal with the buffers used for each of these modes. The ETR driver cannot simply free the current attached buffer without knowing the provider (i.e, sysfs vs perf). To solve this issue, we provide: 1) the driver-mode specific etr buffer to be retained in the drvdata 2) the etr_buf for a session should be passed on when enabling the hardware, which will be stored in drvdata->etr_buf. This will be replaced (not free'd) as soon as the hardware is disabled, after necessary sync operation. The advantages of this are : 1) The common code path doesn't need to worry about how to dispose an existing buffer, if it is about to start a new session with a different buffer, possibly in a different mode. 2) The driver mode can control its buffers and can get access to the saved session even when the hardware is operating in a different mode. (e.g, we can still access a trace buffer from a sysfs mode even if the etr is now used in perf mode, without disrupting the current session.) Towards this, we introduce a sysfs specific data which will hold the etr_buf used for sysfs mode of operation, controlled solely by the sysfs mode handling code. Cc: Mathieu Poirier Signed-off-by: Suzuki K Poulose Signed-off-by: Mathieu Poirier --- drivers/hwtracing/coresight/coresight-tmc-etr.c | 58 ++++++++++++++++--------- drivers/hwtracing/coresight/coresight-tmc.h | 2 + 2 files changed, 40 insertions(+), 20 deletions(-) -- 2.7.4 diff --git a/drivers/hwtracing/coresight/coresight-tmc-etr.c b/drivers/hwtracing/coresight/coresight-tmc-etr.c index 11963647e19a..2d6f428176ff 100644 --- a/drivers/hwtracing/coresight/coresight-tmc-etr.c +++ b/drivers/hwtracing/coresight/coresight-tmc-etr.c @@ -895,10 +895,15 @@ static void tmc_sync_etr_buf(struct tmc_drvdata *drvdata) tmc_etr_buf_insert_barrier_packet(etr_buf, etr_buf->offset); } -static void tmc_etr_enable_hw(struct tmc_drvdata *drvdata) +static void tmc_etr_enable_hw(struct tmc_drvdata *drvdata, + struct etr_buf *etr_buf) { u32 axictl, sts; - struct etr_buf *etr_buf = drvdata->etr_buf; + + /* Callers should provide an appropriate buffer for use */ + if (WARN_ON(!etr_buf || drvdata->etr_buf)) + return; + drvdata->etr_buf = etr_buf; /* * If this ETR is connected to a CATU, enable it before we turn @@ -960,13 +965,16 @@ static void tmc_etr_enable_hw(struct tmc_drvdata *drvdata) * also updating the @bufpp on where to find it. Since the trace data * starts at anywhere in the buffer, depending on the RRP, we adjust the * @len returned to handle buffer wrapping around. + * + * We are protected here by drvdata->reading != 0, which ensures the + * sysfs_buf stays alive. */ ssize_t tmc_etr_get_sysfs_trace(struct tmc_drvdata *drvdata, loff_t pos, size_t len, char **bufpp) { s64 offset; ssize_t actual = len; - struct etr_buf *etr_buf = drvdata->etr_buf; + struct etr_buf *etr_buf = drvdata->sysfs_buf; if (pos + actual > etr_buf->len) actual = etr_buf->len - pos; @@ -996,7 +1004,14 @@ tmc_etr_free_sysfs_buf(struct etr_buf *buf) static void tmc_etr_sync_sysfs_buf(struct tmc_drvdata *drvdata) { - tmc_sync_etr_buf(drvdata); + struct etr_buf *etr_buf = drvdata->etr_buf; + + if (WARN_ON(drvdata->sysfs_buf != etr_buf)) { + tmc_etr_free_sysfs_buf(drvdata->sysfs_buf); + drvdata->sysfs_buf = NULL; + } else { + tmc_sync_etr_buf(drvdata); + } } static void tmc_etr_disable_hw(struct tmc_drvdata *drvdata) @@ -1017,6 +1032,8 @@ static void tmc_etr_disable_hw(struct tmc_drvdata *drvdata) /* Disable CATU device if this ETR is connected to one */ tmc_etr_disable_catu(drvdata); + /* Reset the ETR buf used by hardware */ + drvdata->etr_buf = NULL; } static int tmc_enable_etr_sink_sysfs(struct coresight_device *csdev) @@ -1024,7 +1041,7 @@ static int tmc_enable_etr_sink_sysfs(struct coresight_device *csdev) int ret = 0; unsigned long flags; struct tmc_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent); - struct etr_buf *new_buf = NULL, *free_buf = NULL; + struct etr_buf *sysfs_buf = NULL, *new_buf = NULL, *free_buf = NULL; /* * If we are enabling the ETR from disabled state, we need to make @@ -1035,7 +1052,8 @@ static int tmc_enable_etr_sink_sysfs(struct coresight_device *csdev) * with the lock released. */ spin_lock_irqsave(&drvdata->spinlock, flags); - if (!drvdata->etr_buf || (drvdata->etr_buf->size != drvdata->size)) { + sysfs_buf = READ_ONCE(drvdata->sysfs_buf); + if (!sysfs_buf || (sysfs_buf->size != drvdata->size)) { spin_unlock_irqrestore(&drvdata->spinlock, flags); /* Allocate memory with the locks released */ @@ -1064,14 +1082,14 @@ static int tmc_enable_etr_sink_sysfs(struct coresight_device *csdev) * If we don't have a buffer or it doesn't match the requested size, * use the buffer allocated above. Otherwise reuse the existing buffer. */ - if (!drvdata->etr_buf || - (new_buf && drvdata->etr_buf->size != new_buf->size)) { - free_buf = drvdata->etr_buf; - drvdata->etr_buf = new_buf; + sysfs_buf = READ_ONCE(drvdata->sysfs_buf); + if (!sysfs_buf || (new_buf && sysfs_buf->size != new_buf->size)) { + free_buf = sysfs_buf; + drvdata->sysfs_buf = new_buf; } drvdata->mode = CS_MODE_SYSFS; - tmc_etr_enable_hw(drvdata); + tmc_etr_enable_hw(drvdata, drvdata->sysfs_buf); out: spin_unlock_irqrestore(&drvdata->spinlock, flags); @@ -1156,13 +1174,13 @@ int tmc_read_prepare_etr(struct tmc_drvdata *drvdata) goto out; } - /* If drvdata::etr_buf is NULL the trace data has been read already */ - if (drvdata->etr_buf == NULL) { + /* If sysfs_buf is NULL the trace data has been read already */ + if (!drvdata->sysfs_buf) { ret = -EINVAL; goto out; } - /* Disable the TMC if need be */ + /* Disable the TMC if we are trying to read from a running session */ if (drvdata->mode == CS_MODE_SYSFS) tmc_etr_disable_hw(drvdata); @@ -1176,7 +1194,7 @@ int tmc_read_prepare_etr(struct tmc_drvdata *drvdata) int tmc_read_unprepare_etr(struct tmc_drvdata *drvdata) { unsigned long flags; - struct etr_buf *etr_buf = NULL; + struct etr_buf *sysfs_buf = NULL; /* config types are set a boot time and never change */ if (WARN_ON_ONCE(drvdata->config_type != TMC_CONFIG_TYPE_ETR)) @@ -1191,22 +1209,22 @@ int tmc_read_unprepare_etr(struct tmc_drvdata *drvdata) * buffer. Since the tracer is still enabled drvdata::buf can't * be NULL. */ - tmc_etr_enable_hw(drvdata); + tmc_etr_enable_hw(drvdata, drvdata->sysfs_buf); } else { /* * The ETR is not tracing and the buffer was just read. * As such prepare to free the trace buffer. */ - etr_buf = drvdata->etr_buf; - drvdata->etr_buf = NULL; + sysfs_buf = drvdata->sysfs_buf; + drvdata->sysfs_buf = NULL; } drvdata->reading = false; spin_unlock_irqrestore(&drvdata->spinlock, flags); /* Free allocated memory out side of the spinlock */ - if (etr_buf) - tmc_free_etr_buf(etr_buf); + if (sysfs_buf) + tmc_etr_free_sysfs_buf(sysfs_buf); return 0; } diff --git a/drivers/hwtracing/coresight/coresight-tmc.h b/drivers/hwtracing/coresight/coresight-tmc.h index 7027bd60c4cc..872f63e3651b 100644 --- a/drivers/hwtracing/coresight/coresight-tmc.h +++ b/drivers/hwtracing/coresight/coresight-tmc.h @@ -170,6 +170,7 @@ struct etr_buf { * @trigger_cntr: amount of words to store after a trigger. * @etr_caps: Bitmask of capabilities of the TMC ETR, inferred from the * device configuration register (DEVID) + * @sysfs_data: SYSFS buffer for ETR. */ struct tmc_drvdata { void __iomem *base; @@ -189,6 +190,7 @@ struct tmc_drvdata { enum tmc_mem_intf_width memwidth; u32 trigger_cntr; u32 etr_caps; + struct etr_buf *sysfs_buf; }; struct etr_buf_operations { From patchwork Thu Sep 20 19:17:52 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mathieu Poirier X-Patchwork-Id: 147138 Delivered-To: patch@linaro.org Received: by 2002:a2e:1648:0:0:0:0:0 with SMTP id 8-v6csp2376303ljw; Thu, 20 Sep 2018 12:18:51 -0700 (PDT) X-Google-Smtp-Source: ANB0VdaLusK2VPLZs/I3oZJ9XOQCCIkJaWhLLlD4YHg9qbnJURanfICjHiaxlLvf+kEmSAkBAWO0 X-Received: by 2002:a17:902:76c1:: with SMTP id j1-v6mr5002685plt.278.1537471131717; Thu, 20 Sep 2018 12:18:51 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1537471131; cv=none; d=google.com; s=arc-20160816; b=dgrhDnG/syNcWdfa1kcpjCHQR4r792ysY1BYvvTvHhAo/ldpDDdW67U1AqKjdzZfkb fNMZ0kGA4sQeRDWj2i4ncXfY/LUT5TGzFTqj0q4bd6IgfcNu0F3JYKzOkvt+tvqXH66a DE08B+/zYVa8gqPs7vhedyozKwWhK/2EoibCsK/DHfoOgQeCn1gsdnrfvjpHe7RXt/O2 DUQUXVYPO8wrWJPyucIyjg8nQ7ev+ynF7tSNK3ofQj3QDzYey/G2lFpbU7olu745szvQ WikPM7v8WlRORx4dYVosVjtcuCkh02cPGpS9DRbteI1LfsjxqMTdKjDQ2EwCUcOSeBXB X5cA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature; bh=ObPs8TBqb1FBhZucHBxXAUazksYFj4fmD4SKmUP8+rA=; b=lfgAdY8r+M5OeosbvfORpeU3a7TYueTrusYmFq51L01az5ZktNB0HtlD83ZAXzBAWg wwLoRYXx0OyqcC6ErSYNx2qG3ovWTIxXYzVBQlVuQMg+RjKqY1yhoCxxTB215AlfxreU JOruANbRuj43yNO6v5dcswdnFERnH9iTRj174E9vo/j2h/b0r/xdpvqDXggNPG2g9HpJ AelOq4llVhLwRvca81tGBAC3iHnrhUM6rzBYGW5Dy7CgqFHhnX+Dxa2UngZ0u+O7lVig CiYt27EkPB+rP/TKIYIrEzMLMA3jGhM5kxNomDNqsxzXdTrR8yK0EP3kwz5U11B1VSfX wnIA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=fsBEayu8; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id w16-v6si25963959pga.104.2018.09.20.12.18.51; Thu, 20 Sep 2018 12:18:51 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=fsBEayu8; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2388860AbeIUBDr (ORCPT + 32 others); Thu, 20 Sep 2018 21:03:47 -0400 Received: from mail-pl1-f194.google.com ([209.85.214.194]:40188 "EHLO mail-pl1-f194.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2388833AbeIUBDq (ORCPT ); Thu, 20 Sep 2018 21:03:46 -0400 Received: by mail-pl1-f194.google.com with SMTP id s17-v6so4791174plp.7 for ; Thu, 20 Sep 2018 12:18:48 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=ObPs8TBqb1FBhZucHBxXAUazksYFj4fmD4SKmUP8+rA=; b=fsBEayu8vtj+dBnKQsFWsbQLIRoK1CjTRzt94gokqPrNLPyADX1BXthDgarHA/Vf9x wGxJG6c3pgoO0Mk4Iuk14x55Q+m/3A4suWuP/C7b6pMRE3wG37jJgf9CKFbMv8W5B6T3 hMu8cemFTIWPIT63RnAIs6oWVsZSDDta9jwyU= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=ObPs8TBqb1FBhZucHBxXAUazksYFj4fmD4SKmUP8+rA=; b=oRsEik8yLRDUWlQPC0e61eKrPHSZtylxxN23vgGfA2atbb7SyOE0bbdBuQpSjUCMWH yQ0hiQa/nmYO1OnRbf3uOV/P+SszmNhck0lbrRiuLga/BEfiUX21qPX1KSUpfzjCzCSp iHE5ZnP8rxs616Z4FcMSWLvGe2mznnCHED+OPfhRyub9Bj+ltLTYkhTOKNww1yBEYUSY dQiB73r7jxuMZc/YCbf2vcGQfLLtc70Zd76TZpFttf+ISB1V5Y1UseVx1pADGLC1PQLN ZcdaYqj0pzryG6qbOzC7GjFS1gpNZl0th76lkCRiNQoKQLVNqENVTxSZtrlT/OSKl65c MMnA== X-Gm-Message-State: APzg51B1RTpbiqvZq1Drobv17EcUoLwRbumVlYDzjXzUSjPUvR6pGSY7 AhpCO87o0Mejmge9FdVjCsrOKiCD8FY= X-Received: by 2002:a17:902:6806:: with SMTP id h6-v6mr41442637plk.304.1537471127643; Thu, 20 Sep 2018 12:18:47 -0700 (PDT) Received: from localhost.localdomain ([209.121.128.187]) by smtp.gmail.com with ESMTPSA id k13-v6sm4424443pgf.37.2018.09.20.12.18.46 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 20 Sep 2018 12:18:46 -0700 (PDT) From: Mathieu Poirier To: gregkh@linuxfoundation.org Cc: linux-kernel@vger.kernel.org Subject: [PATCH 17/44] coresight: tmc-etr: Relax collection of trace from sysfs mode Date: Thu, 20 Sep 2018 13:17:52 -0600 Message-Id: <1537471099-19781-18-git-send-email-mathieu.poirier@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1537471099-19781-1-git-send-email-mathieu.poirier@linaro.org> References: <1537471099-19781-1-git-send-email-mathieu.poirier@linaro.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Suzuki K Poulose Since the ETR now uses mode specific buffers, we can reliably provide the trace data captured in sysfs mode, even when the ETR is operating in PERF mode. Cc: Mathieu Poirier Signed-off-by: Suzuki K Poulose Signed-off-by: Mathieu Poirier --- drivers/hwtracing/coresight/coresight-tmc-etr.c | 14 ++++++-------- 1 file changed, 6 insertions(+), 8 deletions(-) -- 2.7.4 diff --git a/drivers/hwtracing/coresight/coresight-tmc-etr.c b/drivers/hwtracing/coresight/coresight-tmc-etr.c index 2d6f428176ff..bafd73e71c4c 100644 --- a/drivers/hwtracing/coresight/coresight-tmc-etr.c +++ b/drivers/hwtracing/coresight/coresight-tmc-etr.c @@ -1168,19 +1168,17 @@ int tmc_read_prepare_etr(struct tmc_drvdata *drvdata) goto out; } - /* Don't interfere if operated from Perf */ - if (drvdata->mode == CS_MODE_PERF) { - ret = -EINVAL; - goto out; - } - - /* If sysfs_buf is NULL the trace data has been read already */ + /* + * We can safely allow reads even if the ETR is operating in PERF mode, + * since the sysfs session is captured in mode specific data. + * If drvdata::sysfs_data is NULL the trace data has been read already. + */ if (!drvdata->sysfs_buf) { ret = -EINVAL; goto out; } - /* Disable the TMC if we are trying to read from a running session */ + /* Disable the TMC if we are trying to read from a running session. */ if (drvdata->mode == CS_MODE_SYSFS) tmc_etr_disable_hw(drvdata); From patchwork Thu Sep 20 19:17:53 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mathieu Poirier X-Patchwork-Id: 147139 Delivered-To: patch@linaro.org Received: by 2002:a2e:1648:0:0:0:0:0 with SMTP id 8-v6csp2376325ljw; Thu, 20 Sep 2018 12:18:53 -0700 (PDT) X-Google-Smtp-Source: ANB0VdZnewYCmDCNhrNTRt5QJY6qktLmQEwS72sVAFE/M4MvU6Zyh0GlMDWuBnKPKrOkbXTWbuXO X-Received: by 2002:a17:902:a504:: with SMTP id s4-v6mr41876056plq.101.1537471132979; Thu, 20 Sep 2018 12:18:52 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1537471132; cv=none; d=google.com; s=arc-20160816; b=umEZHQK1X+BKaoj2uYWIzmwRjVcURg1nmZpFuKZXMYUcCQ/BSrJkllHOx8Vxn+uT+W rhXkMIvkv7/gdtDyv+/Zu6o1Ob1Rzf20RwObTK1JTb/CgbynahkKUB8omYqXkwoI0fL1 RbeN0jW5ENTxDAUfwSN1phljkDJDr1c1ARI9f6oytvQ+HPNN9kg2aLRg6hc4zP9Aa7SG icfnpEcoGQywQcWfK7cE+Qny4VTPfbCz/oIBIWaUR/3qehNiPY45WEpjzNWkqTpauWKE 6CP9Pp5QLQgLYBnaA1pNlh9bKjN12aXbOiLWwlt6jgnsKLKr0gE4M6jw43wYipIWPgup qTKw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature; bh=DlUy1q8xvUE78unon9sEGi7tys9wdd/Gqaovz6nz19Y=; b=y/97NXVuBKhHr3k26liHJ1t5OYGyXbJGIu6h7AA/8KCMT4GgDy9IautKP91MDrQmHx kojZmpMg2mF3LYKenrUjcqvtcp+tBtO39TMdzGCMkVpUHFgIMkfQS6LJc4Tcp2EUvhLK mfOFWtIEBRN2+7YrqYSyXGNb5lnUBuI8gexeSDh7RSNumiaHZ04wrlx6pkB/lyOZjCbY f98fdjD+saxhOU4RQ1KsCFSjOFlfEcXvX0w0hoPf//AIiu4vpymSCn6vWTc5CqKWXRv+ UzZ59aXAk2RsdadckgoXbaxfTjY5fD6IFqcO8gszddD89J1gwQeJuyN60g2mkGwleRuv pZQg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=WZ+KcUT1; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id m10-v6si25526201pgc.105.2018.09.20.12.18.52; Thu, 20 Sep 2018 12:18:52 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=WZ+KcUT1; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2388871AbeIUBDt (ORCPT + 32 others); Thu, 20 Sep 2018 21:03:49 -0400 Received: from mail-pl1-f194.google.com ([209.85.214.194]:36704 "EHLO mail-pl1-f194.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2388833AbeIUBDs (ORCPT ); Thu, 20 Sep 2018 21:03:48 -0400 Received: by mail-pl1-f194.google.com with SMTP id p5-v6so4798385plk.3 for ; Thu, 20 Sep 2018 12:18:49 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=DlUy1q8xvUE78unon9sEGi7tys9wdd/Gqaovz6nz19Y=; b=WZ+KcUT1Ol+MwdW9PBAo1T9QfV5/uuBgp4UNikDTkBIGpIjg1Lcsj+4Rs0bUsmH9lo XgYJ6gr21IeajFbIP3YWMcyryEXTemAFBGvvBzUT+W7pA6vx+r7WcQuECN/h1OJUt8Gk /2P//p/gmR4cJrrENnqYKt9GqMQ6UOZW34wqQ= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=DlUy1q8xvUE78unon9sEGi7tys9wdd/Gqaovz6nz19Y=; b=oFUOWq1SiLDiAaSLgdSLpIqYj5DtNtPG/hRymY6qGW55dKMN0nP/Stnmrc6itfJpo9 y5srACy1n5AMxcDnjmkJQEk3bXVkik0JH3GBbsza0XZnJ8O8oY0G6ru2fT5yYFOH4phz Ugxg8Oswvt903rmxPhkiH3PY2QLtrQs+DNgq/PY63bHZO5W3Lk4h7bBaPdlM1+ELK1LU byCPbX+qTicGnVe8TzZJy5BJt4/A+s8vlyajFEFpHmLNCRa6+Rgd4uvVkNAV06MZvMHj Yb9/8jUkHYaTAigaNYN9FxbM7/fNBCrHcijDvCJhS6ppS8HcZ+P6eDjd63IwEbhxxcEB 8Tmw== X-Gm-Message-State: APzg51A8+eiVpU5zFTkrRaOFK1ZUFGPWmsoIf9CdORB197tC3AdHVH79 99G93RaFPPqMp1fa6JHK5MVrUwQQ++U= X-Received: by 2002:a17:902:bd07:: with SMTP id p7-v6mr40066858pls.32.1537471129149; Thu, 20 Sep 2018 12:18:49 -0700 (PDT) Received: from localhost.localdomain ([209.121.128.187]) by smtp.gmail.com with ESMTPSA id k13-v6sm4424443pgf.37.2018.09.20.12.18.47 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 20 Sep 2018 12:18:48 -0700 (PDT) From: Mathieu Poirier To: gregkh@linuxfoundation.org Cc: linux-kernel@vger.kernel.org Subject: [PATCH 18/44] coresight: Convert driver messages to dev_dbg Date: Thu, 20 Sep 2018 13:17:53 -0600 Message-Id: <1537471099-19781-19-git-send-email-mathieu.poirier@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1537471099-19781-1-git-send-email-mathieu.poirier@linaro.org> References: <1537471099-19781-1-git-send-email-mathieu.poirier@linaro.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Suzuki K Poulose Convert component enable/disable messages from dev_info to dev_dbg. When used with perf, the components in the paths are enabled/disabled during each schedule of the run, which can flood the dmesg with these messages. Moreover, they are only useful for debug purposes. So, convert such messages to dev_dbg() which can be turned on as needed. Cc: Mathieu Poirier Signed-off-by: Suzuki K Poulose Signed-off-by: Mathieu Poirier --- drivers/hwtracing/coresight/coresight-dynamic-replicator.c | 4 ++-- drivers/hwtracing/coresight/coresight-etb10.c | 6 +++--- drivers/hwtracing/coresight/coresight-etm3x.c | 4 ++-- drivers/hwtracing/coresight/coresight-etm4x.c | 4 ++-- drivers/hwtracing/coresight/coresight-funnel.c | 4 ++-- drivers/hwtracing/coresight/coresight-replicator.c | 4 ++-- drivers/hwtracing/coresight/coresight-stm.c | 4 ++-- drivers/hwtracing/coresight/coresight-tmc-etf.c | 8 ++++---- drivers/hwtracing/coresight/coresight-tmc-etr.c | 4 ++-- drivers/hwtracing/coresight/coresight-tmc.c | 4 ++-- drivers/hwtracing/coresight/coresight-tpiu.c | 4 ++-- 11 files changed, 25 insertions(+), 25 deletions(-) -- 2.7.4 diff --git a/drivers/hwtracing/coresight/coresight-dynamic-replicator.c b/drivers/hwtracing/coresight/coresight-dynamic-replicator.c index f6d0571ab9dd..ebb80438f6a5 100644 --- a/drivers/hwtracing/coresight/coresight-dynamic-replicator.c +++ b/drivers/hwtracing/coresight/coresight-dynamic-replicator.c @@ -56,7 +56,7 @@ static int replicator_enable(struct coresight_device *csdev, int inport, CS_LOCK(drvdata->base); - dev_info(drvdata->dev, "REPLICATOR enabled\n"); + dev_dbg(drvdata->dev, "REPLICATOR enabled\n"); return 0; } @@ -75,7 +75,7 @@ static void replicator_disable(struct coresight_device *csdev, int inport, CS_LOCK(drvdata->base); - dev_info(drvdata->dev, "REPLICATOR disabled\n"); + dev_dbg(drvdata->dev, "REPLICATOR disabled\n"); } static const struct coresight_ops_link replicator_link_ops = { diff --git a/drivers/hwtracing/coresight/coresight-etb10.c b/drivers/hwtracing/coresight/coresight-etb10.c index 0dad8626bcfb..3d4b6df32a06 100644 --- a/drivers/hwtracing/coresight/coresight-etb10.c +++ b/drivers/hwtracing/coresight/coresight-etb10.c @@ -160,7 +160,7 @@ static int etb_enable(struct coresight_device *csdev, u32 mode) spin_unlock_irqrestore(&drvdata->spinlock, flags); out: - dev_info(drvdata->dev, "ETB enabled\n"); + dev_dbg(drvdata->dev, "ETB enabled\n"); return 0; } @@ -266,7 +266,7 @@ static void etb_disable(struct coresight_device *csdev) local_set(&drvdata->mode, CS_MODE_DISABLED); - dev_info(drvdata->dev, "ETB disabled\n"); + dev_dbg(drvdata->dev, "ETB disabled\n"); } static void *etb_alloc_buffer(struct coresight_device *csdev, int cpu, @@ -509,7 +509,7 @@ static void etb_dump(struct etb_drvdata *drvdata) } spin_unlock_irqrestore(&drvdata->spinlock, flags); - dev_info(drvdata->dev, "ETB dumped\n"); + dev_dbg(drvdata->dev, "ETB dumped\n"); } static int etb_open(struct inode *inode, struct file *file) diff --git a/drivers/hwtracing/coresight/coresight-etm3x.c b/drivers/hwtracing/coresight/coresight-etm3x.c index 7c74263c333d..9ce8fba20b0f 100644 --- a/drivers/hwtracing/coresight/coresight-etm3x.c +++ b/drivers/hwtracing/coresight/coresight-etm3x.c @@ -501,7 +501,7 @@ static int etm_enable_sysfs(struct coresight_device *csdev) drvdata->sticky_enable = true; spin_unlock(&drvdata->spinlock); - dev_info(drvdata->dev, "ETM tracing enabled\n"); + dev_dbg(drvdata->dev, "ETM tracing enabled\n"); return 0; err: @@ -604,7 +604,7 @@ static void etm_disable_sysfs(struct coresight_device *csdev) spin_unlock(&drvdata->spinlock); cpus_read_unlock(); - dev_info(drvdata->dev, "ETM tracing disabled\n"); + dev_dbg(drvdata->dev, "ETM tracing disabled\n"); } static void etm_disable(struct coresight_device *csdev, diff --git a/drivers/hwtracing/coresight/coresight-etm4x.c b/drivers/hwtracing/coresight/coresight-etm4x.c index 1d94ebec027b..c1dcc7c289a5 100644 --- a/drivers/hwtracing/coresight/coresight-etm4x.c +++ b/drivers/hwtracing/coresight/coresight-etm4x.c @@ -267,7 +267,7 @@ static int etm4_enable_sysfs(struct coresight_device *csdev) drvdata->sticky_enable = true; spin_unlock(&drvdata->spinlock); - dev_info(drvdata->dev, "ETM tracing enabled\n"); + dev_dbg(drvdata->dev, "ETM tracing enabled\n"); return 0; err: @@ -380,7 +380,7 @@ static void etm4_disable_sysfs(struct coresight_device *csdev) spin_unlock(&drvdata->spinlock); cpus_read_unlock(); - dev_info(drvdata->dev, "ETM tracing disabled\n"); + dev_dbg(drvdata->dev, "ETM tracing disabled\n"); } static void etm4_disable(struct coresight_device *csdev, diff --git a/drivers/hwtracing/coresight/coresight-funnel.c b/drivers/hwtracing/coresight/coresight-funnel.c index 448145a36675..ee7a30bf9480 100644 --- a/drivers/hwtracing/coresight/coresight-funnel.c +++ b/drivers/hwtracing/coresight/coresight-funnel.c @@ -65,7 +65,7 @@ static int funnel_enable(struct coresight_device *csdev, int inport, funnel_enable_hw(drvdata, inport); - dev_info(drvdata->dev, "FUNNEL inport %d enabled\n", inport); + dev_dbg(drvdata->dev, "FUNNEL inport %d enabled\n", inport); return 0; } @@ -89,7 +89,7 @@ static void funnel_disable(struct coresight_device *csdev, int inport, funnel_disable_hw(drvdata, inport); - dev_info(drvdata->dev, "FUNNEL inport %d disabled\n", inport); + dev_dbg(drvdata->dev, "FUNNEL inport %d disabled\n", inport); } static const struct coresight_ops_link funnel_link_ops = { diff --git a/drivers/hwtracing/coresight/coresight-replicator.c b/drivers/hwtracing/coresight/coresight-replicator.c index 8d2eaaab6c2f..feac98315471 100644 --- a/drivers/hwtracing/coresight/coresight-replicator.c +++ b/drivers/hwtracing/coresight/coresight-replicator.c @@ -35,7 +35,7 @@ static int replicator_enable(struct coresight_device *csdev, int inport, { struct replicator_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent); - dev_info(drvdata->dev, "REPLICATOR enabled\n"); + dev_dbg(drvdata->dev, "REPLICATOR enabled\n"); return 0; } @@ -44,7 +44,7 @@ static void replicator_disable(struct coresight_device *csdev, int inport, { struct replicator_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent); - dev_info(drvdata->dev, "REPLICATOR disabled\n"); + dev_dbg(drvdata->dev, "REPLICATOR disabled\n"); } static const struct coresight_ops_link replicator_link_ops = { diff --git a/drivers/hwtracing/coresight/coresight-stm.c b/drivers/hwtracing/coresight/coresight-stm.c index c46c70aec1d5..35d6f9709274 100644 --- a/drivers/hwtracing/coresight/coresight-stm.c +++ b/drivers/hwtracing/coresight/coresight-stm.c @@ -211,7 +211,7 @@ static int stm_enable(struct coresight_device *csdev, stm_enable_hw(drvdata); spin_unlock(&drvdata->spinlock); - dev_info(drvdata->dev, "STM tracing enabled\n"); + dev_dbg(drvdata->dev, "STM tracing enabled\n"); return 0; } @@ -274,7 +274,7 @@ static void stm_disable(struct coresight_device *csdev, pm_runtime_put(drvdata->dev); local_set(&drvdata->mode, CS_MODE_DISABLED); - dev_info(drvdata->dev, "STM tracing disabled\n"); + dev_dbg(drvdata->dev, "STM tracing disabled\n"); } } diff --git a/drivers/hwtracing/coresight/coresight-tmc-etf.c b/drivers/hwtracing/coresight/coresight-tmc-etf.c index 0549249f4b39..434003a43346 100644 --- a/drivers/hwtracing/coresight/coresight-tmc-etf.c +++ b/drivers/hwtracing/coresight/coresight-tmc-etf.c @@ -233,7 +233,7 @@ static int tmc_enable_etf_sink(struct coresight_device *csdev, u32 mode) if (ret) return ret; - dev_info(drvdata->dev, "TMC-ETB/ETF enabled\n"); + dev_dbg(drvdata->dev, "TMC-ETB/ETF enabled\n"); return 0; } @@ -256,7 +256,7 @@ static void tmc_disable_etf_sink(struct coresight_device *csdev) spin_unlock_irqrestore(&drvdata->spinlock, flags); - dev_info(drvdata->dev, "TMC-ETB/ETF disabled\n"); + dev_dbg(drvdata->dev, "TMC-ETB/ETF disabled\n"); } static int tmc_enable_etf_link(struct coresight_device *csdev, @@ -275,7 +275,7 @@ static int tmc_enable_etf_link(struct coresight_device *csdev, drvdata->mode = CS_MODE_SYSFS; spin_unlock_irqrestore(&drvdata->spinlock, flags); - dev_info(drvdata->dev, "TMC-ETF enabled\n"); + dev_dbg(drvdata->dev, "TMC-ETF enabled\n"); return 0; } @@ -295,7 +295,7 @@ static void tmc_disable_etf_link(struct coresight_device *csdev, drvdata->mode = CS_MODE_DISABLED; spin_unlock_irqrestore(&drvdata->spinlock, flags); - dev_info(drvdata->dev, "TMC-ETF disabled\n"); + dev_dbg(drvdata->dev, "TMC-ETF disabled\n"); } static void *tmc_alloc_etf_buffer(struct coresight_device *csdev, int cpu, diff --git a/drivers/hwtracing/coresight/coresight-tmc-etr.c b/drivers/hwtracing/coresight/coresight-tmc-etr.c index bafd73e71c4c..5e9bb2f0e9c0 100644 --- a/drivers/hwtracing/coresight/coresight-tmc-etr.c +++ b/drivers/hwtracing/coresight/coresight-tmc-etr.c @@ -1098,7 +1098,7 @@ static int tmc_enable_etr_sink_sysfs(struct coresight_device *csdev) tmc_etr_free_sysfs_buf(free_buf); if (!ret) - dev_info(drvdata->dev, "TMC-ETR enabled\n"); + dev_dbg(drvdata->dev, "TMC-ETR enabled\n"); return ret; } @@ -1141,7 +1141,7 @@ static void tmc_disable_etr_sink(struct coresight_device *csdev) spin_unlock_irqrestore(&drvdata->spinlock, flags); - dev_info(drvdata->dev, "TMC-ETR disabled\n"); + dev_dbg(drvdata->dev, "TMC-ETR disabled\n"); } static const struct coresight_ops_sink tmc_etr_sink_ops = { diff --git a/drivers/hwtracing/coresight/coresight-tmc.c b/drivers/hwtracing/coresight/coresight-tmc.c index 1b817ec1192c..ea249f0bcd73 100644 --- a/drivers/hwtracing/coresight/coresight-tmc.c +++ b/drivers/hwtracing/coresight/coresight-tmc.c @@ -81,7 +81,7 @@ static int tmc_read_prepare(struct tmc_drvdata *drvdata) } if (!ret) - dev_info(drvdata->dev, "TMC read start\n"); + dev_dbg(drvdata->dev, "TMC read start\n"); return ret; } @@ -103,7 +103,7 @@ static int tmc_read_unprepare(struct tmc_drvdata *drvdata) } if (!ret) - dev_info(drvdata->dev, "TMC read end\n"); + dev_dbg(drvdata->dev, "TMC read end\n"); return ret; } diff --git a/drivers/hwtracing/coresight/coresight-tpiu.c b/drivers/hwtracing/coresight/coresight-tpiu.c index 459ef930d98c..ce0b84583861 100644 --- a/drivers/hwtracing/coresight/coresight-tpiu.c +++ b/drivers/hwtracing/coresight/coresight-tpiu.c @@ -74,7 +74,7 @@ static int tpiu_enable(struct coresight_device *csdev, u32 mode) tpiu_enable_hw(drvdata); - dev_info(drvdata->dev, "TPIU enabled\n"); + dev_dbg(drvdata->dev, "TPIU enabled\n"); return 0; } @@ -100,7 +100,7 @@ static void tpiu_disable(struct coresight_device *csdev) tpiu_disable_hw(drvdata); - dev_info(drvdata->dev, "TPIU disabled\n"); + dev_dbg(drvdata->dev, "TPIU disabled\n"); } static const struct coresight_ops_sink tpiu_sink_ops = { From patchwork Thu Sep 20 19:17:54 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mathieu Poirier X-Patchwork-Id: 147140 Delivered-To: patch@linaro.org Received: by 2002:a2e:1648:0:0:0:0:0 with SMTP id 8-v6csp2376348ljw; Thu, 20 Sep 2018 12:18:54 -0700 (PDT) X-Google-Smtp-Source: ANB0Vdby6guq8y2uopQBAFkmv4VzCCaCDtm50bvpCdD315Nmmu65Sa+T9MkkX7IMlsrD8EnNtRO8 X-Received: by 2002:a63:7353:: with SMTP id d19-v6mr37846642pgn.281.1537471134406; Thu, 20 Sep 2018 12:18:54 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1537471134; cv=none; d=google.com; s=arc-20160816; b=ZNlPNis2m46N3FOmslqkDg5sZVCdx6FvunvliwgowrJDnfLTiEK0FIG5QhDuyFjSdh fMMwLu9D3AKpB5N4cHaCpXmo0yCuDe9UsEh449K90QYbC8aEP2NDHd7x3qkLb6JqF8/o GPlgnSYvKQebGZYiNE0NrvsjgGdYnYWIaRf+xhEct/WbFUr9Wlihwi9GAgm1E+YE7l/L TL05EJKEsLwC5TGV6B7m8oDP9k5DmrKbQ2u9AjJ05lsjkRMxkipj/0X0UpfsncHzJGu5 y0IQu8OgQnzvZc51SQxdcA1d/LBcW7UU+JQOA5Qy4k3bf49+CaCtS4XR1hCOu5hyti5E 0u6w== ARC-Message-Signature: i=1; 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[209.132.180.67]) by mx.google.com with ESMTP id f62-v6si25814487pfg.35.2018.09.20.12.18.54; Thu, 20 Sep 2018 12:18:54 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=HhwOpzvM; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2388885AbeIUBDu (ORCPT + 32 others); Thu, 20 Sep 2018 21:03:50 -0400 Received: from mail-pl1-f196.google.com ([209.85.214.196]:44253 "EHLO mail-pl1-f196.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2388833AbeIUBDt (ORCPT ); Thu, 20 Sep 2018 21:03:49 -0400 Received: by mail-pl1-f196.google.com with SMTP id ba4-v6so4786084plb.11 for ; Thu, 20 Sep 2018 12:18:51 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=tFYB76CN7gcfQSlI2J2wI0x03dd/hmNnD3L0IdFWlMc=; b=HhwOpzvME2ykgvqdri2ZD/MCXcr5OgljKOlNVlT4bMz4JgLmS5QnlEM9FRS+bER9kI YvphspALxqog/dRp4XaC9O0nWISaLkZCFYuViU3QF32+cjiKRQ1hPl/vECvgmlH4uSsK u9F+UQcitGMTqn0MuYvgb9GLKKryBw57KViGQ= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=tFYB76CN7gcfQSlI2J2wI0x03dd/hmNnD3L0IdFWlMc=; b=icw1a1BnXGKcwuI8XrC1zmgbDVNsiWaKOjd99Xxc7aM1z4LJP/Qx4KoX2mBqfljcb3 zlUHs/wC4dwX8al+7sJaADYnIWjPQScOc1J9l0q/oFkfxuXAerYebVd2RtHN2bLdB6/p 0SDvmS8GdE5E+7YxAhPJinTt2UnZTRDMRWpmU/P0ZFj+a6vGx3dLFTlogvqWOGq0bHeN 8uvDnV2xBWrQmpeW1ztrG2Qvcf0fM9q1I14VmYVpVe/G8AV/GeqXESNm9pwABbbKJwaN 2qPMrFheV07t2B+kyxP7fefvFeM6lShXFNaKAZpemxyRKTXmA9u+Zq2S/Rfr7lM/4JbN yBJA== X-Gm-Message-State: APzg51DdJSz3GFlJ9Uvf0Ei/BpIGt3w1mONHq4Fteo2dw9gb9zAPdgD9 yfxQy7xBPJXlpWTc+ZqxLJ3uBg== X-Received: by 2002:a17:902:402:: with SMTP id 2-v6mr40336600ple.277.1537471130644; Thu, 20 Sep 2018 12:18:50 -0700 (PDT) Received: from localhost.localdomain ([209.121.128.187]) by smtp.gmail.com with ESMTPSA id k13-v6sm4424443pgf.37.2018.09.20.12.18.49 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 20 Sep 2018 12:18:49 -0700 (PDT) From: Mathieu Poirier To: gregkh@linuxfoundation.org Cc: linux-kernel@vger.kernel.org Subject: [PATCH 19/44] coresight: perf: Remove reset_buffer call back for sinks Date: Thu, 20 Sep 2018 13:17:54 -0600 Message-Id: <1537471099-19781-20-git-send-email-mathieu.poirier@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1537471099-19781-1-git-send-email-mathieu.poirier@linaro.org> References: <1537471099-19781-1-git-send-email-mathieu.poirier@linaro.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Suzuki K Poulose Right now we issue an update_buffer() and reset_buffer() call backs in succession when we stop tracing an event. The update_buffer is supposed to check the status of the buffer and make sure the ring buffer is updated with the trace data. And we store information about the size of the data collected only to be consumed by the reset_buffer callback which always follows the update_buffer. This was originally designed for handling future IPs which could trigger a buffer overflow interrupt. This patch gets rid of the reset_buffer callback altogether and performs the actions in update_buffer, making it return the size collected. We can always add the support for handling the overflow interrupt case later. This removes some not-so pretty hack (storing the new head in the size field for snapshot mode) and cleans it up a little bit. Cc: Mathieu Poirier Signed-off-by: Suzuki K Poulose Signed-off-by: Mathieu Poirier --- drivers/hwtracing/coresight/coresight-etb10.c | 56 +++++------------------ drivers/hwtracing/coresight/coresight-etm-perf.c | 9 +--- drivers/hwtracing/coresight/coresight-tmc-etf.c | 58 +++++------------------- include/linux/coresight.h | 6 +-- 4 files changed, 26 insertions(+), 103 deletions(-) -- 2.7.4 diff --git a/drivers/hwtracing/coresight/coresight-etb10.c b/drivers/hwtracing/coresight/coresight-etb10.c index 3d4b6df32a06..dba75c905e57 100644 --- a/drivers/hwtracing/coresight/coresight-etb10.c +++ b/drivers/hwtracing/coresight/coresight-etb10.c @@ -319,37 +319,7 @@ static int etb_set_buffer(struct coresight_device *csdev, return ret; } -static unsigned long etb_reset_buffer(struct coresight_device *csdev, - struct perf_output_handle *handle, - void *sink_config) -{ - unsigned long size = 0; - struct cs_buffers *buf = sink_config; - - if (buf) { - /* - * In snapshot mode ->data_size holds the new address of the - * ring buffer's head. The size itself is the whole address - * range since we want the latest information. - */ - if (buf->snapshot) - handle->head = local_xchg(&buf->data_size, - buf->nr_pages << PAGE_SHIFT); - - /* - * Tell the tracer PMU how much we got in this run and if - * something went wrong along the way. Nobody else can use - * this cs_buffers instance until we are done. As such - * resetting parameters here and squaring off with the ring - * buffer API in the tracer PMU is fine. - */ - size = local_xchg(&buf->data_size, 0); - } - - return size; -} - -static void etb_update_buffer(struct coresight_device *csdev, +static unsigned long etb_update_buffer(struct coresight_device *csdev, struct perf_output_handle *handle, void *sink_config) { @@ -358,13 +328,13 @@ static void etb_update_buffer(struct coresight_device *csdev, u8 *buf_ptr; const u32 *barrier; u32 read_ptr, write_ptr, capacity; - u32 status, read_data, to_read; - unsigned long offset; + u32 status, read_data; + unsigned long offset, to_read; struct cs_buffers *buf = sink_config; struct etb_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent); if (!buf) - return; + return 0; capacity = drvdata->buffer_depth * ETB_FRAME_SIZE_WORDS; @@ -469,18 +439,17 @@ static void etb_update_buffer(struct coresight_device *csdev, writel_relaxed(0x0, drvdata->base + ETB_RAM_WRITE_POINTER); /* - * In snapshot mode all we have to do is communicate to - * perf_aux_output_end() the address of the current head. In full - * trace mode the same function expects a size to move rb->aux_head - * forward. + * In snapshot mode we have to update the handle->head to point + * to the new location. */ - if (buf->snapshot) - local_set(&buf->data_size, (cur * PAGE_SIZE) + offset); - else - local_add(to_read, &buf->data_size); - + if (buf->snapshot) { + handle->head = (cur * PAGE_SIZE) + offset; + to_read = buf->nr_pages << PAGE_SHIFT; + } etb_enable_hw(drvdata); CS_LOCK(drvdata->base); + + return to_read; } static const struct coresight_ops_sink etb_sink_ops = { @@ -489,7 +458,6 @@ static const struct coresight_ops_sink etb_sink_ops = { .alloc_buffer = etb_alloc_buffer, .free_buffer = etb_free_buffer, .set_buffer = etb_set_buffer, - .reset_buffer = etb_reset_buffer, .update_buffer = etb_update_buffer, }; diff --git a/drivers/hwtracing/coresight/coresight-etm-perf.c b/drivers/hwtracing/coresight/coresight-etm-perf.c index 6db76ce6ba5f..ad87441f65d7 100644 --- a/drivers/hwtracing/coresight/coresight-etm-perf.c +++ b/drivers/hwtracing/coresight/coresight-etm-perf.c @@ -369,15 +369,8 @@ static void etm_event_stop(struct perf_event *event, int mode) if (!sink_ops(sink)->update_buffer) return; - sink_ops(sink)->update_buffer(sink, handle, + size = sink_ops(sink)->update_buffer(sink, handle, event_data->snk_config); - - if (!sink_ops(sink)->reset_buffer) - return; - - size = sink_ops(sink)->reset_buffer(sink, handle, - event_data->snk_config); - perf_aux_output_end(handle, size); } diff --git a/drivers/hwtracing/coresight/coresight-tmc-etf.c b/drivers/hwtracing/coresight/coresight-tmc-etf.c index 434003a43346..31a98f915641 100644 --- a/drivers/hwtracing/coresight/coresight-tmc-etf.c +++ b/drivers/hwtracing/coresight/coresight-tmc-etf.c @@ -349,36 +349,7 @@ static int tmc_set_etf_buffer(struct coresight_device *csdev, return ret; } -static unsigned long tmc_reset_etf_buffer(struct coresight_device *csdev, - struct perf_output_handle *handle, - void *sink_config) -{ - long size = 0; - struct cs_buffers *buf = sink_config; - - if (buf) { - /* - * In snapshot mode ->data_size holds the new address of the - * ring buffer's head. The size itself is the whole address - * range since we want the latest information. - */ - if (buf->snapshot) - handle->head = local_xchg(&buf->data_size, - buf->nr_pages << PAGE_SHIFT); - /* - * Tell the tracer PMU how much we got in this run and if - * something went wrong along the way. Nobody else can use - * this cs_buffers instance until we are done. As such - * resetting parameters here and squaring off with the ring - * buffer API in the tracer PMU is fine. - */ - size = local_xchg(&buf->data_size, 0); - } - - return size; -} - -static void tmc_update_etf_buffer(struct coresight_device *csdev, +static unsigned long tmc_update_etf_buffer(struct coresight_device *csdev, struct perf_output_handle *handle, void *sink_config) { @@ -387,17 +358,17 @@ static void tmc_update_etf_buffer(struct coresight_device *csdev, const u32 *barrier; u32 *buf_ptr; u64 read_ptr, write_ptr; - u32 status, to_read; - unsigned long offset; + u32 status; + unsigned long offset, to_read; struct cs_buffers *buf = sink_config; struct tmc_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent); if (!buf) - return; + return 0; /* This shouldn't happen */ if (WARN_ON_ONCE(drvdata->mode != CS_MODE_PERF)) - return; + return 0; CS_UNLOCK(drvdata->base); @@ -486,18 +457,14 @@ static void tmc_update_etf_buffer(struct coresight_device *csdev, } } - /* - * In snapshot mode all we have to do is communicate to - * perf_aux_output_end() the address of the current head. In full - * trace mode the same function expects a size to move rb->aux_head - * forward. - */ - if (buf->snapshot) - local_set(&buf->data_size, (cur * PAGE_SIZE) + offset); - else - local_add(to_read, &buf->data_size); - + /* In snapshot mode we have to update the head */ + if (buf->snapshot) { + handle->head = (cur * PAGE_SIZE) + offset; + to_read = buf->nr_pages << PAGE_SHIFT; + } CS_LOCK(drvdata->base); + + return to_read; } static const struct coresight_ops_sink tmc_etf_sink_ops = { @@ -506,7 +473,6 @@ static const struct coresight_ops_sink tmc_etf_sink_ops = { .alloc_buffer = tmc_alloc_etf_buffer, .free_buffer = tmc_free_etf_buffer, .set_buffer = tmc_set_etf_buffer, - .reset_buffer = tmc_reset_etf_buffer, .update_buffer = tmc_update_etf_buffer, }; diff --git a/include/linux/coresight.h b/include/linux/coresight.h index 41e1f4333bf2..8e52682b1e90 100644 --- a/include/linux/coresight.h +++ b/include/linux/coresight.h @@ -186,7 +186,6 @@ struct coresight_device { * @alloc_buffer: initialises perf's ring buffer for trace collection. * @free_buffer: release memory allocated in @get_config. * @set_buffer: initialises buffer mechanic before a trace session. - * @reset_buffer: finalises buffer mechanic after a trace session. * @update_buffer: update buffer pointers after a trace session. */ struct coresight_ops_sink { @@ -198,10 +197,7 @@ struct coresight_ops_sink { int (*set_buffer)(struct coresight_device *csdev, struct perf_output_handle *handle, void *sink_config); - unsigned long (*reset_buffer)(struct coresight_device *csdev, - struct perf_output_handle *handle, - void *sink_config); - void (*update_buffer)(struct coresight_device *csdev, + unsigned long (*update_buffer)(struct coresight_device *csdev, struct perf_output_handle *handle, void *sink_config); }; From patchwork Thu Sep 20 19:17:55 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mathieu Poirier X-Patchwork-Id: 147141 Delivered-To: patch@linaro.org Received: by 2002:a2e:1648:0:0:0:0:0 with SMTP id 8-v6csp2376376ljw; Thu, 20 Sep 2018 12:18:56 -0700 (PDT) X-Google-Smtp-Source: ANB0VdbSSM8yz9Carqnil3lT2gAGqqkJFAngPt0JYJ5CCUz3RnkDfC1zYZNnWADpPHic8sWo5erh X-Received: by 2002:a63:1823:: with SMTP id y35-v6mr38350336pgl.438.1537471136213; Thu, 20 Sep 2018 12:18:56 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1537471136; cv=none; d=google.com; s=arc-20160816; b=cagI1W8kLLSTy+tIcCZwbgJNAk8s+nzkMNnjmJ7K8ar/c2ABp41IeybCiEHvwduBt1 UP8vKQXq539k7bnGen/eOr7uYhVnNHehSU0AZAx9y78EqPgrvqs7osNBQbnqKJZ+QWcw jlkW19KZdqwqoAri1BNaBT2AUTKrZgYdzjkN7bRMX2OChltLwq1/WA58ZxBiCH4dsrGn uRTBUmbS24KPjWX0Numm6hwG+8VtW5NwnbR/3ML5kgrcspQHCJPF1XWC4x0gksCOrqVu 1W9pkLxOjNO3HAfGtWPbmDuKNes6e0BkuRYNAFrMYONr+elmNSlXNAHQ0fncKeVkzTb/ +0sA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature; bh=o6VQi4FU61Vxvp1EwdXAGZbebJQpL3twyYGpw+OSrQg=; b=Ag3/CN9iMVKbRZKmDF6dQXQz2wTTkVo6d+fQCV1JYe3CgM2KnXH+CLrCoMt8Ey2Qfa NGeYTDf1+tAuWs5aiv6Yk27jKD2Tbep5JzMB+b9i5lZQ6VY6/ke4ZPkP9NrQAo/BIYxg fWbaOebCqjZKLAXZK1PVnFstHVQd/wwSJhqmriVhTc/QediuzdFf+bvJgblkLYhP8tqm IQCMoJSMoZyfWsa17P09tcFVVgGp3drzeL/eVl0bPjvH47xhO68LEXT5+aNrKHK8+k3S 9c3If8fuNWu6HQTSBQholOTDDIP7AJ1bY44Rde5kFx6RqCE620uOFO0pERDemQ4mgZel 5/wQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="UjbVGU+/"; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id f62-v6si25814487pfg.35.2018.09.20.12.18.55; Thu, 20 Sep 2018 12:18:56 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="UjbVGU+/"; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2388899AbeIUBDx (ORCPT + 32 others); Thu, 20 Sep 2018 21:03:53 -0400 Received: from mail-pg1-f194.google.com ([209.85.215.194]:45627 "EHLO mail-pg1-f194.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2388450AbeIUBDv (ORCPT ); Thu, 20 Sep 2018 21:03:51 -0400 Received: by mail-pg1-f194.google.com with SMTP id t70-v6so71196pgd.12 for ; Thu, 20 Sep 2018 12:18:52 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=o6VQi4FU61Vxvp1EwdXAGZbebJQpL3twyYGpw+OSrQg=; b=UjbVGU+/i/R5jriobSJ2un+YtD1Bbqf4pqcxRd0ycVSsNOanq3DZQ076VFPFdZ3QB/ tClcrcCsRn0zLDMNPrzWfXRyVJj74tffpD9Oke4yKBykOczpnUOW/7hNxVIh4/y7g75u MDhAe2HUvA1IYUcM0uJZHfZUi0IfmuSKAWy8M= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=o6VQi4FU61Vxvp1EwdXAGZbebJQpL3twyYGpw+OSrQg=; b=jJ5O7OAk/3SwZgs/dhXP2wP2jHVJjoYhUuWsO+XmB7P9A9qtrr8GwX5jqem+jb4B9i pl2hOPS9hEMWDU4DkRtbEi1yj066Kq85RgUxXCFeUVcZ/q61+zAanTVPfafqJHfypdgo HiVxFNtOAtRMBrusyP7LgehYDAIlWSChIWZ00vM61h+sb971pnBHCSmwlSfhWJufYaIX 15Sd4TncYdB+zkoygCNb/GlOqXeBOljRYLMTfb9tL++tVDpWotTDLZLiFpakLfgZSrQp ZEoQhUEknWn5lhULkWmLoqQvGIwrioiDKYML37yZe4OkLLqctiEIk6/cmcaztoA8qsdF hKxg== X-Gm-Message-State: APzg51D4jbckbisE8U2Oaoc8Ms3lTy3YTQnzr8X1xeYg/RwtSD7aXvDa PF8sMPCtYY49L+WjDmL0cmEQQQ== X-Received: by 2002:a63:6d4f:: with SMTP id i76-v6mr37802383pgc.215.1537471132265; Thu, 20 Sep 2018 12:18:52 -0700 (PDT) Received: from localhost.localdomain ([209.121.128.187]) by smtp.gmail.com with ESMTPSA id k13-v6sm4424443pgf.37.2018.09.20.12.18.50 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 20 Sep 2018 12:18:51 -0700 (PDT) From: Mathieu Poirier To: gregkh@linuxfoundation.org Cc: linux-kernel@vger.kernel.org Subject: [PATCH 20/44] coresight: perf: Add helper to retrieve sink configuration Date: Thu, 20 Sep 2018 13:17:55 -0600 Message-Id: <1537471099-19781-21-git-send-email-mathieu.poirier@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1537471099-19781-1-git-send-email-mathieu.poirier@linaro.org> References: <1537471099-19781-1-git-send-email-mathieu.poirier@linaro.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Suzuki K Poulose We can always find the sink configuration for a given perf_output_handle. Add a helper to retrieve the sink configuration for a given perf_output_handle. This will be used to get rid of the set_buffer() call back. Cc: Mathieu Poirier Signed-off-by: Suzuki K Poulose Signed-off-by: Mathieu Poirier --- drivers/hwtracing/coresight/coresight-etm-perf.c | 14 ------------- drivers/hwtracing/coresight/coresight-etm-perf.h | 26 ++++++++++++++++++++++++ 2 files changed, 26 insertions(+), 14 deletions(-) -- 2.7.4 diff --git a/drivers/hwtracing/coresight/coresight-etm-perf.c b/drivers/hwtracing/coresight/coresight-etm-perf.c index ad87441f65d7..16b83d8b2ac2 100644 --- a/drivers/hwtracing/coresight/coresight-etm-perf.c +++ b/drivers/hwtracing/coresight/coresight-etm-perf.c @@ -23,20 +23,6 @@ static struct pmu etm_pmu; static bool etm_perf_up; -/** - * struct etm_event_data - Coresight specifics associated to an event - * @work: Handle to free allocated memory outside IRQ context. - * @mask: Hold the CPU(s) this event was set for. - * @snk_config: The sink configuration. - * @path: An array of path, each slot for one CPU. - */ -struct etm_event_data { - struct work_struct work; - cpumask_t mask; - void *snk_config; - struct list_head * __percpu *path; -}; - static DEFINE_PER_CPU(struct perf_output_handle, ctx_handle); static DEFINE_PER_CPU(struct coresight_device *, csdev_src); diff --git a/drivers/hwtracing/coresight/coresight-etm-perf.h b/drivers/hwtracing/coresight/coresight-etm-perf.h index 4197df4faf5e..da7d9336a15c 100644 --- a/drivers/hwtracing/coresight/coresight-etm-perf.h +++ b/drivers/hwtracing/coresight/coresight-etm-perf.h @@ -7,6 +7,7 @@ #ifndef _CORESIGHT_ETM_PERF_H #define _CORESIGHT_ETM_PERF_H +#include #include "coresight-priv.h" struct coresight_device; @@ -42,14 +43,39 @@ struct etm_filters { bool ssstatus; }; +/** + * struct etm_event_data - Coresight specifics associated to an event + * @work: Handle to free allocated memory outside IRQ context. + * @mask: Hold the CPU(s) this event was set for. + * @snk_config: The sink configuration. + * @path: An array of path, each slot for one CPU. + */ +struct etm_event_data { + struct work_struct work; + cpumask_t mask; + void *snk_config; + struct list_head * __percpu *path; +}; #ifdef CONFIG_CORESIGHT int etm_perf_symlink(struct coresight_device *csdev, bool link); +static inline void *etm_perf_sink_config(struct perf_output_handle *handle) +{ + struct etm_event_data *data = perf_get_aux(handle); + if (data) + return data->snk_config; + return NULL; +} #else static inline int etm_perf_symlink(struct coresight_device *csdev, bool link) { return -EINVAL; } +static inline void *etm_perf_sink_config(struct perf_output_handle *handle) +{ + return NULL; +} + #endif /* CONFIG_CORESIGHT */ #endif From patchwork Thu Sep 20 19:17:56 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mathieu Poirier X-Patchwork-Id: 147142 Delivered-To: patch@linaro.org Received: by 2002:a2e:1648:0:0:0:0:0 with SMTP id 8-v6csp2376403ljw; Thu, 20 Sep 2018 12:18:58 -0700 (PDT) X-Google-Smtp-Source: ANB0VdaMv0xN6TX2ysJeg//E1eB5/lUF7dXpF+NDLp5RnBTo8QCs7rREjjShCHWPM0l+pHHO4PUZ X-Received: by 2002:a63:2605:: with SMTP id m5-v6mr36595555pgm.225.1537471138275; Thu, 20 Sep 2018 12:18:58 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1537471138; cv=none; d=google.com; s=arc-20160816; b=GqomHXOdTdU/oaxGXA7ohhNrF4iguHyN/ov73HkRhDxguGKKU0XSBntOK3S6y5y4yg OaXLVmbexDyn2mMaLhkYkPBuwNjn9htdzxN2gQfBYG4I5PsMdAGA0t7rIXpWafpw9PmS 16BdAwUy0+ei7dgAasmQX3rUdYM48EBIFx1lPWggXS0kj9dh9JeD6KCrKtLavm6gLvpu w2603YrHplOI/b0GvYUpPhBBGgLgwjUkz0av6mAeiNTRbyjgX88UfO2mSHt2erjbPz/I 17D77/BQDAwFD0thnt4sHI3XzW57AA/yen4AKMAvUtU/Qz0dOU6mznHiUPI7qHvA7GQl NmjA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature; bh=RPwq9RpZ3HZmGVoBRVZImO+Obs44n4fXrxe3KFa48HM=; b=FilnfoqvxKfWF2elfQWViBCcGpuz1iK5U4qdcUrG0In90QEvxgGQB5TFFkq0XnF1Im nL3TsZKQBdUCcTtYzMIdIkWEXYOZffdkQpm5/4UOGmrC0w3iU/icALAmHAcgJ9RiQSSJ ZI1r92YIDwhXubH5M9tkHVwYnppAqfYD9KgCvFAL5gsxmqAosIrQsOsO3rr//QoWxUKj bRQY/AG+cWvGfNQ4e8ifwCDzis4oGZLs9RQyrAzR7XBymA4x+jiqBZY+4axE2tp3fB5l z7rJ5Qd4loxOQfg2n2m2rxAT1pUsPX9EnIUu5MEKwmPpAttCKswhPjyGmsJvUiHwqwN5 GQpg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=HQPqRJ7A; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id 67-v6si28227887pfc.21.2018.09.20.12.18.58; Thu, 20 Sep 2018 12:18:58 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=HQPqRJ7A; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2388912AbeIUBDy (ORCPT + 32 others); Thu, 20 Sep 2018 21:03:54 -0400 Received: from mail-pl1-f195.google.com ([209.85.214.195]:40194 "EHLO mail-pl1-f195.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2388833AbeIUBDx (ORCPT ); Thu, 20 Sep 2018 21:03:53 -0400 Received: by mail-pl1-f195.google.com with SMTP id s17-v6so4791274plp.7 for ; Thu, 20 Sep 2018 12:18:54 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=RPwq9RpZ3HZmGVoBRVZImO+Obs44n4fXrxe3KFa48HM=; b=HQPqRJ7A4zLKovaTX51MvDuqZqMkeVASOWIjZk/z6eUt7c57jAM+jl6pPDB64o2kZO HDwdMxqrOBK21i+x10MsnFDc/0MWFg/Fxv6sqCJyZXzf1hkWFE5HVR/pCPxqKJdCZFW2 SKZ4b51ISiQ3aEXNHDmmbhZqQyHHYaW27HLfM= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=RPwq9RpZ3HZmGVoBRVZImO+Obs44n4fXrxe3KFa48HM=; b=BTtGdixT9/nGevFJDJvRJIrLud2Oa+65ClXxTcuu5QLPGQIGXYw/jWss5NBXc56dd+ MVcxNaZTqmZ8wCvojJMuRv3ehQjTf7Xv7vdQJ9GxoayP/lmrTIfVpzSurOztBsMdJpL2 7bHSIFvSWR5YmrlAZxwmfKS5PhLP9h+xWPri2w6V0lvmE5+OeCHJesF5pkQVsSdTmak8 1w60uiOTHIpyWrDNrO4wi7WM4OcBCf5XhU/ig4vMU/jUDu4F/1bVl/3bmDyKrX5XK3nd ECD4qnadFzTEuRlywMQHTSsiDhpeF0NoxMOBvSwWdjUPIUTUAMuvPCDc0hkcYocS5FbD Ol8w== X-Gm-Message-State: APzg51BYdbqXGgXevKXRkgdhStpBTYRamDm0Q780qXz8FKyzukOJW47T tsy7W3L3hcb7fzixrJYrVKNyRQ== X-Received: by 2002:a17:902:a715:: with SMTP id w21-v6mr40816192plq.61.1537471133811; Thu, 20 Sep 2018 12:18:53 -0700 (PDT) Received: from localhost.localdomain ([209.121.128.187]) by smtp.gmail.com with ESMTPSA id k13-v6sm4424443pgf.37.2018.09.20.12.18.52 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 20 Sep 2018 12:18:52 -0700 (PDT) From: Mathieu Poirier To: gregkh@linuxfoundation.org Cc: linux-kernel@vger.kernel.org Subject: [PATCH 21/44] coresight: perf: Remove set_buffer call back Date: Thu, 20 Sep 2018 13:17:56 -0600 Message-Id: <1537471099-19781-22-git-send-email-mathieu.poirier@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1537471099-19781-1-git-send-email-mathieu.poirier@linaro.org> References: <1537471099-19781-1-git-send-email-mathieu.poirier@linaro.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Suzuki K Poulose In coresight perf mode, we need to prepare the sink before starting a session, which is done via set_buffer call back. We then proceed to enable the tracing. If we fail to start the session successfully, we leave the sink configuration unchanged. In order to make the operation atomic and to avoid yet another call back to clear the buffer, we get rid of the "set_buffer" call back and pass the buffer details via enable() call back to the sink. Cc: Mathieu Poirier Signed-off-by: Suzuki K Poulose Signed-off-by: Mathieu Poirier --- drivers/hwtracing/coresight/coresight-etb10.c | 32 ++++++++++++++++++------ drivers/hwtracing/coresight/coresight-etm-perf.c | 9 ++----- drivers/hwtracing/coresight/coresight-priv.h | 2 +- drivers/hwtracing/coresight/coresight-tmc-etf.c | 28 ++++++++++++++------- drivers/hwtracing/coresight/coresight-tmc-etr.c | 7 +++--- drivers/hwtracing/coresight/coresight-tpiu.c | 2 +- drivers/hwtracing/coresight/coresight.c | 11 ++++---- include/linux/coresight.h | 6 +---- 8 files changed, 59 insertions(+), 38 deletions(-) -- 2.7.4 diff --git a/drivers/hwtracing/coresight/coresight-etb10.c b/drivers/hwtracing/coresight/coresight-etb10.c index dba75c905e57..9fd77fdc1244 100644 --- a/drivers/hwtracing/coresight/coresight-etb10.c +++ b/drivers/hwtracing/coresight/coresight-etb10.c @@ -28,6 +28,7 @@ #include "coresight-priv.h" +#include "coresight-etm-perf.h" #define ETB_RAM_DEPTH_REG 0x004 #define ETB_STATUS_REG 0x00c @@ -90,6 +91,9 @@ struct etb_drvdata { u32 trigger_cntr; }; +static int etb_set_buffer(struct coresight_device *csdev, + struct perf_output_handle *handle); + static unsigned int etb_get_buffer_depth(struct etb_drvdata *drvdata) { u32 depth = 0; @@ -131,12 +135,24 @@ static void etb_enable_hw(struct etb_drvdata *drvdata) CS_LOCK(drvdata->base); } -static int etb_enable(struct coresight_device *csdev, u32 mode) +static int etb_enable(struct coresight_device *csdev, u32 mode, void *data) { + int ret = 0; u32 val; unsigned long flags; struct etb_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent); + /* + * We don't have an internal state to clean up if we fail to setup + * the perf buffer. So we can perform the step before we turn the + * ETB on and leave without cleaning up. + */ + if (mode == CS_MODE_PERF) { + ret = etb_set_buffer(csdev, (struct perf_output_handle *)data); + if (ret) + goto out; + } + val = local_cmpxchg(&drvdata->mode, CS_MODE_DISABLED, mode); /* @@ -160,8 +176,9 @@ static int etb_enable(struct coresight_device *csdev, u32 mode) spin_unlock_irqrestore(&drvdata->spinlock, flags); out: - dev_dbg(drvdata->dev, "ETB enabled\n"); - return 0; + if (!ret) + dev_dbg(drvdata->dev, "ETB enabled\n"); + return ret; } static void etb_disable_hw(struct etb_drvdata *drvdata) @@ -298,12 +315,14 @@ static void etb_free_buffer(void *config) } static int etb_set_buffer(struct coresight_device *csdev, - struct perf_output_handle *handle, - void *sink_config) + struct perf_output_handle *handle) { int ret = 0; unsigned long head; - struct cs_buffers *buf = sink_config; + struct cs_buffers *buf = etm_perf_sink_config(handle); + + if (!buf) + return -EINVAL; /* wrap head around to the amount of space we have */ head = handle->head & ((buf->nr_pages << PAGE_SHIFT) - 1); @@ -457,7 +476,6 @@ static const struct coresight_ops_sink etb_sink_ops = { .disable = etb_disable, .alloc_buffer = etb_alloc_buffer, .free_buffer = etb_free_buffer, - .set_buffer = etb_set_buffer, .update_buffer = etb_update_buffer, }; diff --git a/drivers/hwtracing/coresight/coresight-etm-perf.c b/drivers/hwtracing/coresight/coresight-etm-perf.c index 16b83d8b2ac2..abe8249b893b 100644 --- a/drivers/hwtracing/coresight/coresight-etm-perf.c +++ b/drivers/hwtracing/coresight/coresight-etm-perf.c @@ -286,16 +286,11 @@ static void etm_event_start(struct perf_event *event, int flags) path = etm_event_cpu_path(event_data, cpu); /* We need a sink, no need to continue without one */ sink = coresight_get_sink(path); - if (WARN_ON_ONCE(!sink || !sink_ops(sink)->set_buffer)) - goto fail_end_stop; - - /* Configure the sink */ - if (sink_ops(sink)->set_buffer(sink, handle, - event_data->snk_config)) + if (WARN_ON_ONCE(!sink)) goto fail_end_stop; /* Nothing will happen without a path */ - if (coresight_enable_path(path, CS_MODE_PERF)) + if (coresight_enable_path(path, CS_MODE_PERF, handle)) goto fail_end_stop; /* Tell the perf core the event is alive */ diff --git a/drivers/hwtracing/coresight/coresight-priv.h b/drivers/hwtracing/coresight/coresight-priv.h index 1a6cf3589866..c11da5564a67 100644 --- a/drivers/hwtracing/coresight/coresight-priv.h +++ b/drivers/hwtracing/coresight/coresight-priv.h @@ -137,7 +137,7 @@ static inline void coresight_write_reg_pair(void __iomem *addr, u64 val, } void coresight_disable_path(struct list_head *path); -int coresight_enable_path(struct list_head *path, u32 mode); +int coresight_enable_path(struct list_head *path, u32 mode, void *sink_data); struct coresight_device *coresight_get_sink(struct list_head *path); struct coresight_device *coresight_get_enabled_sink(bool reset); struct list_head *coresight_build_path(struct coresight_device *csdev, diff --git a/drivers/hwtracing/coresight/coresight-tmc-etf.c b/drivers/hwtracing/coresight/coresight-tmc-etf.c index 31a98f915641..4156c95ce1bb 100644 --- a/drivers/hwtracing/coresight/coresight-tmc-etf.c +++ b/drivers/hwtracing/coresight/coresight-tmc-etf.c @@ -10,6 +10,10 @@ #include #include "coresight-priv.h" #include "coresight-tmc.h" +#include "coresight-etm-perf.h" + +static int tmc_set_etf_buffer(struct coresight_device *csdev, + struct perf_output_handle *handle); static void tmc_etb_enable_hw(struct tmc_drvdata *drvdata) { @@ -182,11 +186,12 @@ static int tmc_enable_etf_sink_sysfs(struct coresight_device *csdev) return ret; } -static int tmc_enable_etf_sink_perf(struct coresight_device *csdev) +static int tmc_enable_etf_sink_perf(struct coresight_device *csdev, void *data) { int ret = 0; unsigned long flags; struct tmc_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent); + struct perf_output_handle *handle = data; spin_lock_irqsave(&drvdata->spinlock, flags); if (drvdata->reading) { @@ -204,15 +209,19 @@ static int tmc_enable_etf_sink_perf(struct coresight_device *csdev) goto out; } - drvdata->mode = CS_MODE_PERF; - tmc_etb_enable_hw(drvdata); + ret = tmc_set_etf_buffer(csdev, handle); + if (!ret) { + drvdata->mode = CS_MODE_PERF; + tmc_etb_enable_hw(drvdata); + } out: spin_unlock_irqrestore(&drvdata->spinlock, flags); return ret; } -static int tmc_enable_etf_sink(struct coresight_device *csdev, u32 mode) +static int tmc_enable_etf_sink(struct coresight_device *csdev, + u32 mode, void *data) { int ret; struct tmc_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent); @@ -222,7 +231,7 @@ static int tmc_enable_etf_sink(struct coresight_device *csdev, u32 mode) ret = tmc_enable_etf_sink_sysfs(csdev); break; case CS_MODE_PERF: - ret = tmc_enable_etf_sink_perf(csdev); + ret = tmc_enable_etf_sink_perf(csdev, data); break; /* We shouldn't be here */ default: @@ -328,12 +337,14 @@ static void tmc_free_etf_buffer(void *config) } static int tmc_set_etf_buffer(struct coresight_device *csdev, - struct perf_output_handle *handle, - void *sink_config) + struct perf_output_handle *handle) { int ret = 0; unsigned long head; - struct cs_buffers *buf = sink_config; + struct cs_buffers *buf = etm_perf_sink_config(handle); + + if (!buf) + return -EINVAL; /* wrap head around to the amount of space we have */ head = handle->head & ((buf->nr_pages << PAGE_SHIFT) - 1); @@ -472,7 +483,6 @@ static const struct coresight_ops_sink tmc_etf_sink_ops = { .disable = tmc_disable_etf_sink, .alloc_buffer = tmc_alloc_etf_buffer, .free_buffer = tmc_free_etf_buffer, - .set_buffer = tmc_set_etf_buffer, .update_buffer = tmc_update_etf_buffer, }; diff --git a/drivers/hwtracing/coresight/coresight-tmc-etr.c b/drivers/hwtracing/coresight/coresight-tmc-etr.c index 5e9bb2f0e9c0..1aedfc3629c0 100644 --- a/drivers/hwtracing/coresight/coresight-tmc-etr.c +++ b/drivers/hwtracing/coresight/coresight-tmc-etr.c @@ -1103,19 +1103,20 @@ static int tmc_enable_etr_sink_sysfs(struct coresight_device *csdev) return ret; } -static int tmc_enable_etr_sink_perf(struct coresight_device *csdev) +static int tmc_enable_etr_sink_perf(struct coresight_device *csdev, void *data) { /* We don't support perf mode yet ! */ return -EINVAL; } -static int tmc_enable_etr_sink(struct coresight_device *csdev, u32 mode) +static int tmc_enable_etr_sink(struct coresight_device *csdev, + u32 mode, void *data) { switch (mode) { case CS_MODE_SYSFS: return tmc_enable_etr_sink_sysfs(csdev); case CS_MODE_PERF: - return tmc_enable_etr_sink_perf(csdev); + return tmc_enable_etr_sink_perf(csdev, data); } /* We shouldn't be here */ diff --git a/drivers/hwtracing/coresight/coresight-tpiu.c b/drivers/hwtracing/coresight/coresight-tpiu.c index ce0b84583861..b2f72a1fa402 100644 --- a/drivers/hwtracing/coresight/coresight-tpiu.c +++ b/drivers/hwtracing/coresight/coresight-tpiu.c @@ -68,7 +68,7 @@ static void tpiu_enable_hw(struct tpiu_drvdata *drvdata) CS_LOCK(drvdata->base); } -static int tpiu_enable(struct coresight_device *csdev, u32 mode) +static int tpiu_enable(struct coresight_device *csdev, u32 mode, void *__unused) { struct tpiu_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent); diff --git a/drivers/hwtracing/coresight/coresight.c b/drivers/hwtracing/coresight/coresight.c index 07382c55b31d..e73ca6af4765 100644 --- a/drivers/hwtracing/coresight/coresight.c +++ b/drivers/hwtracing/coresight/coresight.c @@ -128,7 +128,8 @@ static int coresight_find_link_outport(struct coresight_device *csdev, return -ENODEV; } -static int coresight_enable_sink(struct coresight_device *csdev, u32 mode) +static int coresight_enable_sink(struct coresight_device *csdev, + u32 mode, void *data) { int ret; @@ -137,7 +138,7 @@ static int coresight_enable_sink(struct coresight_device *csdev, u32 mode) * existing "mode" of operation. */ if (sink_ops(csdev)->enable) { - ret = sink_ops(csdev)->enable(csdev, mode); + ret = sink_ops(csdev)->enable(csdev, mode, data); if (ret) return ret; csdev->enable = true; @@ -315,7 +316,7 @@ void coresight_disable_path(struct list_head *path) } } -int coresight_enable_path(struct list_head *path, u32 mode) +int coresight_enable_path(struct list_head *path, u32 mode, void *sink_data) { int ret = 0; @@ -340,7 +341,7 @@ int coresight_enable_path(struct list_head *path, u32 mode) switch (type) { case CORESIGHT_DEV_TYPE_SINK: - ret = coresight_enable_sink(csdev, mode); + ret = coresight_enable_sink(csdev, mode, sink_data); /* * Sink is the first component turned on. If we * failed to enable the sink, there are no components @@ -643,7 +644,7 @@ int coresight_enable(struct coresight_device *csdev) goto out; } - ret = coresight_enable_path(path, CS_MODE_SYSFS); + ret = coresight_enable_path(path, CS_MODE_SYSFS, NULL); if (ret) goto err_path; diff --git a/include/linux/coresight.h b/include/linux/coresight.h index 8e52682b1e90..53535821dc25 100644 --- a/include/linux/coresight.h +++ b/include/linux/coresight.h @@ -185,18 +185,14 @@ struct coresight_device { * @disable: disables the sink. * @alloc_buffer: initialises perf's ring buffer for trace collection. * @free_buffer: release memory allocated in @get_config. - * @set_buffer: initialises buffer mechanic before a trace session. * @update_buffer: update buffer pointers after a trace session. */ struct coresight_ops_sink { - int (*enable)(struct coresight_device *csdev, u32 mode); + int (*enable)(struct coresight_device *csdev, u32 mode, void *data); void (*disable)(struct coresight_device *csdev); void *(*alloc_buffer)(struct coresight_device *csdev, int cpu, void **pages, int nr_pages, bool overwrite); void (*free_buffer)(void *config); - int (*set_buffer)(struct coresight_device *csdev, - struct perf_output_handle *handle, - void *sink_config); unsigned long (*update_buffer)(struct coresight_device *csdev, struct perf_output_handle *handle, void *sink_config); From patchwork Thu Sep 20 19:17:57 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mathieu Poirier X-Patchwork-Id: 147143 Delivered-To: patch@linaro.org Received: by 2002:a2e:1648:0:0:0:0:0 with SMTP id 8-v6csp2376424ljw; Thu, 20 Sep 2018 12:19:00 -0700 (PDT) X-Google-Smtp-Source: ANB0VdbtLv5yaRd9UdWc8iqRV6YUSDMuJcCDnOylEMb2FYA+jvrAptjEn2BN+WhmEUDUHedjFu4+ X-Received: by 2002:a63:6d4f:: with SMTP id i76-v6mr37802816pgc.215.1537471140057; Thu, 20 Sep 2018 12:19:00 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1537471140; cv=none; d=google.com; s=arc-20160816; b=YnNXSCA2STMOkbiXUXhnH/8xTQ19sTPjyxiUgqFn/RYEs8jP7bsSMGw/NecsUFwFZX kwMlPIPUtHlrtUWIM/RDkqjRfKyMqv5bOkMTD1ymPxddN6RNQ8tFV3mnsLMyrk9AyWpB vMIeTd0Wuvd09GyCnLfPrtepdgcUEmY7U8QJjKs4e9yYkUdf8k0nKIdo2fler11x82lG 0oMW7LbvlpJ0k1yA7UbRzJ/k6UwUORWMTPs7hbF4IkKK6cMhEawM9+3B2iHQp9eZdbBW jUwCNlaGmqTQzSrGDMepJW7k7noCFFo3mTk/4PxNYHKFfjAGA5e5oEC3L3cUCdllZBcq 9Scw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature; bh=d7KXFlRnIuoKx9WD1Q8Bn/fODwXcUwmuItoY8vv8QjI=; b=pLdUblak3cqYo9fSxY7c3jgVWgfNdYI24x+/e7XKlb36RM2P4pcC5NILcED+IYDPv+ Nl6aOYxqz0Ho/d8R20r1ld1AffUtMRw2kN1dkWlj+cLR/w1dLBNubZyv9hpX7GSspI+T 451A7SnpOuiL91Cqzy/lyWBX3uo2krgaaqdH9+3XqHeLhhSslQYLv+R1wWtm4gTbzu/L yN069vkoqO4Ho6os5rnC8opFGE3Y0eTTbxlZ2owQkS+Lnn8Ow+Iw8Qfmd3vLpwWYDzPl GPLZH3+kDMr/2VjYGDZf90H+/vJp87vrHM9p2J6uevmpdvCsUjAX/BQd6Pge+wzx5vXV Ei4A== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=D2xO3o9e; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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We use software double buffering at the moment. i.e, the TMC-ETR uses a separate buffer than the perf ring buffer. The data is copied to the perf ring buffer once a session completes. The TMC-ETR would try to match the larger of perf ring buffer or the ETR buffer size configured via sysfs, scaling down to a minimum limit of 1MB. Cc: Mathieu Poirier Signed-off-by: Suzuki K Poulose Signed-off-by: Mathieu Poirier --- drivers/hwtracing/coresight/coresight-tmc-etr.c | 248 +++++++++++++++++++++++- drivers/hwtracing/coresight/coresight-tmc.h | 2 + 2 files changed, 248 insertions(+), 2 deletions(-) -- 2.7.4 diff --git a/drivers/hwtracing/coresight/coresight-tmc-etr.c b/drivers/hwtracing/coresight/coresight-tmc-etr.c index 1aedfc3629c0..56fea4ff947e 100644 --- a/drivers/hwtracing/coresight/coresight-tmc-etr.c +++ b/drivers/hwtracing/coresight/coresight-tmc-etr.c @@ -10,6 +10,7 @@ #include #include #include "coresight-catu.h" +#include "coresight-etm-perf.h" #include "coresight-priv.h" #include "coresight-tmc.h" @@ -21,6 +22,28 @@ struct etr_flat_buf { }; /* + * etr_perf_buffer - Perf buffer used for ETR + * @etr_buf - Actual buffer used by the ETR + * @snaphost - Perf session mode + * @head - handle->head at the beginning of the session. + * @nr_pages - Number of pages in the ring buffer. + * @pages - Array of Pages in the ring buffer. + */ +struct etr_perf_buffer { + struct etr_buf *etr_buf; + bool snapshot; + unsigned long head; + int nr_pages; + void **pages; +}; + +/* Convert the perf index to an offset within the ETR buffer */ +#define PERF_IDX2OFF(idx, buf) ((idx) % ((buf)->nr_pages << PAGE_SHIFT)) + +/* Lower limit for ETR hardware buffer */ +#define TMC_ETR_PERF_MIN_BUF_SIZE SZ_1M + +/* * The TMC ETR SG has a page size of 4K. The SG table contains pointers * to 4KB buffers. However, the OS may use a PAGE_SIZE different from * 4K (i.e, 16KB or 64KB). This implies that a single OS page could @@ -1103,10 +1126,228 @@ static int tmc_enable_etr_sink_sysfs(struct coresight_device *csdev) return ret; } +/* + * tmc_etr_setup_perf_buf: Allocate ETR buffer for use by perf. + * The size of the hardware buffer is dependent on the size configured + * via sysfs and the perf ring buffer size. We prefer to allocate the + * largest possible size, scaling down the size by half until it + * reaches a minimum limit (1M), beyond which we give up. + */ +static struct etr_perf_buffer * +tmc_etr_setup_perf_buf(struct tmc_drvdata *drvdata, int node, int nr_pages, + void **pages, bool snapshot) +{ + struct etr_buf *etr_buf; + struct etr_perf_buffer *etr_perf; + unsigned long size; + + etr_perf = kzalloc_node(sizeof(*etr_perf), GFP_KERNEL, node); + if (!etr_perf) + return ERR_PTR(-ENOMEM); + + /* + * Try to match the perf ring buffer size if it is larger + * than the size requested via sysfs. + */ + if ((nr_pages << PAGE_SHIFT) > drvdata->size) { + etr_buf = tmc_alloc_etr_buf(drvdata, (nr_pages << PAGE_SHIFT), + 0, node, NULL); + if (!IS_ERR(etr_buf)) + goto done; + } + + /* + * Else switch to configured size for this ETR + * and scale down until we hit the minimum limit. + */ + size = drvdata->size; + do { + etr_buf = tmc_alloc_etr_buf(drvdata, size, 0, node, NULL); + if (!IS_ERR(etr_buf)) + goto done; + size /= 2; + } while (size >= TMC_ETR_PERF_MIN_BUF_SIZE); + + kfree(etr_perf); + return ERR_PTR(-ENOMEM); + +done: + etr_perf->etr_buf = etr_buf; + return etr_perf; +} + + +static void *tmc_alloc_etr_buffer(struct coresight_device *csdev, + int cpu, void **pages, int nr_pages, + bool snapshot) +{ + struct etr_perf_buffer *etr_perf; + struct tmc_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent); + + if (cpu == -1) + cpu = smp_processor_id(); + + etr_perf = tmc_etr_setup_perf_buf(drvdata, cpu_to_node(cpu), + nr_pages, pages, snapshot); + if (IS_ERR(etr_perf)) { + dev_dbg(drvdata->dev, "Unable to allocate ETR buffer\n"); + return NULL; + } + + etr_perf->snapshot = snapshot; + etr_perf->nr_pages = nr_pages; + etr_perf->pages = pages; + + return etr_perf; +} + +static void tmc_free_etr_buffer(void *config) +{ + struct etr_perf_buffer *etr_perf = config; + + if (etr_perf->etr_buf) + tmc_free_etr_buf(etr_perf->etr_buf); + kfree(etr_perf); +} + +/* + * tmc_etr_sync_perf_buffer: Copy the actual trace data from the hardware + * buffer to the perf ring buffer. + */ +static void tmc_etr_sync_perf_buffer(struct etr_perf_buffer *etr_perf) +{ + long bytes, to_copy; + long pg_idx, pg_offset, src_offset; + unsigned long head = etr_perf->head; + char **dst_pages, *src_buf; + struct etr_buf *etr_buf = etr_perf->etr_buf; + + head = etr_perf->head; + pg_idx = head >> PAGE_SHIFT; + pg_offset = head & (PAGE_SIZE - 1); + dst_pages = (char **)etr_perf->pages; + src_offset = etr_buf->offset; + to_copy = etr_buf->len; + + while (to_copy > 0) { + /* + * In one iteration, we can copy minimum of : + * 1) what is available in the source buffer, + * 2) what is available in the source buffer, before it + * wraps around. + * 3) what is available in the destination page. + * in one iteration. + */ + bytes = tmc_etr_buf_get_data(etr_buf, src_offset, to_copy, + &src_buf); + if (WARN_ON_ONCE(bytes <= 0)) + break; + bytes = min(bytes, (long)(PAGE_SIZE - pg_offset)); + + memcpy(dst_pages[pg_idx] + pg_offset, src_buf, bytes); + + to_copy -= bytes; + + /* Move destination pointers */ + pg_offset += bytes; + if (pg_offset == PAGE_SIZE) { + pg_offset = 0; + if (++pg_idx == etr_perf->nr_pages) + pg_idx = 0; + } + + /* Move source pointers */ + src_offset += bytes; + if (src_offset >= etr_buf->size) + src_offset -= etr_buf->size; + } +} + +/* + * tmc_update_etr_buffer : Update the perf ring buffer with the + * available trace data. We use software double buffering at the moment. + * + * TODO: Add support for reusing the perf ring buffer. + */ +static unsigned long +tmc_update_etr_buffer(struct coresight_device *csdev, + struct perf_output_handle *handle, + void *config) +{ + bool lost = false; + unsigned long flags, size = 0; + struct tmc_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent); + struct etr_perf_buffer *etr_perf = config; + struct etr_buf *etr_buf = etr_perf->etr_buf; + + spin_lock_irqsave(&drvdata->spinlock, flags); + if (WARN_ON(drvdata->perf_data != etr_perf)) { + lost = true; + spin_unlock_irqrestore(&drvdata->spinlock, flags); + goto out; + } + + CS_UNLOCK(drvdata->base); + + tmc_flush_and_stop(drvdata); + tmc_sync_etr_buf(drvdata); + + CS_LOCK(drvdata->base); + /* Reset perf specific data */ + drvdata->perf_data = NULL; + spin_unlock_irqrestore(&drvdata->spinlock, flags); + + size = etr_buf->len; + tmc_etr_sync_perf_buffer(etr_perf); + + /* + * Update handle->head in snapshot mode. Also update the size to the + * hardware buffer size if there was an overflow. + */ + if (etr_perf->snapshot) { + handle->head += size; + if (etr_buf->full) + size = etr_buf->size; + } + + lost |= etr_buf->full; +out: + if (lost) + perf_aux_output_flag(handle, PERF_AUX_FLAG_TRUNCATED); + return size; +} + static int tmc_enable_etr_sink_perf(struct coresight_device *csdev, void *data) { - /* We don't support perf mode yet ! */ - return -EINVAL; + int rc = 0; + unsigned long flags; + struct tmc_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent); + struct perf_output_handle *handle = data; + struct etr_perf_buffer *etr_perf = etm_perf_sink_config(handle); + + spin_lock_irqsave(&drvdata->spinlock, flags); + /* + * There can be only one writer per sink in perf mode. If the sink + * is already open in SYSFS mode, we can't use it. + */ + if (drvdata->mode != CS_MODE_DISABLED || WARN_ON(drvdata->perf_data)) { + rc = -EBUSY; + goto unlock_out; + } + + if (WARN_ON(!etr_perf || !etr_perf->etr_buf)) { + rc = -EINVAL; + goto unlock_out; + } + + etr_perf->head = PERF_IDX2OFF(handle->head, etr_perf); + drvdata->perf_data = etr_perf; + drvdata->mode = CS_MODE_PERF; + tmc_etr_enable_hw(drvdata, etr_perf->etr_buf); + +unlock_out: + spin_unlock_irqrestore(&drvdata->spinlock, flags); + return rc; } static int tmc_enable_etr_sink(struct coresight_device *csdev, @@ -1148,6 +1389,9 @@ static void tmc_disable_etr_sink(struct coresight_device *csdev) static const struct coresight_ops_sink tmc_etr_sink_ops = { .enable = tmc_enable_etr_sink, .disable = tmc_disable_etr_sink, + .alloc_buffer = tmc_alloc_etr_buffer, + .update_buffer = tmc_update_etr_buffer, + .free_buffer = tmc_free_etr_buffer, }; const struct coresight_ops tmc_etr_cs_ops = { diff --git a/drivers/hwtracing/coresight/coresight-tmc.h b/drivers/hwtracing/coresight/coresight-tmc.h index 872f63e3651b..487c53701e9c 100644 --- a/drivers/hwtracing/coresight/coresight-tmc.h +++ b/drivers/hwtracing/coresight/coresight-tmc.h @@ -170,6 +170,7 @@ struct etr_buf { * @trigger_cntr: amount of words to store after a trigger. * @etr_caps: Bitmask of capabilities of the TMC ETR, inferred from the * device configuration register (DEVID) + * @perf_data: PERF buffer for ETR. * @sysfs_data: SYSFS buffer for ETR. */ struct tmc_drvdata { @@ -191,6 +192,7 @@ struct tmc_drvdata { u32 trigger_cntr; u32 etr_caps; struct etr_buf *sysfs_buf; + void *perf_data; }; struct etr_buf_operations { From patchwork Thu Sep 20 19:17:58 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mathieu Poirier X-Patchwork-Id: 147165 Delivered-To: patch@linaro.org Received: by 2002:a2e:1648:0:0:0:0:0 with SMTP id 8-v6csp2378464ljw; Thu, 20 Sep 2018 12:21:04 -0700 (PDT) X-Google-Smtp-Source: ANB0VdYpG015FY4UBE5nUSti0hKUwKh+ACotWJFH9bILPk3GwPXncUCI2hDjTOShtUonAuOU9Kkx X-Received: by 2002:a17:902:468:: with SMTP id 95-v6mr39591638ple.122.1537471264849; Thu, 20 Sep 2018 12:21:04 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1537471264; cv=none; d=google.com; s=arc-20160816; b=GYH0JOmS8znTGaE5b4eC5qqhCbVTYS7XxVYhEP3cFVIyW8hQDCsVuWSo1q5gzTl2QD hzSGGMA+on4oxp/CRlhnkxyNrBhe5PMPsUDPaZQwhy1eTORGFOVrydBgBhZ+cvCd/v12 eOLXW5ICMLr6CLLkRvXZ0NSzJBZ9AtiVvZNGW9GdaatxQ7aMlBdJP2gSjanpSM5IY8HF FFR1v415GOUP7Z9HHEEMk5P0HSZhXYz5KfMJG1WnVI2qhX3ond5RlzpaoMVxWbL4CaIT R4uACz9fpVDFaPMJ2AfLnYFWInec8L3V57/jy9R6iG5kl4wD7QGPPq3qYd2VI6/OYw9e +XbQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature; bh=lmS56beqTImL3Fl6E6Cwq10GeXJJvehS5phOJWJ21C4=; b=uSRUnVq5gg4OfCMH7WDhoXPIqbqcuIh4xbrhGAKSTyU0QQHPx8rtIA073nF9jDb5UX 2d6m7mjtHBnN7LxJ2ifZhTDkcwE0hbohpL3/s58c8jbb9itW3VgbDq4eq6qIb7RITEJN VJhgGGC/doliqT2HgOUV+vLWk3GohVOevyC87h7B79fsyGzbhBzPGlsjjGsYD0gYu42T AYUbZz5d1NzZQBcgKl5mgMnjJ7eWAOomNK6ypC5XfulBTwNVmm4W+io+HvtCOLNfot6R kTQv8VfDhSTaK/zNJSG5CAj0ppcied1Sf1oYU9ZsoXYNV3xkrsWbMTeJ0Dsmr6+TPacC CjUA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=eVXdKou0; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id ce1-v6si28830446plb.391.2018.09.20.12.21.04; Thu, 20 Sep 2018 12:21:04 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=eVXdKou0; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2388938AbeIUBD6 (ORCPT + 32 others); Thu, 20 Sep 2018 21:03:58 -0400 Received: from mail-pf1-f194.google.com ([209.85.210.194]:39286 "EHLO mail-pf1-f194.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2388450AbeIUBD4 (ORCPT ); Thu, 20 Sep 2018 21:03:56 -0400 Received: by mail-pf1-f194.google.com with SMTP id j8-v6so4820660pff.6 for ; Thu, 20 Sep 2018 12:18:57 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=lmS56beqTImL3Fl6E6Cwq10GeXJJvehS5phOJWJ21C4=; b=eVXdKou0wkV9Outr8mazEtsG/LuDsWW89sghkAAEF5d91eZtzNBqzdJ+dh7sUEAaVF scPvJDd0AjLO9Xi0xKtNCqxXcXyu6Xq31U2TGceMwWcBYWHs3gn97eBmKX0HwZdY+Fqq oysuwhDQwKjcAob2FXx6HoRZqfBlfLA7eycQs= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=lmS56beqTImL3Fl6E6Cwq10GeXJJvehS5phOJWJ21C4=; b=sshugw9/NdPp8Df6F24teV3cmP3JV6oAEQW6p28fcWrCznowdJhvvcExh+rKWP9Pg7 txMtjlb5AM8/mL52gbCW6elMetFpJEn1pKIVCQMBC79KnTq9CE/zgt0f/WTFg2G5MCiR IDI3S2kcmGNUXcAbV5vxWQjiuYk+XyESQWOzSVrg+92XoInRQEVngw7jaPugFlfwwylZ mKRanXK1bDAIRjhoxfYs0EX9TR04KuWUIvpraCeRqFyd09vb251xFkCBOjW2iQHAYCOE V4c5dxJpPr3FZGKPI4BzKyQrtfbudbuQs4KCqyxURz0gtUvOnxfQMwFt0YBHNpjCla2z RdSQ== X-Gm-Message-State: APzg51AQpLXn91rWPsP1ft/Q6pfd+8p5/tzTwpKUB3v4PTS9teTPzmhz Sw15P+x+hX3F8TKl0ORqMjmrZw== X-Received: by 2002:a62:4255:: with SMTP id p82-v6mr42912778pfa.238.1537471136867; Thu, 20 Sep 2018 12:18:56 -0700 (PDT) Received: from localhost.localdomain ([209.121.128.187]) by smtp.gmail.com with ESMTPSA id k13-v6sm4424443pgf.37.2018.09.20.12.18.55 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 20 Sep 2018 12:18:55 -0700 (PDT) From: Mathieu Poirier To: gregkh@linuxfoundation.org Cc: linux-kernel@vger.kernel.org Subject: [PATCH 23/44] coresight: etb10: Refactor etb_drvdata::mode handling Date: Thu, 20 Sep 2018 13:17:58 -0600 Message-Id: <1537471099-19781-24-git-send-email-mathieu.poirier@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1537471099-19781-1-git-send-email-mathieu.poirier@linaro.org> References: <1537471099-19781-1-git-send-email-mathieu.poirier@linaro.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org This patch moves the etb_drvdata::mode from a locat_t to a simple u32, as it is for the ETF and ETR drivers. This streamlines the code and adds commonality with the other drivers when dealing with similar operations. Signed-off-by: Mathieu Poirier Reviewed-by: Suzuki K Poulose --- drivers/hwtracing/coresight/coresight-etb10.c | 62 +++++++++++++++------------ 1 file changed, 34 insertions(+), 28 deletions(-) -- 2.7.4 diff --git a/drivers/hwtracing/coresight/coresight-etb10.c b/drivers/hwtracing/coresight/coresight-etb10.c index 9fd77fdc1244..69287163ce4e 100644 --- a/drivers/hwtracing/coresight/coresight-etb10.c +++ b/drivers/hwtracing/coresight/coresight-etb10.c @@ -5,7 +5,6 @@ * Description: CoreSight Embedded Trace Buffer driver */ -#include #include #include #include @@ -72,8 +71,8 @@ * @miscdev: specifics to handle "/dev/xyz.etb" entry. * @spinlock: only one at a time pls. * @reading: synchronise user space access to etb buffer. - * @mode: this ETB is being used. * @buf: area of memory where ETB buffer content gets sent. + * @mode: this ETB is being used. * @buffer_depth: size of @buf. * @trigger_cntr: amount of words to store after a trigger. */ @@ -85,8 +84,8 @@ struct etb_drvdata { struct miscdevice miscdev; spinlock_t spinlock; local_t reading; - local_t mode; u8 *buf; + u32 mode; u32 buffer_depth; u32 trigger_cntr; }; @@ -138,44 +137,48 @@ static void etb_enable_hw(struct etb_drvdata *drvdata) static int etb_enable(struct coresight_device *csdev, u32 mode, void *data) { int ret = 0; - u32 val; unsigned long flags; struct etb_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent); - /* - * We don't have an internal state to clean up if we fail to setup - * the perf buffer. So we can perform the step before we turn the - * ETB on and leave without cleaning up. - */ - if (mode == CS_MODE_PERF) { - ret = etb_set_buffer(csdev, (struct perf_output_handle *)data); - if (ret) - goto out; - } + spin_lock_irqsave(&drvdata->spinlock, flags); - val = local_cmpxchg(&drvdata->mode, - CS_MODE_DISABLED, mode); /* * When accessing from Perf, a HW buffer can be handled * by a single trace entity. In sysFS mode many tracers * can be logging to the same HW buffer. */ - if (val == CS_MODE_PERF) - return -EBUSY; + if (drvdata->mode == CS_MODE_PERF) { + ret = -EBUSY; + goto out; + } /* Don't let perf disturb sysFS sessions */ - if (val == CS_MODE_SYSFS && mode == CS_MODE_PERF) - return -EBUSY; + if (drvdata->mode == CS_MODE_SYSFS && mode == CS_MODE_PERF) { + ret = -EBUSY; + goto out; + } /* Nothing to do, the tracer is already enabled. */ - if (val == CS_MODE_SYSFS) + if (drvdata->mode == CS_MODE_SYSFS && mode == CS_MODE_SYSFS) goto out; - spin_lock_irqsave(&drvdata->spinlock, flags); + /* + * We don't have an internal state to clean up if we fail to setup + * the perf buffer. So we can perform the step before we turn the + * ETB on and leave without cleaning up. + */ + if (mode == CS_MODE_PERF) { + ret = etb_set_buffer(csdev, (struct perf_output_handle *)data); + if (ret) + goto out; + } + + drvdata->mode = mode; etb_enable_hw(drvdata); - spin_unlock_irqrestore(&drvdata->spinlock, flags); out: + spin_unlock_irqrestore(&drvdata->spinlock, flags); + if (!ret) dev_dbg(drvdata->dev, "ETB enabled\n"); return ret; @@ -277,11 +280,14 @@ static void etb_disable(struct coresight_device *csdev) unsigned long flags; spin_lock_irqsave(&drvdata->spinlock, flags); - etb_disable_hw(drvdata); - etb_dump_hw(drvdata); - spin_unlock_irqrestore(&drvdata->spinlock, flags); - local_set(&drvdata->mode, CS_MODE_DISABLED); + /* Disable the ETB only if it needs to */ + if (drvdata->mode != CS_MODE_DISABLED) { + etb_disable_hw(drvdata); + etb_dump_hw(drvdata); + drvdata->mode = CS_MODE_DISABLED; + } + spin_unlock_irqrestore(&drvdata->spinlock, flags); dev_dbg(drvdata->dev, "ETB disabled\n"); } @@ -488,7 +494,7 @@ static void etb_dump(struct etb_drvdata *drvdata) unsigned long flags; spin_lock_irqsave(&drvdata->spinlock, flags); - if (local_read(&drvdata->mode) == CS_MODE_SYSFS) { + if (drvdata->mode == CS_MODE_SYSFS) { etb_disable_hw(drvdata); etb_dump_hw(drvdata); etb_enable_hw(drvdata); From patchwork Thu Sep 20 19:17:59 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mathieu Poirier X-Patchwork-Id: 147144 Delivered-To: patch@linaro.org Received: by 2002:a2e:1648:0:0:0:0:0 with SMTP id 8-v6csp2376453ljw; Thu, 20 Sep 2018 12:19:02 -0700 (PDT) X-Google-Smtp-Source: ANB0VdZf9hSFo5s6GnP0EmFTCK1z61yS6qgO8Oyb9pgEqtACU4p/6+0yxdSyZzVQqZonKGAO8Vab X-Received: by 2002:a63:d34f:: with SMTP id u15-v6mr8701363pgi.325.1537471141966; Thu, 20 Sep 2018 12:19:01 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1537471141; cv=none; d=google.com; s=arc-20160816; b=X8AVPDq6fPp6/9Ngsyc5nb799sjCb9Rn8YtetPeG2xV+FKH5SgBGzSEHQmD2AqNAup 0aGElx5EnNgdkKfT/tAkvu7+cbpR2eCs5bMKh8Q1HD1sFcC1J/sPwY8OHWIFAtYBx0l8 1hu2kUI1ke3nG6AbwRUrossxwUdG6zHKJhkMgu+pysuo9a8e8Lf7XCUMClRO9s6kZts+ N3Z4Bk7EFAdF3G9S0qCrLra6q8V2Z2O7bfKXy59hzlj3+G61qQV91OzYB8BThSYnh7qM 9j9e2zhrdIntNklUIaCf9lMV+Bw2vSram+i9VNXafQZGQsF4ctB/MQPwJcueDQOaC4VO 1pZQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature; bh=NWG9grRsxUmH4u+WMkh8hg9iSj2KGxYmj7m4vuDxpFE=; b=z7lDMZAEBoyuWHZ7RlwIeVsn+0J4EYNoaMoaiXfNae6A740w/IpyFRPbTH5gzoG/Gl AAw+L9JGGNQ6es8R88k+m7MGG0Bo4T9p2e5yMSkm8SitIbMy95GRpiH862wGsC8opZRb Xk88YoI3axAFJPNwhPB1YJFlibmgHENXjceY1LHOocVw1hu72UFDEGtjISkPR0fjstw4 9ROMR5+hIsMRJZMr8ExRUUhhGjsFXSDpS9dMAwq3cYgUf2uJTJH7J5emFieZzblqJSpm 4xa2AB5YrLLYkI2LI2lSCWg0zEKxrPRrNPlTabf3kpawRL1sgiOYWS70/PZ59EjzP+uW Wc+w== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=cUFt+sLL; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id g2-v6si24706960plq.242.2018.09.20.12.19.01; Thu, 20 Sep 2018 12:19:01 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=cUFt+sLL; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2388952AbeIUBD6 (ORCPT + 32 others); Thu, 20 Sep 2018 21:03:58 -0400 Received: from mail-pf1-f196.google.com ([209.85.210.196]:47007 "EHLO mail-pf1-f196.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2388926AbeIUBD5 (ORCPT ); Thu, 20 Sep 2018 21:03:57 -0400 Received: by mail-pf1-f196.google.com with SMTP id u24-v6so4806723pfn.13 for ; Thu, 20 Sep 2018 12:18:58 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=NWG9grRsxUmH4u+WMkh8hg9iSj2KGxYmj7m4vuDxpFE=; b=cUFt+sLLeLDzFjkfrELI2DxG3Ni+wGyqlJLpVTmiATnZmw4QiDHm2G0MpObVzvHwiu /4i7LjIA/354MOEs/ss6xE5EcPYKnL/96RIb09lZgBi7vKBBBGa+HMZW77SAq5iqGBTF ccsg3JVcdxaVy9fPBwOHbzZpmJhcioB68EtPU= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=NWG9grRsxUmH4u+WMkh8hg9iSj2KGxYmj7m4vuDxpFE=; b=CBfw1jZKsJlK9oM48I8YlWbH7iJqO4LJEfEa1J4w3Qkh1ZxDgtEZ7dqdNDdY/HvMdx wBKZQoppwyOLXXu4JpzfBjN4SDHEaKCVTOFqIbAcDiu8TTOq1bHHxxlmTNXyWY9BapRN Q7wLGSU2PEvy2aepJf0stW0iqZt/c1vh31iTgSdzm89jHgm0h6pKHYTNylYuo8IJQ/jo PISANHuyxe4ewGne4c1ASAUJAWHzaTlwE8uD5oqvAIFOfUzgAKjQYZVcOHO6Vyqgqo9n HvEZdE8e02k4GBdZtPiog0WEHmUybuce54CWRj5NkE8j7xtGj3NgiXRyjs+MF+HpHhvK JDgQ== X-Gm-Message-State: APzg51Ac5ukum9ZQRkIa4EY1cJGvgZF19j7/eX7eeHNMy63J68mqEHVm ve42OYcq3sBuGnx+TNk1aBMHeSG7u2c= X-Received: by 2002:a62:9101:: with SMTP id l1-v6mr42647547pfe.226.1537471138461; Thu, 20 Sep 2018 12:18:58 -0700 (PDT) Received: from localhost.localdomain ([209.121.128.187]) by smtp.gmail.com with ESMTPSA id k13-v6sm4424443pgf.37.2018.09.20.12.18.56 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 20 Sep 2018 12:18:57 -0700 (PDT) From: Mathieu Poirier To: gregkh@linuxfoundation.org Cc: linux-kernel@vger.kernel.org Subject: [PATCH 24/44] coresight: etb10: Splitting function etb_enable() Date: Thu, 20 Sep 2018 13:17:59 -0600 Message-Id: <1537471099-19781-25-git-send-email-mathieu.poirier@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1537471099-19781-1-git-send-email-mathieu.poirier@linaro.org> References: <1537471099-19781-1-git-send-email-mathieu.poirier@linaro.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Up until now the relative simplicity of enabling the ETB made it possible to accommodate processing for both sysFS and perf methods. But work on claimtags and CPU-wide trace scenarios is adding some complexity, making the current code messy and hard to maintain. As such follow what has been done for ETF and ETR components and split function etb_enable() so that processing for both API can be done cleanly. Signed-off-by: Mathieu Poirier Reviewed-by: Suzuki K Poulose --- drivers/hwtracing/coresight/coresight-etb10.c | 73 +++++++++++++++++++-------- 1 file changed, 52 insertions(+), 21 deletions(-) -- 2.7.4 diff --git a/drivers/hwtracing/coresight/coresight-etb10.c b/drivers/hwtracing/coresight/coresight-etb10.c index 69287163ce4e..08fa660098f8 100644 --- a/drivers/hwtracing/coresight/coresight-etb10.c +++ b/drivers/hwtracing/coresight/coresight-etb10.c @@ -134,7 +134,7 @@ static void etb_enable_hw(struct etb_drvdata *drvdata) CS_LOCK(drvdata->base); } -static int etb_enable(struct coresight_device *csdev, u32 mode, void *data) +static int etb_enable_sysfs(struct coresight_device *csdev) { int ret = 0; unsigned long flags; @@ -142,48 +142,79 @@ static int etb_enable(struct coresight_device *csdev, u32 mode, void *data) spin_lock_irqsave(&drvdata->spinlock, flags); - /* - * When accessing from Perf, a HW buffer can be handled - * by a single trace entity. In sysFS mode many tracers - * can be logging to the same HW buffer. - */ + /* Don't messup with perf sessions. */ if (drvdata->mode == CS_MODE_PERF) { ret = -EBUSY; goto out; } - /* Don't let perf disturb sysFS sessions */ - if (drvdata->mode == CS_MODE_SYSFS && mode == CS_MODE_PERF) { - ret = -EBUSY; + /* Nothing to do, the tracer is already enabled. */ + if (drvdata->mode == CS_MODE_SYSFS) goto out; - } - /* Nothing to do, the tracer is already enabled. */ - if (drvdata->mode == CS_MODE_SYSFS && mode == CS_MODE_SYSFS) + drvdata->mode = CS_MODE_SYSFS; + etb_enable_hw(drvdata); + +out: + spin_unlock_irqrestore(&drvdata->spinlock, flags); + return ret; +} + +static int etb_enable_perf(struct coresight_device *csdev, void *data) +{ + int ret = 0; + unsigned long flags; + struct etb_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent); + + spin_lock_irqsave(&drvdata->spinlock, flags); + + /* No need to continue if the component is already in use. */ + if (drvdata->mode != CS_MODE_DISABLED) { + ret = -EBUSY; goto out; + } /* * We don't have an internal state to clean up if we fail to setup * the perf buffer. So we can perform the step before we turn the * ETB on and leave without cleaning up. */ - if (mode == CS_MODE_PERF) { - ret = etb_set_buffer(csdev, (struct perf_output_handle *)data); - if (ret) - goto out; - } + ret = etb_set_buffer(csdev, (struct perf_output_handle *)data); + if (ret) + goto out; - drvdata->mode = mode; + drvdata->mode = CS_MODE_PERF; etb_enable_hw(drvdata); out: spin_unlock_irqrestore(&drvdata->spinlock, flags); - - if (!ret) - dev_dbg(drvdata->dev, "ETB enabled\n"); return ret; } +static int etb_enable(struct coresight_device *csdev, u32 mode, void *data) +{ + int ret; + struct etb_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent); + + switch (mode) { + case CS_MODE_SYSFS: + ret = etb_enable_sysfs(csdev); + break; + case CS_MODE_PERF: + ret = etb_enable_perf(csdev, data); + break; + default: + ret = -EINVAL; + break; + } + + if (ret) + return ret; + + dev_dbg(drvdata->dev, "ETB enabled\n"); + return 0; +} + static void etb_disable_hw(struct etb_drvdata *drvdata) { u32 ffcr; From patchwork Thu Sep 20 19:18:00 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mathieu Poirier X-Patchwork-Id: 147145 Delivered-To: patch@linaro.org Received: by 2002:a2e:1648:0:0:0:0:0 with SMTP id 8-v6csp2376496ljw; Thu, 20 Sep 2018 12:19:03 -0700 (PDT) X-Google-Smtp-Source: ANB0VdY9AnyV7ld/oLfxSfGnZut9TQ9jDrnJagL16ahyLP7xgzihFRVgPx5DZ814aXSNhhhWXk7F X-Received: by 2002:a62:4494:: with SMTP id m20-v6mr43106991pfi.205.1537471143706; Thu, 20 Sep 2018 12:19:03 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1537471143; cv=none; d=google.com; s=arc-20160816; b=DeFT57o0mzMVQULS1cJvedGiBu11bfdTpohXbo82SX5dJRW6W1TIgpKIX0bis7pdQz M1NnmHooJt4KBo1+zZY/6Ps/svXmnuEzlxII4WrypnR5nzl1ywaHXhLWTWNVXP+FwEi3 eQBwFqWhGho/lzG/v77azdgbsGdvsYK5P9/M5vkAZkcgrq9oG+8pVV/WksHbZAs+5RvM XWhQxb0cX434mmtCL1gg3eg244N26npU1UwER6IswaT5kQaPLPtg6Hwvxp0eKA4zQOMX I34rjrMk9jgXQGja7nHM2G/HMGQkBevKCj8vJYsDN1+6azyKe6L7ytm6GMiAQmgd00sD vwIw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature; bh=1Yn6k8iXxmXjg2p667vERDiX53KSRwgK7zCH4SYjx4c=; b=OeoSTVzhJv4AvQElgWdk86/fM++7KioZGWoPwAzvPPFvryWlyLxhT3PdKOex/n01yW +hRvvh7RGTofgW6svaUl9nXTo/MW+cvxLjgzXzDUYC9ZWwdogUBSo8vQJzD1wxFsKQYb 0mmZs9raHIDXdk0uKXxNY9pZIen6yMZ3Iw09wHOshbZqGj1h6s7ksTxn0TDvTZWeCM34 zQ6UK2ykY6qN/83WZpCH5JPdCHANxUdVjdtRrN9RygRa4VgftXTiaLOfNfQRNeY+vnlF iYFDOjTAsJNiWZzu9SSCuXV+YbDSqwYLLDgrc9nVxcSk5aLX2TmpanX2t7/u/WjxYvf9 WPVw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=ZIBq0hO3; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id d65-v6si24640691pgc.524.2018.09.20.12.19.03; Thu, 20 Sep 2018 12:19:03 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=ZIBq0hO3; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2388964AbeIUBD7 (ORCPT + 32 others); Thu, 20 Sep 2018 21:03:59 -0400 Received: from mail-pf1-f193.google.com ([209.85.210.193]:35642 "EHLO mail-pf1-f193.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2388926AbeIUBD7 (ORCPT ); Thu, 20 Sep 2018 21:03:59 -0400 Received: by mail-pf1-f193.google.com with SMTP id p12-v6so4828867pfh.2 for ; Thu, 20 Sep 2018 12:19:00 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=1Yn6k8iXxmXjg2p667vERDiX53KSRwgK7zCH4SYjx4c=; b=ZIBq0hO3k6jJ9iQxF/V/q132iDTpYOB7S85BlqYaN1fKVd3tGJVlgG8opi3g4V0HWs UkMk2bxHU20TN5JRpnfK0MKi1CN8kv87fqciquRcDXLErSfmYLaoo95O1QXk/5/Otcnt dNa26dR9Stm9XblK1KX0CLwdsbtryvrB7BRBU= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=1Yn6k8iXxmXjg2p667vERDiX53KSRwgK7zCH4SYjx4c=; b=qDNruTo8oBXGi5SeCz/xqq3PQzGzjzvEGTAXFju8suKML4ZaU52Lv3MdNJCHSiActd q505SmxR9q3KMxwoCDHdQ8CORY845Yk/BLo+jATSSxvUJg+nuD0XMbVlxvgbbEUOjggB EPD3+lnIryQ+0nF+s8zlUCdOOhQ7CMufNRAoT77uAXs2dZf/HxrIHftUfJilQA9o5vYC nDpNF14naaPy2DJfdpqdDrpxOh0MWNe7PWubAdMEVevVIln3Y2NJkng4+puPrbRh2/G2 hV/Xopv500eWTYICbNKAzFvgfIsGn+XQVDcHRu31HaLsiSZFMV4sgyS2ijPO/DlJQ1Lt 7Axg== X-Gm-Message-State: APzg51CW7QWUuMJrl5lZcOCl8yod5Wa/DvDZkjwnKO6iCJX4HDL5+fhG 5Ihi3MoiW6HlFOT/zHATGAX31g== X-Received: by 2002:a63:3741:: with SMTP id g1-v6mr6568297pgn.59.1537471140124; Thu, 20 Sep 2018 12:19:00 -0700 (PDT) Received: from localhost.localdomain ([209.121.128.187]) by smtp.gmail.com with ESMTPSA id k13-v6sm4424443pgf.37.2018.09.20.12.18.58 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 20 Sep 2018 12:18:58 -0700 (PDT) From: Mathieu Poirier To: gregkh@linuxfoundation.org Cc: linux-kernel@vger.kernel.org Subject: [PATCH 25/44] coresight: etm4x: Configure EL2 exception level when kernel is running in HYP Date: Thu, 20 Sep 2018 13:18:00 -0600 Message-Id: <1537471099-19781-26-git-send-email-mathieu.poirier@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1537471099-19781-1-git-send-email-mathieu.poirier@linaro.org> References: <1537471099-19781-1-git-send-email-mathieu.poirier@linaro.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Tomasz Nowicki For non-VHE systems host kernel runs at EL1 and jumps to EL2 whenever hypervisor code should be executed. In this case ETM4x driver must restrict configuration to EL1 when it setups kernel tracing. However, there is no separate hypervisor privilege level when VHE is enabled, the host kernel runs at EL2. This patch fixes configuration of TRCACATRn register for VHE systems so that ETM_EXLEVEL_NS_HYP bit is used instead of ETM_EXLEVEL_NS_OS to on/off kernel tracing. At the same time, it moves common code to new helper. Signed-off-by: Tomasz Nowicki Signed-off-by: Mathieu Poirier --- drivers/hwtracing/coresight/coresight-etm4x.c | 40 +++++++++++++-------------- 1 file changed, 20 insertions(+), 20 deletions(-) -- 2.7.4 diff --git a/drivers/hwtracing/coresight/coresight-etm4x.c b/drivers/hwtracing/coresight/coresight-etm4x.c index c1dcc7c289a5..b7379e9cfb30 100644 --- a/drivers/hwtracing/coresight/coresight-etm4x.c +++ b/drivers/hwtracing/coresight/coresight-etm4x.c @@ -28,6 +28,7 @@ #include #include #include +#include #include "coresight-etm4x.h" #include "coresight-etm-perf.h" @@ -605,7 +606,7 @@ static void etm4_set_default_config(struct etmv4_config *config) config->vinst_ctrl |= BIT(0); } -static u64 etm4_get_access_type(struct etmv4_config *config) +static u64 etm4_get_ns_access_type(struct etmv4_config *config) { u64 access_type = 0; @@ -616,17 +617,26 @@ static u64 etm4_get_access_type(struct etmv4_config *config) * Bit[13] Exception level 1 - OS * Bit[14] Exception level 2 - Hypervisor * Bit[15] Never implemented - * - * Always stay away from hypervisor mode. */ - access_type = ETM_EXLEVEL_NS_HYP; - - if (config->mode & ETM_MODE_EXCL_KERN) - access_type |= ETM_EXLEVEL_NS_OS; + if (!is_kernel_in_hyp_mode()) { + /* Stay away from hypervisor mode for non-VHE */ + access_type = ETM_EXLEVEL_NS_HYP; + if (config->mode & ETM_MODE_EXCL_KERN) + access_type |= ETM_EXLEVEL_NS_OS; + } else if (config->mode & ETM_MODE_EXCL_KERN) { + access_type = ETM_EXLEVEL_NS_HYP; + } if (config->mode & ETM_MODE_EXCL_USER) access_type |= ETM_EXLEVEL_NS_APP; + return access_type; +} + +static u64 etm4_get_access_type(struct etmv4_config *config) +{ + u64 access_type = etm4_get_ns_access_type(config); + /* * EXLEVEL_S, bits[11:8], don't trace anything happening * in secure state. @@ -880,20 +890,10 @@ void etm4_config_trace_mode(struct etmv4_config *config) addr_acc = config->addr_acc[ETM_DEFAULT_ADDR_COMP]; /* clear default config */ - addr_acc &= ~(ETM_EXLEVEL_NS_APP | ETM_EXLEVEL_NS_OS); + addr_acc &= ~(ETM_EXLEVEL_NS_APP | ETM_EXLEVEL_NS_OS | + ETM_EXLEVEL_NS_HYP); - /* - * EXLEVEL_NS, bits[15:12] - * The Exception levels are: - * Bit[12] Exception level 0 - Application - * Bit[13] Exception level 1 - OS - * Bit[14] Exception level 2 - Hypervisor - * Bit[15] Never implemented - */ - if (mode & ETM_MODE_EXCL_KERN) - addr_acc |= ETM_EXLEVEL_NS_OS; - else - addr_acc |= ETM_EXLEVEL_NS_APP; + addr_acc |= etm4_get_ns_access_type(config); config->addr_acc[ETM_DEFAULT_ADDR_COMP] = addr_acc; config->addr_acc[ETM_DEFAULT_ADDR_COMP + 1] = addr_acc; From patchwork Thu Sep 20 19:18:01 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mathieu Poirier X-Patchwork-Id: 147146 Delivered-To: patch@linaro.org Received: by 2002:a2e:1648:0:0:0:0:0 with SMTP id 8-v6csp2376524ljw; Thu, 20 Sep 2018 12:19:04 -0700 (PDT) X-Google-Smtp-Source: ANB0VdYfERIX1qtRVCgZY/dlZb0C1zVglBpXERZSYs4+/muHD9m6+d3+mMOr/XVYU/gCUYHScZpB X-Received: by 2002:a63:f002:: with SMTP id k2-v6mr37853616pgh.8.1537471144778; Thu, 20 Sep 2018 12:19:04 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1537471144; cv=none; d=google.com; s=arc-20160816; b=rDRb+sb5c/VC1XGMnGaSigp/pZuv0+eux1dFv55aYiZwYrXhwVkheHQP19+8SkdRLc ADtUlI+qqTs0gL5g7nVzD6J5zl8zOJfepq21rsHfUPMBvtO0ApOPfo/t3/gPHAZ3AhgA +TnEfC1QFNMfbLivy42XvLN0pndIr/+sQjnXHq5BOx6mUBXufzUstjir6vQ9MAC5KAml Jgxzh27swMJ8tcSHAadyx1QyBfEVUa3l+hGAQmgYjwrtpfPHUFPU0Fr+EqloCzKQyHHk 5UrRfaMI21nHP04yhYeRNOCVACr3dXHAzu37tbrxFS+Soz3lw4ISVyroyfxr7qNQozlh Nkyg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature; bh=vUlaXOV4lrMht0i3G1NCeaTNFl9Rgz+PCtRI8r+MSMM=; b=CXs8YTKwhUuJF1bIjlg/PNIBRR3aCUkV4iAkFe/0alDt3lKvIdEJx8YmNcO1kft2SH 7LNHVbU3iboxShDjp7UigC7BuaKMZ9RfT7TxXgBQ6/pvLuBESzg8GeCo49hV80rbsjRC JedNT48B6prMizrG06/fWxOjcWNGJRE5enxJlgQhwqHEqduRMLBa3iGp9jc6w3RZu/kx WgbICX+tuZMOfzvsirwWSDCJzuM9ql32pKre3QIS206ozv+F952DgMVPxmtXk7Cehm3O okmRbOlNhc7ZLtPZggRaIcGRmrAqX5n4wH5RtQU9e6mccB0bGwkcu7UmRDeN4FqBjVCU BjXw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="JpZ/3Ow6"; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id b2-v6si24596827pgk.491.2018.09.20.12.19.04; Thu, 20 Sep 2018 12:19:04 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="JpZ/3Ow6"; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2388978AbeIUBEB (ORCPT + 32 others); Thu, 20 Sep 2018 21:04:01 -0400 Received: from mail-pl1-f195.google.com ([209.85.214.195]:36720 "EHLO mail-pl1-f195.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2388926AbeIUBEA (ORCPT ); Thu, 20 Sep 2018 21:04:00 -0400 Received: by mail-pl1-f195.google.com with SMTP id p5-v6so4798604plk.3 for ; Thu, 20 Sep 2018 12:19:01 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=vUlaXOV4lrMht0i3G1NCeaTNFl9Rgz+PCtRI8r+MSMM=; b=JpZ/3Ow6nsnaluMufdjD2+VP+5pZGOPE4exkPo9ksN6zmGX5TerxyNTomm2ReFWAI7 ytIZBKwIDLnwUf9mJ0oB01E+ceM+uqFJuDpgD0LbWDS4s5ydxJNDHKdfZIO35GiDqsfE EXhvZDdiuvW1KqVWbMODEVCgjVYa4+uSfwEns= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=vUlaXOV4lrMht0i3G1NCeaTNFl9Rgz+PCtRI8r+MSMM=; b=NTGizcLfbF55f4NHSofNEq3dfrUt6nIXZ/K0374ISEbY+6SlcHaD4RtHKXtEWh5QRY CgZInjwVbYdX8xN/1N6kgw/XLp1xl5pIcpBvhwPOkCWMwSPXTIFjGklpzq5JypOfjNry QIHq8WXZDtkiBEuyXwSfNStcdFPBznmI06GP1bfzDd6POgbuyQGQyg8Uj9WM3it8H2Xd ktgeG5AMuNu06oKepFl1R47jvQrpVbxktK9qJI/VAaLk39kzHv3q8X5Wxb7ROTF2Ucii iBDXFA0G4X2iaOVMfBOB3G4gHUpLzK8Od+WijDjKhPpt5f+DMRrlBcqf3wMVZFiyhLIZ p4wg== X-Gm-Message-State: APzg51DMqEKpzy0tfS1aCoFOfNCv14jiUVFWAy/eWyfyC8thbnangZEk ybgdoYQ6pgSscATrZxITxZ3cbQ== X-Received: by 2002:a17:902:758b:: with SMTP id j11-v6mr40823254pll.29.1537471141573; Thu, 20 Sep 2018 12:19:01 -0700 (PDT) Received: from localhost.localdomain ([209.121.128.187]) by smtp.gmail.com with ESMTPSA id k13-v6sm4424443pgf.37.2018.09.20.12.19.00 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 20 Sep 2018 12:19:00 -0700 (PDT) From: Mathieu Poirier To: gregkh@linuxfoundation.org Cc: linux-kernel@vger.kernel.org Subject: [PATCH 26/44] coresight: tmc: Refactor loops in etb dump Date: Thu, 20 Sep 2018 13:18:01 -0600 Message-Id: <1537471099-19781-27-git-send-email-mathieu.poirier@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1537471099-19781-1-git-send-email-mathieu.poirier@linaro.org> References: <1537471099-19781-1-git-send-email-mathieu.poirier@linaro.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Leo Yan In ETB dump function tmc_etb_dump_hw() it has nested loops. The second level loop is to iterate index in the range [0 .. drvdata->memwidth); but the index isn't really used in the code, thus the second level loop is useless. This patch is to remove the second level loop; the refactor also reduces indentation and we can use 'break' to replace 'goto' tag. Cc: Mathieu Poirier Signed-off-by: Leo Yan Signed-off-by: Mathieu Poirier --- drivers/hwtracing/coresight/coresight-tmc-etf.c | 17 +++++++---------- 1 file changed, 7 insertions(+), 10 deletions(-) -- 2.7.4 diff --git a/drivers/hwtracing/coresight/coresight-tmc-etf.c b/drivers/hwtracing/coresight/coresight-tmc-etf.c index 4156c95ce1bb..4bf3bfd7c078 100644 --- a/drivers/hwtracing/coresight/coresight-tmc-etf.c +++ b/drivers/hwtracing/coresight/coresight-tmc-etf.c @@ -38,23 +38,20 @@ static void tmc_etb_dump_hw(struct tmc_drvdata *drvdata) { char *bufp; u32 read_data, lost; - int i; /* Check if the buffer wrapped around. */ lost = readl_relaxed(drvdata->base + TMC_STS) & TMC_STS_FULL; bufp = drvdata->buf; drvdata->len = 0; while (1) { - for (i = 0; i < drvdata->memwidth; i++) { - read_data = readl_relaxed(drvdata->base + TMC_RRD); - if (read_data == 0xFFFFFFFF) - goto done; - memcpy(bufp, &read_data, 4); - bufp += 4; - drvdata->len += 4; - } + read_data = readl_relaxed(drvdata->base + TMC_RRD); + if (read_data == 0xFFFFFFFF) + break; + memcpy(bufp, &read_data, 4); + bufp += 4; + drvdata->len += 4; } -done: + if (lost) coresight_insert_barrier_packet(drvdata->buf); return; From patchwork Thu Sep 20 19:18:02 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mathieu Poirier X-Patchwork-Id: 147147 Delivered-To: patch@linaro.org Received: by 2002:a2e:1648:0:0:0:0:0 with SMTP id 8-v6csp2376561ljw; Thu, 20 Sep 2018 12:19:07 -0700 (PDT) X-Google-Smtp-Source: ANB0VdaBCbjfptUvaFmTkhE+3fIllGR45YP6XQdKYo0YBU4k6Jl27LUnoFq4CcB1vposkPj1thzE X-Received: by 2002:a17:902:a715:: with SMTP id w21-v6mr40817028plq.61.1537471146980; Thu, 20 Sep 2018 12:19:06 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1537471146; cv=none; d=google.com; s=arc-20160816; b=blS1gVB5I6/Vn/DOKih6SGJmzhv2s9Jtx3TXbrXIbwRAu0n3AfkHDD5yY81UK3nDby Zd9e3fGrDcWjWOFKcNqADORhM33hm3KDcpl4ioTyaVVqKEkSBjMLQ4QUTFTEZY7J+mRj ReAxl9Vkyd0JcQ9JB56vlA8tz2GE+CEyS2uHb74j7yM2n5R/Lp5oKHyWlO6Z9RSJ06Pq e0MVpGiwEGJFADXlglnmJdRvVM4Hi8HBmdhoH3xfGs/JXFj/sH0CYL785pWfkVmk07Dr EQEbP2XY2RKHJUYNC8bEFINRc/6b1KaoStVbPk9a+0lW/ubod6jV83i/9KQGLu4l5Mk+ kV2w== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature; bh=ZmIfhLlS7No2zlitXufekMnQETwoKFvLJIWVS3LdmXc=; b=qyT8e849kco3Mvb70Amr2Bohw45BTSFidmZ0ScqK1vp7GQI9iBT8rqmag1CXUnLNB1 o1WGiOnzbX0XFkkOAVuA30LnMUB+HupBr3rMokDLxI5ZU3axEs0yD7qEk4p/f2YoIm+l Qrujh17Po9nZ0UWVp6t3D6AXo8Xp7+3//uCr4FbMcunUQQWIlxFOl4wc+hJWezFXZXZo nVCHjLGiavRwtx/qJqmV7n4ygAkloHXPdxi87foHhkvmXP2gYy1lszKBiYoOK21PTq/T 5GxOPXijhn6Gc+jtHNWcVj0AGndxpy/lh/1I/cYeDWX/HEsWqLLZnB6uSqpgKAloQbmO LgMg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=bz+W0Kbr; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id n34-v6si2369530pld.311.2018.09.20.12.19.06; Thu, 20 Sep 2018 12:19:06 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=bz+W0Kbr; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2388990AbeIUBED (ORCPT + 32 others); Thu, 20 Sep 2018 21:04:03 -0400 Received: from mail-pl1-f193.google.com ([209.85.214.193]:45868 "EHLO mail-pl1-f193.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2388559AbeIUBEC (ORCPT ); Thu, 20 Sep 2018 21:04:02 -0400 Received: by mail-pl1-f193.google.com with SMTP id j8-v6so4778260pll.12 for ; Thu, 20 Sep 2018 12:19:03 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=ZmIfhLlS7No2zlitXufekMnQETwoKFvLJIWVS3LdmXc=; b=bz+W0KbrReWypHhIqQ3ztUzSPz/Uo+ksBhPwRSyA3LU8ELb0UeBjTMIIYCERFWgp4d WdWjfRTwe+RKB32HQ2nppIFK69vmgEDndKq9ozst/cj3pNWtn8xq57/49xeqNnsonLPh PxtUgWHBFqqXIXGjWo0RsuNMzRNfAsof3AR58= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=ZmIfhLlS7No2zlitXufekMnQETwoKFvLJIWVS3LdmXc=; b=EP6H40kSAwcWipikGdKcywjNgA2zprJAT68GcOANN8/o8pvJkWuPbe0Kee1mF/lo/6 GVDeFydwVJc6vRjzBYQxPDiVXQjHdXhZSiG7i1KsY2RSo73MOYtOOg/YRbbkWPnGlwu8 wjKh17iYbOB7nu3Mavol+Aqklry949o2v0vOb3FvYiDcgHa+va3YkkIeOAXP7V5Aq8/i JU+lyogLidJRTgHqvGA5ShGMwkNg1I6I349+fG4lk6J09+UsoBWYBkTaqogU+k0APmzX K+WTh/zkea0SKfuCJ5kHHTfIMPD8+R7gAtzQTFKsRY+Z0i4PAiFAurTf+WuQ8TYmug/v Ax6A== X-Gm-Message-State: APzg51CQQV4Ywwepb4l7zh4kt/gkeizyt9MiUB9fZl90e6rUe7KAC2Jp GBFAai//SS4chWekttjLHuGCTA== X-Received: by 2002:a17:902:7291:: with SMTP id d17-v6mr5753867pll.260.1537471143540; Thu, 20 Sep 2018 12:19:03 -0700 (PDT) Received: from localhost.localdomain ([209.121.128.187]) by smtp.gmail.com with ESMTPSA id k13-v6sm4424443pgf.37.2018.09.20.12.19.01 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 20 Sep 2018 12:19:01 -0700 (PDT) From: Mathieu Poirier To: gregkh@linuxfoundation.org Cc: linux-kernel@vger.kernel.org Subject: [PATCH 27/44] coresight: tmc: Fix byte-address alignment for RRP Date: Thu, 20 Sep 2018 13:18:02 -0600 Message-Id: <1537471099-19781-28-git-send-email-mathieu.poirier@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1537471099-19781-1-git-send-email-mathieu.poirier@linaro.org> References: <1537471099-19781-1-git-send-email-mathieu.poirier@linaro.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Leo Yan >From the comment in the code, it claims the requirement for byte-address alignment for RRP register: 'for 32-bit, 64-bit and 128-bit wide trace memory, the four LSBs must be 0s. For 256-bit wide trace memory, the five LSBs must be 0s'. This isn't consistent with the program, the program sets five LSBs as zeros for 32/64/128-bit wide trace memory and set six LSBs zeros for 256-bit wide trace memory. After checking with the CoreSight Trace Memory Controller technical reference manual (ARM DDI 0461B, section 3.3.4 RAM Read Pointer Register), it proves the comment is right and the program does wrong setting. This patch fixes byte-address alignment for RRP by following correct definition in the technical reference manual. Cc: Mathieu Poirier Cc: Mike Leach Signed-off-by: Leo Yan Signed-off-by: Mathieu Poirier --- drivers/hwtracing/coresight/coresight-tmc-etf.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) -- 2.7.4 diff --git a/drivers/hwtracing/coresight/coresight-tmc-etf.c b/drivers/hwtracing/coresight/coresight-tmc-etf.c index 4bf3bfd7c078..b54a3db13fee 100644 --- a/drivers/hwtracing/coresight/coresight-tmc-etf.c +++ b/drivers/hwtracing/coresight/coresight-tmc-etf.c @@ -417,10 +417,10 @@ static unsigned long tmc_update_etf_buffer(struct coresight_device *csdev, case TMC_MEM_INTF_WIDTH_32BITS: case TMC_MEM_INTF_WIDTH_64BITS: case TMC_MEM_INTF_WIDTH_128BITS: - mask = GENMASK(31, 5); + mask = GENMASK(31, 4); break; case TMC_MEM_INTF_WIDTH_256BITS: - mask = GENMASK(31, 6); + mask = GENMASK(31, 5); break; } From patchwork Thu Sep 20 19:18:03 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mathieu Poirier X-Patchwork-Id: 147148 Delivered-To: patch@linaro.org Received: by 2002:a2e:1648:0:0:0:0:0 with SMTP id 8-v6csp2376604ljw; Thu, 20 Sep 2018 12:19:09 -0700 (PDT) X-Google-Smtp-Source: ANB0VdbZ9NRTgR23pwimN4ToTkWfJmhdAGbElmK4C3wcH73tp14k7UoxyQmMkuMcPmcTtL5/3HHM X-Received: by 2002:a63:a012:: with SMTP id r18-v6mr32848645pge.166.1537471148882; Thu, 20 Sep 2018 12:19:08 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1537471148; cv=none; d=google.com; s=arc-20160816; b=giTKtlgr4qxqOZiAb+NkqKJMohfaffxyiikisIzkg7wYCDO1ZZNw26V1RoZVZ5JARq RzzQm297QTF1h73uGF/yw8+M/ACsdudprYnVLtcI3vJ9DyBGRtlxAIJAfdQB7oy8g8XE dxZwfnybXfYcDJzy3OtLQgSSQIZxMltpT/e2Z778mm2UnxQLmKsMcdvyyLAMwckmdHGt njfIv+bVg4AMxg/vPsfG0853TfbE5V79AItpTWVlDGvkhgmImVAIH7+qz/zlcPhelSEt cKTMama13D4r9MkPlncqBKXjcVbT9o/l5Vk4lUIL0/gqN+MY1v9Al8VH1mIvcHNtnfsY sNWA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature; bh=Q9mLJUvfHW+9PF2qxnbjTL+mt+UjMYG0sP1kUgTlkaI=; b=0A6T5NU0r/RX1Fu5H4r9PF7oY7jJg2klFVpJI54OTiK6Y/ghgzW5m6OXkgUVTd/V0b e8Wy9kWJzFITfN0VUBcuBHOqMBnhmHsViVkrPEEUKhDLAtHdz6csBP0B+faJwmZRoXsO pxeH6W5LQczycH5zxNZ47D862y1kkC6FcGqFVsDWoe+KnqLIkb/r4xnXFRjMOdJ00JMk 2uKcbx27Q6U6dnP1e6mcA+NubVGXMztDz91F0++L1J8ZzZDj5vjurya7GAtaM+rQLkS9 l4B/mvM2zdxHWevE+9jo0IFSCg1ibG87lX/ssWMMPcRWixFpbQrkGwkrf8HUz4NIyZfc oPsw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=TfW41lWX; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id g70-v6si27482159pfe.4.2018.09.20.12.19.08; Thu, 20 Sep 2018 12:19:08 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=TfW41lWX; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2389003AbeIUBEE (ORCPT + 32 others); Thu, 20 Sep 2018 21:04:04 -0400 Received: from mail-pl1-f195.google.com ([209.85.214.195]:40205 "EHLO mail-pl1-f195.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2388559AbeIUBED (ORCPT ); Thu, 20 Sep 2018 21:04:03 -0400 Received: by mail-pl1-f195.google.com with SMTP id s17-v6so4791470plp.7 for ; Thu, 20 Sep 2018 12:19:05 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=Q9mLJUvfHW+9PF2qxnbjTL+mt+UjMYG0sP1kUgTlkaI=; b=TfW41lWXkzMpJ0PmNgow0xQEYq8zI9c0HM/9UKI6yuBZc2HJpWvauqB21tF6R8Befe hNAoVUre1AYuNE6C04mPAD0B+v07j+CvCnwvdKpw1vC9bs7SIO67/Lr3qaWpEAjb1mf4 ps1Zq0jSJ3g/XFesSpbmzAB/gpI4r4/38m6F0= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=Q9mLJUvfHW+9PF2qxnbjTL+mt+UjMYG0sP1kUgTlkaI=; b=o48zUlcrWWgy1nEWHjiaBI/pFms17ejUYBof+YhD8c1ZoJQHI8uMkrEU/MlX51XFG6 RltteUWbqPqvmiyVvXhpa1y93WW5jAsjaCJgJzgGH84Q25R+8Qu09anubV6+kyVhv9yC 74ESHC9YFcyK/gtumK6/kV57kEgZsFKve818hpziuI142N/9exET4xn6MMuigJyTL6Em psIZA5iQuMBpeOBycl+1QF9Fs7XQ+m99ZWLtWt0W+WuMPloZcQw8Kp5Q6TdruIHASFbR SOOyuxoawXeCt8v8/yU4EmWdOiVhVZx8l8E4eSwmIauN3C7Q8dMcwMGTMMgfa/AGzyVV oghA== X-Gm-Message-State: APzg51CKyA6S5wBtydvn32wag5KHr7BboOP4jBvdyL1eXq0kFVo5E264 l7U2ofLbfr/PSY7uJl+bOeDwjg== X-Received: by 2002:a17:902:163:: with SMTP id 90-v6mr40541725plb.322.1537471144953; Thu, 20 Sep 2018 12:19:04 -0700 (PDT) Received: from localhost.localdomain ([209.121.128.187]) by smtp.gmail.com with ESMTPSA id k13-v6sm4424443pgf.37.2018.09.20.12.19.03 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 20 Sep 2018 12:19:03 -0700 (PDT) From: Mathieu Poirier To: gregkh@linuxfoundation.org Cc: linux-kernel@vger.kernel.org Subject: [PATCH 28/44] coresight: Handle failures in enabling a trace path Date: Thu, 20 Sep 2018 13:18:03 -0600 Message-Id: <1537471099-19781-29-git-send-email-mathieu.poirier@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1537471099-19781-1-git-send-email-mathieu.poirier@linaro.org> References: <1537471099-19781-1-git-send-email-mathieu.poirier@linaro.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Suzuki K Poulose coresight_enable_path() enables the components in a trace path from a given source to a sink, excluding the source. The operation is performed in the reverse order; the sink first and then backwards in the list. However, if we encounter an error in enabling any of the component, we simply disable all the components in the given path irrespective of whether we enabled some of the components in the enable iteration. This could interfere with another trace session if one of the link devices is turned off (e.g, TMC-ETF). So, we need to make sure that we only disable those components which were actually enabled from the iteration. This patch achieves the same by refactoring the coresight_disable_path to accept a "node" to start from in the forward order, which can then be used from the error path of coresight_enable_path(). With this change, we don't issue a disable call back for a component which didn't get enabled. This change of behavior triggers a bug in coresight_enable_link(), where we leave the refcount on the device and will prevent the device from being enabled forever. So, we also drop the refcount in the coresight_enable_link() if the operation failed. Also, with the refactoring, we always start after the first node (which is the "SOURCE" device) for disabling the entire path. This implies, we must not find a "SOURCE" in the middle of the path. Hence, added a WARN_ON() to make sure the paths we get are sane, rather than simply ignoring them. Cc: Mathieu Poirier Signed-off-by: Suzuki K Poulose Signed-off-by: Mathieu Poirier --- drivers/hwtracing/coresight/coresight.c | 32 ++++++++++++++++++++++++++------ 1 file changed, 26 insertions(+), 6 deletions(-) -- 2.7.4 diff --git a/drivers/hwtracing/coresight/coresight.c b/drivers/hwtracing/coresight/coresight.c index e73ca6af4765..f4f50753cf75 100644 --- a/drivers/hwtracing/coresight/coresight.c +++ b/drivers/hwtracing/coresight/coresight.c @@ -187,8 +187,10 @@ static int coresight_enable_link(struct coresight_device *csdev, if (atomic_inc_return(&csdev->refcnt[refport]) == 1) { if (link_ops(csdev)->enable) { ret = link_ops(csdev)->enable(csdev, inport, outport); - if (ret) + if (ret) { + atomic_dec(&csdev->refcnt[refport]); return ret; + } } } @@ -277,13 +279,21 @@ static bool coresight_disable_source(struct coresight_device *csdev) return !csdev->enable; } -void coresight_disable_path(struct list_head *path) +/* + * coresight_disable_path_from : Disable components in the given path beyond + * @nd in the list. If @nd is NULL, all the components, except the SOURCE are + * disabled. + */ +static void coresight_disable_path_from(struct list_head *path, + struct coresight_node *nd) { u32 type; - struct coresight_node *nd; struct coresight_device *csdev, *parent, *child; - list_for_each_entry(nd, path, link) { + if (!nd) + nd = list_first_entry(path, struct coresight_node, link); + + list_for_each_entry_continue(nd, path, link) { csdev = nd->csdev; type = csdev->type; @@ -303,7 +313,12 @@ void coresight_disable_path(struct list_head *path) coresight_disable_sink(csdev); break; case CORESIGHT_DEV_TYPE_SOURCE: - /* sources are disabled from either sysFS or Perf */ + /* + * We skip the first node in the path assuming that it + * is the source. So we don't expect a source device in + * the middle of a path. + */ + WARN_ON(1); break; case CORESIGHT_DEV_TYPE_LINK: parent = list_prev_entry(nd, link)->csdev; @@ -316,6 +331,11 @@ void coresight_disable_path(struct list_head *path) } } +void coresight_disable_path(struct list_head *path) +{ + coresight_disable_path_from(path, NULL); +} + int coresight_enable_path(struct list_head *path, u32 mode, void *sink_data) { @@ -369,7 +389,7 @@ int coresight_enable_path(struct list_head *path, u32 mode, void *sink_data) out: return ret; err: - coresight_disable_path(path); + coresight_disable_path_from(path, nd); goto out; } From patchwork Thu Sep 20 19:18:04 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mathieu Poirier X-Patchwork-Id: 147149 Delivered-To: patch@linaro.org Received: by 2002:a2e:1648:0:0:0:0:0 with SMTP id 8-v6csp2376627ljw; Thu, 20 Sep 2018 12:19:10 -0700 (PDT) X-Google-Smtp-Source: ANB0VdZ3p1kXj5nXo39hUvFVLCXFbC5g88NKtGrZvaYTq0oDgpIyBj05s3muY+ettGeL00fRId03 X-Received: by 2002:a17:902:ba95:: with SMTP id k21-v6mr669008pls.38.1537471150703; Thu, 20 Sep 2018 12:19:10 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1537471150; cv=none; d=google.com; s=arc-20160816; b=j4fnu70mmOHOo0YZ0CCup25kNECgghQaKOtjL3KGueFwYvtzm7uxZHLw9hLOmfkBfD JoWVQoxSTv9CVX/bfsHYhLLiUoDktBf3rfP1ha/KNb6n5gu32zQZWJguXgUz8nep33cq rk8m/wT/xVQN5M3QndR8fAw0sJCR9WRs7DHr3WiNXWLOU6t4EInF+aVMfznCjlzBsEFe DV2KsLHe7GBX50mAIpw6nklXdOoYl3K6ClXqigrtNiKoNF9V4DHr0xn78I3Xb0OGjT2T KzsiFAG//Zn7WvkKOY1o6cYD0E1HuX7mFUznK8iPW4waWI9LfxLzQUZ1slpVg+QP3uO6 UPVg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature; bh=Pk5MkE6PXktMeFUSi0eF98V5qiRjEJiXczfdfCTR7uw=; b=dXi1DqemUrHowbsxVJzZ9fNfl0r47f19PwPfK/WuesvUksD6ZOLKzomTmMFUNbClch G9d8fW6UKeTSOKJQ6Nnq8Sx+lJKNsuA8fCozAbpGWzc1+8jvzXnyBVlrOBNus9sdZA2f KaZd/d27V0NJ9v1MCjq/bPx4l1hYRZHZ6rqxYHRF2sKzpYB09ZLRYk2oUbiywyWLyEJT kGi7l4AS3o6OYhAKAX9/ozZQ2Sc4Sm8DUGDBCtRy6mj6glgsK/fqc7+lzUIk0xRBxGuN vi+cUIrrBvpOoLF/QjPN5F8e3hkhl0pTtJh27WNl+hufqEB2W3RNHE/aBOG+/39hnh+H wpMg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=Uw+QkZmh; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id m6-v6si2088211pgg.265.2018.09.20.12.19.10; Thu, 20 Sep 2018 12:19:10 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=Uw+QkZmh; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2389016AbeIUBEH (ORCPT + 32 others); Thu, 20 Sep 2018 21:04:07 -0400 Received: from mail-pl1-f194.google.com ([209.85.214.194]:45873 "EHLO mail-pl1-f194.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2388559AbeIUBEF (ORCPT ); Thu, 20 Sep 2018 21:04:05 -0400 Received: by mail-pl1-f194.google.com with SMTP id j8-v6so4778313pll.12 for ; Thu, 20 Sep 2018 12:19:06 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=Pk5MkE6PXktMeFUSi0eF98V5qiRjEJiXczfdfCTR7uw=; b=Uw+QkZmhSsWPmEUrlhYaDqvbj4V5m5NeQchOEHvUqsZ7IgWQMYsg8cvR3dH4cCsE0g 9YY6ZEYG7EdfDmYQUXVRnuxJe4DefS2Ah1RhuxXwcMwxzRdUvRfcsUmiRbTNXmKFciZZ sj6VWndu+/pssOV5fsWGatSgPnNCsDew0TCo8= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=Pk5MkE6PXktMeFUSi0eF98V5qiRjEJiXczfdfCTR7uw=; b=LeqRFX3lSisJ5NcIUafi+Fo0YpnVW/9lam4rPEVgKo0LGGrFmlRW0FK4Q3+wEkNVlp rsIAY7iuBPTsrBlYN/kBPIWgvovJPqBpsMefzaWD8J+lKVl/MRih5z3LwFAy9wO3EqWX vbnD2TwCPa0CLva+L9WQzdnyXj9rJCCNhZ4QuXUFwR3UJce28mRCrbT0iEeruNBwLDkI L5n8ELFwcufL4ziZlDZJ6rrqSSlqOZPMwsl6GQNSGmomg3rwumjF5slaiZ1KvDsMqD18 /Pb9uUoA2jVsGvs54bHPFfV4uGVfntQVzcx8MUj7a7KmJZM3l/w4KOy/DOw5JnLgQXdL zmLw== X-Gm-Message-State: APzg51Bjaj2AAJMsYnLmqMlWMa01GIir2BEKrrW2gyLbgnRobeTiYFAB Sk6yMVSzKualqgK2JrSqkKVNCWseJf8= X-Received: by 2002:a17:902:9a8a:: with SMTP id w10-v6mr39949151plp.14.1537471146333; Thu, 20 Sep 2018 12:19:06 -0700 (PDT) Received: from localhost.localdomain ([209.121.128.187]) by smtp.gmail.com with ESMTPSA id k13-v6sm4424443pgf.37.2018.09.20.12.19.05 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 20 Sep 2018 12:19:05 -0700 (PDT) From: Mathieu Poirier To: gregkh@linuxfoundation.org Cc: linux-kernel@vger.kernel.org Subject: [PATCH 29/44] coresight: tmc-etr: Refactor for handling errors Date: Thu, 20 Sep 2018 13:18:04 -0600 Message-Id: <1537471099-19781-30-git-send-email-mathieu.poirier@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1537471099-19781-1-git-send-email-mathieu.poirier@linaro.org> References: <1537471099-19781-1-git-send-email-mathieu.poirier@linaro.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Suzuki K Poulose Refactor the tmc-etr enable operation to make it easier to handle errors in enabling the hardware. We need to make sure that the buffer is compatible with the ETR. This patch re-arranges to make the error handling easier, by deferring the hardware enablement until all the errors are checked. This also avoids turning the CATU on/off during a sysfs read session. Cc: Mathieu Poirier Signed-off-by: Suzuki K Poulose Signed-off-by: Mathieu Poirier --- drivers/hwtracing/coresight/coresight-tmc-etr.c | 67 ++++++++++++++++--------- 1 file changed, 43 insertions(+), 24 deletions(-) -- 2.7.4 diff --git a/drivers/hwtracing/coresight/coresight-tmc-etr.c b/drivers/hwtracing/coresight/coresight-tmc-etr.c index 56fea4ff947e..c42693542ec8 100644 --- a/drivers/hwtracing/coresight/coresight-tmc-etr.c +++ b/drivers/hwtracing/coresight/coresight-tmc-etr.c @@ -918,21 +918,10 @@ static void tmc_sync_etr_buf(struct tmc_drvdata *drvdata) tmc_etr_buf_insert_barrier_packet(etr_buf, etr_buf->offset); } -static void tmc_etr_enable_hw(struct tmc_drvdata *drvdata, - struct etr_buf *etr_buf) +static void __tmc_etr_enable_hw(struct tmc_drvdata *drvdata) { u32 axictl, sts; - - /* Callers should provide an appropriate buffer for use */ - if (WARN_ON(!etr_buf || drvdata->etr_buf)) - return; - drvdata->etr_buf = etr_buf; - - /* - * If this ETR is connected to a CATU, enable it before we turn - * this on - */ - tmc_etr_enable_catu(drvdata); + struct etr_buf *etr_buf = drvdata->etr_buf; CS_UNLOCK(drvdata->base); @@ -952,11 +941,8 @@ static void tmc_etr_enable_hw(struct tmc_drvdata *drvdata, axictl |= TMC_AXICTL_ARCACHE_OS; } - if (etr_buf->mode == ETR_MODE_ETR_SG) { - if (WARN_ON(!tmc_etr_has_cap(drvdata, TMC_ETR_SG))) - return; + if (etr_buf->mode == ETR_MODE_ETR_SG) axictl |= TMC_AXICTL_SCT_GAT_MODE; - } writel_relaxed(axictl, drvdata->base + TMC_AXICTL); tmc_write_dba(drvdata, etr_buf->hwaddr); @@ -982,6 +968,32 @@ static void tmc_etr_enable_hw(struct tmc_drvdata *drvdata, CS_LOCK(drvdata->base); } +static int tmc_etr_enable_hw(struct tmc_drvdata *drvdata, + struct etr_buf *etr_buf) +{ + /* Callers should provide an appropriate buffer for use */ + if (WARN_ON(!etr_buf)) + return -EINVAL; + + if ((etr_buf->mode == ETR_MODE_ETR_SG) && + WARN_ON(!tmc_etr_has_cap(drvdata, TMC_ETR_SG))) + return -EINVAL; + + if (WARN_ON(drvdata->etr_buf)) + return -EBUSY; + + /* Set the buffer for the session */ + drvdata->etr_buf = etr_buf; + /* + * If this ETR is connected to a CATU, enable it before we turn + * this on. + */ + tmc_etr_enable_catu(drvdata); + + __tmc_etr_enable_hw(drvdata); + return 0; +} + /* * Return the available trace data in the buffer (starts at etr_buf->offset, * limited by etr_buf->len) from @pos, with a maximum limit of @len, @@ -1037,7 +1049,7 @@ static void tmc_etr_sync_sysfs_buf(struct tmc_drvdata *drvdata) } } -static void tmc_etr_disable_hw(struct tmc_drvdata *drvdata) +static void __tmc_etr_disable_hw(struct tmc_drvdata *drvdata) { CS_UNLOCK(drvdata->base); @@ -1053,6 +1065,11 @@ static void tmc_etr_disable_hw(struct tmc_drvdata *drvdata) CS_LOCK(drvdata->base); +} + +static void tmc_etr_disable_hw(struct tmc_drvdata *drvdata) +{ + __tmc_etr_disable_hw(drvdata); /* Disable CATU device if this ETR is connected to one */ tmc_etr_disable_catu(drvdata); /* Reset the ETR buf used by hardware */ @@ -1111,8 +1128,9 @@ static int tmc_enable_etr_sink_sysfs(struct coresight_device *csdev) drvdata->sysfs_buf = new_buf; } - drvdata->mode = CS_MODE_SYSFS; - tmc_etr_enable_hw(drvdata, drvdata->sysfs_buf); + ret = tmc_etr_enable_hw(drvdata, drvdata->sysfs_buf); + if (!ret) + drvdata->mode = CS_MODE_SYSFS; out: spin_unlock_irqrestore(&drvdata->spinlock, flags); @@ -1342,8 +1360,9 @@ static int tmc_enable_etr_sink_perf(struct coresight_device *csdev, void *data) etr_perf->head = PERF_IDX2OFF(handle->head, etr_perf); drvdata->perf_data = etr_perf; - drvdata->mode = CS_MODE_PERF; - tmc_etr_enable_hw(drvdata, etr_perf->etr_buf); + rc = tmc_etr_enable_hw(drvdata, etr_perf->etr_buf); + if (!rc) + drvdata->mode = CS_MODE_PERF; unlock_out: spin_unlock_irqrestore(&drvdata->spinlock, flags); @@ -1425,7 +1444,7 @@ int tmc_read_prepare_etr(struct tmc_drvdata *drvdata) /* Disable the TMC if we are trying to read from a running session. */ if (drvdata->mode == CS_MODE_SYSFS) - tmc_etr_disable_hw(drvdata); + __tmc_etr_disable_hw(drvdata); drvdata->reading = true; out: @@ -1452,7 +1471,7 @@ int tmc_read_unprepare_etr(struct tmc_drvdata *drvdata) * buffer. Since the tracer is still enabled drvdata::buf can't * be NULL. */ - tmc_etr_enable_hw(drvdata, drvdata->sysfs_buf); + __tmc_etr_enable_hw(drvdata); } else { /* * The ETR is not tracing and the buffer was just read. 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[209.132.180.67]) by mx.google.com with ESMTP id a18-v6si24327788pfn.317.2018.09.20.12.20.38; Thu, 20 Sep 2018 12:20:39 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="C6c/Xhga"; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2388555AbeIUBFg (ORCPT + 32 others); Thu, 20 Sep 2018 21:05:36 -0400 Received: from mail-pl1-f196.google.com ([209.85.214.196]:33545 "EHLO mail-pl1-f196.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2389005AbeIUBEH (ORCPT ); Thu, 20 Sep 2018 21:04:07 -0400 Received: by mail-pl1-f196.google.com with SMTP id b97-v6so4812091plb.0 for ; Thu, 20 Sep 2018 12:19:08 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=V6vu1RIZBsPM7h6OM/OfrWdKkRSO5vP9cV5FH4ePhdM=; b=C6c/XhgaZor+HAv6JiOxdav3v6vR8+mbX1mUgcpeTuJgztugUORTRCiW7s9mmA81Ih 1c7xx8hIxug/bPhBcJBsegcbNLI4WKHtf+86pYzPuj8dpyijFYXkCrHofCG8YKk2fLPP A2koKFJyK1vFXrX3h80f5hPrt1jV9tlhRpzt8= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=V6vu1RIZBsPM7h6OM/OfrWdKkRSO5vP9cV5FH4ePhdM=; b=Gq2fzUjO9sKv/THMZLG5Km61Jq3V5ItO8g7D53uOUpKcFrqKGwhYcNrlQGGaBK5k/6 U9Z6rwP7Vr9aZqbcKE64lT8FQM6+9UE+WCj6jnpcc4yRLcXUAe48tEkGFllihgQxvbCE Lm+4hZdFZ/gx4eZZkMzDfNZM+tsHysq48Y7XoVrt6+EILvck80jhM0EhghOv4zJsEanc aP5K9VapsuxehVUJZwEfM4a7QR7AuGE9GT9iZghkMZBNAgo4KFzqeSlnRNcfdK4BWcZo /ieCYF89IcNOQav1n3nU+yoo0/ilZcu8KPN/zb26pBTmPVLtoQ5RB3dtLU9IpLT3XNp/ PO+Q== X-Gm-Message-State: APzg51B8cfvD0eZyWvLZhc4hXbz7G8nn0eBou5hsY05YB8pdb8MlPzK5 OXcfYfFyX9CT7E1g1goHkCXIk1O3XUw= X-Received: by 2002:a17:902:c85:: with SMTP id 5-v6mr40952054plt.141.1537471147788; Thu, 20 Sep 2018 12:19:07 -0700 (PDT) Received: from localhost.localdomain ([209.121.128.187]) by smtp.gmail.com with ESMTPSA id k13-v6sm4424443pgf.37.2018.09.20.12.19.06 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 20 Sep 2018 12:19:06 -0700 (PDT) From: Mathieu Poirier To: gregkh@linuxfoundation.org Cc: linux-kernel@vger.kernel.org Subject: [PATCH 30/44] coresight: tmc-etr: Handle errors enabling CATU Date: Thu, 20 Sep 2018 13:18:05 -0600 Message-Id: <1537471099-19781-31-git-send-email-mathieu.poirier@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1537471099-19781-1-git-send-email-mathieu.poirier@linaro.org> References: <1537471099-19781-1-git-send-email-mathieu.poirier@linaro.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Suzuki K Poulose Make sure we honor the errors in CATU device and abort the operation. While at it, delay setting the etr_buf for the session until we are sure that we are indeed enabling the ETR. Cc: Mathieu Poirier Signed-off-by: Suzuki K Poulose Signed-off-by: Mathieu Poirier --- drivers/hwtracing/coresight/coresight-tmc-etr.c | 19 ++++++++++++------- 1 file changed, 12 insertions(+), 7 deletions(-) -- 2.7.4 diff --git a/drivers/hwtracing/coresight/coresight-tmc-etr.c b/drivers/hwtracing/coresight/coresight-tmc-etr.c index c42693542ec8..daad52146140 100644 --- a/drivers/hwtracing/coresight/coresight-tmc-etr.c +++ b/drivers/hwtracing/coresight/coresight-tmc-etr.c @@ -751,12 +751,14 @@ tmc_etr_get_catu_device(struct tmc_drvdata *drvdata) return NULL; } -static inline void tmc_etr_enable_catu(struct tmc_drvdata *drvdata) +static inline int tmc_etr_enable_catu(struct tmc_drvdata *drvdata, + struct etr_buf *etr_buf) { struct coresight_device *catu = tmc_etr_get_catu_device(drvdata); if (catu && helper_ops(catu)->enable) - helper_ops(catu)->enable(catu, drvdata->etr_buf); + return helper_ops(catu)->enable(catu, etr_buf); + return 0; } static inline void tmc_etr_disable_catu(struct tmc_drvdata *drvdata) @@ -971,6 +973,8 @@ static void __tmc_etr_enable_hw(struct tmc_drvdata *drvdata) static int tmc_etr_enable_hw(struct tmc_drvdata *drvdata, struct etr_buf *etr_buf) { + int rc; + /* Callers should provide an appropriate buffer for use */ if (WARN_ON(!etr_buf)) return -EINVAL; @@ -982,16 +986,17 @@ static int tmc_etr_enable_hw(struct tmc_drvdata *drvdata, if (WARN_ON(drvdata->etr_buf)) return -EBUSY; - /* Set the buffer for the session */ - drvdata->etr_buf = etr_buf; /* * If this ETR is connected to a CATU, enable it before we turn * this on. */ - tmc_etr_enable_catu(drvdata); + rc = tmc_etr_enable_catu(drvdata, etr_buf); + if (!rc) { + drvdata->etr_buf = etr_buf; + __tmc_etr_enable_hw(drvdata); + } - __tmc_etr_enable_hw(drvdata); - return 0; + return rc; } /* From patchwork Thu Sep 20 19:18:06 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mathieu Poirier X-Patchwork-Id: 147150 Delivered-To: patch@linaro.org Received: by 2002:a2e:1648:0:0:0:0:0 with SMTP id 8-v6csp2376671ljw; Thu, 20 Sep 2018 12:19:14 -0700 (PDT) X-Google-Smtp-Source: ANB0VdacMsrHsBol2woxku6v7UfwFvLqtVSzN5zD5WjuAg/1hg/3MDubrktli6ehk+PKrHzyVBQs X-Received: by 2002:a17:902:102c:: with SMTP id b41-v6mr41179053pla.257.1537471154082; Thu, 20 Sep 2018 12:19:14 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1537471154; cv=none; d=google.com; s=arc-20160816; b=apQPeIZETlKxFLAVSMzCuix2zMHn6qWBDfnzqG2T9zFrAE9tyvA3haSw86CLSoPDnU sY5walt7TzjVvMjacmbxJ2lES6p7nL0NmjWIfGtiQdkykVqajBlwaNTkLPLAEFLkGedk OcLhtVsZDvIUSpX0rFJz9lkU5TJAnz55DybySDd+Nf/ZcG4MQvHsC+5IY2ZLWrkMy5R6 5uh7dFWvaFdb52CZU3nCBpu5mBF2EM/5K6vFL0uNM4iCNzx3kWO+ErLdYb1dbNuMcG8c epgh3C8VrQxEPQWOavDn1tIrulZQsV5pZOLtDV2OYVlfg66hDc73TiTb9pHHeZWdMO0Z zZFw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature; bh=sK0hfOiKmw/bseOl/rqlP9b/D7FoJ5EwQi5iLUrFTo4=; b=PMaPXtg7st42egWjlnTTM7I34w5cQtkAlVkiVm8EUXTZEaSXQEcUjAIHTczBi24ZBm KLI5Fm5n0KtX+wmovBjzHjtkfomaxjRFWFpkNT8BmlCv/VFiqfwqw3DZlEP5hRgzDi+0 V2YhFJat4QbMH7XJ1GCLEiI3AgXP2cwF/WmMnG+MF6w9gbBLuHUCw6AHqUuaRt9x2Ymx VsWCOu3IAB+Lna/RBQ4Y6MJ17pqcH6DYTjnHwx9596JaQIrO4uCZmHZjBwm6brRt4xIe TU7x6q2smuRe/W4lkU7sAtm1Y1XAWkwKlxZTJwmNu7F32sFK2SXAQiH2j1pVO0qZVAT8 hW8w== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=R9Ui3lgX; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id i5-v6si23943618pgk.200.2018.09.20.12.19.13; Thu, 20 Sep 2018 12:19:14 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=R9Ui3lgX; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2389030AbeIUBEK (ORCPT + 32 others); Thu, 20 Sep 2018 21:04:10 -0400 Received: from mail-pl1-f195.google.com ([209.85.214.195]:35754 "EHLO mail-pl1-f195.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2388559AbeIUBEI (ORCPT ); Thu, 20 Sep 2018 21:04:08 -0400 Received: by mail-pl1-f195.google.com with SMTP id g2-v6so4798477plo.2 for ; Thu, 20 Sep 2018 12:19:09 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=sK0hfOiKmw/bseOl/rqlP9b/D7FoJ5EwQi5iLUrFTo4=; b=R9Ui3lgXrHXl+vt2ejeyCggPLRvm9yHS8FIW+pc5aSSSomHJwAdazsrfCdX3bstkOH ENEJZeSS3woDDyZ3pZXT++9Ufyuc+M+6xirKQ/c3kKXNFNj5rnbRD/lW5VRwqgmrvpat EdQcyUbyKZrYouADk8QSNyYTxIMTSU0A6sqW0= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=sK0hfOiKmw/bseOl/rqlP9b/D7FoJ5EwQi5iLUrFTo4=; b=JHIxRg2ZKnWs+Dtfu3TmoKGNyAOn4mYvYFroBdcOjrjeW38ekq5ubSlYXYF4X5tUUz ej8dPYKtDPeNfOMqLQHOf/1/Y/UNwF+q9VPVmcYd2qjOcHepBBv/xGI9agznCvUC9d4L 8yDF4viEo/Ks7K0fXf0iSczL5ZWJArpr65GLPEyYuYeOT6DZcMXqLJP/CQmEjwnbkViI YYGuDMOZlieS9xV42gpTKjj1LzCcw+nm6G01KZ6vOURqwV7+2V8EijKZ5ASnAIyAEtGv LrLY7XuXUVjzqfEeQ4L2E4nYEScpfKEQfZAR7cH/S+ZJN6mDN+qdfADJRjxg+8qY6iLU P6EQ== X-Gm-Message-State: APzg51DMwlSVs8detEwIrZkXK7ixsxWrM06NytgHDeTUWDDbaxsh8zdR g8Bebcso9B2OBIP91XUFBPRskA== X-Received: by 2002:a17:902:864b:: with SMTP id y11-v6mr41064006plt.335.1537471149284; Thu, 20 Sep 2018 12:19:09 -0700 (PDT) Received: from localhost.localdomain ([209.121.128.187]) by smtp.gmail.com with ESMTPSA id k13-v6sm4424443pgf.37.2018.09.20.12.19.07 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 20 Sep 2018 12:19:08 -0700 (PDT) From: Mathieu Poirier To: gregkh@linuxfoundation.org Cc: linux-kernel@vger.kernel.org Subject: [PATCH 31/44] coresight: tmc-etb/etf: Prepare to handle errors enabling Date: Thu, 20 Sep 2018 13:18:06 -0600 Message-Id: <1537471099-19781-32-git-send-email-mathieu.poirier@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1537471099-19781-1-git-send-email-mathieu.poirier@linaro.org> References: <1537471099-19781-1-git-send-email-mathieu.poirier@linaro.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Suzuki K Poulose Prepare to handle errors in enabling the hardware and report it back to the core driver. Cc: Mathieu Poirier Signed-off-by: Suzuki K Poulose Signed-off-by: Mathieu Poirier --- drivers/hwtracing/coresight/coresight-tmc-etf.c | 73 +++++++++++++++---------- 1 file changed, 45 insertions(+), 28 deletions(-) -- 2.7.4 diff --git a/drivers/hwtracing/coresight/coresight-tmc-etf.c b/drivers/hwtracing/coresight/coresight-tmc-etf.c index b54a3db13fee..36af23d2c0f8 100644 --- a/drivers/hwtracing/coresight/coresight-tmc-etf.c +++ b/drivers/hwtracing/coresight/coresight-tmc-etf.c @@ -15,7 +15,7 @@ static int tmc_set_etf_buffer(struct coresight_device *csdev, struct perf_output_handle *handle); -static void tmc_etb_enable_hw(struct tmc_drvdata *drvdata) +static void __tmc_etb_enable_hw(struct tmc_drvdata *drvdata) { CS_UNLOCK(drvdata->base); @@ -34,6 +34,12 @@ static void tmc_etb_enable_hw(struct tmc_drvdata *drvdata) CS_LOCK(drvdata->base); } +static int tmc_etb_enable_hw(struct tmc_drvdata *drvdata) +{ + __tmc_etb_enable_hw(drvdata); + return 0; +} + static void tmc_etb_dump_hw(struct tmc_drvdata *drvdata) { char *bufp; @@ -73,7 +79,7 @@ static void tmc_etb_disable_hw(struct tmc_drvdata *drvdata) CS_LOCK(drvdata->base); } -static void tmc_etf_enable_hw(struct tmc_drvdata *drvdata) +static void __tmc_etf_enable_hw(struct tmc_drvdata *drvdata) { CS_UNLOCK(drvdata->base); @@ -89,6 +95,12 @@ static void tmc_etf_enable_hw(struct tmc_drvdata *drvdata) CS_LOCK(drvdata->base); } +static int tmc_etf_enable_hw(struct tmc_drvdata *drvdata) +{ + __tmc_etf_enable_hw(drvdata); + return 0; +} + static void tmc_etf_disable_hw(struct tmc_drvdata *drvdata) { CS_UNLOCK(drvdata->base); @@ -171,8 +183,12 @@ static int tmc_enable_etf_sink_sysfs(struct coresight_device *csdev) drvdata->buf = buf; } - drvdata->mode = CS_MODE_SYSFS; - tmc_etb_enable_hw(drvdata); + ret = tmc_etb_enable_hw(drvdata); + if (!ret) + drvdata->mode = CS_MODE_SYSFS; + else + /* Free up the buffer if we failed to enable */ + used = false; out: spin_unlock_irqrestore(&drvdata->spinlock, flags); @@ -191,27 +207,25 @@ static int tmc_enable_etf_sink_perf(struct coresight_device *csdev, void *data) struct perf_output_handle *handle = data; spin_lock_irqsave(&drvdata->spinlock, flags); - if (drvdata->reading) { - ret = -EINVAL; - goto out; - } - - /* - * In Perf mode there can be only one writer per sink. There - * is also no need to continue if the ETB/ETR is already operated - * from sysFS. - */ - if (drvdata->mode != CS_MODE_DISABLED) { + do { ret = -EINVAL; - goto out; - } + if (drvdata->reading) + break; + /* + * In Perf mode there can be only one writer per sink. There + * is also no need to continue if the ETB/ETF is already + * operated from sysFS. + */ + if (drvdata->mode != CS_MODE_DISABLED) + break; - ret = tmc_set_etf_buffer(csdev, handle); - if (!ret) { - drvdata->mode = CS_MODE_PERF; - tmc_etb_enable_hw(drvdata); - } -out: + ret = tmc_set_etf_buffer(csdev, handle); + if (ret) + break; + ret = tmc_etb_enable_hw(drvdata); + if (!ret) + drvdata->mode = CS_MODE_PERF; + } while (0); spin_unlock_irqrestore(&drvdata->spinlock, flags); return ret; @@ -268,6 +282,7 @@ static void tmc_disable_etf_sink(struct coresight_device *csdev) static int tmc_enable_etf_link(struct coresight_device *csdev, int inport, int outport) { + int ret; unsigned long flags; struct tmc_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent); @@ -277,12 +292,14 @@ static int tmc_enable_etf_link(struct coresight_device *csdev, return -EBUSY; } - tmc_etf_enable_hw(drvdata); - drvdata->mode = CS_MODE_SYSFS; + ret = tmc_etf_enable_hw(drvdata); + if (!ret) + drvdata->mode = CS_MODE_SYSFS; spin_unlock_irqrestore(&drvdata->spinlock, flags); - dev_dbg(drvdata->dev, "TMC-ETF enabled\n"); - return 0; + if (!ret) + dev_dbg(drvdata->dev, "TMC-ETF enabled\n"); + return ret; } static void tmc_disable_etf_link(struct coresight_device *csdev, @@ -576,7 +593,7 @@ int tmc_read_unprepare_etb(struct tmc_drvdata *drvdata) * can't be NULL. */ memset(drvdata->buf, 0, drvdata->size); - tmc_etb_enable_hw(drvdata); + __tmc_etb_enable_hw(drvdata); } else { /* * The ETB/ETF is not tracing and the buffer was just read. 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[209.132.180.67]) by mx.google.com with ESMTP id a18-v6si24327788pfn.317.2018.09.20.12.20.32; Thu, 20 Sep 2018 12:20:32 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=O3P0FTMq; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2388385AbeIUBF3 (ORCPT + 32 others); Thu, 20 Sep 2018 21:05:29 -0400 Received: from mail-pg1-f195.google.com ([209.85.215.195]:39994 "EHLO mail-pg1-f195.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2388572AbeIUBEJ (ORCPT ); Thu, 20 Sep 2018 21:04:09 -0400 Received: by mail-pg1-f195.google.com with SMTP id l63-v6so4875664pga.7 for ; Thu, 20 Sep 2018 12:19:11 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=SzFk6dtDlJeMVc6wDpFORp4xi55mVKK/kcJWa63rh4U=; b=O3P0FTMqrFW1T19bYs+eHLsebUDbMoVpQAtSryseJoCJ1YMnY9JJ2lhrEMRPdexLSJ BSbovZszdcoUuq0jbhANctb754vz9jIAYEqjIQ2VcKlCxyKTcUplCcArKmXU4IwIXtKQ ApbYuv2/D0SGRuWjPUlR8UIZpaxcyzSghJmF0= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=SzFk6dtDlJeMVc6wDpFORp4xi55mVKK/kcJWa63rh4U=; b=snE14meEWdPX3EJAPMUTdefFOiYD8Xv+B7mK+4CpY6CdshZPNl+a6ezJ25c7hihPEm jeAm1pkI6/MHSH8MJ6SLteoxn5cqPLT18pUNbKHuxmnToUD2xe6YNct67IRc0u6gbbdV vuSCY6DY6II8GWRA3A3HtLdAkgIxrWASpcyW75slmwXw7UWpeKLDFOsOr/9KqMKKx/lK a4/DluuMyUV041LVl7fJkLXt7q87Et5yph1tvZiYbCIVCWXgC0J9aTIinjvhqhUh4nJx MHejDXaNMimomcdiV9yp/kVjLv5QbCWOLQYuttuCYOfsG9Dkkz4t9s5CYyCTDknehxOH lYjQ== X-Gm-Message-State: APzg51B2SRUtylESi3u9OYke84b5RFOWJ4pJpR6rvP+P5FJ1d1zaPtKr YncmGdTrscrFjHNeBqjAC+nU7A== X-Received: by 2002:a62:fc5:: with SMTP id 66-v6mr42417065pfp.237.1537471150739; Thu, 20 Sep 2018 12:19:10 -0700 (PDT) Received: from localhost.localdomain ([209.121.128.187]) by smtp.gmail.com with ESMTPSA id k13-v6sm4424443pgf.37.2018.09.20.12.19.09 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 20 Sep 2018 12:19:09 -0700 (PDT) From: Mathieu Poirier To: gregkh@linuxfoundation.org Cc: linux-kernel@vger.kernel.org Subject: [PATCH 32/44] coresight: etm4x: Add support for handling errors Date: Thu, 20 Sep 2018 13:18:07 -0600 Message-Id: <1537471099-19781-33-git-send-email-mathieu.poirier@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1537471099-19781-1-git-send-email-mathieu.poirier@linaro.org> References: <1537471099-19781-1-git-send-email-mathieu.poirier@linaro.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Suzuki K Poulose Add support for handling errors in enabling the component. The ETM is enabled via cross call to owner CPU. Make necessary changes to report the error back from the cross call. Cc: Mathieu Poirier Signed-off-by: Suzuki K Poulose Signed-off-by: Mathieu Poirier --- drivers/hwtracing/coresight/coresight-etm4x.c | 39 ++++++++++++++++++--------- 1 file changed, 26 insertions(+), 13 deletions(-) -- 2.7.4 diff --git a/drivers/hwtracing/coresight/coresight-etm4x.c b/drivers/hwtracing/coresight/coresight-etm4x.c index b7379e9cfb30..064e0bfaefd0 100644 --- a/drivers/hwtracing/coresight/coresight-etm4x.c +++ b/drivers/hwtracing/coresight/coresight-etm4x.c @@ -78,10 +78,14 @@ static int etm4_trace_id(struct coresight_device *csdev) return drvdata->trcid; } -static void etm4_enable_hw(void *info) +struct etm4_enable_arg { + struct etmv4_drvdata *drvdata; + int rc; +}; + +static int etm4_enable_hw(struct etmv4_drvdata *drvdata) { int i; - struct etmv4_drvdata *drvdata = info; struct etmv4_config *config = &drvdata->config; CS_UNLOCK(drvdata->base); @@ -178,6 +182,16 @@ static void etm4_enable_hw(void *info) CS_LOCK(drvdata->base); dev_dbg(drvdata->dev, "cpu: %d enable smp call done\n", drvdata->cpu); + return 0; +} + +static void etm4_enable_hw_smp_call(void *info) +{ + struct etm4_enable_arg *arg = info; + + if (WARN_ON(!arg)) + return; + arg->rc = etm4_enable_hw(arg->drvdata); } static int etm4_parse_event_config(struct etmv4_drvdata *drvdata, @@ -243,7 +257,7 @@ static int etm4_enable_perf(struct coresight_device *csdev, if (ret) goto out; /* And enable it */ - etm4_enable_hw(drvdata); + ret = etm4_enable_hw(drvdata); out: return ret; @@ -252,6 +266,7 @@ static int etm4_enable_perf(struct coresight_device *csdev, static int etm4_enable_sysfs(struct coresight_device *csdev) { struct etmv4_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent); + struct etm4_enable_arg arg = { 0 }; int ret; spin_lock(&drvdata->spinlock); @@ -260,19 +275,17 @@ static int etm4_enable_sysfs(struct coresight_device *csdev) * Executing etm4_enable_hw on the cpu whose ETM is being enabled * ensures that register writes occur when cpu is powered. */ + arg.drvdata = drvdata; ret = smp_call_function_single(drvdata->cpu, - etm4_enable_hw, drvdata, 1); - if (ret) - goto err; - - drvdata->sticky_enable = true; + etm4_enable_hw_smp_call, &arg, 1); + if (!ret) + ret = arg.rc; + if (!ret) + drvdata->sticky_enable = true; spin_unlock(&drvdata->spinlock); - dev_dbg(drvdata->dev, "ETM tracing enabled\n"); - return 0; - -err: - spin_unlock(&drvdata->spinlock); + if (!ret) + dev_dbg(drvdata->dev, "ETM tracing enabled\n"); return ret; } From patchwork Thu Sep 20 19:18:08 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mathieu Poirier X-Patchwork-Id: 147151 Delivered-To: patch@linaro.org Received: by 2002:a2e:1648:0:0:0:0:0 with SMTP id 8-v6csp2376710ljw; Thu, 20 Sep 2018 12:19:16 -0700 (PDT) X-Google-Smtp-Source: ANB0VdYz8hU2f56mgTEZJsMAXyYqfz9L01A23pimmP/NIkZbIi2TWdp5n6tt47IGzPcFhWpRG8db X-Received: by 2002:a63:6283:: with SMTP id w125-v6mr37108671pgb.83.1537471156279; Thu, 20 Sep 2018 12:19:16 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1537471156; cv=none; d=google.com; s=arc-20160816; b=SkusBJW2aAhVZfzAVASvLEUqqVC+ENfX2r3pXJWhqXR+mA7+/caRJpV93xQOWdiSeQ 6Xp7Q/VvTFwPpQ5L3xVtEPKAjIjAyCMqcpntI83nF+BW6ldi1OeUuhmqXHbDPDAF1s6C e/48KqBBRuhKXUJ/PbD/LM5BNw901JgfFIJrUqeqGD/lZuPU8XVSO8uF9AW4XsDTTHID 88f9tujA78iyR9yYevcdYo4hDKFeMDgEMcRNaxd2HhL1JeFU6l9bH6IM8TZmFNyTrKg2 WQTq+7U4TE2Dle+VRp2GTl3FdVLdpixlwa17M14seAYq1c6ffwp0z7AmpviuqzSNbdQU hJLQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature; bh=jasPfZK2wsoNdBWcuDJHTJ/t7P13W2dMZ0nkyY04hwI=; b=iWm6UNFo9dG833ps0w1EiaCixnWdRH9c+lNUaBw4iNpxPWQJp1rbdLpFVNCfHwp8DB oQB9nZXw9RCY1hurLHdL3GEXqrGTA9qSM5z7p8XUj53jNmEyIMpKHbV0qGYzTDk5EgyC PVj12DIFIQm0SYA+MIRhtEbZGhzKbICoUFmoA9hHuaob/rb+BP2esH39QIX3IIMPP+oU GdAVvqQK9ijk9jAHqlxhsmjl+3kOfSkYMondEqBah08XV0nFRXZODKJBKtQsb4VqPuFC biFQzQxIG8FAkh041pim7RYZaVsuwy5OrCwOIozoK3DFqT18GQXqwZZyuCK7YR3NBnDg lmVQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=Y7QG43wP; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id i5-v6si23943618pgk.200.2018.09.20.12.19.16; Thu, 20 Sep 2018 12:19:16 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=Y7QG43wP; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2389039AbeIUBEM (ORCPT + 32 others); Thu, 20 Sep 2018 21:04:12 -0400 Received: from mail-pl1-f196.google.com ([209.85.214.196]:36732 "EHLO mail-pl1-f196.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2388558AbeIUBEL (ORCPT ); Thu, 20 Sep 2018 21:04:11 -0400 Received: by mail-pl1-f196.google.com with SMTP id p5-v6so4798819plk.3 for ; Thu, 20 Sep 2018 12:19:12 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=jasPfZK2wsoNdBWcuDJHTJ/t7P13W2dMZ0nkyY04hwI=; b=Y7QG43wPm9TKE2tYCf0S6IUT4pUBEArOvbatjgDJCpuO05UTKAuke4NOpTovBSa/BX 3ntebuh3HLc1+DTTBVKYqSFq/tF1zUzslLACaS/48jgNnRfX0BanRmCuoIepFoHrswd+ qrdC05hgviCWwKtJU4Mc24cPiJtzaoHmhBHb4= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=jasPfZK2wsoNdBWcuDJHTJ/t7P13W2dMZ0nkyY04hwI=; b=a/tSdnBV8h8lgEkxEZ4QghFv2ita8rrLHZ5b+jbquymnOqHhryos+Dt4iGaZc6bEuT Q+S6eCMRui6T4ONf4oBPhLaGQzzJaIVcTXRJ9MmbTnifVfi3fx6oIfqQW/8s2xn0gMsL kq6nF1bJAnV9w0StqEPHMhDw5Gh1tVDWyYs07qrAuN9S49hnCRc6ZozIBkCaZEDO03vx b245X69Sh/L5h7GHNkmOCmZI8LatemUu3BpCYQzNA4gC5bIzVNoLWrxM9hqdY2okqvcL NkpfC13alXp7dsJ2Q7cCkEEy25A9GA0ey1I6fBdQbDXjU5GXVc79fQenGXz1PZ5UyeBu zgFg== X-Gm-Message-State: APzg51D2qW9jG+srVy+pugfkHPEiNMIDVSaC+XhL7kzYqM+S+aqIAl5D 8FJiT3uibk64Nq/lsYLkjuw+t0WUfS0= X-Received: by 2002:a17:902:24e1:: with SMTP id l30-v6mr40914387plg.315.1537471152152; Thu, 20 Sep 2018 12:19:12 -0700 (PDT) Received: from localhost.localdomain ([209.121.128.187]) by smtp.gmail.com with ESMTPSA id k13-v6sm4424443pgf.37.2018.09.20.12.19.10 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 20 Sep 2018 12:19:11 -0700 (PDT) From: Mathieu Poirier To: gregkh@linuxfoundation.org Cc: linux-kernel@vger.kernel.org Subject: [PATCH 33/44] coresight: etm3: Add support for handling errors Date: Thu, 20 Sep 2018 13:18:08 -0600 Message-Id: <1537471099-19781-34-git-send-email-mathieu.poirier@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1537471099-19781-1-git-send-email-mathieu.poirier@linaro.org> References: <1537471099-19781-1-git-send-email-mathieu.poirier@linaro.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Suzuki K Poulose Add support for reporting errors back from the SMP cross function call for enabling ETM. Cc: Mathieu Poirier Signed-off-by: Suzuki K Poulose Signed-off-by: Mathieu Poirier --- drivers/hwtracing/coresight/coresight-etm3x.c | 42 ++++++++++++++++++--------- 1 file changed, 28 insertions(+), 14 deletions(-) -- 2.7.4 diff --git a/drivers/hwtracing/coresight/coresight-etm3x.c b/drivers/hwtracing/coresight/coresight-etm3x.c index 9ce8fba20b0f..206c2381a11a 100644 --- a/drivers/hwtracing/coresight/coresight-etm3x.c +++ b/drivers/hwtracing/coresight/coresight-etm3x.c @@ -355,11 +355,10 @@ static int etm_parse_event_config(struct etm_drvdata *drvdata, return 0; } -static void etm_enable_hw(void *info) +static int etm_enable_hw(struct etm_drvdata *drvdata) { int i; u32 etmcr; - struct etm_drvdata *drvdata = info; struct etm_config *config = &drvdata->config; CS_UNLOCK(drvdata->base); @@ -421,6 +420,21 @@ static void etm_enable_hw(void *info) CS_LOCK(drvdata->base); dev_dbg(drvdata->dev, "cpu: %d enable smp call done\n", drvdata->cpu); + return 0; +} + +struct etm_enable_arg { + struct etm_drvdata *drvdata; + int rc; +}; + +static void etm_enable_hw_smp_call(void *info) +{ + struct etm_enable_arg *arg = info; + + if (WARN_ON(!arg)) + return; + arg->rc = etm_enable_hw(arg->drvdata); } static int etm_cpu_id(struct coresight_device *csdev) @@ -475,14 +489,13 @@ static int etm_enable_perf(struct coresight_device *csdev, /* Configure the tracer based on the session's specifics */ etm_parse_event_config(drvdata, event); /* And enable it */ - etm_enable_hw(drvdata); - - return 0; + return etm_enable_hw(drvdata); } static int etm_enable_sysfs(struct coresight_device *csdev) { struct etm_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent); + struct etm_enable_arg arg = { 0 }; int ret; spin_lock(&drvdata->spinlock); @@ -492,20 +505,21 @@ static int etm_enable_sysfs(struct coresight_device *csdev) * hw configuration will take place on the local CPU during bring up. */ if (cpu_online(drvdata->cpu)) { + arg.drvdata = drvdata; ret = smp_call_function_single(drvdata->cpu, - etm_enable_hw, drvdata, 1); - if (ret) - goto err; + etm_enable_hw_smp_call, &arg, 1); + if (!ret) + ret = arg.rc; + if (!ret) + drvdata->sticky_enable = true; + } else { + ret = -ENODEV; } - drvdata->sticky_enable = true; spin_unlock(&drvdata->spinlock); - dev_dbg(drvdata->dev, "ETM tracing enabled\n"); - return 0; - -err: - spin_unlock(&drvdata->spinlock); + if (!ret) + dev_dbg(drvdata->dev, "ETM tracing enabled\n"); return ret; } From patchwork Thu Sep 20 19:18:09 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mathieu Poirier X-Patchwork-Id: 147152 Delivered-To: patch@linaro.org Received: by 2002:a2e:1648:0:0:0:0:0 with SMTP id 8-v6csp2376746ljw; Thu, 20 Sep 2018 12:19:18 -0700 (PDT) X-Google-Smtp-Source: ANB0VdY425Vi0Dg9MkLOxNw0qM7M9AxXuU5d02jD4EmJSAYeJP+6SCtStwOBaI+/tuW0d/WK5mjA X-Received: by 2002:a63:d09:: with SMTP id c9-v6mr38655505pgl.314.1537471158489; Thu, 20 Sep 2018 12:19:18 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1537471158; cv=none; d=google.com; s=arc-20160816; b=wE8cHe2dC5ck7x8n+a0VyniKFd6D86g7VY/S1uOE5Y22rWCEDHN1UffiFddQqrap9C st7uRidP8ffFu/1BIZaeB/9WbTL6zaehJJimTx/M6UHXOlTpaS55mokwb1x15osbTM5p IvnniwAXM6MzQOET6azZ/yqGI6a2Q2QO0DFbV5cb6CnXA8/v3huEK9W7kCW06Ce0QA+l 4y0fShylWMb6kAj3/3REWq9VaIifhqSBGOWg0J8aZ/zWUPUEAy4vVUQr+6kM211aqbk+ N45fb4G0o54obo6amUQtHMcWMyiszA59Quy9FpJcrpUzfMg4/59Kvw3HOaWzstXh/XWI fUDg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature; bh=uTB54otE2bw7+61Z1ydJwtI+Yieov8luc9OYgjIrcXA=; b=vJxSKtflwsL8Y+p1wQz/Gi6RGpepqmWcKJ97hFqaz+ffFFyGl+XdFUfMXfSCSjT/M3 hT+dww00mqjVPDj1e065k75XtBXYFntmonTs9ZMK0zhgKHnpId0+hTwrh7piWtjWVLis CZhsTjACZC6IKNBCgLIikp6CKWlC3YrRHxd/80a/YFxA8JWxZ57JoVe30lFq8kYuv2p3 RbFrP+LzTl1ePpCLiPnRcO2X+8JAm9khBzW9RIgWplQEG2K5ejb6aDa11hRWF3e1aKHJ n0bCJfK7r7bbByt+OA1tG0dVDzZd0v59RvEU7A91r7eQKWxbdCbH5yohCi+GPXZDcoqF iCKg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=WUQ0uZFc; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id w20-v6si42369plp.260.2018.09.20.12.19.18; Thu, 20 Sep 2018 12:19:18 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=WUQ0uZFc; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2389051AbeIUBEN (ORCPT + 32 others); Thu, 20 Sep 2018 21:04:13 -0400 Received: from mail-pf1-f195.google.com ([209.85.210.195]:41900 "EHLO mail-pf1-f195.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2388558AbeIUBEN (ORCPT ); Thu, 20 Sep 2018 21:04:13 -0400 Received: by mail-pf1-f195.google.com with SMTP id h79-v6so4819552pfk.8 for ; Thu, 20 Sep 2018 12:19:14 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=uTB54otE2bw7+61Z1ydJwtI+Yieov8luc9OYgjIrcXA=; b=WUQ0uZFcXUG+ptQG1hM1mvLSSw8ztr5gWHMqB8hcRD8P2UN2i8ljbHdifLPfUBChp5 OYMIAUQ6nHbBOe6fQErxDw2qMnTrmBpQe8ac91f0gLSP8yzo1fqMR/PWVExT5AiUATc5 MMLM7rOh/njpIcjzGQ9rzlLD6lv6X7BVnGe70= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=uTB54otE2bw7+61Z1ydJwtI+Yieov8luc9OYgjIrcXA=; b=DtJ7zguf0Mgv5tiriMTriqOzhkK7FGxJEM6oIv74ueI6zADQzQI1rihkXHO82Qs9V1 /uQN1w4ffmQzz8xKGjJlV45lsVcbYVWhgO/Dd1ztk+pZ+pZmxkvfA6u0100hUKBcmKD6 E+Cbxfv8Crn6xcVy+V5wiZu1oIMhzsj+CKpX3Wj5Y8HONOzzRy1OdZiQFMd3KBs8pY1C xXNi6NEmQXxpyI2NfSrljSl1au2VqXWVAVMFmKVPvdwj3UsZCGOH/4ql6LhTdW9nqTmQ oDtlTx4tr0Uu6SOBDnggdVGooP3Qb7Roj/laNSXAlXejcWJzhBks/CYRBY+e7awtMfcr F1/Q== X-Gm-Message-State: APzg51C7XPacmAuKznKspZaX+FC76kECieNfIXnDbWT03+/DbcyJ5xgG 0EbSMH6rQDcuV6awQ7lP1M0BoblyrBU= X-Received: by 2002:a65:58c3:: with SMTP id e3-v6mr3248965pgu.117.1537471153782; Thu, 20 Sep 2018 12:19:13 -0700 (PDT) Received: from localhost.localdomain ([209.121.128.187]) by smtp.gmail.com with ESMTPSA id k13-v6sm4424443pgf.37.2018.09.20.12.19.12 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 20 Sep 2018 12:19:12 -0700 (PDT) From: Mathieu Poirier To: gregkh@linuxfoundation.org Cc: linux-kernel@vger.kernel.org Subject: [PATCH 34/44] coresight: etb10: Handle errors enabling the device Date: Thu, 20 Sep 2018 13:18:09 -0600 Message-Id: <1537471099-19781-35-git-send-email-mathieu.poirier@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1537471099-19781-1-git-send-email-mathieu.poirier@linaro.org> References: <1537471099-19781-1-git-send-email-mathieu.poirier@linaro.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Suzuki K Poulose Prepare the etb10 driver to return errors in enabling the device. Cc: Mathieu Poirier Signed-off-by: Suzuki K Poulose Signed-off-by: Mathieu Poirier --- drivers/hwtracing/coresight/coresight-etb10.c | 18 +++++++++++++----- 1 file changed, 13 insertions(+), 5 deletions(-) -- 2.7.4 diff --git a/drivers/hwtracing/coresight/coresight-etb10.c b/drivers/hwtracing/coresight/coresight-etb10.c index 08fa660098f8..824be0c5f592 100644 --- a/drivers/hwtracing/coresight/coresight-etb10.c +++ b/drivers/hwtracing/coresight/coresight-etb10.c @@ -106,7 +106,7 @@ static unsigned int etb_get_buffer_depth(struct etb_drvdata *drvdata) return depth; } -static void etb_enable_hw(struct etb_drvdata *drvdata) +static void __etb_enable_hw(struct etb_drvdata *drvdata) { int i; u32 depth; @@ -134,6 +134,12 @@ static void etb_enable_hw(struct etb_drvdata *drvdata) CS_LOCK(drvdata->base); } +static int etb_enable_hw(struct etb_drvdata *drvdata) +{ + __etb_enable_hw(drvdata); + return 0; +} + static int etb_enable_sysfs(struct coresight_device *csdev) { int ret = 0; @@ -152,8 +158,9 @@ static int etb_enable_sysfs(struct coresight_device *csdev) if (drvdata->mode == CS_MODE_SYSFS) goto out; - drvdata->mode = CS_MODE_SYSFS; - etb_enable_hw(drvdata); + ret = etb_enable_hw(drvdata); + if (!ret) + drvdata->mode = CS_MODE_SYSFS; out: spin_unlock_irqrestore(&drvdata->spinlock, flags); @@ -183,8 +190,9 @@ static int etb_enable_perf(struct coresight_device *csdev, void *data) if (ret) goto out; - drvdata->mode = CS_MODE_PERF; - etb_enable_hw(drvdata); + ret = etb_enable_hw(drvdata); + if (!ret) + drvdata->mode = CS_MODE_PERF; out: spin_unlock_irqrestore(&drvdata->spinlock, flags); From patchwork Thu Sep 20 19:18:10 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mathieu Poirier X-Patchwork-Id: 147161 Delivered-To: patch@linaro.org Received: by 2002:a2e:1648:0:0:0:0:0 with SMTP id 8-v6csp2377592ljw; Thu, 20 Sep 2018 12:20:11 -0700 (PDT) X-Google-Smtp-Source: ANB0VdYhvYnA6Z7tDFHbuLLGU5Yq35fMT2UlJdmjrV0Y50bNOVOwGcUBZVU5cCRqgGBx35HaaRdg X-Received: by 2002:a63:2022:: with SMTP id g34-v6mr39076845pgg.235.1537471211207; Thu, 20 Sep 2018 12:20:11 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1537471211; cv=none; d=google.com; s=arc-20160816; b=F2edQxRNlZlBl1MmJcKwlWzeqF9Hm9hLU+rS2uZye2S6OlGa9EPlpJro/XUAcRyL+g 4jfIiXKn9MxvYNrnL5nqoB7MjYy4H4Quz2nqcc7F+H18ALKx15LVY7y1+0aO5uyi5eGJ JuMngxd/zfQX2wP5YO3dhNaXO8ZCpfz1T07TrctL3a4EkTLVAA5VHVv0pqQTFd/zdit0 IjVrx2yeJZCR3WXiBM7CQfMmCMX0n7XVNVZ8e58fzeH0Ad4kivA+Zj9trbEWMSLDrtyE Ul9AX79v4ZEpWlNDnlvp5lM7qgE1BGqSWtJDCDw07WP3bJpYoezVbVTF67FWqTITxMmR G1fA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature; bh=nThcwxyyvT+dxtp2XwfLgsk1SXb+AwYpYqhOiuz4UJY=; b=0reYXRKDzkXfDQCSP7VAMuMeCk0LzLjraEzrMKZUA0RM5zIIYx8CPl8fB7HwjV/q68 cl+T13XHctzYPkLCopgbYAbP4LIE2D6sfvgX8ID6JtmVU4ZBBnk+FccBTeyGAqPo3bvh w2+60rFt4oFxR2MsvxRd3yhepY2ER602L/7XSnA641EeOTv1EvKNW6E0PwkuU8g/Sw4w 0ItvAuQ6yU8Urd9MsyTb7MrkvzBd6CFxS91HdjRvb3xXypokYwg+lMMLBdT4d4VAQVV5 z60IX1b9G3xfFOZPgndTJPQokzDloxw23iQTEreia9SxqXmdQQDflsq/77ySF7Kkuphi jtxQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=PDw6ejHT; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id u10-v6si23815456plr.58.2018.09.20.12.20.10; Thu, 20 Sep 2018 12:20:11 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=PDw6ejHT; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2389062AbeIUBER (ORCPT + 32 others); Thu, 20 Sep 2018 21:04:17 -0400 Received: from mail-pl1-f195.google.com ([209.85.214.195]:37458 "EHLO mail-pl1-f195.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2388558AbeIUBEO (ORCPT ); Thu, 20 Sep 2018 21:04:14 -0400 Received: by mail-pl1-f195.google.com with SMTP id q5-v6so1323463pli.4 for ; Thu, 20 Sep 2018 12:19:15 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=nThcwxyyvT+dxtp2XwfLgsk1SXb+AwYpYqhOiuz4UJY=; b=PDw6ejHT77dGv7IA9r4zrNG67uzeGLYsVDzLyJokTVXPGLah4uGW5mT+sCd1GZkaT5 /jGWrMSGmZq+/yGcDkhCei5zkCZLG/ggfzC5XSBgD4XZXno9iHBMJ0iOu9uBS47Gymcl mtS6WIbkqyMFZi6Cd61bPQwAVs7xw+1kINvt8= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=nThcwxyyvT+dxtp2XwfLgsk1SXb+AwYpYqhOiuz4UJY=; b=syIpdKBqF0cHoh8NesAc1tLxzUX4gPkwQxK7ca/y4QFsHqPeW5qvEI4lnlm1ev1wj6 LbXY6JmU1khPlFIP+FQ3v8uz+tU/j9kBwVvqrr51UJS1ZH1eunQCdZSNj5N2D4NvsyVb IW/Jce8gW3EGXvVAbADQ8LgDYhkP4AxZefSedpxWyO2FGseOg4UiXRIX4bNVY1AYlgfO W4HzZhcC8X+Y5pvytgHkO7HiTvmRMf7wm/nSHCpzvmgeCk3PTnvha/Gd2a01FmAcyU7O qYvN+Xp7vqrsOzDgoMlpbu1Hn3zWLFeC0+nk+L6yOkUBOCDts1sDsi/apiQMgbBMq7ku Madw== X-Gm-Message-State: APzg51ACjnVJHMVItVm4QbZh8G2uJGO3KYrugdv2XYjKsDiYUFHHflx7 3lo3o1Hn5IOC3mqyqPhUZCXV2w== X-Received: by 2002:a17:902:bd07:: with SMTP id p7-v6mr40068448pls.32.1537471155181; Thu, 20 Sep 2018 12:19:15 -0700 (PDT) Received: from localhost.localdomain ([209.121.128.187]) by smtp.gmail.com with ESMTPSA id k13-v6sm4424443pgf.37.2018.09.20.12.19.13 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 20 Sep 2018 12:19:14 -0700 (PDT) From: Mathieu Poirier To: gregkh@linuxfoundation.org Cc: linux-kernel@vger.kernel.org Subject: [PATCH 35/44] coresight: dynamic-replicator: Handle multiple connections Date: Thu, 20 Sep 2018 13:18:10 -0600 Message-Id: <1537471099-19781-36-git-send-email-mathieu.poirier@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1537471099-19781-1-git-send-email-mathieu.poirier@linaro.org> References: <1537471099-19781-1-git-send-email-mathieu.poirier@linaro.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Suzuki K Poulose When a replicator port is enabled, we block the traffic on the other port and route all traffic to the new enabled port. If there are two active trace sessions each targeting the two different paths from the replicator, the second session will disable the first session and route all the data to the second path. ETR / e.g, replicator \ ETB If CPU0 is operated in sysfs mode to ETR and CPU1 is operated in perf mode to ETB, depending on the order in which the replicator is enabled one device is blocked. Ideally we need trace-id for the session to make the right choice. That implies we need a trace-id allocation logic for the coresight subsystem and use that to route the traffic. The short term solution is to only manage the "target port" and leave the other port untouched. That leaves both the paths unaffected, except that some unwanted traffic may be pushed to the paths (if the Trace-IDs are not far enough), which is still fine and can be filtered out while processing rather than silently blocking the data. Cc: Mathieu Poirier Signed-off-by: Suzuki K Poulose Signed-off-by: Mathieu Poirier --- .../coresight/coresight-dynamic-replicator.c | 64 ++++++++++++++++------ 1 file changed, 47 insertions(+), 17 deletions(-) -- 2.7.4 diff --git a/drivers/hwtracing/coresight/coresight-dynamic-replicator.c b/drivers/hwtracing/coresight/coresight-dynamic-replicator.c index ebb80438f6a5..97f4673452cb 100644 --- a/drivers/hwtracing/coresight/coresight-dynamic-replicator.c +++ b/drivers/hwtracing/coresight/coresight-dynamic-replicator.c @@ -34,26 +34,42 @@ struct replicator_state { struct coresight_device *csdev; }; +/* + * replicator_reset : Reset the replicator configuration to sane values. + */ +static void replicator_reset(struct replicator_state *drvdata) +{ + CS_UNLOCK(drvdata->base); + + writel_relaxed(0xff, drvdata->base + REPLICATOR_IDFILTER0); + writel_relaxed(0xff, drvdata->base + REPLICATOR_IDFILTER1); + + CS_LOCK(drvdata->base); +} + static int replicator_enable(struct coresight_device *csdev, int inport, int outport) { + u32 reg; struct replicator_state *drvdata = dev_get_drvdata(csdev->dev.parent); + switch (outport) { + case 0: + reg = REPLICATOR_IDFILTER0; + break; + case 1: + reg = REPLICATOR_IDFILTER1; + break; + default: + WARN_ON(1); + return -EINVAL; + } + CS_UNLOCK(drvdata->base); - /* - * Ensure that the other port is disabled - * 0x00 - passing through the replicator unimpeded - * 0xff - disable (or impede) the flow of ATB data - */ - if (outport == 0) { - writel_relaxed(0x00, drvdata->base + REPLICATOR_IDFILTER0); - writel_relaxed(0xff, drvdata->base + REPLICATOR_IDFILTER1); - } else { - writel_relaxed(0x00, drvdata->base + REPLICATOR_IDFILTER1); - writel_relaxed(0xff, drvdata->base + REPLICATOR_IDFILTER0); - } + /* Ensure that the outport is enabled. */ + writel_relaxed(0x00, drvdata->base + reg); CS_LOCK(drvdata->base); dev_dbg(drvdata->dev, "REPLICATOR enabled\n"); @@ -63,15 +79,25 @@ static int replicator_enable(struct coresight_device *csdev, int inport, static void replicator_disable(struct coresight_device *csdev, int inport, int outport) { + u32 reg; struct replicator_state *drvdata = dev_get_drvdata(csdev->dev.parent); + switch (outport) { + case 0: + reg = REPLICATOR_IDFILTER0; + break; + case 1: + reg = REPLICATOR_IDFILTER1; + break; + default: + WARN_ON(1); + return; + } + CS_UNLOCK(drvdata->base); /* disable the flow of ATB data through port */ - if (outport == 0) - writel_relaxed(0xff, drvdata->base + REPLICATOR_IDFILTER0); - else - writel_relaxed(0xff, drvdata->base + REPLICATOR_IDFILTER1); + writel_relaxed(0xff, drvdata->base + reg); CS_LOCK(drvdata->base); @@ -156,7 +182,11 @@ static int replicator_probe(struct amba_device *adev, const struct amba_id *id) desc.groups = replicator_groups; drvdata->csdev = coresight_register(&desc); - return PTR_ERR_OR_ZERO(drvdata->csdev); + if (!IS_ERR(drvdata->csdev)) { + replicator_reset(drvdata); + return 0; + } + return PTR_ERR(drvdata->csdev); } #ifdef CONFIG_PM From patchwork Thu Sep 20 19:18:11 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mathieu Poirier X-Patchwork-Id: 147153 Delivered-To: patch@linaro.org Received: by 2002:a2e:1648:0:0:0:0:0 with SMTP id 8-v6csp2376783ljw; Thu, 20 Sep 2018 12:19:20 -0700 (PDT) X-Google-Smtp-Source: ANB0VdYXoh9JlMqv32BiFRzrAi1nfpgDQKMY0vflFWOxLNdjljn8nnl0oLoSEiEB1pCr18T6UFjI X-Received: by 2002:a62:3545:: with SMTP id c66-v6mr42357665pfa.63.1537471160825; Thu, 20 Sep 2018 12:19:20 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1537471160; cv=none; d=google.com; s=arc-20160816; b=zn4PWOnDQNbMTnrHsE2foIiKU/pUBX58qNS220ukzdmRHIGQ1eYHnm6B7dmo5XQJe1 EyaM4MKLBdhTT5gYUvJji8/FPNfbl8rypBfgInP1lSvJa4kgdsiia4Fb4ztQf9MGztrP U5SPSeG78dHNL/aP1TxAMOb+0OdcuvbYiW110zk895XSqID/paOb4zEpBo5LRYNnIcol 9eOGO7yZ+zGz1IYQDPhPJONdze/91FBk1fSCujT+ZpdH1ck4R79Sfnt+kfyaZtpKkD9v Rp+kXLMXVU1WW4SAO2vsZ8iyoFYmzIDpt90y9KTBTzGZzGYdYRR+ctTNCsr+R8VV+Q12 cExQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature; bh=XYoLsNZfR03NjVkAKkp/jGU/bTSOzZPT2U9//grQAEE=; b=aXOYXB6TMz8yjJKeYhxLK7U63Px+lV+v8AOBM/PeDC1ItIqGc9cjLTGhSK+0sEdR8Y YhiZDGLYNpy4A0PhX2aVONvgLVNKYSlLDVluovh4gaQsDGgIW7fDJXDQZy95ACNRC2t7 zeDZxUEXM0kXbvAJqYzBKN3s4BySo8KULIaC//UMVOi6ie6BJnyIEvAf4O03L99ChKJo 1rrrVAUU1NxzCQEh267eJ+tHbcZHaTpIsOGuLgTCoRPDNIE0K7tlnFQcdQIm8gISoXGu GXs+AXOy4JUzzclB0oBZwzh7NS0lJrvbg3f8A3ywAeqPQ53SBsczvcPOuLczoI8m5TqL zk/A== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=kzF8OFIE; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id n8-v6si24491134pgl.101.2018.09.20.12.19.20; Thu, 20 Sep 2018 12:19:20 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=kzF8OFIE; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2389073AbeIUBER (ORCPT + 32 others); Thu, 20 Sep 2018 21:04:17 -0400 Received: from mail-pl1-f194.google.com ([209.85.214.194]:37462 "EHLO mail-pl1-f194.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2388518AbeIUBEP (ORCPT ); Thu, 20 Sep 2018 21:04:15 -0400 Received: by mail-pl1-f194.google.com with SMTP id q5-v6so1323495pli.4 for ; Thu, 20 Sep 2018 12:19:16 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=XYoLsNZfR03NjVkAKkp/jGU/bTSOzZPT2U9//grQAEE=; b=kzF8OFIE3qtMuejYaqTvZvL95QYKOlQZrKK0uIFM9dhVnqAohTiniPi63WKR/L4rXZ 8ftWAmzB7wE8tzhg88XaTWaEzQG01u1WpXMQvsfWwBOJ6rf7pYv1Tq/SJrowH0y87S/2 i942xsdc98ln3Gw7RtqOwvNja2yIw3cSbug9A= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=XYoLsNZfR03NjVkAKkp/jGU/bTSOzZPT2U9//grQAEE=; b=klKjpeI70OwiX3glbq8mSxUCBqdZGEW9Q/2Qa6trO3qWs488fO/ppMX89U2Kr3a9ke DbLqrAmG+rSMntP0WB7SHLBU7uDIkrjXT8fqa+HAaAyN2DaRkrS3JstXvTtxrUxIfRTL RzOsAvHY2j0UnKsIKXeA6jak08bIqgUGVgYizjOWAfwjIUp8JW0RbXgmEGDQ43OTIhEV F9CgOQ3SRXsbf2bT3KW6xQ2JvAB5BxlzFic7uRtj/6id1T/wPUqAu29Ww0U+Jh2YvU3O qRwV944srOb8167mbf+iWmpFHQX+KaVpRFnosjBHd1Q0U+3cnZfOClbYiQiioPMHmEFu celg== X-Gm-Message-State: APzg51AdZpf+u8LzOGpaeaf0YLjQ+yVSW37+qpSZxQ4t8iaYPxoZJqiP dk7T+9zMNG/X/srGIqS0nAUo0Y1Ku5o= X-Received: by 2002:a17:902:a715:: with SMTP id w21-v6mr40817654plq.61.1537471156580; Thu, 20 Sep 2018 12:19:16 -0700 (PDT) Received: from localhost.localdomain ([209.121.128.187]) by smtp.gmail.com with ESMTPSA id k13-v6sm4424443pgf.37.2018.09.20.12.19.15 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 20 Sep 2018 12:19:15 -0700 (PDT) From: Mathieu Poirier To: gregkh@linuxfoundation.org Cc: linux-kernel@vger.kernel.org Subject: [PATCH 36/44] coresight: Add support for CLAIM tag protocol Date: Thu, 20 Sep 2018 13:18:11 -0600 Message-Id: <1537471099-19781-37-git-send-email-mathieu.poirier@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1537471099-19781-1-git-send-email-mathieu.poirier@linaro.org> References: <1537471099-19781-1-git-send-email-mathieu.poirier@linaro.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Suzuki K Poulose Coresight architecture defines CLAIM tags for a device to negotiate control of the components (external agent vs self-hosted). Each device has a pair of registers (CLAIMSET & CLAIMCLR) for managing the CLAIM tags. However, the protocol for the CLAIM tags is IMPLEMENTATION DEFINED. PSCI has recommendations for the use of the CLAIM tags to negotiate controls for external agent vs self-hosted use. This patch implements the recommended protocol by PSCI. The claim/disclaim operations are performed from the device specific drivers. The disadvantage is that the calls are sprinkled in each driver, but this makes the operation much simpler. Cc: Mathieu Poirier Signed-off-by: Suzuki K Poulose Signed-off-by: Mathieu Poirier --- drivers/hwtracing/coresight/coresight-priv.h | 7 +++ drivers/hwtracing/coresight/coresight.c | 86 ++++++++++++++++++++++++++++ include/linux/coresight.h | 20 +++++++ 3 files changed, 113 insertions(+) -- 2.7.4 diff --git a/drivers/hwtracing/coresight/coresight-priv.h b/drivers/hwtracing/coresight/coresight-priv.h index c11da5564a67..579f34943bf1 100644 --- a/drivers/hwtracing/coresight/coresight-priv.h +++ b/drivers/hwtracing/coresight/coresight-priv.h @@ -25,6 +25,13 @@ #define CORESIGHT_DEVID 0xfc8 #define CORESIGHT_DEVTYPE 0xfcc + +/* + * Coresight device CLAIM protocol. + * See PSCI - ARM DEN 0022D, Section: 6.8.1 Debug and Trace save and restore. + */ +#define CORESIGHT_CLAIM_SELF_HOSTED BIT(1) + #define TIMEOUT_US 100 #define BMVAL(val, lsb, msb) ((val & GENMASK(msb, lsb)) >> lsb) diff --git a/drivers/hwtracing/coresight/coresight.c b/drivers/hwtracing/coresight/coresight.c index f4f50753cf75..2b0df1a0a8df 100644 --- a/drivers/hwtracing/coresight/coresight.c +++ b/drivers/hwtracing/coresight/coresight.c @@ -128,6 +128,92 @@ static int coresight_find_link_outport(struct coresight_device *csdev, return -ENODEV; } +static inline u32 coresight_read_claim_tags(void __iomem *base) +{ + return readl_relaxed(base + CORESIGHT_CLAIMCLR); +} + +static inline bool coresight_is_claimed_self_hosted(void __iomem *base) +{ + return coresight_read_claim_tags(base) == CORESIGHT_CLAIM_SELF_HOSTED; +} + +static inline bool coresight_is_claimed_any(void __iomem *base) +{ + return coresight_read_claim_tags(base) != 0; +} + +static inline void coresight_set_claim_tags(void __iomem *base) +{ + writel_relaxed(CORESIGHT_CLAIM_SELF_HOSTED, base + CORESIGHT_CLAIMSET); + isb(); +} + +static inline void coresight_clear_claim_tags(void __iomem *base) +{ + writel_relaxed(CORESIGHT_CLAIM_SELF_HOSTED, base + CORESIGHT_CLAIMCLR); + isb(); +} + +/* + * coresight_claim_device_unlocked : Claim the device for self-hosted usage + * to prevent an external tool from touching this device. As per PSCI + * standards, section "Preserving the execution context" => "Debug and Trace + * save and Restore", DBGCLAIM[1] is reserved for Self-hosted debug/trace and + * DBGCLAIM[0] is reserved for external tools. + * + * Called with CS_UNLOCKed for the component. + * Returns : 0 on success + */ +int coresight_claim_device_unlocked(void __iomem *base) +{ + if (coresight_is_claimed_any(base)) + return -EBUSY; + + coresight_set_claim_tags(base); + if (coresight_is_claimed_self_hosted(base)) + return 0; + /* There was a race setting the tags, clean up and fail */ + coresight_clear_claim_tags(base); + return -EBUSY; +} + +int coresight_claim_device(void __iomem *base) +{ + int rc; + + CS_UNLOCK(base); + rc = coresight_claim_device_unlocked(base); + CS_LOCK(base); + + return rc; +} + +/* + * coresight_disclaim_device_unlocked : Clear the claim tags for the device. + * Called with CS_UNLOCKed for the component. + */ +void coresight_disclaim_device_unlocked(void __iomem *base) +{ + + if (coresight_is_claimed_self_hosted(base)) + coresight_clear_claim_tags(base); + else + /* + * The external agent may have not honoured our claim + * and has manipulated it. Or something else has seriously + * gone wrong in our driver. + */ + WARN_ON_ONCE(1); +} + +void coresight_disclaim_device(void __iomem *base) +{ + CS_UNLOCK(base); + coresight_disclaim_device_unlocked(base); + CS_LOCK(base); +} + static int coresight_enable_sink(struct coresight_device *csdev, u32 mode, void *data) { diff --git a/include/linux/coresight.h b/include/linux/coresight.h index 53535821dc25..46c67a764877 100644 --- a/include/linux/coresight.h +++ b/include/linux/coresight.h @@ -257,6 +257,13 @@ extern int coresight_enable(struct coresight_device *csdev); extern void coresight_disable(struct coresight_device *csdev); extern int coresight_timeout(void __iomem *addr, u32 offset, int position, int value); + +extern int coresight_claim_device(void __iomem *base); +extern int coresight_claim_device_unlocked(void __iomem *base); + +extern void coresight_disclaim_device(void __iomem *base); +extern void coresight_disclaim_device_unlocked(void __iomem *base); + #else static inline struct coresight_device * coresight_register(struct coresight_desc *desc) { return NULL; } @@ -266,6 +273,19 @@ coresight_enable(struct coresight_device *csdev) { return -ENOSYS; } static inline void coresight_disable(struct coresight_device *csdev) {} static inline int coresight_timeout(void __iomem *addr, u32 offset, int position, int value) { return 1; } +static inline int coresight_claim_device_unlocked(void __iomem *base) +{ + return -EINVAL; +} + +static inline int coresight_claim_device(void __iomem *base) +{ + return -EINVAL; +} + +static inline void coresight_disclaim_device(void __iomem *base) {} +static inline void coresight_disclaim_device_unlocked(void __iomem *base) {} + #endif #ifdef CONFIG_OF From patchwork Thu Sep 20 19:18:12 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mathieu Poirier X-Patchwork-Id: 147162 Delivered-To: patch@linaro.org Received: by 2002:a2e:1648:0:0:0:0:0 with SMTP id 8-v6csp2377604ljw; Thu, 20 Sep 2018 12:20:11 -0700 (PDT) X-Google-Smtp-Source: ANB0VdZB6TojDsknxoYcPVFFYjSW9twYM17cl/zgfAtYZts6nwn9vVa8Tl6Qqcxn9rMGWu/bKtho X-Received: by 2002:a62:591a:: with SMTP id n26-v6mr42790565pfb.94.1537471211589; Thu, 20 Sep 2018 12:20:11 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1537471211; cv=none; d=google.com; s=arc-20160816; b=cl1h8LKHq8oDd8kpCXhcLpxmJQfPTAm9YIqIG/PYS3GE6NiQufdACIspvE4HylM4z6 Tr6AlLRC9s0e1WMgXNlsdb+q0qj0CpuzHoy7w8OYfcR8Rj7ULjk7DtOnZHot/Cjpzkj7 4XVuYW7UET0VlVejyiiHK4Sg4GLAX4y3OCt9/Xl+Mi+Qy4oGeYew5hbY9pCsIVNMk0YH lcWivJF7r9f3eQEUbVdeDkC8Dq8B9qVEnOPO8lTazE41XNUrhX0vk8OObxm3ZLx5mgmb ymJP+xUXjvKwtqR2B1vzDCQS1290FqY1FF0UTifQtJQxOAJ+Q+5QzDANREjRoO1gILQo 7HMQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature; bh=JqAqiFp39e/iP5YLkBuDUIuE6G94xqJ7+L+i9J0h7x8=; b=0QiNdmnT1IzTGZn7tW0N8k9eEyyWxDjA/j0UApXhujE/+IhZCaRbvt9TyQ3JKhH6dS BvBeZFvggNyLjxgM0DyaDZMziYxD44FdZU/UbtJa335aZK5O1iu+Cr3GGRjhF6sV6V6W JG7/VD7ZfD0s+LAgkbKeaLbKXdV4/vsyd6r+RBi57bC7lrs29jkkiCoKV3q1qY2i9IIh TYf0DQ776Q1ixRY8rdiu8TL/xDzIpbeaMHNVwehFLB8DOVr8OY53aVgnWvqwAROMzLIh yfV71l7yOlZtYhakI2ok7wvbWaxZzgT6JH0NFmFbym4E+2HntAjlUC6+J23Dn3+IBB7h UAAg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=ZREsNBHP; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id u10-v6si23815456plr.58.2018.09.20.12.20.11; Thu, 20 Sep 2018 12:20:11 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=ZREsNBHP; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2389164AbeIUBFI (ORCPT + 32 others); Thu, 20 Sep 2018 21:05:08 -0400 Received: from mail-pl1-f195.google.com ([209.85.214.195]:40222 "EHLO mail-pl1-f195.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2389061AbeIUBER (ORCPT ); Thu, 20 Sep 2018 21:04:17 -0400 Received: by mail-pl1-f195.google.com with SMTP id s17-v6so4791732plp.7 for ; Thu, 20 Sep 2018 12:19:18 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=JqAqiFp39e/iP5YLkBuDUIuE6G94xqJ7+L+i9J0h7x8=; b=ZREsNBHPIopn3W51dQ9fgFBIBaMd3Za5CZQ+FzL3lGOdHBFP7KLR0RMZJbMkQa2KXy mjmmrWxOgEA9iUYBfMh1ccm+5zDBI/p20CqtmFBPfaLl+Vo0fGB9HT8yWduXf1fXHJA5 S6TGZcsIKQoNGsUl0AmernAR0cEQ6VbMDPb30= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=JqAqiFp39e/iP5YLkBuDUIuE6G94xqJ7+L+i9J0h7x8=; b=m1jYPUws43/1G7TvGDUWeImbGvFHmQ29E7a+vaplDLLIgGY58SmEXgQCwOqPzocFA8 /Ym7HYOiuOiKrDbiwBhSg2qahrdcAl1zgJMbuMkfRZgY0AtlFqcJ8GuTX3c5JR7ItC4t hlq5sy4EzzATcJjBSmYnuuFf2raEublUTDE1+JOygwF0E+wLfYnvGIhTCCXCbbHC59Gw 1mlnGaIXyV6/l9i1j2sCj5D0LVFN4EladZK5EOq6l3oSm1V+Ddet+C3hwyI4fATfqhJl q3rlUVfM92zMlaamqTj0HOKkUjwKxJzqnJLP98zoacFJyEmJic01t9AdC6pvff3XJ3mL zOCA== X-Gm-Message-State: APzg51Dk0IKjvyaDc5ICd2LCYc4ln61KOSHZdLD2t6TcMC4p6Se5Drr3 YThAC0hqOJkXtXXkbgVdVRWtRA== X-Received: by 2002:a17:902:2006:: with SMTP id n6-v6mr40066103pla.325.1537471158027; Thu, 20 Sep 2018 12:19:18 -0700 (PDT) Received: from localhost.localdomain ([209.121.128.187]) by smtp.gmail.com with ESMTPSA id k13-v6sm4424443pgf.37.2018.09.20.12.19.16 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 20 Sep 2018 12:19:17 -0700 (PDT) From: Mathieu Poirier To: gregkh@linuxfoundation.org Cc: linux-kernel@vger.kernel.org Subject: [PATCH 37/44] coresight: etmx: Claim devices before use Date: Thu, 20 Sep 2018 13:18:12 -0600 Message-Id: <1537471099-19781-38-git-send-email-mathieu.poirier@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1537471099-19781-1-git-send-email-mathieu.poirier@linaro.org> References: <1537471099-19781-1-git-send-email-mathieu.poirier@linaro.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Suzuki K Poulose Use the CLAIM tags to grab the device for self-hosted usage. Cc: Mathieu Poirier Signed-off-by: Suzuki K Poulose Signed-off-by: Mathieu Poirier --- drivers/hwtracing/coresight/coresight-etm3x.c | 16 +++++++++++++--- drivers/hwtracing/coresight/coresight-etm4x.c | 14 +++++++++++--- 2 files changed, 24 insertions(+), 6 deletions(-) -- 2.7.4 diff --git a/drivers/hwtracing/coresight/coresight-etm3x.c b/drivers/hwtracing/coresight/coresight-etm3x.c index 206c2381a11a..fd5c4cca7db5 100644 --- a/drivers/hwtracing/coresight/coresight-etm3x.c +++ b/drivers/hwtracing/coresight/coresight-etm3x.c @@ -357,7 +357,7 @@ static int etm_parse_event_config(struct etm_drvdata *drvdata, static int etm_enable_hw(struct etm_drvdata *drvdata) { - int i; + int i, rc; u32 etmcr; struct etm_config *config = &drvdata->config; @@ -369,6 +369,9 @@ static int etm_enable_hw(struct etm_drvdata *drvdata) etm_set_pwrup(drvdata); /* Make sure all registers are accessible */ etm_os_unlock(drvdata); + rc = coresight_claim_device_unlocked(drvdata->base); + if (rc) + goto done; etm_set_prog(drvdata); @@ -417,10 +420,15 @@ static int etm_enable_hw(struct etm_drvdata *drvdata) etm_writel(drvdata, 0x0, ETMVMIDCVR); etm_clr_prog(drvdata); + +done: + if (rc) + etm_set_pwrdwn(drvdata); CS_LOCK(drvdata->base); - dev_dbg(drvdata->dev, "cpu: %d enable smp call done\n", drvdata->cpu); - return 0; + dev_dbg(drvdata->dev, "cpu: %d enable smp call done: %d\n", + drvdata->cpu, rc); + return rc; } struct etm_enable_arg { @@ -569,6 +577,8 @@ static void etm_disable_hw(void *info) for (i = 0; i < drvdata->nr_cntr; i++) config->cntr_val[i] = etm_readl(drvdata, ETMCNTVRn(i)); + coresight_disclaim_device_unlocked(drvdata->base); + etm_set_pwrdwn(drvdata); CS_LOCK(drvdata->base); diff --git a/drivers/hwtracing/coresight/coresight-etm4x.c b/drivers/hwtracing/coresight/coresight-etm4x.c index 064e0bfaefd0..53e2fb6e86f6 100644 --- a/drivers/hwtracing/coresight/coresight-etm4x.c +++ b/drivers/hwtracing/coresight/coresight-etm4x.c @@ -85,13 +85,17 @@ struct etm4_enable_arg { static int etm4_enable_hw(struct etmv4_drvdata *drvdata) { - int i; + int i, rc; struct etmv4_config *config = &drvdata->config; CS_UNLOCK(drvdata->base); etm4_os_unlock(drvdata); + rc = coresight_claim_device_unlocked(drvdata->base); + if (rc) + goto done; + /* Disable the trace unit before programming trace registers */ writel_relaxed(0, drvdata->base + TRCPRGCTLR); @@ -179,10 +183,12 @@ static int etm4_enable_hw(struct etmv4_drvdata *drvdata) dev_err(drvdata->dev, "timeout while waiting for Idle Trace Status\n"); +done: CS_LOCK(drvdata->base); - dev_dbg(drvdata->dev, "cpu: %d enable smp call done\n", drvdata->cpu); - return 0; + dev_dbg(drvdata->dev, "cpu: %d enable smp call done: %d\n", + drvdata->cpu, rc); + return rc; } static void etm4_enable_hw_smp_call(void *info) @@ -342,6 +348,8 @@ static void etm4_disable_hw(void *info) isb(); writel_relaxed(control, drvdata->base + TRCPRGCTLR); + coresight_disclaim_device_unlocked(drvdata->base); + CS_LOCK(drvdata->base); dev_dbg(drvdata->dev, "cpu: %d disable smp call done\n", drvdata->cpu); From patchwork Thu Sep 20 19:18:13 2018 Content-Type: text/plain; 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[209.132.180.67]) by mx.google.com with ESMTP id v10-v6si24194882pfe.173.2018.09.20.12.19.23; Thu, 20 Sep 2018 12:19:23 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=jSaZ0Es6; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2389086AbeIUBET (ORCPT + 32 others); Thu, 20 Sep 2018 21:04:19 -0400 Received: from mail-pl1-f195.google.com ([209.85.214.195]:38308 "EHLO mail-pl1-f195.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2388518AbeIUBES (ORCPT ); Thu, 20 Sep 2018 21:04:18 -0400 Received: by mail-pl1-f195.google.com with SMTP id u11-v6so4800515plq.5 for ; Thu, 20 Sep 2018 12:19:20 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=ZQN6xPGKIW6glHZexLLxjYGOYgPeCk+jeaAojs1cWHQ=; b=jSaZ0Es6z/aw9H1R3PsvJd0l4YafThGWssA9gwkuflwAm4dlzISK6Cy2WIJtiGe7Wy jTegSCuFh4QTKuOd7s5EGb2rxnPRMDEExWOQy/cMZ2rkt4iDjQhcZHFtbx21ZrH95Xm5 QcuCuH6qfLx981Zzo01RdvOyRuiWZGfOmAOLI= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=ZQN6xPGKIW6glHZexLLxjYGOYgPeCk+jeaAojs1cWHQ=; b=WazMdsDJCpiXtHAAlYCMygFK5/MENux4vvRbqMfj83+5hBj4QrEca2J7JCYuQMGtJh GcQ66KzZCpda9aoJBWX33Rl8LTA0KC6JbBpw4o/rUh6+5oOzbnuDooREzI02+DGHk9G2 w9Zn0GO85UuNOIynv6no1bX6M1ZTeIfH10iOGYMiyy+/ow9AZLGHCV2eQDOrB9PbOZQf pM/k12Q46nI18PuSq6c2INiARsdZDJhEHc2IIzkT48CbnfYx843wEDEXtgV9whR2Wyhn 7XFrDDLSfOfIM5l/rMbzTmuj5jYROEjzmdoV/jgsYed0d6zu/JPQUnCyJZ03+XPnTmIq 7VNw== X-Gm-Message-State: APzg51AqTFERbkqbxTwzn2tIUgkQ1g5Ox4iXv8l2lw6nwHDbqdP7gC0Y MTWCHhJAIpy5Zy1RUdiFNjhyOA== X-Received: by 2002:a17:902:724c:: with SMTP id c12-v6mr40234625pll.326.1537471159687; Thu, 20 Sep 2018 12:19:19 -0700 (PDT) Received: from localhost.localdomain ([209.121.128.187]) by smtp.gmail.com with ESMTPSA id k13-v6sm4424443pgf.37.2018.09.20.12.19.18 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 20 Sep 2018 12:19:18 -0700 (PDT) From: Mathieu Poirier To: gregkh@linuxfoundation.org Cc: linux-kernel@vger.kernel.org Subject: [PATCH 38/44] coresight: funnel: Claim devices before use Date: Thu, 20 Sep 2018 13:18:13 -0600 Message-Id: <1537471099-19781-39-git-send-email-mathieu.poirier@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1537471099-19781-1-git-send-email-mathieu.poirier@linaro.org> References: <1537471099-19781-1-git-send-email-mathieu.poirier@linaro.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Suzuki K Poulose Use the CLAIM protocol to grab the ownership of the component. Cc: Mathieu Poirier Signed-off-by: Suzuki K Poulose Signed-off-by: Mathieu Poirier --- drivers/hwtracing/coresight/coresight-funnel.c | 26 +++++++++++++++++++++----- 1 file changed, 21 insertions(+), 5 deletions(-) -- 2.7.4 diff --git a/drivers/hwtracing/coresight/coresight-funnel.c b/drivers/hwtracing/coresight/coresight-funnel.c index ee7a30bf9480..927925151509 100644 --- a/drivers/hwtracing/coresight/coresight-funnel.c +++ b/drivers/hwtracing/coresight/coresight-funnel.c @@ -25,6 +25,7 @@ #define FUNNEL_HOLDTIME_MASK 0xf00 #define FUNNEL_HOLDTIME_SHFT 0x8 #define FUNNEL_HOLDTIME (0x7 << FUNNEL_HOLDTIME_SHFT) +#define FUNNEL_ENSx_MASK 0xff /** * struct funnel_drvdata - specifics associated to a funnel component @@ -42,31 +43,42 @@ struct funnel_drvdata { unsigned long priority; }; -static void funnel_enable_hw(struct funnel_drvdata *drvdata, int port) +static int funnel_enable_hw(struct funnel_drvdata *drvdata, int port) { u32 functl; + int rc = 0; CS_UNLOCK(drvdata->base); functl = readl_relaxed(drvdata->base + FUNNEL_FUNCTL); + /* Claim the device only when we enable the first slave */ + if (!(functl & FUNNEL_ENSx_MASK)) { + rc = coresight_claim_device_unlocked(drvdata->base); + if (rc) + goto done; + } + functl &= ~FUNNEL_HOLDTIME_MASK; functl |= FUNNEL_HOLDTIME; functl |= (1 << port); writel_relaxed(functl, drvdata->base + FUNNEL_FUNCTL); writel_relaxed(drvdata->priority, drvdata->base + FUNNEL_PRICTL); - +done: CS_LOCK(drvdata->base); + return rc; } static int funnel_enable(struct coresight_device *csdev, int inport, int outport) { + int rc; struct funnel_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent); - funnel_enable_hw(drvdata, inport); + rc = funnel_enable_hw(drvdata, inport); - dev_dbg(drvdata->dev, "FUNNEL inport %d enabled\n", inport); - return 0; + if (!rc) + dev_dbg(drvdata->dev, "FUNNEL inport %d enabled\n", inport); + return rc; } static void funnel_disable_hw(struct funnel_drvdata *drvdata, int inport) @@ -79,6 +91,10 @@ static void funnel_disable_hw(struct funnel_drvdata *drvdata, int inport) functl &= ~(1 << inport); writel_relaxed(functl, drvdata->base + FUNNEL_FUNCTL); + /* Disclaim the device if none of the slaves are now active */ + if (!(functl & FUNNEL_ENSx_MASK)) + coresight_disclaim_device_unlocked(drvdata->base); + CS_LOCK(drvdata->base); } From patchwork Thu Sep 20 19:18:14 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mathieu Poirier X-Patchwork-Id: 147155 Delivered-To: patch@linaro.org Received: by 2002:a2e:1648:0:0:0:0:0 with SMTP id 8-v6csp2376854ljw; Thu, 20 Sep 2018 12:19:25 -0700 (PDT) X-Google-Smtp-Source: ANB0VdanTtVGQ6ymQaV9b/Z8l7/O9zqGGLx9vVLqZqoxLB8o6zFPcx3S3PtJ4S+VtDvkIT33cdTw X-Received: by 2002:a62:8208:: with SMTP id w8-v6mr42179198pfd.215.1537471165430; Thu, 20 Sep 2018 12:19:25 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1537471165; cv=none; d=google.com; s=arc-20160816; b=CK1dwWvyTCC8qO3S+4T6mi97s+lVAPmj0QjWzjB/i60ku4rmJ2HcC2TN4HNs0UIOiA a3ri+DF3iRrVKML4wYl214CUT22sjJYrSSu82fCKF80OcViewmQ0cmZ1+UMKmCq99LLS QoPFtHb8IJAtshfT2qjX4IWS5tO7rXwqwo0LGlGWXETer9U+0oEyXq5D5meeSMYuST8k cFb7CoOGEy6XOAAPz0hRrApTSf0PDrYBvkLHC3tHeTXtwJDnws4bWUJnK5gH1x4zSsHz CDk7/DLQ4WKux/Ep+dm/iEZUimVl7BRWfKYYhvteKNjwc6IoHSXAA7CdUlG+W5dsvRs5 yabQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature; bh=T80GjCa0DMwxYtCVqkR4Wxt15OnIR0TvjpRXiH/ixL4=; b=ik9YoZIeXNif7jJW4KpqvWL3iPJBLGSr3y3XBnnwRjNIAp3f6rAgi0epPRyrUoRkWA 9FYV8k9edwrU2eja37ZKLHMkmiuDZ3lxlfJxVXFSJXPmNe0lkUj8OV6r6zFndStTvI/7 P0RWDsUbZlbNEq1blKi9nHXzE88kqHhnO9C962tep2C+953xzD3uCpgA/nPeMuozrtw8 267K6fUYB2Z57Xehv9UQJQ1VTQfUEVtFqB4Iw+MAUdJXCEyHtY58DQMAOpUcOjJMciKJ eX0DCQP4d5X+OwG61L+14BOhwQdoC8HsstgahiW4O/5Miw5klTCSx3bd2EOD3eM7hnuz MmIw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=Pci4h3ko; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id s136-v6si26101346pfs.255.2018.09.20.12.19.25; Thu, 20 Sep 2018 12:19:25 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=Pci4h3ko; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2389100AbeIUBEU (ORCPT + 32 others); Thu, 20 Sep 2018 21:04:20 -0400 Received: from mail-pf1-f193.google.com ([209.85.210.193]:47033 "EHLO mail-pf1-f193.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2388518AbeIUBEU (ORCPT ); Thu, 20 Sep 2018 21:04:20 -0400 Received: by mail-pf1-f193.google.com with SMTP id u24-v6so4807160pfn.13 for ; Thu, 20 Sep 2018 12:19:21 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=T80GjCa0DMwxYtCVqkR4Wxt15OnIR0TvjpRXiH/ixL4=; b=Pci4h3kouhEsck8AUPW+3dRC+H1jBj+PZXIq3XUSVLm1lSioblCBJ3jw4XLOBbRSl0 zMkv+LBm5yGTSM2wbAGqHpi4PtfjDvMML8eG+PV9BIcssXkafnv2O6wZ/+P41x+kec40 rzCYZy6TJlZHwXt9wpWrUmLJRwnbnd5Gb+Z5g= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=T80GjCa0DMwxYtCVqkR4Wxt15OnIR0TvjpRXiH/ixL4=; b=dyIgYhCuiR9Xe8d2YQEwNX7gjtvAzZdCct2fZoHKpnXoyvIQk0W24tAp1DTddKzaQi m9XRsc8C4iL9boeqNvKgEGbAQ5Sy+klQJewrLutZZlm6dxgxWlsgW2AnaYue9E2QRsfi EgTCbI8KjLC5x5BKdXBbByetow2XaJd84mEMZ8TByyjrxMJw4e43K8ehoemfjyt5ftVT TOMWKVE84b4RcnXXT3M8XW8SpohrMluVu4AeeHTjxU/B5UKBzYF5z8vXiL+qSK9mcl72 Na68YF2pWofLuPbOsgnmhvqESOkGTS0F5OYcuYK1Q6/psqgcS0iUsGGLr7Nv4gXQPP47 qPeQ== X-Gm-Message-State: APzg51Dd4hhIqf9vsMPz5BjCRUss0eWfUx5hKx1F1m0HIlcC6v1do8by DzGFCWEFm8CeQs8zUOrEiJ4ZKg== X-Received: by 2002:a63:d74f:: with SMTP id w15-v6mr38338400pgi.306.1537471161180; Thu, 20 Sep 2018 12:19:21 -0700 (PDT) Received: from localhost.localdomain ([209.121.128.187]) by smtp.gmail.com with ESMTPSA id k13-v6sm4424443pgf.37.2018.09.20.12.19.19 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 20 Sep 2018 12:19:20 -0700 (PDT) From: Mathieu Poirier To: gregkh@linuxfoundation.org Cc: linux-kernel@vger.kernel.org Subject: [PATCH 39/44] coresight: catu: Claim device before use Date: Thu, 20 Sep 2018 13:18:14 -0600 Message-Id: <1537471099-19781-40-git-send-email-mathieu.poirier@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1537471099-19781-1-git-send-email-mathieu.poirier@linaro.org> References: <1537471099-19781-1-git-send-email-mathieu.poirier@linaro.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Suzuki K Poulose Use the CLAIM protocol to grab the ownership of the component when in use. Cc: Mathieu Poirier Signed-off-by: Suzuki K Poulose Signed-off-by: Mathieu Poirier --- drivers/hwtracing/coresight/coresight-catu.c | 6 ++++++ 1 file changed, 6 insertions(+) -- 2.7.4 diff --git a/drivers/hwtracing/coresight/coresight-catu.c b/drivers/hwtracing/coresight/coresight-catu.c index ff94e58845b7..170fbb66bda2 100644 --- a/drivers/hwtracing/coresight/coresight-catu.c +++ b/drivers/hwtracing/coresight/coresight-catu.c @@ -406,6 +406,7 @@ static inline int catu_wait_for_ready(struct catu_drvdata *drvdata) static int catu_enable_hw(struct catu_drvdata *drvdata, void *data) { + int rc; u32 control, mode; struct etr_buf *etr_buf = data; @@ -418,6 +419,10 @@ static int catu_enable_hw(struct catu_drvdata *drvdata, void *data) return -EBUSY; } + rc = coresight_claim_device_unlocked(drvdata->base); + if (rc) + return rc; + control |= BIT(CATU_CONTROL_ENABLE); if (etr_buf && etr_buf->mode == ETR_MODE_CATU) { @@ -459,6 +464,7 @@ static int catu_disable_hw(struct catu_drvdata *drvdata) int rc = 0; catu_write_control(drvdata, 0); + coresight_disclaim_device_unlocked(drvdata->base); if (catu_wait_for_ready(drvdata)) { dev_info(drvdata->dev, "Timeout while waiting for READY\n"); rc = -EAGAIN; From patchwork Thu Sep 20 19:18:15 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mathieu Poirier X-Patchwork-Id: 147156 Delivered-To: patch@linaro.org Received: by 2002:a2e:1648:0:0:0:0:0 with SMTP id 8-v6csp2376886ljw; Thu, 20 Sep 2018 12:19:27 -0700 (PDT) X-Google-Smtp-Source: ANB0Vda/AoQM8Qav0YwpFTVdTD7uPgQOj5cHsoYGuIeOpMk1ldYvcjqwmPEzigwIHyC47OEKTByM X-Received: by 2002:a62:3644:: with SMTP id d65-v6mr42338869pfa.133.1537471167420; Thu, 20 Sep 2018 12:19:27 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1537471167; cv=none; d=google.com; s=arc-20160816; b=U7r6xdordOrlgJybMpbxClBq4JQAia+hz2SjGtOFf2Lr9Vqwy8x5NuonWo+2KBR8Oc 5XCkU0o8leVcDCXSFBBjwAybx7XqQUcYEx20IVdM4xd57Nlw1Oir1oWtRyjFUtDRUVuP ONjsWEaLJlg63j5vR/aAF8V0yjMUP4kHL8APiLdHy2aBF6wyrrR2070Rbh3aUBRjL08j RCLrsd1YheJ89yFmpMU9zpR8KQsALxd42Qo24l509btX2YepfsGdEekAjCA/MjoRSBCx 2Zj/HWiwVf+Hs0aPI4fxZL3N/su7DEnt2XT1VO8vqdO4ktkHQsPlLljkIxK2veJI1NxA Rqxg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature; bh=jgeumEyt2vKhIehOlTB8fmQUshNYewxvGQGrAiDNIOo=; b=rZ7nPV/ZztxyYqnyijfPty6VYB1oYOa5TFbWacsWAjZyH2KVPecBzQ++QiD2Zek7eA YqBI1b/vQ4DfbvDIYBZ4nHdEbYy4BzMD9dfR7XP9z9chJhCeR2QYwQ/lImbjWFhIPxYW dIh5WV+966wjl93APLuQtOScOaM6hfWWhRvcbSalZX729OT4zn6tLCEN2HDIV+OXQVoL 0OXmqjHpxJY5Eaj+OzKrsWeciCbQU2LQ++RjSibNv7t1W/L8D+1YJ2QFK4gQixNyGiRY 4ZHh7xEGH+ZlSQS4MtW9WiOOBlyZ3NiS7Gj34szegnShLu5XsduBObpd6z+O23R0lqFV noxA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=jlBQ2yvr; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id s136-v6si26101346pfs.255.2018.09.20.12.19.27; Thu, 20 Sep 2018 12:19:27 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=jlBQ2yvr; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2389109AbeIUBEY (ORCPT + 32 others); Thu, 20 Sep 2018 21:04:24 -0400 Received: from mail-pf1-f193.google.com ([209.85.210.193]:45825 "EHLO mail-pf1-f193.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2388518AbeIUBEW (ORCPT ); Thu, 20 Sep 2018 21:04:22 -0400 Received: by mail-pf1-f193.google.com with SMTP id i26-v6so4809671pfo.12 for ; Thu, 20 Sep 2018 12:19:23 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=jgeumEyt2vKhIehOlTB8fmQUshNYewxvGQGrAiDNIOo=; b=jlBQ2yvr+9fOsWy2m0iI8eo7JeQBNX0qSYDjwtmgE77fotnyIjyC/ni2u3D7iA4Yjx o0FHs9FUWNJfwbixWhLa91Z/XGLIr89wZrBOQWIGCqUQp9dbwvs1VlewteP/vLDf9EeG CIq/6BWEE1Wgem9APqhdVb1Fq3WWiFR0iiarU= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=jgeumEyt2vKhIehOlTB8fmQUshNYewxvGQGrAiDNIOo=; b=qIm5ymi5mYQYNXkw9IAAaliOqurAxp5lHESzUrO3nGKUTJgY6nip6VLAkf1QWCW8FW t6q3zoBxylwspzfB7VE1fdlbMe11K/5x/XGASMglJ10u7U7A8X78CVJ58wCUVRuJPiJD DN1m3vGSMgJaScfAYkUZKQenRTSL9gyu8eaxuhHfHjjs5RL5UCU3S6bPveNgf2B5pb9v tm1hNZoju5ex0rQ6Wpd2UtMkFQ+nf8L38xqp3bz1q+1Vhu6EAo32bmbbwG2jdmsSz7vu 81GUG2yntAhgNbsaRi/uTY2EaNCKaY0ZeuhTDEUVZsGKHqWqv0x4AEC4xxgd+twJT4vu H6xA== X-Gm-Message-State: APzg51CsIysm/NlTViZt3XzSQHRbd2FMLTHYms5nCxFZ+MFy64BJjK3I uzPVNz8Knin3A/utP7EWev3pXCKYxRk= X-Received: by 2002:a62:6104:: with SMTP id v4-v6mr43176750pfb.122.1537471162782; Thu, 20 Sep 2018 12:19:22 -0700 (PDT) Received: from localhost.localdomain ([209.121.128.187]) by smtp.gmail.com with ESMTPSA id k13-v6sm4424443pgf.37.2018.09.20.12.19.21 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 20 Sep 2018 12:19:21 -0700 (PDT) From: Mathieu Poirier To: gregkh@linuxfoundation.org Cc: linux-kernel@vger.kernel.org Subject: [PATCH 40/44] coresight: dynamic-replicator: Claim device for use Date: Thu, 20 Sep 2018 13:18:15 -0600 Message-Id: <1537471099-19781-41-git-send-email-mathieu.poirier@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1537471099-19781-1-git-send-email-mathieu.poirier@linaro.org> References: <1537471099-19781-1-git-send-email-mathieu.poirier@linaro.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Suzuki K Poulose Use CLAIM protocol to make sure the device is available for use. Cc: Mathieu Poirier Signed-off-by: Suzuki K Poulose Signed-off-by: Mathieu Poirier --- .../coresight/coresight-dynamic-replicator.c | 23 +++++++++++++++++----- 1 file changed, 18 insertions(+), 5 deletions(-) -- 2.7.4 diff --git a/drivers/hwtracing/coresight/coresight-dynamic-replicator.c b/drivers/hwtracing/coresight/coresight-dynamic-replicator.c index 97f4673452cb..299667b887fc 100644 --- a/drivers/hwtracing/coresight/coresight-dynamic-replicator.c +++ b/drivers/hwtracing/coresight/coresight-dynamic-replicator.c @@ -41,8 +41,11 @@ static void replicator_reset(struct replicator_state *drvdata) { CS_UNLOCK(drvdata->base); - writel_relaxed(0xff, drvdata->base + REPLICATOR_IDFILTER0); - writel_relaxed(0xff, drvdata->base + REPLICATOR_IDFILTER1); + if (!coresight_claim_device_unlocked(drvdata->base)) { + writel_relaxed(0xff, drvdata->base + REPLICATOR_IDFILTER0); + writel_relaxed(0xff, drvdata->base + REPLICATOR_IDFILTER1); + coresight_disclaim_device_unlocked(drvdata->base); + } CS_LOCK(drvdata->base); } @@ -50,6 +53,7 @@ static void replicator_reset(struct replicator_state *drvdata) static int replicator_enable(struct coresight_device *csdev, int inport, int outport) { + int rc = 0; u32 reg; struct replicator_state *drvdata = dev_get_drvdata(csdev->dev.parent); @@ -67,13 +71,19 @@ static int replicator_enable(struct coresight_device *csdev, int inport, CS_UNLOCK(drvdata->base); + if ((readl_relaxed(drvdata->base + REPLICATOR_IDFILTER0) == 0xff) && + (readl_relaxed(drvdata->base + REPLICATOR_IDFILTER1) == 0xff)) + rc = coresight_claim_device_unlocked(drvdata->base); /* Ensure that the outport is enabled. */ - writel_relaxed(0x00, drvdata->base + reg); + if (!rc) { + writel_relaxed(0x00, drvdata->base + reg); + dev_dbg(drvdata->dev, "REPLICATOR enabled\n"); + } + CS_LOCK(drvdata->base); - dev_dbg(drvdata->dev, "REPLICATOR enabled\n"); - return 0; + return rc; } static void replicator_disable(struct coresight_device *csdev, int inport, @@ -99,6 +109,9 @@ static void replicator_disable(struct coresight_device *csdev, int inport, /* disable the flow of ATB data through port */ writel_relaxed(0xff, drvdata->base + reg); + if ((readl_relaxed(drvdata->base + REPLICATOR_IDFILTER0) == 0xff) && + (readl_relaxed(drvdata->base + REPLICATOR_IDFILTER1) == 0xff)) + coresight_disclaim_device_unlocked(drvdata->base); CS_LOCK(drvdata->base); dev_dbg(drvdata->dev, "REPLICATOR disabled\n"); From patchwork Thu Sep 20 19:18:16 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mathieu Poirier X-Patchwork-Id: 147160 Delivered-To: patch@linaro.org Received: by 2002:a2e:1648:0:0:0:0:0 with SMTP id 8-v6csp2377207ljw; Thu, 20 Sep 2018 12:19:48 -0700 (PDT) X-Google-Smtp-Source: ANB0VdaehWh0o8YIAqRa5DPkVC+jZwhrh3Ec0EkNWYXTEIkjWsbBjkwBZQCA/LIMZ/5OPmzRvPeU X-Received: by 2002:a63:144b:: with SMTP id 11-v6mr37064856pgu.219.1537471188780; Thu, 20 Sep 2018 12:19:48 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1537471188; cv=none; d=google.com; s=arc-20160816; b=p+bIpHL3/ebZuHCYQ5CON/dpNKZgJKaLI/V1MfcgY/h0H7YAmvZgGpsK9tndZ8AXwz unR/REXrg5hqB1c0HpIF32JAD1sQNdzSzV++Zn7LbUmuTUtuSJxLqi9HgIkp1OGWbcc/ YvRFY4lPELiwXpP0J+FMpu24EMN3bux29WyHuhAb39HsRsoCI5GlF33v3Rk9v3KZYQN/ ngSYCRP3pzWYBRXBV3NJkKVhbX9oz1z7ZVAOwsdWqENafJKCMjkT8Sc+ZXf4msfJGeU+ Fbrd3eMfS5iieeG0Sfj1zuIs9oGWFbzsYc6Qz0eK+tCgAgwb823SVWNGLBKam/tZYlG4 AZ9Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature; bh=lEojR96MJu4iyHo4Y0qSuQdeRg8I+A050JDTrUQ4dMg=; b=AUNMgihxae9GroySAZIYbPsNPiw6zpSORs0otLK3FTpJTCm35eKNb8tP5z5mx2TAvo PMtCrQwqQvfQ4jLeDjhIf/QDNGYuXjT1ZPp325Cclk6wDojKQ5MUC5J5Zkxd2GaGZFND 4XiUmH6t/hxM8ywcLQBjF5n85TdY3losPfG+t7zmGQu58njVhX01Ql2HlIku73fJTIHQ MwguAVXn95cBG5KAEX9XdfSnuelkibLNLcEdGYWc9syWR58+De18Ny6zgDGcPaZ+6Mq+ 5jvfiLe5WD5nDuaBK4OZRqTCLqRdAPl3ASQcWcQC/jIyFhYNtesVUvTqnyTH+jgpFEro Auqg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=YF42dPFh; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id v37-v6si381060plg.124.2018.09.20.12.19.48; Thu, 20 Sep 2018 12:19:48 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=YF42dPFh; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2388499AbeIUBEp (ORCPT + 32 others); Thu, 20 Sep 2018 21:04:45 -0400 Received: from mail-pf1-f195.google.com ([209.85.210.195]:37763 "EHLO mail-pf1-f195.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2388517AbeIUBEX (ORCPT ); Thu, 20 Sep 2018 21:04:23 -0400 Received: by mail-pf1-f195.google.com with SMTP id h69-v6so4826867pfd.4 for ; Thu, 20 Sep 2018 12:19:24 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=lEojR96MJu4iyHo4Y0qSuQdeRg8I+A050JDTrUQ4dMg=; b=YF42dPFhIvIfWd26UB5GVbVqZ45vldYbKJBXevvUaouVrewwHuwgeqtxmmAvI+VOcw fzhlhy+xBVHfYw4ecZ3i/REwLnbTHVAaZW41OfTgSbGFieWR+PRbudVZx1zSztOh4vHs bzexd3QHt6+/j1C8jxhDR2uOYo8zg7KSTqnH0= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=lEojR96MJu4iyHo4Y0qSuQdeRg8I+A050JDTrUQ4dMg=; b=BTsiEg/7wQR4Q7oOZ0rYsui1vI2sYTHPKPwHRVcX+uT/6TM7yWRkGclPhPH30En5fF OPX3YCi8ucGNM+w32i51MpiWUx8AgglRl879dnN3pDocXV559Y3hlDvc63/qCZKm5sBo U25iYsHd1a3rzOTkvt3QFE/MgV2EnYyR3s64eBfre5Hx09jCRRYaukGVWcHYlDNtxziV RgsPat/GCbUNiYUTAu9TRKP3vAqpTQrKgHIsDf8EZAkNsWghoyToaGBcGJk6+1l+WBMX ay7RJ+DeJ+lEq+ja0T8L0kQ1akhiwykU9ZXkuiuTIn4wYJwqYyXF+NjB1oIyurVowqRQ 2PWg== X-Gm-Message-State: APzg51A2GiBGsVjVOAyVzoCr6zMLrE7YWPsuTsfbQFBLHU7fusFvqTHc rsgDSh5VUpwDXST0sSHe4nINHEwXdmU= X-Received: by 2002:a62:4808:: with SMTP id v8-v6mr43044662pfa.89.1537471164307; Thu, 20 Sep 2018 12:19:24 -0700 (PDT) Received: from localhost.localdomain ([209.121.128.187]) by smtp.gmail.com with ESMTPSA id k13-v6sm4424443pgf.37.2018.09.20.12.19.22 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 20 Sep 2018 12:19:23 -0700 (PDT) From: Mathieu Poirier To: gregkh@linuxfoundation.org Cc: linux-kernel@vger.kernel.org Subject: [PATCH 41/44] coreisght: tmc: Claim device before use Date: Thu, 20 Sep 2018 13:18:16 -0600 Message-Id: <1537471099-19781-42-git-send-email-mathieu.poirier@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1537471099-19781-1-git-send-email-mathieu.poirier@linaro.org> References: <1537471099-19781-1-git-send-email-mathieu.poirier@linaro.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Suzuki K Poulose Use CLAIM tags to make sure the device is available for use. Cc: Mathieu Poirier Signed-off-by: Suzuki K Poulose Signed-off-by: Mathieu Poirier --- drivers/hwtracing/coresight/coresight-tmc-etf.c | 22 +++++++++++++++++++--- drivers/hwtracing/coresight/coresight-tmc-etr.c | 4 ++++ 2 files changed, 23 insertions(+), 3 deletions(-) -- 2.7.4 diff --git a/drivers/hwtracing/coresight/coresight-tmc-etf.c b/drivers/hwtracing/coresight/coresight-tmc-etf.c index 36af23d2c0f8..53fc83b72a49 100644 --- a/drivers/hwtracing/coresight/coresight-tmc-etf.c +++ b/drivers/hwtracing/coresight/coresight-tmc-etf.c @@ -36,6 +36,11 @@ static void __tmc_etb_enable_hw(struct tmc_drvdata *drvdata) static int tmc_etb_enable_hw(struct tmc_drvdata *drvdata) { + int rc = coresight_claim_device(drvdata->base); + + if (rc) + return rc; + __tmc_etb_enable_hw(drvdata); return 0; } @@ -63,7 +68,7 @@ static void tmc_etb_dump_hw(struct tmc_drvdata *drvdata) return; } -static void tmc_etb_disable_hw(struct tmc_drvdata *drvdata) +static void __tmc_etb_disable_hw(struct tmc_drvdata *drvdata) { CS_UNLOCK(drvdata->base); @@ -79,6 +84,12 @@ static void tmc_etb_disable_hw(struct tmc_drvdata *drvdata) CS_LOCK(drvdata->base); } +static void tmc_etb_disable_hw(struct tmc_drvdata *drvdata) +{ + coresight_disclaim_device(drvdata); + __tmc_etb_disable_hw(drvdata); +} + static void __tmc_etf_enable_hw(struct tmc_drvdata *drvdata) { CS_UNLOCK(drvdata->base); @@ -97,6 +108,11 @@ static void __tmc_etf_enable_hw(struct tmc_drvdata *drvdata) static int tmc_etf_enable_hw(struct tmc_drvdata *drvdata) { + int rc = coresight_claim_device(drvdata->base); + + if (rc) + return rc; + __tmc_etf_enable_hw(drvdata); return 0; } @@ -107,7 +123,7 @@ static void tmc_etf_disable_hw(struct tmc_drvdata *drvdata) tmc_flush_and_stop(drvdata); tmc_disable_hw(drvdata); - + coresight_disclaim_device_unlocked(drvdata->base); CS_LOCK(drvdata->base); } @@ -553,7 +569,7 @@ int tmc_read_prepare_etb(struct tmc_drvdata *drvdata) /* Disable the TMC if need be */ if (drvdata->mode == CS_MODE_SYSFS) - tmc_etb_disable_hw(drvdata); + __tmc_etb_disable_hw(drvdata); drvdata->reading = true; out: diff --git a/drivers/hwtracing/coresight/coresight-tmc-etr.c b/drivers/hwtracing/coresight/coresight-tmc-etr.c index daad52146140..f684283890d3 100644 --- a/drivers/hwtracing/coresight/coresight-tmc-etr.c +++ b/drivers/hwtracing/coresight/coresight-tmc-etr.c @@ -991,6 +991,9 @@ static int tmc_etr_enable_hw(struct tmc_drvdata *drvdata, * this on. */ rc = tmc_etr_enable_catu(drvdata, etr_buf); + if (rc) + return rc; + rc = coresight_claim_device(drvdata->base); if (!rc) { drvdata->etr_buf = etr_buf; __tmc_etr_enable_hw(drvdata); @@ -1077,6 +1080,7 @@ static void tmc_etr_disable_hw(struct tmc_drvdata *drvdata) __tmc_etr_disable_hw(drvdata); /* Disable CATU device if this ETR is connected to one */ tmc_etr_disable_catu(drvdata); + coresight_disclaim_device(drvdata->base); /* Reset the ETR buf used by hardware */ drvdata->etr_buf = NULL; } From patchwork Thu Sep 20 19:18:17 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mathieu Poirier X-Patchwork-Id: 147157 Delivered-To: patch@linaro.org Received: by 2002:a2e:1648:0:0:0:0:0 with SMTP id 8-v6csp2376936ljw; Thu, 20 Sep 2018 12:19:30 -0700 (PDT) X-Google-Smtp-Source: ANB0VdYW3N1OXiUHANy8hDcXgsHRYIbITs2TN26sqyTgeaOB7U6P4oFZVPKquB4fC+/e2zCih6E/ X-Received: by 2002:a63:334c:: with SMTP id z73-v6mr37664101pgz.220.1537471170760; Thu, 20 Sep 2018 12:19:30 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1537471170; cv=none; d=google.com; s=arc-20160816; b=RIDUyjDtjx7PrF3pXY0BhaalFqvp4iKa3UjQq3AhRWHtFhCCU11Ih6KTRbOb7Gi/T0 evyQfQods3I9akisFbfv+cMeyay4F+WA9Eo8eOs6laqeTQL2ONUnkCa/HXyaD2a5/nnF b7VfEOPLvm749017UOuIYyUEsYXhX7NeZgDepTjtxHKdwTh9wIuaspqPu9Mk1lZvmzwj KXEopeRVmj+xvlD859p2A0/eZcCzv2Crj9XYhELpO0+30Rt5UnnFxnGT8EIVEdwgToaF Tyhxh7HIZ+Gw6N+IPa5JciiY3gVYQyz/tZ5FDa1F9UgmHaMCd52FEbGN9rXuP5/7Zbd/ ZkdQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature; bh=ukYBOxLGLxNeJsPgCPfVVlnqngyM2zNwpXi4wluZMac=; b=RE8srfjb50vhglioCSGCFb4ebaNGHxNX4ib19ZeWD2VSufJE6uRnN+7tnEGS4JfnyQ 4FEmRnUIw6MIN7dgbAFLF1mJ4sR9w7+1yAoQ1CHdymVLzVvxkJHMEf3kurwAydCQXlYX k/4g3/vtR4uGAQVu8tL9HKNDJKG43pzcNF+b96lhxgZdZQZ+Rnq9pAd6cx6tiStz2Dlk sQlLoldCCgI3CTfk1dspnL0W04Q3tUVGQsXgLajcVr4JFAEbeub/w5eS7XHEbC6faGfR A9QjRPMDmZwbP4+02qR0wLHymJyK/qEOqpjAZD8bzdbGY5po9oMwZo08FbW2eLMrCX5d bxjg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=AWWL9z3V; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id k23-v6si23121829pgl.633.2018.09.20.12.19.30; Thu, 20 Sep 2018 12:19:30 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=AWWL9z3V; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2389122AbeIUBE0 (ORCPT + 32 others); Thu, 20 Sep 2018 21:04:26 -0400 Received: from mail-pf1-f196.google.com ([209.85.210.196]:35679 "EHLO mail-pf1-f196.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2388518AbeIUBEZ (ORCPT ); Thu, 20 Sep 2018 21:04:25 -0400 Received: by mail-pf1-f196.google.com with SMTP id p12-v6so4829376pfh.2 for ; Thu, 20 Sep 2018 12:19:26 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=ukYBOxLGLxNeJsPgCPfVVlnqngyM2zNwpXi4wluZMac=; b=AWWL9z3Vd+BZwt7cXnMZLOj2N2dNSZFVMqnEImSjKMDJyyW0L++0kOWCJ9UNtNupGL KegZtYkSOvlZBtOA2cvd2V6Etm+4n2hsa/QU1Rdm5ZT+dZGEhquwRMJKwBrpUSVN8pOR vCAiNRdEKz/VM4yj2FiJj92mSOpT6PX4fngKM= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=ukYBOxLGLxNeJsPgCPfVVlnqngyM2zNwpXi4wluZMac=; b=FMqZP26Gb2c93d6wRsz9WFhZe3bKuMnWz6pxEj0Ts9ziSqrLOLwkm8sBZwR+RJ7v+f EHlbZXwzP5CsqlMHc/59rj4C8Jg02TW3JgQfvCW7bD7u28BAwcIr2P2lzgkjidzqNKp4 3uKM7fNqN2eATh0lf804+FHoJjAeJiYhiKe2X8KJJOaDRsB7IRXGMP/k9az+JLvA5zuN FOWjfJ7P5IUQSUcBNEz85K8QkaAmhSlSeQb32o0Lb/METiEAebW43+jraT7O++yshZ4r Tdkh2MMxhhPMEeNikC8t+SeMzM3u+rqx6P2/XvHjliSpj/B8piMfrqerTF8KkF6kFP59 nxLw== X-Gm-Message-State: APzg51AcoZPlaZS0UH3YIPzGsyuAqcL6WSP/YxrFr+894LCp1+FcQOKD zujcTx8+FOTG67HzKoefqPCFkA== X-Received: by 2002:a62:fcd2:: with SMTP id e201-v6mr43154052pfh.101.1537471165756; Thu, 20 Sep 2018 12:19:25 -0700 (PDT) Received: from localhost.localdomain ([209.121.128.187]) by smtp.gmail.com with ESMTPSA id k13-v6sm4424443pgf.37.2018.09.20.12.19.24 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 20 Sep 2018 12:19:24 -0700 (PDT) From: Mathieu Poirier To: gregkh@linuxfoundation.org Cc: linux-kernel@vger.kernel.org Subject: [PATCH 42/44] coresight: dts: binding: Fix example for TPIU component Date: Thu, 20 Sep 2018 13:18:17 -0600 Message-Id: <1537471099-19781-43-git-send-email-mathieu.poirier@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1537471099-19781-1-git-send-email-mathieu.poirier@linaro.org> References: <1537471099-19781-1-git-send-email-mathieu.poirier@linaro.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Suzuki K Poulose TPIU component has an input port. The example uses out-ports which is wrong. Let us fix it. Reported-by: Leo Yan Cc: Mathieu Poirier Signed-off-by: Suzuki K Poulose Signed-off-by: Mathieu Poirier --- Documentation/devicetree/bindings/arm/coresight.txt | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) -- 2.7.4 diff --git a/Documentation/devicetree/bindings/arm/coresight.txt b/Documentation/devicetree/bindings/arm/coresight.txt index f39d2c6eb49c..13b6198ce01c 100644 --- a/Documentation/devicetree/bindings/arm/coresight.txt +++ b/Documentation/devicetree/bindings/arm/coresight.txt @@ -132,7 +132,7 @@ Example: clocks = <&oscclk6a>; clock-names = "apb_pclk"; - out-ports { + in-ports { port { tpiu_in_port: endpoint@0 { remote-endpoint = <&replicator_out_port1>; From patchwork Thu Sep 20 19:18:18 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mathieu Poirier X-Patchwork-Id: 147158 Delivered-To: patch@linaro.org Received: by 2002:a2e:1648:0:0:0:0:0 with SMTP id 8-v6csp2376946ljw; Thu, 20 Sep 2018 12:19:32 -0700 (PDT) X-Google-Smtp-Source: ANB0VdaYcKY5reM66qQ6dwPRsIluTjr96cO7ipPVd9eTll7d1GOWXZG0yu14MWs+o1Nv7G6k/GHt X-Received: by 2002:a17:902:4503:: with SMTP id m3-v6mr40421019pld.168.1537471172252; Thu, 20 Sep 2018 12:19:32 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1537471172; cv=none; d=google.com; s=arc-20160816; b=rvQrGTudlmYnicu3nqyEXkODwUToCApkKx6Deai3sLetZqDy6Tq/MkqVxyxwHUcZJw nPcDOh5guTD/TlC0oZnsCVGv+gIGZMinGrh5rJpswG3/KRfFdnsvwt8Hpt29XaXroi/M 0D0SFzkWPFc9cgLPkeMiJq9ffDqwIpm7ugUZrtwStQSskQadw/THJIwZ8tr4xAQ/wBws n9KJrAE0936IvNmWkplBkRoMpnOhNWaBBuIoTxv4CaQKLFOFRyJMLL3aC0RtC5+JVb8B m/dLfh6Jkrm0Y7w2PNdIgC2iVq2aMvXpnrHJLXeBvHABk8XN4cVyocWyBdm/2HR0Y2dc snKQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature; bh=9/Th98XB46g+B7NIYKxKDyhv/UQQTG8EYyJi0X096vo=; b=F0PNrkPO/tAG/IWEbAcnGTBV+NuNjK0r2nzZhH5jsCVm4UBGy/MZe6IPLsnNAYQVPa pyTbQhzoSc0QOAYaT4lh9WNtLDFV45AQ0FuJ3w1f/B+ANPjj6+xZVe77EmHFlDwG5ieS IZK7XuQpiWysbNg9ZgcU6rLC83xuRBpGz2vZ1NNaUekD9E3jVsxyTeG1KsfN+OnLYAtt 9zjdQAK6e0uP8aQ7BDibFkhvDncU61Wr4UH00LUPeyBWpfXGML3GEMvMLCn2+t4kR+uO rsmlqa0hpYsRnvjs0v67tqdy2oWzzudMCtMh9sF9oPCWXp2UyN7gZ+KCvcpL97yZSAsy Ta3A== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=Di0OAPm5; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id t23-v6si24177676pgi.301.2018.09.20.12.19.31; Thu, 20 Sep 2018 12:19:32 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=Di0OAPm5; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2389134AbeIUBE1 (ORCPT + 32 others); Thu, 20 Sep 2018 21:04:27 -0400 Received: from mail-pg1-f193.google.com ([209.85.215.193]:38243 "EHLO mail-pg1-f193.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2389113AbeIUBE0 (ORCPT ); Thu, 20 Sep 2018 21:04:26 -0400 Received: by mail-pg1-f193.google.com with SMTP id t84-v6so4876763pgb.5 for ; Thu, 20 Sep 2018 12:19:27 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=9/Th98XB46g+B7NIYKxKDyhv/UQQTG8EYyJi0X096vo=; b=Di0OAPm5fvE1O0TCuxvt9c2orF9JiH9IxdhmGgKhDnxc5EMOAoQV36yR2QwXzEqGfh GTa2bjZf/H2NAeSzI8Cbm+WZ5sY3I0ahGfZRl180XzZmJQ3/e41k9UyLFPgLW+eZN8do ns6xa0l1ZRW44oUH102fsz9xBZ6V/pY/4qC78= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=9/Th98XB46g+B7NIYKxKDyhv/UQQTG8EYyJi0X096vo=; b=Xl0nvhO0itiUZBRTXfpx8y9VcAyqBwL6qRMPhFnEwA7a8ofOuUs6Z6RLMYg4xf3lFY /VX3iAOJgKb4EiEgzF3w1zqY6fugiQtfLPFG9Rply/e8tl16WiVpAMya3dHJUSpDGyfu 5LaJZGflnW6nmRr/ps+lA5JmL0ajRCSWsDQiO9+AFmpOxhPQDcK0hNr184YxiQHlyw2j kDrkFMuypo9TImeHoXCEqcEfu+1fscpc89BtbKDtdmnta+wI2aVTyBz5XB+if1yOR/8o la4UGtbJ6RNMQNQJN1soIbolc3PwWaoQkX/YhpF6hh9MjxsBnXhOIQami+KwapsGcumy P/4Q== X-Gm-Message-State: APzg51BqHCIaJz0LupewLEitbH3caNcS0tm8Ff1NxaQO7nEQGYDU0QNJ Ump9nEUhHsjIYcx29fsmY2mD3g== X-Received: by 2002:a62:5cc1:: with SMTP id q184-v6mr43401861pfb.241.1537471167235; Thu, 20 Sep 2018 12:19:27 -0700 (PDT) Received: from localhost.localdomain ([209.121.128.187]) by smtp.gmail.com with ESMTPSA id k13-v6sm4424443pgf.37.2018.09.20.12.19.25 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 20 Sep 2018 12:19:26 -0700 (PDT) From: Mathieu Poirier To: gregkh@linuxfoundation.org Cc: linux-kernel@vger.kernel.org Subject: [PATCH 43/44] coresight: dts: binding: Update coresight binding examples Date: Thu, 20 Sep 2018 13:18:18 -0600 Message-Id: <1537471099-19781-44-git-send-email-mathieu.poirier@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1537471099-19781-1-git-send-email-mathieu.poirier@linaro.org> References: <1537471099-19781-1-git-send-email-mathieu.poirier@linaro.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Suzuki K Poulose While we updated the coresight DT bindings, some of the new examples were not updated due to the order in which they were merged. Let us update all the missed out ones to the new bindings to avoid confusion. Cc: Mathieu Poirier Cc: Rob Herring Cc: Frank Rowand Signed-off-by: Suzuki K Poulose Reviewed-by: Rob Herring Signed-off-by: Mathieu Poirier --- .../devicetree/bindings/arm/coresight.txt | 25 +++++++++------------- 1 file changed, 10 insertions(+), 15 deletions(-) -- 2.7.4 diff --git a/Documentation/devicetree/bindings/arm/coresight.txt b/Documentation/devicetree/bindings/arm/coresight.txt index 13b6198ce01c..f8aff65ab921 100644 --- a/Documentation/devicetree/bindings/arm/coresight.txt +++ b/Documentation/devicetree/bindings/arm/coresight.txt @@ -147,22 +147,16 @@ Example: clocks = <&oscclk6a>; clock-names = "apb_pclk"; - ports { - #address-cells = <1>; - #size-cells = <0>; - - /* input port */ - port@0 { - reg = <0>; + in-ports { + port { etr_in_port: endpoint { - slave-mode; remote-endpoint = <&replicator2_out_port0>; }; }; + }; - /* CATU link represented by output port */ - port@1 { - reg = <1>; + out-ports { + port { etr_out_port: endpoint { remote-endpoint = <&catu_in_port>; }; @@ -310,10 +304,11 @@ Example: clock-names = "apb_pclk"; interrupts = ; - port { - catu_in_port: endpoint { - slave-mode; - remote-endpoint = <&etr_out_port>; + in-ports { + port { + catu_in_port: endpoint { + remote-endpoint = <&etr_out_port>; + }; }; }; }; From patchwork Thu Sep 20 19:18:19 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mathieu Poirier X-Patchwork-Id: 147159 Delivered-To: patch@linaro.org Received: by 2002:a2e:1648:0:0:0:0:0 with SMTP id 8-v6csp2376953ljw; Thu, 20 Sep 2018 12:19:32 -0700 (PDT) X-Google-Smtp-Source: ANB0VdYiCcGorQ+aSeE1miinKynZPlN8ZRu+h0XEoXKMF2rx/ySczB9duDTWvV0mjG4yP1bspmzm X-Received: by 2002:a17:902:c85:: with SMTP id 5-v6mr40953582plt.141.1537471172680; Thu, 20 Sep 2018 12:19:32 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1537471172; cv=none; d=google.com; s=arc-20160816; b=R+uTPm50lFJYpex5Ce5nj7agZBT4xuwvL4trcJh13xq0q5vhtGtsqdtN74vXQG5anp 26LHomrKIZPssZj6kcMyE0ASOQitHU+8FK89SLm91XRUzOILHNSx8Euj4/u5yxmPgsPw +lpO2RqYOiLA+w+w2RdSSGKDLGxpnF56WH9l+WbaTozR7slIjZ22LbDIv35OCoFhRSnt WW1B4hI920pQzKAYfXapAw0GWBil22ze1651b0YViL5NG7my7SBvBT282z7gvjNbZMxg aZ0Gqva5K5aGguOtOlKUbA23qZjJrRzUms0hEIKfqtYnD9TvV2OwoewifPcg9b07OcbV Et2Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature; bh=dnhE0czpJg+XaiFH4BtekxN9pZR1jCXAxiDs2QAUsmg=; b=qqS0OywJl3gBHBDEjq+JICWujW3eA12XShar+TbIhES49UbHNVMgX9LIbX6eDb9spZ HkewKozc2iZJXIcgiJHEJW06+JNUb3NBJvIhhXXzpvZxkFDt5bKPP0ymAjx2ppLUJgC7 RSaFS6sliGA6EQ3iNfpMwO1hKxADnCM4IZMj2kNk+jFDM7kYwO8Y6ksfPhCoZPmAgCu4 2g+hd9N2ucu8qiJgP95sbpvPanbTPdzL5adR7JBBlWLgXR+KLYOe1lbexvEpFDumsM1y 4QN9/ZK4FIDGLiRtW5fsRkZMeynRk5mkUdkJh2qw40vt3p+6xiT03r/KSgSEvx6bGMAf gKrg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=SOxHja3K; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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So it is safe to remove the duplicated check. Signed-off-by: zhong jiang Signed-off-by: Mathieu Poirier --- drivers/hwtracing/coresight/of_coresight.c | 9 +++------ 1 file changed, 3 insertions(+), 6 deletions(-) -- 2.7.4 diff --git a/drivers/hwtracing/coresight/of_coresight.c b/drivers/hwtracing/coresight/of_coresight.c index da71c975e3f7..89092f83567e 100644 --- a/drivers/hwtracing/coresight/of_coresight.c +++ b/drivers/hwtracing/coresight/of_coresight.c @@ -219,12 +219,9 @@ static int of_coresight_parse_endpoint(struct device *dev, ret = 1; } while (0); - if (rparent) - of_node_put(rparent); - if (rep) - of_node_put(rep); - if (rdev) - put_device(rdev); + of_node_put(rparent); + of_node_put(rep); + put_device(rdev); return ret; }