From patchwork Tue Sep 18 07:35:24 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Eugen Hristev X-Patchwork-Id: 146879 Delivered-To: patch@linaro.org Received: by 2002:a2e:1648:0:0:0:0:0 with SMTP id 8-v6csp4707321ljw; Tue, 18 Sep 2018 00:44:07 -0700 (PDT) X-Google-Smtp-Source: ANB0VdYQxdW4NJAmuWbAU2EoSJQhnqy2i4Jo4RUm1hyOh8m6zq8AzOiUc07i85TAcwKVS17gv2/v X-Received: by 2002:a50:b642:: with SMTP id c2-v6mr48628269ede.288.1537256647860; Tue, 18 Sep 2018 00:44:07 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1537256647; cv=none; d=google.com; s=arc-20160816; b=KNq4rye/zNx2fIT0V7zEvklsE8aVFrr+LTt0CgFOFq+AoRHwDJwTrRr5HLH+ePIjj3 AIUqrpT2qd+QcjyHr+25XvXUIo6n1kdwPVx1+UWBrXV8G4d2dlvEjaeWcRk/N025N2AU 1IkM8P6ittdMAvodCNXsiacJVmbeVemhua5OP0EjdZgun0ZhszVeNsOs1B70YHw8uQx3 byAZLR+9l2LPVRW6GEfynoEoRREpPiXhEzfJ+WIFMgc0X4yFI6yweJ+K0918C/gqcBe0 B0Xf3RSe6urzil/2pzrPzSNsLsLTmNKMh/j/UEDWSkx5bfYCmXh/wJJWorJ1PBHBInIp yXcQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:content-transfer-encoding:list-subscribe:list-help :list-post:list-archive:list-unsubscribe:list-id:precedence:subject :cc:mime-version:references:in-reply-to:message-id:date:to:from; bh=jL88Xb8k/R9qAzcBamKijHKLTDHMahUUpmIfHtE7OrQ=; b=HG4Uoc6I5bYtMmR5faUMABBFxkBVv+GbbkIhn36Nm4euEWzNLiRFbatLp9zoaWYegg HFMB3ScMPsK/glc2WrIMlmUO1DQvqsd0WinJ71ZqxYQNSV4Fps9A8N1TAeolSzXpLs9C 4IS3yA0WZuaZmGRKk8rWwZmiqvurYiEIcpV5qnZFz8PJcw416TvtT1+iDLW7FfxZ7Uz2 tEAYCPVhVWZito2MVYcUf9RrjIVcJB76Ds50gE3qqAnevlAvtDVQyZfga4C2S1cUcIkq DnLQDISuAzusft2Gz/J6U9iLHYusmSSXrI24GrjlyOsJlzuZ9Yb2VtZ8dtDa2iy8OzUw GtaQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of u-boot-bounces@lists.denx.de designates 81.169.180.215 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de Return-Path: Received: from lists.denx.de (dione.denx.de. [81.169.180.215]) by mx.google.com with ESMTP id f1-v6si12937169edm.355.2018.09.18.00.44.07; Tue, 18 Sep 2018 00:44:07 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of u-boot-bounces@lists.denx.de designates 81.169.180.215 as permitted sender) client-ip=81.169.180.215; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of u-boot-bounces@lists.denx.de designates 81.169.180.215 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de Received: by lists.denx.de (Postfix, from userid 105) id 68FB3C21DF3; Tue, 18 Sep 2018 07:42:19 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=none autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id C2FFFC21EA1; Tue, 18 Sep 2018 07:40:35 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id E6A77C21E1A; Tue, 18 Sep 2018 07:40:31 +0000 (UTC) Received: from esa2.microchip.iphmx.com (esa2.microchip.iphmx.com [68.232.149.84]) by lists.denx.de (Postfix) with ESMTPS id D87C5C21D4A for ; Tue, 18 Sep 2018 07:40:28 +0000 (UTC) X-IronPort-AV: E=Sophos;i="5.53,389,1531810800"; d="scan'208";a="20067706" Received: from smtpout.microchip.com (HELO email.microchip.com) ([198.175.253.82]) by esa2.microchip.iphmx.com with ESMTP/TLS/DHE-RSA-AES256-SHA; 18 Sep 2018 00:40:23 -0700 Received: from eh-station.mchp-main.com (10.10.76.4) by chn-sv-exch06.mchp-main.com (10.10.76.107) with Microsoft SMTP Server id 14.3.352.0; Tue, 18 Sep 2018 00:40:23 -0700 From: Eugen Hristev To: , Date: Tue, 18 Sep 2018 10:35:24 +0300 Message-ID: <1537256157-18001-2-git-send-email-eugen.hristev@microchip.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1537256157-18001-1-git-send-email-eugen.hristev@microchip.com> References: <1537256157-18001-1-git-send-email-eugen.hristev@microchip.com> MIME-Version: 1.0 Cc: maxime.ripard@bootlin.com, Maxime Ripard , nicolas.ferre@microchip.com Subject: [U-Boot] [PATCH v4 01/34] w1: Add 1-Wire uclass X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" From: Maxime Ripard We might want to use 1-Wire devices connected on boards such as EEPROMs in U-Boot. Provide a framework to be able to do that. Signed-off-by: Maxime Ripard [eugen.hristev@microchip.com: reworked] Signed-off-by: Eugen Hristev --- drivers/Kconfig | 2 + drivers/Makefile | 1 + drivers/w1/Kconfig | 18 ++++ drivers/w1/Makefile | 1 + drivers/w1/w1-uclass.c | 236 +++++++++++++++++++++++++++++++++++++++++++++++++ include/dm/uclass-id.h | 1 + include/w1.h | 36 ++++++++ 7 files changed, 295 insertions(+) create mode 100644 drivers/w1/Kconfig create mode 100644 drivers/w1/Makefile create mode 100644 drivers/w1/w1-uclass.c create mode 100644 include/w1.h diff --git a/drivers/Kconfig b/drivers/Kconfig index 56536c4..6f91eac 100644 --- a/drivers/Kconfig +++ b/drivers/Kconfig @@ -106,6 +106,8 @@ source "drivers/usb/Kconfig" source "drivers/video/Kconfig" +source "drivers/w1/Kconfig" + source "drivers/watchdog/Kconfig" config PHYS_TO_BUS diff --git a/drivers/Makefile b/drivers/Makefile index 23ea609..4ca07c3 100644 --- a/drivers/Makefile +++ b/drivers/Makefile @@ -105,6 +105,7 @@ obj-y += smem/ obj-y += soc/ obj-y += thermal/ obj-y += axi/ +obj-$(CONFIG_W1) += w1/ obj-$(CONFIG_MACH_PIC32) += ddr/microchip/ endif diff --git a/drivers/w1/Kconfig b/drivers/w1/Kconfig new file mode 100644 index 0000000..64b27c6 --- /dev/null +++ b/drivers/w1/Kconfig @@ -0,0 +1,18 @@ +# +# W1 subsystem configuration +# + +menu "1-Wire support" + +config W1 + bool "Enable 1-wire controllers support" + default no + depends on DM + help + Support for the Dallas 1-Wire bus. + +if W1 + +endif + +endmenu diff --git a/drivers/w1/Makefile b/drivers/w1/Makefile new file mode 100644 index 0000000..f81693b --- /dev/null +++ b/drivers/w1/Makefile @@ -0,0 +1 @@ +obj-$(CONFIG_W1) += w1-uclass.o diff --git a/drivers/w1/w1-uclass.c b/drivers/w1/w1-uclass.c new file mode 100644 index 0000000..44759fe --- /dev/null +++ b/drivers/w1/w1-uclass.c @@ -0,0 +1,236 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * + * Copyright (c) 2015 Free Electrons + * Copyright (c) 2015 NextThing Co. + * Copyright (c) 2018 Microchip Technology, Inc. + * + * Maxime Ripard + * Eugen Hristev + * + */ + +#include +#include +#include + +#include + +#define W1_MATCH_ROM 0x55 +#define W1_SKIP_ROM 0xcc +#define W1_SEARCH 0xf0 + +struct w1_bus { + u64 search_id; +}; + +static int w1_enumerate(struct udevice *bus) +{ + const struct w1_ops *ops = device_get_ops(bus); + struct w1_bus *w1 = dev_get_uclass_priv(bus); + u64 last_rn, rn = w1->search_id, tmp64; + bool last_device = false; + int search_bit, desc_bit = 64; + int last_zero = -1; + u8 triplet_ret = 0; + int i; + + if (!ops->reset || !ops->write_byte || !ops->triplet) + return -ENOSYS; + + while (!last_device) { + last_rn = rn; + rn = 0; + + /* + * Reset bus and all 1-wire device state machines + * so they can respond to our requests. + * + * Return 0 - device(s) present, 1 - no devices present. + */ + if (ops->reset(bus)) { + debug("%s: No devices present on the wire.\n", + __func__); + break; + } + + /* Start the search */ + ops->write_byte(bus, W1_SEARCH); + for (i = 0; i < 64; ++i) { + /* Determine the direction/search bit */ + if (i == desc_bit) + /* took the 0 path last time, so take the 1 path */ + search_bit = 1; + else if (i > desc_bit) + /* take the 0 path on the next branch */ + search_bit = 0; + else + search_bit = ((last_rn >> i) & 0x1); + + /* Read two bits and write one bit */ + triplet_ret = ops->triplet(bus, search_bit); + + /* quit if no device responded */ + if ((triplet_ret & 0x03) == 0x03) + break; + + /* If both directions were valid, and we took the 0 path... */ + if (triplet_ret == 0) + last_zero = i; + + /* extract the direction taken & update the device number */ + tmp64 = (triplet_ret >> 2); + rn |= (tmp64 << i); + } + + /* last device or error, aborting here */ + if ((triplet_ret & 0x03) == 0x03) + last_device = true; + + if ((triplet_ret & 0x03) != 0x03) { + if (desc_bit == last_zero || last_zero < 0) { + last_device = 1; + w1->search_id = 0; + } else { + w1->search_id = rn; + } + desc_bit = last_zero; + + debug("%s: Detected new device 0x%llx (family 0x%x)\n", + bus->name, rn, (u8)(rn & 0xff)); + } + } + + return 0; +} + +int w1_get_bus(int busnum, struct udevice **busp) +{ + int ret, i = 0; + + struct udevice *dev; + + for (ret = uclass_first_device(UCLASS_W1, &dev); + !ret; + uclass_next_device(&dev), i++) { + if (ret) { + debug("Cannot find w1 bus %d\n", busnum); + return ret; + } + if (i == busnum) { + *busp = dev; + return 0; + } + } + return ret; +} + +u8 w1_get_device_family(struct udevice *dev) +{ + struct w1_device *w1 = dev_get_parent_platdata(dev); + + return w1->id & 0xff; +} + +int w1_reset_select(struct udevice *dev) +{ + struct w1_device *w1 = dev_get_parent_platdata(dev); + struct udevice *bus = dev_get_parent(dev); + const struct w1_ops *ops = device_get_ops(bus); + int i; + + if (!ops->reset || !ops->write_byte) + return -ENOSYS; + + ops->reset(bus); + + ops->write_byte(bus, W1_MATCH_ROM); + + for (i = 0; i < sizeof(w1->id); i++) + ops->write_byte(bus, (w1->id >> (i * 8)) & 0xff); + + return 0; +} + +int w1_read_byte(struct udevice *dev) +{ + struct udevice *bus = dev_get_parent(dev); + const struct w1_ops *ops = device_get_ops(bus); + + if (!ops->read_byte) + return -ENOSYS; + + return ops->read_byte(bus); +} + +int w1_read_buf(struct udevice *dev, u8 *buf, unsigned int count) +{ + int i, ret; + + for (i = 0; i < count; i++) { + ret = w1_read_byte(dev); + if (ret < 0) + return ret; + + buf[i] = ret & 0xff; + } + + return 0; +} + +int w1_write_byte(struct udevice *dev, u8 byte) +{ + struct udevice *bus = dev_get_parent(dev); + const struct w1_ops *ops = device_get_ops(bus); + + if (!ops->write_byte) + return -ENOSYS; + + ops->write_byte(bus, byte); + + return 0; +} + +static int w1_post_probe(struct udevice *bus) +{ + w1_enumerate(bus); + + return 0; +} + +int w1_init(void) +{ + struct udevice *bus; + struct uclass *uc; + int ret; + + ret = uclass_get(UCLASS_W1, &uc); + if (ret) + return ret; + + uclass_foreach_dev(bus, uc) { + ret = device_probe(bus); + if (ret == -ENODEV) { /* No such device. */ + printf("W1 controller not available.\n"); + continue; + } + + if (ret) { /* Other error. */ + printf("W1 controller probe failed.\n"); + continue; + } + } + return 0; +} + +UCLASS_DRIVER(w1) = { + .name = "w1", + .id = UCLASS_W1, + .flags = DM_UC_FLAG_SEQ_ALIAS, + .per_device_auto_alloc_size = sizeof(struct w1_bus), + .post_probe = w1_post_probe, +#if CONFIG_IS_ENABLED(OF_CONTROL) + .post_bind = dm_scan_fdt_dev, +#endif + .per_child_platdata_auto_alloc_size = sizeof(struct w1_device), +}; diff --git a/include/dm/uclass-id.h b/include/dm/uclass-id.h index 7027ea0..fa72afb 100644 --- a/include/dm/uclass-id.h +++ b/include/dm/uclass-id.h @@ -92,6 +92,7 @@ enum uclass_id { UCLASS_VIDEO, /* Video or LCD device */ UCLASS_VIDEO_BRIDGE, /* Video bridge, e.g. DisplayPort to LVDS */ UCLASS_VIDEO_CONSOLE, /* Text console driver for video device */ + UCLASS_W1, /* Dallas 1-Wire bus */ UCLASS_WDT, /* Watchdot Timer driver */ UCLASS_COUNT, diff --git a/include/w1.h b/include/w1.h new file mode 100644 index 0000000..b36e0f8 --- /dev/null +++ b/include/w1.h @@ -0,0 +1,36 @@ +/* SPDX-License-Identifier: GPL-2.0+ + * + * Copyright (c) 2015 Free Electrons + * Copyright (c) 2015 NextThing Co + * + */ + +#ifndef __W1_H +#define __W1_H + +#include + +#define W1_FAMILY_DS24B33 0x23 +#define W1_FAMILY_DS2431 0x2d + +struct w1_device { + u64 id; +}; + +struct w1_ops { + u8 (*read_byte)(struct udevice *dev); + bool (*reset)(struct udevice *dev); + u8 (*triplet)(struct udevice *dev, bool bdir); + void (*write_byte)(struct udevice *dev, u8 byte); +}; + +int w1_get_bus(int busnum, struct udevice **busp); +u8 w1_get_device_family(struct udevice *dev); + +int w1_read_buf(struct udevice *dev, u8 *buf, unsigned int count); +int w1_read_byte(struct udevice *dev); +int w1_reset_select(struct udevice *dev); +int w1_write_buf(struct udevice *dev, u8 *buf, unsigned int count); +int w1_write_byte(struct udevice *dev, u8 byte); + +#endif From patchwork Tue Sep 18 07:35:25 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Eugen Hristev X-Patchwork-Id: 146878 Delivered-To: patch@linaro.org Received: by 2002:a2e:1648:0:0:0:0:0 with SMTP id 8-v6csp4706475ljw; Tue, 18 Sep 2018 00:43:11 -0700 (PDT) X-Google-Smtp-Source: ANB0VdbuIAOqqA49MJuzZfRqwwflJoTeKPL0UJi5X+V4ufcMLiFFkWFkRgeaSkyKvbs+3d88zdU8 X-Received: by 2002:a50:908d:: with SMTP id c13-v6mr49635928eda.179.1537256591878; Tue, 18 Sep 2018 00:43:11 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1537256591; cv=none; d=google.com; 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[81.169.180.215]) by mx.google.com with ESMTP id k46-v6si342699edb.231.2018.09.18.00.43.09; Tue, 18 Sep 2018 00:43:11 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of u-boot-bounces@lists.denx.de designates 81.169.180.215 as permitted sender) client-ip=81.169.180.215; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of u-boot-bounces@lists.denx.de designates 81.169.180.215 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de Received: by lists.denx.de (Postfix, from userid 105) id 45CDDC21EC2; Tue, 18 Sep 2018 07:41:55 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=none autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id E945AC21E7D; Tue, 18 Sep 2018 07:40:34 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id D0326C21E12; Tue, 18 Sep 2018 07:40:31 +0000 (UTC) Received: from esa2.microchip.iphmx.com (esa2.microchip.iphmx.com [68.232.149.84]) by lists.denx.de (Postfix) with ESMTPS id 0BAEDC21D65 for ; Tue, 18 Sep 2018 07:40:28 +0000 (UTC) X-IronPort-AV: E=Sophos;i="5.53,389,1531810800"; d="scan'208";a="20067712" Received: from smtpout.microchip.com (HELO email.microchip.com) ([198.175.253.82]) by esa2.microchip.iphmx.com with ESMTP/TLS/DHE-RSA-AES256-SHA; 18 Sep 2018 00:40:25 -0700 Received: from eh-station.mchp-main.com (10.10.76.4) by chn-sv-exch06.mchp-main.com (10.10.76.107) with Microsoft SMTP Server id 14.3.352.0; Tue, 18 Sep 2018 00:40:25 -0700 From: Eugen Hristev To: , Date: Tue, 18 Sep 2018 10:35:25 +0300 Message-ID: <1537256157-18001-3-git-send-email-eugen.hristev@microchip.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1537256157-18001-1-git-send-email-eugen.hristev@microchip.com> References: <1537256157-18001-1-git-send-email-eugen.hristev@microchip.com> MIME-Version: 1.0 Cc: maxime.ripard@bootlin.com, Maxime Ripard , nicolas.ferre@microchip.com Subject: [U-Boot] [PATCH v4 02/34] w1: Add 1-Wire gpio driver X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" From: Maxime Ripard Add a bus driver for bitbanging a 1-Wire bus over a GPIO. Signed-off-by: Maxime Ripard [eugen.hristev@microchip.com: fixed some issues] Signed-off-by: Eugen Hristev --- drivers/w1/Kconfig | 7 ++ drivers/w1/Makefile | 2 + drivers/w1/w1-gpio.c | 176 +++++++++++++++++++++++++++++++++++++++++++++++++++ 3 files changed, 185 insertions(+) create mode 100644 drivers/w1/w1-gpio.c diff --git a/drivers/w1/Kconfig b/drivers/w1/Kconfig index 64b27c6..d6e0457 100644 --- a/drivers/w1/Kconfig +++ b/drivers/w1/Kconfig @@ -13,6 +13,13 @@ config W1 if W1 +config W1_GPIO + bool "Enable 1-wire GPIO bitbanging" + default no + depends on DM_GPIO + help + Emulate a 1-wire bus using a GPIO. + endif endmenu diff --git a/drivers/w1/Makefile b/drivers/w1/Makefile index f81693b..7fd8697 100644 --- a/drivers/w1/Makefile +++ b/drivers/w1/Makefile @@ -1 +1,3 @@ obj-$(CONFIG_W1) += w1-uclass.o + +obj-$(CONFIG_W1_GPIO) += w1-gpio.o diff --git a/drivers/w1/w1-gpio.c b/drivers/w1/w1-gpio.c new file mode 100644 index 0000000..5e5d6b3 --- /dev/null +++ b/drivers/w1/w1-gpio.c @@ -0,0 +1,176 @@ +/* SPDX-License-Identifier: GPL-2.0+ + * + * Copyright (c) 2015 Free Electrons + * Copyright (c) 2015 NextThing Co + * + * Maxime Ripard + * + */ + +#include +#include +#include + +#include + +#define W1_TIMING_A 6 +#define W1_TIMING_B 64 +#define W1_TIMING_C 60 +#define W1_TIMING_D 10 +#define W1_TIMING_E 9 +#define W1_TIMING_F 55 +#define W1_TIMING_G 0 +#define W1_TIMING_H 480 +#define W1_TIMING_I 70 +#define W1_TIMING_J 410 + +struct w1_gpio_pdata { + struct gpio_desc gpio; + u64 search_id; +}; + +static bool w1_gpio_read_bit(struct udevice *dev) +{ + struct w1_gpio_pdata *pdata = dev_get_platdata(dev); + int val; + + dm_gpio_set_dir_flags(&pdata->gpio, GPIOD_IS_OUT); + udelay(W1_TIMING_A); + + dm_gpio_set_dir_flags(&pdata->gpio, GPIOD_IS_IN); + udelay(W1_TIMING_E); + + val = dm_gpio_get_value(&pdata->gpio); + if (val < 0) + debug("error in retrieving GPIO value"); + udelay(W1_TIMING_F); + + return val; +} + +static u8 w1_gpio_read_byte(struct udevice *dev) +{ + int i; + u8 ret = 0; + + for (i = 0; i < 8; ++i) + ret |= (w1_gpio_read_bit(dev) ? 1 : 0) << i; + + return ret; +} + +static void w1_gpio_write_bit(struct udevice *dev, bool bit) +{ + struct w1_gpio_pdata *pdata = dev_get_platdata(dev); + + dm_gpio_set_dir_flags(&pdata->gpio, GPIOD_IS_OUT); + + bit ? udelay(W1_TIMING_A) : udelay(W1_TIMING_C); + + dm_gpio_set_value(&pdata->gpio, 1); + + bit ? udelay(W1_TIMING_B) : udelay(W1_TIMING_D); +} + +static void w1_gpio_write_byte(struct udevice *dev, u8 byte) +{ + int i; + + for (i = 0; i < 8; ++i) + w1_gpio_write_bit(dev, (byte >> i) & 0x1); +} + +static bool w1_gpio_reset(struct udevice *dev) +{ + struct w1_gpio_pdata *pdata = dev_get_platdata(dev); + int val; + + /* initiate the reset pulse. first we must pull the bus to low */ + dm_gpio_set_dir_flags(&pdata->gpio, GPIOD_IS_OUT | GPIOD_IS_OUT_ACTIVE); + udelay(W1_TIMING_G); + + dm_gpio_set_value(&pdata->gpio, 0); + /* wait for the specified time with the bus kept low */ + udelay(W1_TIMING_H); + + /* now we must read the presence pulse */ + dm_gpio_set_dir_flags(&pdata->gpio, GPIOD_IS_IN); + udelay(W1_TIMING_I); + + val = dm_gpio_get_value(&pdata->gpio); + if (val < 0) + debug("error in retrieving GPIO value"); + + /* if nobody pulled the bus down , it means nobody is on the bus */ + if (val != 0) + return 1; + /* we have the bus pulled down, let's wait for the specified presence time */ + udelay(W1_TIMING_J); + + /* read again, the other end should leave the bus free */ + val = dm_gpio_get_value(&pdata->gpio); + if (val < 0) + debug("error in retrieving GPIO value"); + + /* bus is not going up again, so we have an error */ + if (val != 1) + return 1; + + /* all good, presence detected */ + return 0; +} + +static u8 w1_gpio_triplet(struct udevice *dev, bool bdir) +{ + u8 id_bit = w1_gpio_read_bit(dev); + u8 comp_bit = w1_gpio_read_bit(dev); + u8 retval; + + if (id_bit && comp_bit) + return 0x03; /* error */ + + if (!id_bit && !comp_bit) { + /* Both bits are valid, take the direction given */ + retval = bdir ? 0x04 : 0; + } else { + /* Only one bit is valid, take that direction */ + bdir = id_bit; + retval = id_bit ? 0x05 : 0x02; + } + + w1_gpio_write_bit(dev, bdir); + return retval; +} + +static const struct w1_ops w1_gpio_ops = { + .read_byte = w1_gpio_read_byte, + .reset = w1_gpio_reset, + .triplet = w1_gpio_triplet, + .write_byte = w1_gpio_write_byte, +}; + +static int w1_gpio_ofdata_to_platdata(struct udevice *dev) +{ + struct w1_gpio_pdata *pdata = dev_get_platdata(dev); + int ret; + + ret = gpio_request_by_name(dev, "gpios", 0, &pdata->gpio, 0); + if (ret < 0) + printf("Error claiming GPIO %d\n", ret); + + return ret; +}; + +static const struct udevice_id w1_gpio_id[] = { + { "w1-gpio", 0 }, + { }, +}; + +U_BOOT_DRIVER(w1_gpio_drv) = { + .id = UCLASS_W1, + .name = "w1_gpio_drv", + .of_match = w1_gpio_id, + .ofdata_to_platdata = w1_gpio_ofdata_to_platdata, + .ops = &w1_gpio_ops, + .platdata_auto_alloc_size = sizeof(struct w1_gpio_pdata), +}; From patchwork Tue Sep 18 07:35:27 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Eugen Hristev X-Patchwork-Id: 146877 Delivered-To: patch@linaro.org Received: by 2002:a2e:1648:0:0:0:0:0 with SMTP id 8-v6csp4705642ljw; Tue, 18 Sep 2018 00:42:09 -0700 (PDT) X-Google-Smtp-Source: ANB0VdaFMNpUxm75dZLjN/wHYxcH4/aQ6XHu1uzdOBv5TCwr5jzbuXWoXcY0GAu5E2xJib/rxwOC X-Received: by 2002:a50:de8e:: with SMTP id c14-v6mr47434167edl.196.1537256528984; Tue, 18 Sep 2018 00:42:08 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1537256528; cv=none; d=google.com; s=arc-20160816; b=SAoLfPLGVn1wU5JDpVQsdRQqqWPYubBBYBZ1JL3QA794U9Z3KtFCiwbjBg9wbtvMDZ qPB2ePB3TPMzCCbD9Gj5gftoF7b7VeyO0KcPiuqs4/cvmrCdDpcU4O0q7bJFQ9W6Eeql U3RWr4xj3v0x7aRD22eANf5GW73TPovwUhWxngrhQz2+b41WiZwj9o7clZxEsDHw9ov6 nD/zExi+K7Njwl/eI2/JhE32zuBlckYQgfhPu3G3R6vaa74wyHnADyrHw3nw/YUU7ZZ8 GvPg2YMlAUQfvJUuEhZT0rzk9NBzI+K6aocD78W60ZRJVKkNf7W45itsQRVoD2u3fJnb jAYQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:content-transfer-encoding:list-subscribe:list-help :list-post:list-archive:list-unsubscribe:list-id:precedence:subject :cc:mime-version:references:in-reply-to:message-id:date:to:from; bh=SzfaFSHL70Rua5npyqHSQFpHRjgz0+Jyrbtir1TlyDo=; b=wDKRpFSYsCLMtYPsg7lm1zjET/0HLIB6dpoTQ2uOEY+sah6C1M8z8zrMMJ8bflt1vw ikjUCNJQ/NcDOIyJrPXKP1jVqMFH5ZuM9+jvuoVu3IM3L9OTkfqo34aUd4L8/x/FFkt+ /mMX35k7uT2vgAQ7yNOrhdNAc8fVbokP7hfhPnYp0VqNoirvQLJNWtTEWwQBNZ3oVy2v 1MImEXM1O6j+d/px+xlmES+O+w/ARyvc9Eafw/Qq4pgfgVsb/zS4ZNF4oxFWzK5/kdc3 eZPFhzpFDgWBxF0lVtne4wwugdM9W695GIvXB3r9gvmhUTA3kPiBL0zg5yRQ04+Dbaqv AHMg== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of u-boot-bounces@lists.denx.de designates 81.169.180.215 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de Return-Path: Received: from lists.denx.de (dione.denx.de. [81.169.180.215]) by mx.google.com with ESMTP id c51-v6si9752251eda.178.2018.09.18.00.42.08; Tue, 18 Sep 2018 00:42:08 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of u-boot-bounces@lists.denx.de designates 81.169.180.215 as permitted sender) client-ip=81.169.180.215; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of u-boot-bounces@lists.denx.de designates 81.169.180.215 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de Received: by lists.denx.de (Postfix, from userid 105) id 832CDC21EE7; Tue, 18 Sep 2018 07:41:30 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=none autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 20A70C21E4F; Tue, 18 Sep 2018 07:40:34 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id C0AB9C21E0D; Tue, 18 Sep 2018 07:40:31 +0000 (UTC) Received: from esa2.microchip.iphmx.com (esa2.microchip.iphmx.com [68.232.149.84]) by lists.denx.de (Postfix) with ESMTPS id DD081C21D74 for ; Tue, 18 Sep 2018 07:40:29 +0000 (UTC) X-IronPort-AV: E=Sophos;i="5.53,389,1531810800"; d="scan'208";a="20067714" Received: from smtpout.microchip.com (HELO email.microchip.com) ([198.175.253.82]) by esa2.microchip.iphmx.com with ESMTP/TLS/DHE-RSA-AES256-SHA; 18 Sep 2018 00:40:29 -0700 Received: from eh-station.mchp-main.com (10.10.76.4) by chn-sv-exch06.mchp-main.com (10.10.76.107) with Microsoft SMTP Server id 14.3.352.0; Tue, 18 Sep 2018 00:40:28 -0700 From: Eugen Hristev To: , Date: Tue, 18 Sep 2018 10:35:27 +0300 Message-ID: <1537256157-18001-5-git-send-email-eugen.hristev@microchip.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1537256157-18001-1-git-send-email-eugen.hristev@microchip.com> References: <1537256157-18001-1-git-send-email-eugen.hristev@microchip.com> MIME-Version: 1.0 Cc: maxime.ripard@bootlin.com, Maxime Ripard , nicolas.ferre@microchip.com Subject: [U-Boot] [PATCH v4 04/34] W1-EEPROM: Add an W1-EEPROM uclass for 1 wire EEPROMs X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" From: Maxime Ripard We might want to access data stored onto one wire EEPROMs. Create a framework to provide a consistent API. Signed-off-by: Maxime Ripard [eugen.hristev@microchip.com: reworked patch] Signed-off-by: Eugen Hristev --- drivers/Kconfig | 2 + drivers/Makefile | 1 + drivers/w1-eeprom/Kconfig | 17 +++++ drivers/w1-eeprom/Makefile | 2 + drivers/w1-eeprom/w1-eeprom-uclass.c | 116 +++++++++++++++++++++++++++++++++++ include/dm/uclass-id.h | 1 + include/w1-eeprom.h | 33 ++++++++++ 7 files changed, 172 insertions(+) create mode 100644 drivers/w1-eeprom/Kconfig create mode 100644 drivers/w1-eeprom/Makefile create mode 100644 drivers/w1-eeprom/w1-eeprom-uclass.c create mode 100644 include/w1-eeprom.h diff --git a/drivers/Kconfig b/drivers/Kconfig index 6f91eac..e4396b4 100644 --- a/drivers/Kconfig +++ b/drivers/Kconfig @@ -108,6 +108,8 @@ source "drivers/video/Kconfig" source "drivers/w1/Kconfig" +source "drivers/w1-eeprom/Kconfig" + source "drivers/watchdog/Kconfig" config PHYS_TO_BUS diff --git a/drivers/Makefile b/drivers/Makefile index 4ca07c3..1d5905f 100644 --- a/drivers/Makefile +++ b/drivers/Makefile @@ -106,6 +106,7 @@ obj-y += soc/ obj-y += thermal/ obj-y += axi/ obj-$(CONFIG_W1) += w1/ +obj-$(CONFIG_W1_EEPROM) += w1-eeprom/ obj-$(CONFIG_MACH_PIC32) += ddr/microchip/ endif diff --git a/drivers/w1-eeprom/Kconfig b/drivers/w1-eeprom/Kconfig new file mode 100644 index 0000000..d5ddc80 --- /dev/null +++ b/drivers/w1-eeprom/Kconfig @@ -0,0 +1,17 @@ +# +# EEPROM subsystem configuration +# + +menu "1-wire EEPROM support" + +config W1_EEPROM + bool "Enable support for EEPROMs on 1wire interface" + depends on DM + help + Support for the EEPROMs connected on 1-wire Dallas protocol interface + +if W1_EEPROM + +endif + +endmenu diff --git a/drivers/w1-eeprom/Makefile b/drivers/w1-eeprom/Makefile new file mode 100644 index 0000000..b72950e --- /dev/null +++ b/drivers/w1-eeprom/Makefile @@ -0,0 +1,2 @@ +obj-$(CONFIG_W1_EEPROM) += w1-eeprom-uclass.o + diff --git a/drivers/w1-eeprom/w1-eeprom-uclass.c b/drivers/w1-eeprom/w1-eeprom-uclass.c new file mode 100644 index 0000000..7b05793 --- /dev/null +++ b/drivers/w1-eeprom/w1-eeprom-uclass.c @@ -0,0 +1,116 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * + * Copyright (c) 2015 Free Electrons + * Copyright (c) 2015 NextThing Co. + * Copyright (c) 2018 Microchip Technology, Inc. + * + * Maxime Ripard + * Eugen Hristev + * + */ + +#include +#include +#include +#include + +#include + +int w1_eeprom_read_buf(struct udevice *dev, unsigned int offset, + u8 *buf, unsigned int count) +{ + const struct w1_eeprom_ops *ops = device_get_ops(dev); + u64 id = 0; + int ret; + + if (!ops->read_buf) + return -ENOSYS; + + ret = w1_eeprom_get_id(dev, &id); + if (ret) + return ret; + if (!id) + return -ENODEV; + + return ops->read_buf(dev, offset, buf, count); +} + +int w1_eeprom_register_new_device(u64 id) +{ + u8 family = id & 0xff; + int ret; + struct udevice *dev; + + for (ret = uclass_first_device(UCLASS_W1_EEPROM, &dev); + !ret && dev; + uclass_next_device(&dev)) { + if (ret || !dev) { + debug("cannot find w1 eeprom dev\n"); + return ret; + } + if (dev_get_driver_data(dev) == family) { + struct w1_device *w1; + + w1 = dev_get_parent_platdata(dev); + if (w1->id) /* device already in use */ + continue; + w1->id = id; + debug("%s: Match found: %s:%s %llx\n", __func__, + dev->name, dev->driver->name, id); + return 0; + } + } + + debug("%s: No matches found: error %d\n", __func__, ret); + + return ret; +} + +int w1_eeprom_get_id(struct udevice *dev, u64 *id) +{ + struct w1_device *w1 = dev_get_parent_platdata(dev); + + if (!w1) + return -ENODEV; + *id = w1->id; + + return 0; +} + +UCLASS_DRIVER(w1_eeprom) = { + .name = "w1_eeprom", + .id = UCLASS_W1_EEPROM, + .flags = DM_UC_FLAG_SEQ_ALIAS, +#if CONFIG_IS_ENABLED(OF_CONTROL) + .post_bind = dm_scan_fdt_dev, +#endif +}; + +int w1_eeprom_dm_init(void) +{ + struct udevice *dev; + struct uclass *uc; + int ret; + + ret = uclass_get(UCLASS_W1_EEPROM, &uc); + if (ret) { + debug("W1_EEPROM uclass not available\n"); + return ret; + } + + uclass_foreach_dev(dev, uc) { + ret = device_probe(dev); + if (ret == -ENODEV) { /* No such device. */ + debug("W1_EEPROM not available.\n"); + continue; + } + + if (ret) { /* Other error. */ + printf("W1_EEPROM probe failed, error %d\n", ret); + continue; + } + } + + return 0; +} diff --git a/include/dm/uclass-id.h b/include/dm/uclass-id.h index fa72afb..71adf7e 100644 --- a/include/dm/uclass-id.h +++ b/include/dm/uclass-id.h @@ -93,6 +93,7 @@ enum uclass_id { UCLASS_VIDEO_BRIDGE, /* Video bridge, e.g. DisplayPort to LVDS */ UCLASS_VIDEO_CONSOLE, /* Text console driver for video device */ UCLASS_W1, /* Dallas 1-Wire bus */ + UCLASS_W1_EEPROM, /* one-wire EEPROMs */ UCLASS_WDT, /* Watchdot Timer driver */ UCLASS_COUNT, diff --git a/include/w1-eeprom.h b/include/w1-eeprom.h new file mode 100644 index 0000000..2233736 --- /dev/null +++ b/include/w1-eeprom.h @@ -0,0 +1,33 @@ +/* SPDX-License-Identifier: GPL-2.0+ + * + * Copyright (c) 2015 Free Electrons + * Copyright (c) 2015 NextThing Co + * Copyright (c) 2018 Microchip Technology, Inc. + * + */ + +#ifndef __W1_EEPROM_H +#define __W1_EEPROM_H + +struct udevice; + +struct w1_eeprom_ops { + /* + * Reads a buff from the given EEPROM memory, starting at + * given offset and place the results into the given buffer. + * Should read given count of bytes. + * Should return 0 on success, and normal error.h on error + */ + int (*read_buf)(struct udevice *dev, unsigned int offset, + u8 *buf, unsigned int count); +}; + +int w1_eeprom_read_buf(struct udevice *dev, unsigned int offset, + u8 *buf, unsigned int count); + +int w1_eeprom_dm_init(void); + +int w1_eeprom_register_new_device(u64 id); + +int w1_eeprom_get_id(struct udevice *dev, u64 *id); +#endif From patchwork Tue Sep 18 07:35:29 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Eugen Hristev X-Patchwork-Id: 146880 Delivered-To: patch@linaro.org Received: by 2002:a2e:1648:0:0:0:0:0 with SMTP id 8-v6csp4708289ljw; Tue, 18 Sep 2018 00:45:14 -0700 (PDT) X-Google-Smtp-Source: ANB0VdaSfDQVJVKMWaToMo3GyHABJcdbQ5IdgbLXXLlB6U6u/tWtOypRHVOVJ5vJyETOeASA97aI X-Received: by 2002:a50:8c45:: with SMTP id p63-v6mr49160897edp.84.1537256714827; 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[81.169.180.215]) by mx.google.com with ESMTP id 92-v6si5004861edj.173.2018.09.18.00.45.14; Tue, 18 Sep 2018 00:45:14 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of u-boot-bounces@lists.denx.de designates 81.169.180.215 as permitted sender) client-ip=81.169.180.215; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of u-boot-bounces@lists.denx.de designates 81.169.180.215 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de Received: by lists.denx.de (Postfix, from userid 105) id 5F3FEC21E56; Tue, 18 Sep 2018 07:43:06 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=none autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 87F9AC21EC3; Tue, 18 Sep 2018 07:40:47 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 309CAC21EBE; Tue, 18 Sep 2018 07:40:40 +0000 (UTC) Received: from esa2.microchip.iphmx.com (esa2.microchip.iphmx.com [68.232.149.84]) by lists.denx.de (Postfix) with ESMTPS id 3C0A1C21E68 for ; Tue, 18 Sep 2018 07:40:34 +0000 (UTC) X-IronPort-AV: E=Sophos;i="5.53,389,1531810800"; d="scan'208";a="20067716" Received: from smtpout.microchip.com (HELO email.microchip.com) ([198.175.253.82]) by esa2.microchip.iphmx.com with ESMTP/TLS/DHE-RSA-AES256-SHA; 18 Sep 2018 00:40:33 -0700 Received: from eh-station.mchp-main.com (10.10.76.4) by chn-sv-exch06.mchp-main.com (10.10.76.107) with Microsoft SMTP Server id 14.3.352.0; Tue, 18 Sep 2018 00:40:33 -0700 From: Eugen Hristev To: , Date: Tue, 18 Sep 2018 10:35:29 +0300 Message-ID: <1537256157-18001-7-git-send-email-eugen.hristev@microchip.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1537256157-18001-1-git-send-email-eugen.hristev@microchip.com> References: <1537256157-18001-1-git-send-email-eugen.hristev@microchip.com> MIME-Version: 1.0 Cc: maxime.ripard@bootlin.com, Maxime Ripard , nicolas.ferre@microchip.com Subject: [U-Boot] [PATCH v4 06/34] W1-EEPROM: add support for Maxim DS24 eeprom families X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" From: Maxime Ripard Add a driver that supports Maxim 1 wire EEPROMs families DS24B33 and DS2431. Can be extended for other families as well. Signed-off-by: Maxime Ripard [eugen.hristev@microchip.com: reworked driver] Signed-off-by: Eugen Hristev --- drivers/w1-eeprom/Kconfig | 6 +++++ drivers/w1-eeprom/Makefile | 2 ++ drivers/w1-eeprom/ds24xxx.c | 55 +++++++++++++++++++++++++++++++++++++++++++++ 3 files changed, 63 insertions(+) create mode 100644 drivers/w1-eeprom/ds24xxx.c diff --git a/drivers/w1-eeprom/Kconfig b/drivers/w1-eeprom/Kconfig index d5ddc80..20ec549 100644 --- a/drivers/w1-eeprom/Kconfig +++ b/drivers/w1-eeprom/Kconfig @@ -12,6 +12,12 @@ config W1_EEPROM if W1_EEPROM +config W1_EEPROM_DS24XXX + bool "Enable Maxim DS24 families EEPROM support" + depends on W1 + help + Maxim DS24 EEPROMs 1-Wire EEPROM support + endif endmenu diff --git a/drivers/w1-eeprom/Makefile b/drivers/w1-eeprom/Makefile index b72950e..3f4aa13 100644 --- a/drivers/w1-eeprom/Makefile +++ b/drivers/w1-eeprom/Makefile @@ -1,2 +1,4 @@ obj-$(CONFIG_W1_EEPROM) += w1-eeprom-uclass.o +obj-$(CONFIG_W1_EEPROM_DS24XXX) += ds24xxx.o + diff --git a/drivers/w1-eeprom/ds24xxx.c b/drivers/w1-eeprom/ds24xxx.c new file mode 100644 index 0000000..56186e5 --- /dev/null +++ b/drivers/w1-eeprom/ds24xxx.c @@ -0,0 +1,55 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * + * Copyright (c) 2015 Free Electrons + * Copyright (c) 2015 NextThing Co + * Copyright (c) 2018 Microchip Technology, Inc. + * + */ + +#include +#include +#include +#include +#include + +#define W1_F2D_READ_EEPROM 0xf0 + +static int ds24xxx_read_buf(struct udevice *dev, unsigned int offset, + u8 *buf, unsigned int count) +{ + w1_reset_select(dev); + + w1_write_byte(dev, W1_F2D_READ_EEPROM); + w1_write_byte(dev, offset & 0xff); + w1_write_byte(dev, offset >> 8); + + return w1_read_buf(dev, buf, count); +} + +static int ds24xxx_probe(struct udevice *dev) +{ + struct w1_device *w1; + + w1 = dev_get_platdata(dev); + w1->id = 0; + return 0; +} + +static const struct w1_eeprom_ops ds24xxx_ops = { + .read_buf = ds24xxx_read_buf, +}; + +static const struct udevice_id ds24xxx_id[] = { + { .compatible = "maxim,ds24b33", .data = W1_FAMILY_DS24B33 }, + { .compatible = "maxim,ds2431", .data = W1_FAMILY_DS2431 }, + { }, +}; + +U_BOOT_DRIVER(ds24xxx) = { + .name = "ds24xxx", + .id = UCLASS_W1_EEPROM, + .of_match = ds24xxx_id, + .ops = &ds24xxx_ops, + .probe = ds24xxx_probe, +};