From patchwork Mon Jul 26 07:35:14 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: =?utf-8?q?Stefan_Riedm=C3=BCller?= X-Patchwork-Id: 486096 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.5 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 80B3DC43214 for ; Mon, 26 Jul 2021 07:35:24 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 67AF760F4C for ; Mon, 26 Jul 2021 07:35:24 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232376AbhGZGyy (ORCPT ); Mon, 26 Jul 2021 02:54:54 -0400 Received: from mickerik.phytec.de ([195.145.39.210]:56428 "EHLO mickerik.phytec.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232395AbhGZGyw (ORCPT ); Mon, 26 Jul 2021 02:54:52 -0400 DKIM-Signature: v=1; a=rsa-sha256; d=phytec.de; s=a4; c=relaxed/simple; q=dns/txt; i=@phytec.de; t=1627284919; x=1629876919; h=From:Sender:Reply-To:Subject:Date:Message-Id:To:Cc:MIME-Version:Content-Type: Content-Transfer-Encoding:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To:References:List-Id: List-Help:List-Unsubscribe:List-Subscribe:List-Post:List-Owner:List-Archive; bh=+H1mSGK8sEEJKzfOg24gWavE+r+Wd/b4Q6Yu1wUkNo4=; b=M/7ocF/1e3w1mqZdZRSAQ4S2xN+j0PwE4h2Ez6JDTwFjw8p14m7hIGIgXOyL/4q7 uZGa6EHEOJJAp9FgTNtrzs31baO2ikAwhSNV6AgDnJ3H1EDB9IeC3GQE3sqaHVBk dj5u2QiLgv6q0zJG3Pe6bXJAkVPiU236m1pk775Ks5g=; X-AuditID: c39127d2-6feea24000001daf-a5-60fe65b711de Received: from idefix.phytec.de (Unknown_Domain [172.16.0.10]) by mickerik.phytec.de (PHYTEC Mail Gateway) with SMTP id 54.82.07599.7B56EF06; Mon, 26 Jul 2021 09:35:19 +0200 (CEST) Received: from augenblix2.phytec.de ([172.16.0.56]) by idefix.phytec.de (IBM Domino Release 9.0.1FP7) with ESMTP id 2021072609351871-1233315 ; Mon, 26 Jul 2021 09:35:18 +0200 From: Stefan Riedmueller To: Laurent Pinchart , Mauro Carvalho Chehab , Rob Herring Cc: Christian Hemp , Stefan Riedmueller , Sakari Ailus , linux-media@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v7 2/6] media: mt9p031: Make pixel clock polarity configurable by DT Date: Mon, 26 Jul 2021 09:35:14 +0200 Message-Id: <20210726073518.2167398-3-s.riedmueller@phytec.de> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210726073518.2167398-1-s.riedmueller@phytec.de> References: <20210726073518.2167398-1-s.riedmueller@phytec.de> MIME-Version: 1.0 X-MIMETrack: Itemize by SMTP Server on Idefix/Phytec(Release 9.0.1FP7|August 17, 2016) at 26.07.2021 09:35:18, Serialize by Router on Idefix/Phytec(Release 9.0.1FP7|August 17, 2016) at 26.07.2021 09:35:19 X-TNEFEvaluated: 1 X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFtrFLMWRmVeSWpSXmKPExsWyRoCBS3d76r8Eg65/7Bbzj5xjteicuITd 4vKuOWwWPRu2slos2/SHyaJ17xF2i09bvjE5sHvM7pjJ6rFpVSebx7yTgR6fN8kFsERx2aSk 5mSWpRbp2yVwZczrnsxUsEmqYv6tP8wNjOvEuhg5OSQETCQmb57E3sXIxSEksI1R4uCaDmYI 5wKjxOXp21hAqtgEjCQWTGtkAkmICLQxSuw40swEkmAWuM4oseEHM4gtLBAi0TbvCiuIzSKg KnFqcQPQWA4OXgE7iWlH2CC2yUvMvPSdHcTmFLCXuPX0PZgtBFTS2rkRzOYVEJQ4OfMJC8gu CYErjBITXs1jgWgWkji9+CwzxF5tiWULXzNPYBSYhaRnFpLUAkamVYxCuZnJ2alFmdl6BRmV JanJeimpmxiB4Xt4ovqlHYx9czwOMTJxMB5ilOBgVhLhdVjxO0GINyWxsiq1KD++qDQntfgQ ozQHi5I47wbekjAhgfTEktTs1NSC1CKYLBMHp1QD47bZhQ1Fn3fd3xQxg1HrwSWPJ38fqRfu P/91Mx+Lk1LEzRXnNyxvW3ZtyuezjBMaul0OFc+Y+z17rpncY4k/rAWBmxZ3OFScvLJM/gnT 0fJTm74olrK+OXwtJjbwSOAhlzkCjWkhV0Iyv89z+sU4P/Loidgb/36vjY6UDQgtX17YfrTl 61GXyF9KLMUZiYZazEXFiQAlJDfzTQIAAA== Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org From: Christian Hemp Evaluate the desired pixel clock polarity from the device tree. Signed-off-by: Christian Hemp Signed-off-by: Stefan Riedmueller --- drivers/media/i2c/Kconfig | 1 + drivers/media/i2c/mt9p031.c | 20 +++++++++++++++++++- include/media/i2c/mt9p031.h | 1 + 3 files changed, 21 insertions(+), 1 deletion(-) diff --git a/drivers/media/i2c/Kconfig b/drivers/media/i2c/Kconfig index 588f8eb95984..1f9e98be8066 100644 --- a/drivers/media/i2c/Kconfig +++ b/drivers/media/i2c/Kconfig @@ -1187,6 +1187,7 @@ config VIDEO_MT9P031 select MEDIA_CONTROLLER select VIDEO_V4L2_SUBDEV_API select VIDEO_APTINA_PLL + select V4L2_FWNODE help This is a Video4Linux2 sensor driver for the Aptina (Micron) mt9p031 5 Mpixel camera. diff --git a/drivers/media/i2c/mt9p031.c b/drivers/media/i2c/mt9p031.c index 9dea7c813852..ea90aff576ba 100644 --- a/drivers/media/i2c/mt9p031.c +++ b/drivers/media/i2c/mt9p031.c @@ -27,6 +27,7 @@ #include #include #include +#include #include #include "aptina-pll.h" @@ -372,6 +373,14 @@ static int __mt9p031_set_power(struct mt9p031 *mt9p031, bool on) return ret; } + /* Configure the pixel clock polarity */ + if (mt9p031->pdata && mt9p031->pdata->pixclk_pol) { + ret = mt9p031_write(client, MT9P031_PIXEL_CLOCK_CONTROL, + MT9P031_PIXEL_CLOCK_INVERT); + if (ret < 0) + return ret; + } + return v4l2_ctrl_handler_setup(&mt9p031->ctrls); } @@ -1014,8 +1023,11 @@ static const struct v4l2_subdev_internal_ops mt9p031_subdev_internal_ops = { static struct mt9p031_platform_data * mt9p031_get_pdata(struct i2c_client *client) { - struct mt9p031_platform_data *pdata; + struct mt9p031_platform_data *pdata = NULL; struct device_node *np; + struct v4l2_fwnode_endpoint endpoint = { + .bus_type = V4L2_MBUS_PARALLEL + }; if (!IS_ENABLED(CONFIG_OF) || !client->dev.of_node) return client->dev.platform_data; @@ -1024,6 +1036,9 @@ mt9p031_get_pdata(struct i2c_client *client) if (!np) return NULL; + if (v4l2_fwnode_endpoint_parse(of_fwnode_handle(np), &endpoint) < 0) + goto done; + pdata = devm_kzalloc(&client->dev, sizeof(*pdata), GFP_KERNEL); if (!pdata) goto done; @@ -1031,6 +1046,9 @@ mt9p031_get_pdata(struct i2c_client *client) of_property_read_u32(np, "input-clock-frequency", &pdata->ext_freq); of_property_read_u32(np, "pixel-clock-frequency", &pdata->target_freq); + pdata->pixclk_pol = !!(endpoint.bus.parallel.flags & + V4L2_MBUS_PCLK_SAMPLE_RISING); + done: of_node_put(np); return pdata; diff --git a/include/media/i2c/mt9p031.h b/include/media/i2c/mt9p031.h index 7c29c53aa988..f933cd0be8e5 100644 --- a/include/media/i2c/mt9p031.h +++ b/include/media/i2c/mt9p031.h @@ -10,6 +10,7 @@ struct v4l2_subdev; * @target_freq: Pixel clock frequency */ struct mt9p031_platform_data { + unsigned int pixclk_pol:1; int ext_freq; int target_freq; }; From patchwork Mon Jul 26 07:35:15 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: =?utf-8?q?Stefan_Riedm=C3=BCller?= X-Patchwork-Id: 486095 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.5 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9F11AC4320E for ; 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b=belzzakJEqyfnDmARkg2McxWZf79oFA6EjqOb0KShewFP3BFGy92H2GRzUEgdxXQ 6lD7x40YfNDypgZIzH2TTy1arSlypwWosPREmShc6w3iJKR2H7P51VVKYE10fwre XfMdKfI7p8vgngKXwtmEGzyc1q8RHuoiAjJ0r8Q0784=; X-AuditID: c39127d2-1e4f970000001daf-a7-60fe65b73cb8 Received: from idefix.phytec.de (Unknown_Domain [172.16.0.10]) by mickerik.phytec.de (PHYTEC Mail Gateway) with SMTP id 05.82.07599.7B56EF06; Mon, 26 Jul 2021 09:35:19 +0200 (CEST) Received: from augenblix2.phytec.de ([172.16.0.56]) by idefix.phytec.de (IBM Domino Release 9.0.1FP7) with ESMTP id 2021072609351899-1233316 ; Mon, 26 Jul 2021 09:35:18 +0200 From: Stefan Riedmueller To: Laurent Pinchart , Mauro Carvalho Chehab , Rob Herring Cc: Dirk Bender , Stefan Riedmueller , Sakari Ailus , linux-media@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v7 3/6] media: mt9p031: Fix corrupted frame after restarting stream Date: Mon, 26 Jul 2021 09:35:15 +0200 Message-Id: <20210726073518.2167398-4-s.riedmueller@phytec.de> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210726073518.2167398-1-s.riedmueller@phytec.de> References: <20210726073518.2167398-1-s.riedmueller@phytec.de> MIME-Version: 1.0 X-MIMETrack: Itemize by SMTP Server on Idefix/Phytec(Release 9.0.1FP7|August 17, 2016) at 26.07.2021 09:35:19, Serialize by Router on Idefix/Phytec(Release 9.0.1FP7|August 17, 2016) at 26.07.2021 09:35:19 X-TNEFEvaluated: 1 X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFtrNLMWRmVeSWpSXmKPExsWyRoCBS3d76r8Eg2PnZCzmHznHatE5cQm7 xeVdc9gsejZsZbVYtukPk0Xr3iPsFp+2fGNyYPeY3TGT1WPTqk42j3knAz0+b5ILYInisklJ zcksSy3St0vgyvg1/QpbwTWRisM/bBoYPwt0MXJySAiYSFxff5Oti5GLQ0hgG6PEx3PPmSCc C4wSb5cfYgOpYhMwklgwrREsISLQxiix40gzmMMscI1R4vvfB+wgVcICwRInph5mAbFZBFQl XvX3gHXzCthJzOh4ywaxT15i5qXvYPWcAvYSt56+B7OFgGpaOzeyQ9QLSpyc+YQFZIGEwBVG iQNHNzJBNAtJnF58lhnEZhbQlli28DXzBEaBWUh6ZiFJLWBkWsUolJuZnJ1alJmtV5BRWZKa rJeSuokRGMCHJ6pf2sHYN8fjECMTB+MhRgkOZiURXocVvxOEeFMSK6tSi/Lji0pzUosPMUpz sCiJ827gLQkTEkhPLEnNTk0tSC2CyTJxcEo1MHrPZpP1Wqs2U3CJ9bKrjeUxXiu/ecrl8a2v Vn598pzBzPl9hQxbXXneWE9k5RdcfqqsJTFy4rLIwLioFzEbPKf23+xTmq544LAWw5Fl1Z8t +V6knTpzWSwmhWdT6F25WkddC5EJxg6MKT0FH+/vO2p/v+zBxYxWy4OHHKV6WxZqB06u+xpb rMRSnJFoqMVcVJwIAFki6e5OAgAA Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org From: Dirk Bender To prevent corrupted frames after starting and stopping the sensor its datasheet specifies a specific pause sequence to follow: Stopping: Set Pause_Restart Bit -> Set Restart Bit -> Set Chip_Enable Off Restarting: Set Chip_Enable On -> Clear Pause_Restart Bit The Restart Bit is cleared automatically and must not be cleared manually as this would cause undefined behavior. Signed-off-by: Dirk Bender Signed-off-by: Stefan Riedmueller --- drivers/media/i2c/mt9p031.c | 28 +++++++++++++++++++++++++++- 1 file changed, 27 insertions(+), 1 deletion(-) diff --git a/drivers/media/i2c/mt9p031.c b/drivers/media/i2c/mt9p031.c index ea90aff576ba..ee2777059682 100644 --- a/drivers/media/i2c/mt9p031.c +++ b/drivers/media/i2c/mt9p031.c @@ -79,7 +79,9 @@ #define MT9P031_PIXEL_CLOCK_INVERT (1 << 15) #define MT9P031_PIXEL_CLOCK_SHIFT(n) ((n) << 8) #define MT9P031_PIXEL_CLOCK_DIVIDE(n) ((n) << 0) -#define MT9P031_FRAME_RESTART 0x0b +#define MT9P031_RESTART 0x0b +#define MT9P031_FRAME_PAUSE_RESTART (1 << 1) +#define MT9P031_FRAME_RESTART (1 << 0) #define MT9P031_SHUTTER_DELAY 0x0c #define MT9P031_RST 0x0d #define MT9P031_RST_ENABLE 1 @@ -456,9 +458,23 @@ static int mt9p031_set_params(struct mt9p031 *mt9p031) static int mt9p031_s_stream(struct v4l2_subdev *subdev, int enable) { struct mt9p031 *mt9p031 = to_mt9p031(subdev); + struct i2c_client *client = v4l2_get_subdevdata(subdev); + int val; int ret; if (!enable) { + /* enable pause restart */ + val = MT9P031_FRAME_PAUSE_RESTART; + ret = mt9p031_write(client, MT9P031_RESTART, val); + if (ret < 0) + return ret; + + /* enable restart + keep pause restart set */ + val |= MT9P031_FRAME_RESTART; + ret = mt9p031_write(client, MT9P031_RESTART, val); + if (ret < 0) + return ret; + /* Stop sensor readout */ ret = mt9p031_set_output_control(mt9p031, MT9P031_OUTPUT_CONTROL_CEN, 0); @@ -478,6 +494,16 @@ static int mt9p031_s_stream(struct v4l2_subdev *subdev, int enable) if (ret < 0) return ret; + /* + * - clear pause restart + * - don't clear restart as clearing restart manually can cause + * undefined behavior + */ + val = MT9P031_FRAME_RESTART; + ret = mt9p031_write(client, MT9P031_RESTART, val); + if (ret < 0) + return ret; + return mt9p031_pll_enable(mt9p031); } From patchwork Mon Jul 26 07:35:17 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: =?utf-8?q?Stefan_Riedm=C3=BCller?= X-Patchwork-Id: 486094 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-21.5 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI, MENTIONS_GIT_HOSTING, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 36B5CC19F34 for ; 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b=iIZo2jPjI7wmegLQdXzhzfhphOz7wdbAe0/YtyvZOAAQE0YtjXiqBJPWFBvUUiO6 ZfK1+LEVUO5Erg8YNMMHI+ek5FEr137zWmdXZ1Qkmv9YvzPUFAs8GppaLfAuo+l+ G4ZfXLGOq9hLozy3QIEjKmM6RXIl6NtZPEVeeDQGLaQ=; X-AuditID: c39127d2-1d8f870000001daf-ac-60fe65b7c510 Received: from idefix.phytec.de (Unknown_Domain [172.16.0.10]) by mickerik.phytec.de (PHYTEC Mail Gateway) with SMTP id 66.82.07599.7B56EF06; Mon, 26 Jul 2021 09:35:19 +0200 (CEST) Received: from augenblix2.phytec.de ([172.16.0.56]) by idefix.phytec.de (IBM Domino Release 9.0.1FP7) with ESMTP id 2021072609351952-1233318 ; Mon, 26 Jul 2021 09:35:19 +0200 From: Stefan Riedmueller To: Laurent Pinchart , Mauro Carvalho Chehab , Rob Herring Cc: Stefan Riedmueller , Sakari Ailus , linux-media@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v7 5/6] media: dt-bindings: mt9p031: Convert bindings to yaml Date: Mon, 26 Jul 2021 09:35:17 +0200 Message-Id: <20210726073518.2167398-6-s.riedmueller@phytec.de> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210726073518.2167398-1-s.riedmueller@phytec.de> References: <20210726073518.2167398-1-s.riedmueller@phytec.de> MIME-Version: 1.0 X-MIMETrack: Itemize by SMTP Server on Idefix/Phytec(Release 9.0.1FP7|August 17, 2016) at 26.07.2021 09:35:19, Serialize by Router on Idefix/Phytec(Release 9.0.1FP7|August 17, 2016) at 26.07.2021 09:35:19 X-TNEFEvaluated: 1 X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFtrNLMWRmVeSWpSXmKPExsWyRoCBS3d76r8Eg44PNhbzj5xjteicuITd 4vKuOWwWPRu2slos2/SHyaJ17xF2i09bvjE5sHvM7pjJ6rFpVSebx7yTgR6fN8kFsERx2aSk 5mSWpRbp2yVwZfw/0cxecEm9YuKq9awNjAfluhg5OSQETCSmfnvL1sXIxSEksI1R4tm8zywQ zgVGiYc/trKCVLEJGEksmNbIBJIQEWhjlNhxpBnMYRbYwigx/fJyNpAqYQFfiS+XPrB3MXJw sAioStyYYAoS5hWwk9jYuJEVYp28xMxL39lBbE4Be4lbT9+D2UJANa2dG9kh6gUlTs58AnaF hMAVRokDRzcyQTQLSZxefJYZxGYW0JZYtvA18wRGgVlIemYhSS1gZFrFKJSbmZydWpSZrVeQ UVmSmqyXkrqJERjAhyeqX9rB2DfH4xAjEwfjIUYJDmYlEV6HFb8ThHhTEiurUovy44tKc1KL DzFKc7AoifNu4C0JExJITyxJzU5NLUgtgskycXBKNTDadk4+tvjDPDO2GnODHVX7b09VPK29 cYXSJ7mDj75rrvpu8sC392f3m2ede3itVCxUGuMnv1lsYxOx1uwAk8KF9SfNvcP6FMXYLYyu lO6pW7x+y9o11w7F/FFJag5YccDs3zn+w7oyEpPLLaPurKyZ0VgppP/zYLygvG2I+M2Ot7uy d3btfrtdiaU4I9FQi7moOBEAcxBwCU4CAAA= Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org Convert mt9p031 sensor bindings to yaml schema. Also update the MAINTAINERS entry. Although input-clock-frequency and pixel-clock-frequency have not been definded as endpoint propierties in the textual bindings, the sensor does parse them from the endpoint. Thus move these properties to the endpoint in the new yaml bindings. Signed-off-by: Stefan Riedmueller Reviewed-by: Rob Herring --- .../bindings/media/i2c/aptina,mt9p031.yaml | 86 +++++++++++++++++++ .../devicetree/bindings/media/i2c/mt9p031.txt | 40 --------- MAINTAINERS | 1 + 3 files changed, 87 insertions(+), 40 deletions(-) create mode 100644 Documentation/devicetree/bindings/media/i2c/aptina,mt9p031.yaml delete mode 100644 Documentation/devicetree/bindings/media/i2c/mt9p031.txt diff --git a/Documentation/devicetree/bindings/media/i2c/aptina,mt9p031.yaml b/Documentation/devicetree/bindings/media/i2c/aptina,mt9p031.yaml new file mode 100644 index 000000000000..bc0e8e5194e8 --- /dev/null +++ b/Documentation/devicetree/bindings/media/i2c/aptina,mt9p031.yaml @@ -0,0 +1,86 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/media/i2c/aptina,mt9p031.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Aptina 1/2.5-Inch 5Mp CMOS Digital Image Sensor + +maintainers: + - Laurent Pinchart + +description: | + The Aptina MT9P031 is a 1/2.5-inch CMOS active pixel digital image sensor + with an active array size of 2592H x 1944V. It is programmable through a + simple two-wire serial interface. + +properties: + compatible: + enum: + - aptina,mt9p031 + - aptina,mt9p031m + + reg: + description: I2C device address + maxItems: 1 + + reset-gpios: + maxItems: 1 + description: Chip reset GPIO + + port: + $ref: /schemas/graph.yaml#/$defs/port-base + additionalProperties: false + + properties: + endpoint: + $ref: /schemas/media/video-interfaces.yaml# + unevaluatedProperties: false + + properties: + input-clock-frequency: + $ref: /schemas/types.yaml#/definitions/uint32 + minimum: 6000000 + maximum: 96000000 + description: Input clock frequency + + pixel-clock-frequency: + $ref: /schemas/types.yaml#/definitions/uint32 + maximum: 96000000 + description: Target pixel clock frequency + + pclk-sample: + default: 0 + + required: + - input-clock-frequency + - pixel-clock-frequency + +required: + - compatible + - reg + - port + +additionalProperties: false + +examples: + - | + i2c0 { + #address-cells = <1>; + #size-cells = <0>; + + mt9p031@5d { + compatible = "aptina,mt9p031"; + reg = <0x5d>; + reset-gpios = <&gpio_sensor 0 0>; + + port { + mt9p031_1: endpoint { + input-clock-frequency = <6000000>; + pixel-clock-frequency = <96000000>; + }; + }; + }; + }; + +... diff --git a/Documentation/devicetree/bindings/media/i2c/mt9p031.txt b/Documentation/devicetree/bindings/media/i2c/mt9p031.txt deleted file mode 100644 index cb60443ff78f..000000000000 --- a/Documentation/devicetree/bindings/media/i2c/mt9p031.txt +++ /dev/null @@ -1,40 +0,0 @@ -* Aptina 1/2.5-Inch 5Mp CMOS Digital Image Sensor - -The Aptina MT9P031 is a 1/2.5-inch CMOS active pixel digital image sensor with -an active array size of 2592H x 1944V. It is programmable through a simple -two-wire serial interface. - -Required Properties: -- compatible: value should be either one among the following - (a) "aptina,mt9p031" for mt9p031 sensor - (b) "aptina,mt9p031m" for mt9p031m sensor - -- input-clock-frequency: Input clock frequency. - -- pixel-clock-frequency: Pixel clock frequency. - -Optional Properties: -- reset-gpios: Chip reset GPIO - -For further reading on port node refer to -Documentation/devicetree/bindings/media/video-interfaces.txt. - -Example: - - i2c0@1c22000 { - ... - ... - mt9p031@5d { - compatible = "aptina,mt9p031"; - reg = <0x5d>; - reset-gpios = <&gpio3 30 0>; - - port { - mt9p031_1: endpoint { - input-clock-frequency = <6000000>; - pixel-clock-frequency = <96000000>; - }; - }; - }; - ... - }; diff --git a/MAINTAINERS b/MAINTAINERS index 19135a9d778e..e050790c846a 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -12637,6 +12637,7 @@ M: Laurent Pinchart L: linux-media@vger.kernel.org S: Maintained T: git git://linuxtv.org/media_tree.git +F: Documentation/devicetree/bindings/media/i2c/aptina,mt9p031.yaml F: drivers/media/i2c/mt9p031.c F: include/media/i2c/mt9p031.h