From patchwork Tue Sep 11 02:30:29 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 146386 Delivered-To: patch@linaro.org Received: by 2002:a2e:1648:0:0:0:0:0 with SMTP id 8-v6csp3139897ljw; Mon, 10 Sep 2018 19:31:07 -0700 (PDT) X-Google-Smtp-Source: ANB0VdZ66WEcF65PxTwEEFkXXcL5FwuKygNZpChKhe4ZpXsX0Ji1OFeHXQSsnJEkFEQoQfiiy9kJ X-Received: by 2002:a63:10c:: with SMTP id 12-v6mr25408225pgb.62.1536633067544; Mon, 10 Sep 2018 19:31:07 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1536633067; cv=none; d=google.com; s=arc-20160816; b=vIexXOu7Uuly8NtUd6uA5mCY/FTxeOp8znaMDAI+ypWE/dk2BSoNdCrT4noUuWa7P/ 6oq4PkcPz/07+KEBQ1BTyaS/ANwj3k0xC8ROOcy+y3hkwKuGY6D94pGP8MezfpQzW5OV 88QzZx9ZinDW1uozxpEvPGShajp8KJjOtNa6QB9J5qnadyJ+rqie9ISR8PPkSPmVWIJG AXFNKODJwNsB55yKlZb0xUgljrKPVVFgC5LqVSo3LU7Qge5EBdA5yTElrUShNYPeq+5Z AJzJSZaVBY8qAmeN7IUChpalT024WTfGSf1jKErf1ghPqideLAN+RDJ7HdlAM/bIRlrz OSlw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature; bh=UhWsM1uFegA3yqM6IdX1PUXA06hwvmU505oKPVKDDYw=; b=SZ14SiLGm0nvkJ5aAzfwwNG2yQnRdPLkHBcRqBYcbbIPee0XAjYX1qOltSuX6jkE2p iWgaLyR+pFSHA0jU4vO7u2NCNbcImbf36+UvFKvYJWiIVvHFACPu/5LgMGlKtxcTATls JjCkL3ZDiL1QZQ1RFivG/R9rs8+obJKqS6yw4Bh/PUAwMOVKkK2292XeogXp7XWuO4/N GYJun1FKUWqvpzDNaCqFQjJhVekkIA59yw+BKEhHUBTR5N8FA+cT5lNkuMSO/KdmPxaw p4WzCl8GxK/5ueg+XTzzpa7kaGCnEEjr02qEMxbFZe7mh845b9x2xHQ1rEh835saqsGb p5mg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=Azutjkkc; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id v7-v6si19210772pgn.431.2018.09.10.19.31.07; Mon, 10 Sep 2018 19:31:07 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=Azutjkkc; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726896AbeIKH2D (ORCPT + 6 others); Tue, 11 Sep 2018 03:28:03 -0400 Received: from mail-pg1-f196.google.com ([209.85.215.196]:32937 "EHLO mail-pg1-f196.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726746AbeIKH2D (ORCPT ); Tue, 11 Sep 2018 03:28:03 -0400 Received: by mail-pg1-f196.google.com with SMTP id s7-v6so11449889pgc.0 for ; Mon, 10 Sep 2018 19:31:06 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=UhWsM1uFegA3yqM6IdX1PUXA06hwvmU505oKPVKDDYw=; b=AzutjkkcFlMX7kVCqd2Bo1L1d1tzXJrROHwMrnoVkxxCvyoHHrb+ITgWAIzK7fdUfF CU5+60ayM6xzCAldwwafU2tqBn6L7TcL4SzweljYOwHpoG2v7QGXjRG96PAQfQTDbl+u dk11W36bg4rDWbrA6nbQS3GT41qMzw0y8Lhdg= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=UhWsM1uFegA3yqM6IdX1PUXA06hwvmU505oKPVKDDYw=; b=uNricz+pT4PD30GrIpVc5bWesMyOL1I2wwsPUVCCUHZmhMKK89IC63wEjZtQulvIGD MgcOBPBWDC77uB7HgLfti9uAA8yJ4uvYzVG7h5WL6UanTlkxzmxjuIylD0SllriW/3fU onTT1djHgyV+LmKLJ9BSxLyafWxhUUnrDSZAPwP872sRmqjU7IZkopKZENOPSGsJLFt8 91o5bIgIroUjJK9204CkKfQ1Hcwbbfa3ilbsFHy+fg4ZQJoQOHrLgHSjoxZzO+83fAhU HTll4fFnVspNyxh+GwcaMQz4up7r7PQRRYn244kAr01idZNFuBZfkNCZ6364BW64urX+ GojA== X-Gm-Message-State: APzg51AYJ8aGNInQV7VWjK7ZvfFUmIKefa3ze4NiJ8c05Uaw2EcshZz9 05EDF2ak1T5n241xsQ7jUS1a X-Received: by 2002:a63:4283:: with SMTP id p125-v6mr25756697pga.142.1536633066047; Mon, 10 Sep 2018 19:31:06 -0700 (PDT) Received: from localhost.localdomain ([2405:204:7200:d313:f895:c3fd:ee92:ac72]) by smtp.gmail.com with ESMTPSA id y85-v6sm27025893pfa.170.2018.09.10.19.30.56 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 10 Sep 2018 19:31:05 -0700 (PDT) From: Manivannan Sadhasivam To: heiko@sntech.de, robh+dt@kernel.org Cc: vicencb@gmail.com, shawn.lin@rock-chips.com, ezequiel@collabora.com, enric.balletbo@collabora.com, pbrobinson@gmail.com, tom@vamrs.com, dev@vamrs.com, stephen@vamrs.com, amit.kucheria@linaro.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, Manivannan Sadhasivam Subject: [PATCH v2 2/4] dt-bindings: arm: rockchip: Add binding for Rock960 board Date: Tue, 11 Sep 2018 08:00:29 +0530 Message-Id: <20180911023031.4892-3-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20180911023031.4892-1-manivannan.sadhasivam@linaro.org> References: <20180911023031.4892-1-manivannan.sadhasivam@linaro.org> Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add devicetree binding for Rock960 board from Vamrs Limited. Signed-off-by: Manivannan Sadhasivam --- Documentation/devicetree/bindings/arm/rockchip.txt | 4 ++++ 1 file changed, 4 insertions(+) -- 2.17.1 diff --git a/Documentation/devicetree/bindings/arm/rockchip.txt b/Documentation/devicetree/bindings/arm/rockchip.txt index acfd3c773dd0..4b6888a21db2 100644 --- a/Documentation/devicetree/bindings/arm/rockchip.txt +++ b/Documentation/devicetree/bindings/arm/rockchip.txt @@ -5,6 +5,10 @@ Rockchip platforms device tree bindings Required root node properties: - compatible = "vamrs,ficus", "rockchip,rk3399"; +- 96boards RK3399 Rock960 (ROCK960 Consumer Edition) + Required root node properties: + - compatible = "vamrs,rock960", "rockchip,rk3399"; + - Amarula Vyasa RK3288 board Required root node properties: - compatible = "amarula,vyasa-rk3288", "rockchip,rk3288"; From patchwork Tue Sep 11 02:30:30 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 146387 Delivered-To: patch@linaro.org Received: by 2002:a2e:1648:0:0:0:0:0 with SMTP id 8-v6csp3139980ljw; Mon, 10 Sep 2018 19:31:17 -0700 (PDT) X-Google-Smtp-Source: ANB0Vdb3VxgDS15VO95cRCtQsE1f7/o2CzQsd2OGJzclheGv3zCpaDU/bQL1nNWxuMxYW/QadfFl X-Received: by 2002:a17:902:24e1:: with SMTP id l30-v6mr24853323plg.315.1536633076917; Mon, 10 Sep 2018 19:31:16 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1536633076; cv=none; d=google.com; s=arc-20160816; b=kc8Ef+Woz6Ao4KJKfKUKJSPammRvxn1hscB9nI84s1LpLEVpC1fG7mTEz6H0BKDPN5 aqVAkUYcNLMxoPKW4ph4aS1oMeGWj4SBihKDMtr8awJtbVkNGwju4iKfRiPRS+jjKIvs M7MCcVAUnDkqb+qXZQrqH6WC1l54AEFjz8GlgcQSdz6wKbXzIKWh6pSubT9EdG0aYEfs +9EUmyu04wFI7mY3DivfCzjRI/sAYtcQEHZu/yIhobOtSVC8ASG68XjR4ycGwoJ4yY3E A7Hwj1tGGPRIdc5Uanuay4P8HQ+2kn3kyFzOx+ozqsh+r4OD+oH4rf1nT2POVRsVWdCO Nnag== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature; bh=hSYOd7dNccYUVmVYlbggsH+0qcQaz/KvUWzO+ef+8ns=; b=osw0/3q6Mv2hvkHTMNIOQZbOwy23WOVPEmDWIeInkqLazca1FNcl+BkR4/8nXAAxGd q+1tUh2yLhLmE0EnlGerE2mBd1uZEtFDDf4XY8Y2bTSuI6kdS4+Nhv4K9M6lqUgFCnXk 6r7ndPNBHUPv2V+eZ4Jc2Gq8vroDaOdoX2+5mioSUPT3adpGvTebONT/9XFs/UoGWmnj hK2d3rB6ZPKRlmiXFt3KpxK8DniBlhO7c66BISl1nUeXgr0mtp7WFjjjwvMuwP3UYoGR RzTV1iSNJnQgKZb89NCgsHw5xVdUfnNT9RtY8vXIaZL88VVrVwko/8wvQ+YzMLao2Tce rdOA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=UvEWSGR0; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id c5-v6si16335725pll.275.2018.09.10.19.31.16; Mon, 10 Sep 2018 19:31:16 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=UvEWSGR0; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726980AbeIKH2M (ORCPT + 6 others); Tue, 11 Sep 2018 03:28:12 -0400 Received: from mail-pg1-f196.google.com ([209.85.215.196]:46838 "EHLO mail-pg1-f196.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726950AbeIKH2M (ORCPT ); Tue, 11 Sep 2018 03:28:12 -0400 Received: by mail-pg1-f196.google.com with SMTP id b129-v6so11414400pga.13 for ; Mon, 10 Sep 2018 19:31:15 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=hSYOd7dNccYUVmVYlbggsH+0qcQaz/KvUWzO+ef+8ns=; b=UvEWSGR0cBBe/2osmiKYR0MYNAZt9lSp1xXPZFMih2FFCUdjBVcKmT6v/y8yimoeVR /2BVbINMW8zIl4pvfQyjNraZv0TDepPXxK/X/dj84wQNsrJkP5OfIMD/nq4ngDSDNwbu Jea7ZWjw8yZE/9ARlOJOfliU+YbqT5kGhR+zw= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=hSYOd7dNccYUVmVYlbggsH+0qcQaz/KvUWzO+ef+8ns=; b=M3IBGFlawbqaLI3E++OWHhlHOQ1PQbtcFpVfslD49Pxyl6WfnwQyhq/gmJPU8d0Jge av++gd2UK5jr+Ao/nKHP/ndntnCNNwhLmwd2TlNRNH5eK9AgIGxZ+F3ZebQF+pW2H9fO 9XJAvOifLN85dFT6O1Pasw6ueXX5nChfBxbwvINOL1d78cToO8Eb0uJF4g1eaB9d4plL iuQGUE/B3uojsAmleiR7PVnXwiE5UECCTcvUalW0HH51YZewpyYuoY/m14Gc7QcqCAET 0Ctm5Yw5/P1O7H1LeTDpZTHkRxQ4Rt+a3hgpHx5Wp++o0jK8DnIpkR/Q7FgC81soKkby iVEQ== X-Gm-Message-State: APzg51BW5DkD6ko9UGcZicoq6nnQOEjZq5Zt3YlcRPf/UXSwRnHuK2Nl rSCPcGiwUf4Ac5egO1ZUTX3J X-Received: by 2002:a63:fd06:: with SMTP id d6-v6mr25201396pgh.348.1536633075269; Mon, 10 Sep 2018 19:31:15 -0700 (PDT) Received: from localhost.localdomain ([2405:204:7200:d313:f895:c3fd:ee92:ac72]) by smtp.gmail.com with ESMTPSA id y85-v6sm27025893pfa.170.2018.09.10.19.31.06 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 10 Sep 2018 19:31:14 -0700 (PDT) From: Manivannan Sadhasivam To: heiko@sntech.de, robh+dt@kernel.org Cc: vicencb@gmail.com, shawn.lin@rock-chips.com, ezequiel@collabora.com, enric.balletbo@collabora.com, pbrobinson@gmail.com, tom@vamrs.com, dev@vamrs.com, stephen@vamrs.com, amit.kucheria@linaro.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, Manivannan Sadhasivam Subject: [PATCH v2 3/4] arm64: boot: dts: rockchip: Add support for Rock960 board Date: Tue, 11 Sep 2018 08:00:30 +0530 Message-Id: <20180911023031.4892-4-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20180911023031.4892-1-manivannan.sadhasivam@linaro.org> References: <20180911023031.4892-1-manivannan.sadhasivam@linaro.org> Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add devicetree support for Rock960 board, one of the Consumer Edition boards of the 96Boards family. This board support utilizes the common Rock960 family board support that includes Ficus 96Board. Signed-off-by: Manivannan Sadhasivam --- arch/arm64/boot/dts/rockchip/Makefile | 1 + .../boot/dts/rockchip/rk3399-rock960.dts | 139 ++++++++++++++++++ 2 files changed, 140 insertions(+) create mode 100644 arch/arm64/boot/dts/rockchip/rk3399-rock960.dts -- 2.17.1 diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/rockchip/Makefile index b0092d95b574..57c0d76458e6 100644 --- a/arch/arm64/boot/dts/rockchip/Makefile +++ b/arch/arm64/boot/dts/rockchip/Makefile @@ -14,5 +14,6 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-firefly.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-gru-bob.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-gru-kevin.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-puma-haikou.dtb +dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-rock960.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-sapphire.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-sapphire-excavator.dtb diff --git a/arch/arm64/boot/dts/rockchip/rk3399-rock960.dts b/arch/arm64/boot/dts/rockchip/rk3399-rock960.dts new file mode 100644 index 000000000000..37242b64a7a3 --- /dev/null +++ b/arch/arm64/boot/dts/rockchip/rk3399-rock960.dts @@ -0,0 +1,139 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (c) 2018 Linaro Ltd. + */ + +/dts-v1/; +#include "rk3399-rock960.dtsi" + +/ { + model = "96boards Rock960"; + compatible = "vamrs,rock960", "rockchip,rk3399"; + + chosen { + stdout-path = "serial2:1500000n8"; + }; + + vcc3v3_pcie: vcc3v3-pcie-regulator { + compatible = "regulator-fixed"; + enable-active-high; + gpio = <&gpio2 5 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&pcie_drv>; + regulator-boot-on; + regulator-name = "vcc3v3_pcie"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + vin-supply = <&vcc3v3_sys>; + }; + + vcc5v0_host: vcc5v0-host-regulator { + compatible = "regulator-fixed"; + enable-active-high; + gpio = <&gpio4 25 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&host_vbus_drv>; + regulator-name = "vcc5v0_host"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + regulator-always-on; + vin-supply = <&vcc_sys>; + }; +}; + +&pinctrl { + pcie { + pcie_drv: pcie-drv { + rockchip,pins = + <2 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + usb2 { + host_vbus_drv: host-vbus-drv { + rockchip,pins = + <4 RK_PD1 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; +}; + +&pcie_phy { + status = "okay"; +}; + +&pcie0 { + ep-gpios = <&gpio2 RK_PA2 GPIO_ACTIVE_HIGH>; + num-lanes = <4>; + pinctrl-names = "default"; + pinctrl-0 = <&pcie_clkreqn_cpm>; + vpcie3v3-supply = <&vcc3v3_pcie>; + status = "okay"; +}; + +&tcphy0 { + status = "okay"; +}; + +&tcphy1 { + status = "okay"; +}; + +&u2phy0 { + status = "okay"; +}; + +&u2phy1 { + status = "okay"; +}; + +&u2phy0_host { + phy-supply = <&vcc5v0_host>; + status = "okay"; +}; + +&u2phy1_host { + phy-supply = <&vcc5v0_host>; + status = "okay"; +}; + +&u2phy0_otg { + status = "okay"; +}; + +&u2phy1_otg { + status = "okay"; +}; + +&usb_host0_ehci { + status = "okay"; +}; + +&usb_host0_ohci { + status = "okay"; +}; + +&usb_host1_ehci { + status = "okay"; +}; + +&usb_host1_ohci { + status = "okay"; +}; + +&usbdrd3_0 { + status = "okay"; +}; + +&usbdrd_dwc3_0 { + status = "okay"; + dr_mode = "otg"; +}; + +&usbdrd3_1 { + status = "okay"; +}; + +&usbdrd_dwc3_1 { + status = "okay"; + dr_mode = "host"; +};