From patchwork Fri Jul 23 15:46:20 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ben Greear X-Patchwork-Id: 484997 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9E23BC4338F for ; Fri, 23 Jul 2021 15:46:43 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 847C860E8B for ; Fri, 23 Jul 2021 15:46:43 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235644AbhGWPGI (ORCPT ); Fri, 23 Jul 2021 11:06:08 -0400 Received: from dispatch1-us1.ppe-hosted.com ([148.163.129.48]:42012 "EHLO dispatch1-us1.ppe-hosted.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235591AbhGWPGF (ORCPT ); Fri, 23 Jul 2021 11:06:05 -0400 X-Virus-Scanned: Proofpoint Essentials engine Received: from mx1-us1.ppe-hosted.com (unknown [10.7.67.129]) by mx1-us1.ppe-hosted.com (PPE Hosted ESMTP Server) with ESMTPS id 51D991C0069 for ; Fri, 23 Jul 2021 15:46:37 +0000 (UTC) Received: from mail3.candelatech.com (mail2.candelatech.com [208.74.158.173]) by mx1-us1.ppe-hosted.com (PPE Hosted ESMTP Server) with ESMTP id 26E9550007F for ; Fri, 23 Jul 2021 15:46:37 +0000 (UTC) Received: from ben-dt4.candelatech.com (50-251-239-81-static.hfc.comcastbusiness.net [50.251.239.81]) by mail3.candelatech.com (Postfix) with ESMTP id 6EEE613C2B1; Fri, 23 Jul 2021 08:46:36 -0700 (PDT) DKIM-Filter: OpenDKIM Filter v2.11.0 mail3.candelatech.com 6EEE613C2B1 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=candelatech.com; s=default; t=1627055196; bh=MEmLF8Jh8EKquxReqyGP9MwmyZuDkVv5mzlWcw0ZXD0=; h=From:To:Cc:Subject:Date:From; b=chSoewXT8+OKviTuoeaMYaSfbs0bSfQTmOiLjJCTEwCT3H5KIcGyjBSYXhv2RACgl 10+nVgXDa6AGvELbe2J51gdA1YuzaqTagGLbaTpr2p9GogioNJm6aUZNju0/3gn3qm ml5Jjt9bZ8TopokOm6j6q2+FHgjNXgKT+KzI+Qjs= From: greearb@candelatech.com To: linux-wireless@vger.kernel.org Cc: Ben Greear Subject: [PATCH v4 1/8] mt76 - mt7915: Add ethtool stats support. Date: Fri, 23 Jul 2021 08:46:20 -0700 Message-Id: <20210723154627.10078-1-greearb@candelatech.com> X-Mailer: git-send-email 2.20.1 MIME-Version: 1.0 X-MDID: 1627055197-fUv5cbOXt9XD Precedence: bulk List-ID: X-Mailing-List: linux-wireless@vger.kernel.org From: Ben Greear This exposes some tx-path stats to the ethtool API, so that ethtool -S wlanX provides some more useful info. Signed-off-by: Ben Greear --- v4: move ethtool code to main.c Re-work the 2/8 patch per review. Did not try to refactor the station walk per comments on 3/8, I saw no clean way to do that. .../net/wireless/mediatek/mt76/mt7915/main.c | 136 ++++++++++++++++++ 1 file changed, 136 insertions(+) diff --git a/drivers/net/wireless/mediatek/mt76/mt7915/main.c b/drivers/net/wireless/mediatek/mt76/mt7915/main.c index 48b5e2051bad..d0288fe2abdf 100644 --- a/drivers/net/wireless/mediatek/mt76/mt7915/main.c +++ b/drivers/net/wireless/mediatek/mt76/mt7915/main.c @@ -1028,6 +1028,139 @@ static void mt7915_sta_set_decap_offload(struct ieee80211_hw *hw, mt7915_mcu_sta_update_hdr_trans(dev, vif, sta); } +static const char mt7915_gstrings_stats[][ETH_GSTRING_LEN] = { + "tx_ampdu_len:0-1", + "tx_ampdu_len:2-10", + "tx_ampdu_len:11-19", + "tx_ampdu_len:20-28", + "tx_ampdu_len:29-37", + "tx_ampdu_len:38-46", + "tx_ampdu_len:47-55", + "tx_ampdu_len:56-79", + "tx_ampdu_len:80-103", + "tx_ampdu_len:104-127", + "tx_ampdu_len:128-151", + "tx_ampdu_len:152-175", + "tx_ampdu_len:176-199", + "tx_ampdu_len:200-223", + "tx_ampdu_len:224-247", + "ba_miss_count", + "tx_beamformer_ppdu_iBF", + "tx_beamformer_ppdu_eBF", + "tx_beamformer_rx_feedback_all", + "tx_beamformer_rx_feedback_he", + "tx_beamformer_rx_feedback_vht", + "tx_beamformer_rx_feedback_ht", + "tx_beamformer_rx_feedback_bw", /* zero based idx: 20, 40, 80, 160 */ + "tx_beamformer_rx_feedback_nc", + "tx_beamformer_rx_feedback_nr", + "tx_beamformee_ok_feedback_pkts", + "tx_beamformee_feedback_trig", + "tx_mu_beamforming", + "tx_mu_mpdu", + "tx_mu_successful_mpdu", + "tx_su_successful_mpdu", + "tx_msdu_pack_1", + "tx_msdu_pack_2", + "tx_msdu_pack_3", + "tx_msdu_pack_4", + "tx_msdu_pack_5", + "tx_msdu_pack_6", + "tx_msdu_pack_7", + "tx_msdu_pack_8", +}; + +#define MT7915_SSTATS_LEN ARRAY_SIZE(mt7915_gstrings_stats) + +/* Ethtool related API */ +void mt7915_get_et_strings(struct ieee80211_hw *hw, + struct ieee80211_vif *vif, + u32 sset, u8 *data) +{ + if (sset == ETH_SS_STATS) + memcpy(data, *mt7915_gstrings_stats, + sizeof(mt7915_gstrings_stats)); +} + +int mt7915_get_et_sset_count(struct ieee80211_hw *hw, + struct ieee80211_vif *vif, int sset) +{ + if (sset == ETH_SS_STATS) + return MT7915_SSTATS_LEN; + + return 0; +} + +void mt7915_get_et_stats(struct ieee80211_hw *hw, + struct ieee80211_vif *vif, + struct ethtool_stats *stats, u64 *data) +{ + struct mt7915_dev *dev = mt7915_hw_dev(hw); + struct mt7915_phy *phy = mt7915_hw_phy(hw); + + /* TODO: These are mostly dev-wide stats at this point. + * Get some per-vif stats? + */ + + /* See mt7915_ampdu_stat_read_phy, etc */ + bool ext_phy = phy != &dev->phy; + int i, n, cnt; + int ei = 0; + + if (!phy) + return; + + /* Tx ampdu stat */ + n = ext_phy ? ARRAY_SIZE(dev->mt76.aggr_stats) / 2 : 0; + for (i = 0; i < 15 /*ARRAY_SIZE(bound)*/; i++) + data[ei++] = dev->mt76.aggr_stats[i + n]; + + data[ei++] = phy->mib.ba_miss_cnt; + + /* Tx Beamformer monitor */ + cnt = mt76_rr(dev, MT_ETBF_TX_APP_CNT(ext_phy)); + data[ei++] = FIELD_GET(MT_ETBF_TX_IBF_CNT, cnt); + data[ei++] = FIELD_GET(MT_ETBF_TX_EBF_CNT, cnt); + + /* Tx Beamformer Rx feedback monitor */ + cnt = mt76_rr(dev, MT_ETBF_RX_FB_CNT(ext_phy)); + data[ei++] = FIELD_GET(MT_ETBF_RX_FB_ALL, cnt); + data[ei++] = FIELD_GET(MT_ETBF_RX_FB_HE, cnt); + data[ei++] = FIELD_GET(MT_ETBF_RX_FB_VHT, cnt); + data[ei++] = FIELD_GET(MT_ETBF_RX_FB_HT, cnt); + + cnt = mt76_rr(dev, MT_ETBF_RX_FB_CONT(ext_phy)); + data[ei++] = FIELD_GET(MT_ETBF_RX_FB_BW, cnt); + data[ei++] = FIELD_GET(MT_ETBF_RX_FB_NC, cnt); + data[ei++] = FIELD_GET(MT_ETBF_RX_FB_NR, cnt); + + /* Tx Beamformee Rx NDPA & Tx feedback report */ + cnt = mt76_rr(dev, MT_ETBF_TX_NDP_BFRP(ext_phy)); + data[ei++] = FIELD_GET(MT_ETBF_TX_FB_CPL, cnt); + data[ei++] = FIELD_GET(MT_ETBF_TX_FB_TRI, cnt); + + /* Tx SU & MU counters */ + cnt = mt76_rr(dev, MT_MIB_SDR34(ext_phy)); + data[ei++] = FIELD_GET(MT_MIB_MU_BF_TX_CNT, cnt); + + cnt = mt76_rr(dev, MT_MIB_DR8(ext_phy)); + data[ei++] = cnt; + + cnt = mt76_rr(dev, MT_MIB_DR9(ext_phy)); + data[ei++] = cnt; /* MU MPDU SUccessful */ + + cnt = mt76_rr(dev, MT_MIB_DR11(ext_phy)); + data[ei++] = cnt; /* SU MPDU successful */ + + /* TODO: External phy too?? */ + + /* Tx amsdu info (pack-count histogram) */ + for (i = 0; i < 8; i++) + data[ei++] = mt76_rr(dev, MT_PLE_AMSDU_PACK_MSDU_CNT(i)); + + WARN_ON(ei != MT7915_SSTATS_LEN); +} + const struct ieee80211_ops mt7915_ops = { .tx = mt7915_tx, .start = mt7915_start, @@ -1052,6 +1185,9 @@ const struct ieee80211_ops mt7915_ops = { .get_txpower = mt76_get_txpower, .channel_switch_beacon = mt7915_channel_switch_beacon, .get_stats = mt7915_get_stats, + .get_et_sset_count = mt7915_get_et_sset_count, + .get_et_stats = mt7915_get_et_stats, + .get_et_strings = mt7915_get_et_strings, .get_tsf = mt7915_get_tsf, .set_tsf = mt7915_set_tsf, .offset_tsf = mt7915_offset_tsf, From patchwork Fri Jul 23 15:46:22 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ben Greear X-Patchwork-Id: 484998 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id E8618C4320A for ; Fri, 23 Jul 2021 15:46:41 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id D104E60E8B for ; Fri, 23 Jul 2021 15:46:41 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235628AbhGWPGH (ORCPT ); Fri, 23 Jul 2021 11:06:07 -0400 Received: from dispatch1-us1.ppe-hosted.com ([148.163.129.49]:42006 "EHLO dispatch1-us1.ppe-hosted.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235557AbhGWPGF (ORCPT ); Fri, 23 Jul 2021 11:06:05 -0400 X-Virus-Scanned: Proofpoint Essentials engine Received: from mx1-us1.ppe-hosted.com (unknown [10.7.66.132]) by mx1-us1.ppe-hosted.com (PPE Hosted ESMTP Server) with ESMTPS id 565311C0061 for ; Fri, 23 Jul 2021 15:46:37 +0000 (UTC) Received: from mail3.candelatech.com (mail2.candelatech.com [208.74.158.173]) by mx1-us1.ppe-hosted.com (PPE Hosted ESMTP Server) with ESMTP id 2B8B694006C for ; Fri, 23 Jul 2021 15:46:37 +0000 (UTC) Received: from ben-dt4.candelatech.com (50-251-239-81-static.hfc.comcastbusiness.net [50.251.239.81]) by mail3.candelatech.com (Postfix) with ESMTP id CA7E013C2B4; Fri, 23 Jul 2021 08:46:36 -0700 (PDT) DKIM-Filter: OpenDKIM Filter v2.11.0 mail3.candelatech.com CA7E013C2B4 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=candelatech.com; s=default; t=1627055196; bh=YWjQfZ1QdXKNGVnH4NlxAFkFllBsY6SWJoflhWUXg4Q=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=D/nj6FEPZP5DK1/lUUmk7lKpYwGu8ACdxYB6mo8X7qV1RgSj0GwSRNvVfzEI2wY7W eVcHT3ZPOk+HcTlOt7tgqfdYpesePFwJnNij9epQfTRlIuweGJvPjI8HY5a0fdm1zY 8zG7+GTSXtIZeywH10lK9m4+Zmdn8OlVoCA29riE= From: greearb@candelatech.com To: linux-wireless@vger.kernel.org Cc: Ben Greear Subject: [PATCH v4 3/8] mt76 - mt7915: Add some per-station tx stats to ethtool. Date: Fri, 23 Jul 2021 08:46:22 -0700 Message-Id: <20210723154627.10078-3-greearb@candelatech.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20210723154627.10078-1-greearb@candelatech.com> References: <20210723154627.10078-1-greearb@candelatech.com> MIME-Version: 1.0 X-MDID: 1627055197-8IAUVq1nxY99 Precedence: bulk List-ID: X-Mailing-List: linux-wireless@vger.kernel.org From: Ben Greear The tx status callback is not called for every frame, so those specific counters under-count, but at least they give some idea of what is going on. Signed-off-by: Ben Greear --- .../net/wireless/mediatek/mt76/mt7915/main.c | 116 +++++++++++++++++- 1 file changed, 110 insertions(+), 6 deletions(-) diff --git a/drivers/net/wireless/mediatek/mt76/mt7915/main.c b/drivers/net/wireless/mediatek/mt76/mt7915/main.c index d0288fe2abdf..de083008663e 100644 --- a/drivers/net/wireless/mediatek/mt76/mt7915/main.c +++ b/drivers/net/wireless/mediatek/mt76/mt7915/main.c @@ -1068,6 +1068,35 @@ static const char mt7915_gstrings_stats[][ETH_GSTRING_LEN] = { "tx_msdu_pack_6", "tx_msdu_pack_7", "tx_msdu_pack_8", + /* per vif counters */ + "v_tx_mpdu_attempts", + "v_tx_mpdu_fail", + "v_tx_mpdu_retry", + "v_tx_mode_cck", + "v_tx_mode_ofdm", + "v_tx_mode_ht", + "v_tx_mode_ht_gf", + "v_tx_mode_vht", + "v_tx_mode_he_su", + "v_tx_mode_he_ext_su", + "v_tx_mode_he_tb", + "v_tx_mode_he_mu", + "v_tx_bw_20", + "v_tx_bw_40", + "v_tx_bw_80", + "v_tx_bw_160", + "v_tx_mcs_0", + "v_tx_mcs_1", + "v_tx_mcs_2", + "v_tx_mcs_3", + "v_tx_mcs_4", + "v_tx_mcs_5", + "v_tx_mcs_6", + "v_tx_mcs_7", + "v_tx_mcs_8", + "v_tx_mcs_9", + "v_tx_mcs_10", + "v_tx_mcs_11", }; #define MT7915_SSTATS_LEN ARRAY_SIZE(mt7915_gstrings_stats) @@ -1097,14 +1126,15 @@ void mt7915_get_et_stats(struct ieee80211_hw *hw, { struct mt7915_dev *dev = mt7915_hw_dev(hw); struct mt7915_phy *phy = mt7915_hw_phy(hw); - - /* TODO: These are mostly dev-wide stats at this point. - * Get some per-vif stats? - */ + struct mt7915_vif *mvif = (struct mt7915_vif *)vif->drv_priv; + struct mt76_wcid *wcid; + struct mt7915_sta *msta; + struct mt7915_sta_stats *mstats; + bool found_sta = false; /* See mt7915_ampdu_stat_read_phy, etc */ bool ext_phy = phy != &dev->phy; - int i, n, cnt; + int i, j, n, cnt, next_ei; int ei = 0; if (!phy) @@ -1158,7 +1188,81 @@ void mt7915_get_et_stats(struct ieee80211_hw *hw, for (i = 0; i < 8; i++) data[ei++] = mt76_rr(dev, MT_PLE_AMSDU_PACK_MSDU_CNT(i)); - WARN_ON(ei != MT7915_SSTATS_LEN); + /* Add values for all stations owned by this vif */ + + /* See mt76_get_min_avr_rssi for example of how to find all sta + * for a vif + */ + local_bh_disable(); + rcu_read_lock(); + + next_ei = ei; + + for (i = 0; i < ARRAY_SIZE(dev->mt76.wcid_mask); i++) { + u32 mask = dev->mt76.wcid_mask[i]; + u32 phy_mask = dev->mt76.wcid_phy_mask[i]; + int q; + + if (!mask) + continue; + + for (j = i * 32; mask; j++, mask >>= 1, phy_mask >>= 1) { + if (!(mask & 1)) + continue; + + if (!!(phy_mask & 1) != ext_phy) + continue; + + wcid = rcu_dereference(dev->mt76.wcid[j]); + if (!wcid) + continue; + + msta = container_of(wcid, struct mt7915_sta, wcid); + + if (msta->vif != mvif) + continue; + + ei = next_ei; + mstats = &msta->stats; + data[ei++] += mstats->tx_mpdu_attempts; + data[ei++] += mstats->tx_mpdu_fail; + data[ei++] += mstats->tx_mpdu_retry; + data[ei++] += mstats->tx_mode[MT_PHY_TYPE_CCK]; + data[ei++] += mstats->tx_mode[MT_PHY_TYPE_OFDM]; + data[ei++] += mstats->tx_mode[MT_PHY_TYPE_HT]; + data[ei++] += mstats->tx_mode[MT_PHY_TYPE_HT_GF]; + data[ei++] += mstats->tx_mode[MT_PHY_TYPE_VHT]; + data[ei++] += mstats->tx_mode[MT_PHY_TYPE_HE_SU]; + data[ei++] += mstats->tx_mode[MT_PHY_TYPE_HE_EXT_SU]; + data[ei++] += mstats->tx_mode[MT_PHY_TYPE_HE_TB]; + data[ei++] += mstats->tx_mode[MT_PHY_TYPE_HE_MU]; + + for (q = 0; q < ARRAY_SIZE(mstats->tx_bw); q++) + data[ei++] += mstats->tx_bw[q]; + + for (q = 0; q < 12; q++) + data[ei++] += mstats->tx_mcs[q]; + found_sta = true; + } + } + + rcu_read_unlock(); + local_bh_enable(); + + /* If we have no stations above, then we will not have filled out + * the STA stats. Zero those stats. + */ + if (!found_sta) { + int q; + + for (q = 0; q < 28; q++) + data[ei++] = 0; + } + + if (ei != MT7915_SSTATS_LEN) { + pr_err("ei: %d MT7915_SSTATS_LEN: %d", ei, (int)(MT7915_SSTATS_LEN)); + WARN_ON_ONCE(ei != MT7915_SSTATS_LEN); + } } const struct ieee80211_ops mt7915_ops = { From patchwork Fri Jul 23 15:46:25 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ben Greear X-Patchwork-Id: 484996 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 686EAC432BE for ; Fri, 23 Jul 2021 15:46:45 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 553D160E8B for ; Fri, 23 Jul 2021 15:46:45 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235658AbhGWPGK (ORCPT ); Fri, 23 Jul 2021 11:06:10 -0400 Received: from dispatch1-us1.ppe-hosted.com ([67.231.154.184]:41684 "EHLO dispatch1-us1.ppe-hosted.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235611AbhGWPGF (ORCPT ); Fri, 23 Jul 2021 11:06:05 -0400 X-Virus-Scanned: Proofpoint Essentials engine Received: from mx1-us1.ppe-hosted.com (unknown [10.110.51.177]) by mx1-us1.ppe-hosted.com (PPE Hosted ESMTP Server) with ESMTPS id F41231A006C for ; Fri, 23 Jul 2021 15:46:37 +0000 (UTC) Received: from mail3.candelatech.com (mail2.candelatech.com [208.74.158.173]) by mx1-us1.ppe-hosted.com (PPE Hosted ESMTP Server) with ESMTP id CB4CD680073 for ; Fri, 23 Jul 2021 15:46:37 +0000 (UTC) Received: from ben-dt4.candelatech.com (50-251-239-81-static.hfc.comcastbusiness.net [50.251.239.81]) by mail3.candelatech.com (Postfix) with ESMTP id 5F01613C2B8; Fri, 23 Jul 2021 08:46:37 -0700 (PDT) DKIM-Filter: OpenDKIM Filter v2.11.0 mail3.candelatech.com 5F01613C2B8 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=candelatech.com; s=default; t=1627055197; bh=ebvdbEp3CyND0tTAllOpxo6ClqpSZni8qJjvW6vcvPM=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=n+8hIfV3JOhCkS2H+jvKClY8lQxWPumKSxnxAikW5qQ1IHWg5u9GnFA/phv3SnAoZ yT532nWRmKWLwwTL9arSIvR1z3GziiMdBr8r2pt9pE/dRyxcRL5fYc9vi+kyqOMUYq 2o3GPL5HAO6BC71qZ9W479LN6H+SAk9w0KAdiBCE= From: greearb@candelatech.com To: linux-wireless@vger.kernel.org Cc: Ben Greear Subject: [PATCH v4 6/8] mt76 - mt7915: Fix he_mcs capabilities for 160mhz. Date: Fri, 23 Jul 2021 08:46:25 -0700 Message-Id: <20210723154627.10078-6-greearb@candelatech.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20210723154627.10078-1-greearb@candelatech.com> References: <20210723154627.10078-1-greearb@candelatech.com> MIME-Version: 1.0 X-MDID: 1627055198-2eNTDb6R_A-m Precedence: bulk List-ID: X-Mailing-List: linux-wireless@vger.kernel.org From: Ben Greear At 160, this chip can only do 2x2 NSS. Fix the features accordingly, verified it shows up properly in iw phy foo info now. Signed-off-by: Ben Greear --- drivers/net/wireless/mediatek/mt76/mt7915/init.c | 15 +++++++++++---- 1 file changed, 11 insertions(+), 4 deletions(-) diff --git a/drivers/net/wireless/mediatek/mt76/mt7915/init.c b/drivers/net/wireless/mediatek/mt76/mt7915/init.c index 08fa918c310b..f174cf219724 100644 --- a/drivers/net/wireless/mediatek/mt76/mt7915/init.c +++ b/drivers/net/wireless/mediatek/mt76/mt7915/init.c @@ -614,12 +614,19 @@ mt7915_init_he_caps(struct mt7915_phy *phy, enum nl80211_band band, { int i, idx = 0, nss = hweight8(phy->mt76->chainmask); u16 mcs_map = 0; + u16 mcs_map_160 = 0; for (i = 0; i < 8; i++) { if (i < nss) mcs_map |= (IEEE80211_HE_MCS_SUPPORT_0_11 << (i * 2)); else mcs_map |= (IEEE80211_HE_MCS_NOT_SUPPORTED << (i * 2)); + + /* Can do 1/2 of NSS streams in 160Mhz mode. */ + if (i < nss / 2) + mcs_map_160 |= (IEEE80211_HE_MCS_SUPPORT_0_11 << (i * 2)); + else + mcs_map_160 |= (IEEE80211_HE_MCS_NOT_SUPPORTED << (i * 2)); } for (i = 0; i < NUM_NL80211_IFTYPES; i++) { @@ -721,10 +728,10 @@ mt7915_init_he_caps(struct mt7915_phy *phy, enum nl80211_band band, he_mcs->rx_mcs_80 = cpu_to_le16(mcs_map); he_mcs->tx_mcs_80 = cpu_to_le16(mcs_map); - he_mcs->rx_mcs_160 = cpu_to_le16(mcs_map); - he_mcs->tx_mcs_160 = cpu_to_le16(mcs_map); - he_mcs->rx_mcs_80p80 = cpu_to_le16(mcs_map); - he_mcs->tx_mcs_80p80 = cpu_to_le16(mcs_map); + he_mcs->rx_mcs_160 = cpu_to_le16(mcs_map_160); + he_mcs->tx_mcs_160 = cpu_to_le16(mcs_map_160); + he_mcs->rx_mcs_80p80 = cpu_to_le16(mcs_map_160); + he_mcs->tx_mcs_80p80 = cpu_to_le16(mcs_map_160); mt7915_set_stream_he_txbf_caps(he_cap, i, nss); From patchwork Fri Jul 23 15:46:26 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ben Greear X-Patchwork-Id: 484995 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 244E2C4320E for ; Fri, 23 Jul 2021 15:46:47 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 132C860E8F for ; Fri, 23 Jul 2021 15:46:47 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235657AbhGWPGM (ORCPT ); Fri, 23 Jul 2021 11:06:12 -0400 Received: from dispatch1-us1.ppe-hosted.com ([67.231.154.164]:60830 "EHLO dispatch1-us1.ppe-hosted.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235619AbhGWPGG (ORCPT ); Fri, 23 Jul 2021 11:06:06 -0400 X-Virus-Scanned: Proofpoint Essentials engine Received: from mx1-us1.ppe-hosted.com (unknown [10.110.51.23]) by mx1-us1.ppe-hosted.com (PPE Hosted ESMTP Server) with ESMTPS id 3231F2005E for ; Fri, 23 Jul 2021 15:46:38 +0000 (UTC) Received: from mail3.candelatech.com (mail2.candelatech.com [208.74.158.173]) by mx1-us1.ppe-hosted.com (PPE Hosted ESMTP Server) with ESMTP id ECB6590007F for ; Fri, 23 Jul 2021 15:46:37 +0000 (UTC) Received: from ben-dt4.candelatech.com (50-251-239-81-static.hfc.comcastbusiness.net [50.251.239.81]) by mail3.candelatech.com (Postfix) with ESMTP id 851A613C2BB; Fri, 23 Jul 2021 08:46:37 -0700 (PDT) DKIM-Filter: OpenDKIM Filter v2.11.0 mail3.candelatech.com 851A613C2BB DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=candelatech.com; s=default; t=1627055197; bh=LTbRz2gx5YE9z92urc9sb8llrQk01MkHzsvPE1zk/hc=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=MVmgiuQLwD9L3qx8vQ+WZ3k0692sGaXLXrvMXc479kNnk/m0GFO7p5KDoPjN8CScT PlJ9Tg4XFem5AZBEOWwdmRI+xPaYPzzkyBKJaryE4PRo93+EHLKfzS3bqSbtFJ4UtH a1pACCwWLIv1zGK/FmHP3THQjIZHlKeFcRD37NSQ= From: greearb@candelatech.com To: linux-wireless@vger.kernel.org Cc: Ben Greear Subject: [PATCH v4 7/8] mt76 - mt7915: Add more MIB registers. Date: Fri, 23 Jul 2021 08:46:26 -0700 Message-Id: <20210723154627.10078-7-greearb@candelatech.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20210723154627.10078-1-greearb@candelatech.com> References: <20210723154627.10078-1-greearb@candelatech.com> MIME-Version: 1.0 X-MDID: 1627055198-fqEg81LcbKYm Precedence: bulk List-ID: X-Mailing-List: linux-wireless@vger.kernel.org From: Ben Greear Add register definitions and read & accumulate them in the mib polling logic. Note that some registers should not be read since firmware is already reading them. If driver reads those, they will be cleared-on-read, and so the firmware stats will be incorrect. For these 'do-not-read' stats, add them to the registers definition so that other developers can be aware of these constraints, but do not actually read them in the driver. Signed-off-by: Ben Greear --- .../net/wireless/mediatek/mt76/mt7915/mac.c | 65 +++++++++++ .../wireless/mediatek/mt76/mt7915/mt7915.h | 25 ++++- .../net/wireless/mediatek/mt76/mt7915/regs.h | 105 ++++++++++++++++++ 3 files changed, 194 insertions(+), 1 deletion(-) diff --git a/drivers/net/wireless/mediatek/mt76/mt7915/mac.c b/drivers/net/wireless/mediatek/mt76/mt7915/mac.c index c395600b378a..1b0a44884569 100644 --- a/drivers/net/wireless/mediatek/mt76/mt7915/mac.c +++ b/drivers/net/wireless/mediatek/mt76/mt7915/mac.c @@ -1894,6 +1894,71 @@ mt7915_mac_update_stats(struct mt7915_phy *phy) mib->fcs_err_cnt += mt76_get_field(dev, MT_MIB_SDR3(ext_phy), MT_MIB_SDR3_FCS_ERR_MASK); + + cnt = mt76_rr(dev, MT_MIB_SDR4(ext_phy)); + mib->rx_fifo_full_cnt += FIELD_GET(MT_MIB_SDR4_RX_FIFO_FULL_MASK, cnt); + + cnt = mt76_rr(dev, MT_MIB_SDR5(ext_phy)); + mib->rx_mpdu_cnt += cnt; + + cnt = mt76_rr(dev, MT_MIB_SDR6(ext_phy)); + mib->channel_idle_cnt += FIELD_GET(MT_MIB_SDR6_CHANNEL_IDL_CNT_MASK, cnt); + + cnt = mt76_rr(dev, MT_MIB_SDR7(ext_phy)); + mib->rx_vector_mismatch_cnt += FIELD_GET(MT_MIB_SDR7_RX_VECTOR_MISMATCH_CNT_MASK, cnt); + + cnt = mt76_rr(dev, MT_MIB_SDR8(ext_phy)); + mib->rx_delimiter_fail_cnt += FIELD_GET(MT_MIB_SDR8_RX_DELIMITER_FAIL_CNT_MASK, cnt); + + cnt = mt76_rr(dev, MT_MIB_SDR11(ext_phy)); + mib->rx_len_mismatch_cnt += FIELD_GET(MT_MIB_SDR11_RX_LEN_MISMATCH_CNT_MASK, cnt); + + cnt = mt76_rr(dev, MT_MIB_SDR12(ext_phy)); + mib->tx_ampdu_cnt += cnt; + + cnt = mt76_rr(dev, MT_MIB_SDR13(ext_phy)); + mib->tx_stop_q_empty_cnt += FIELD_GET(MT_MIB_SDR13_TX_STOP_Q_EMPTY_CNT_MASK, cnt); + + cnt = mt76_rr(dev, MT_MIB_SDR14(ext_phy)); + mib->tx_mpdu_attempts_cnt += FIELD_GET(MT_MIB_SDR14_TX_MPDU_ATTEMPTS_CNT_MASK, cnt); + + cnt = mt76_rr(dev, MT_MIB_SDR15(ext_phy)); + mib->tx_mpdu_success_cnt += FIELD_GET(MT_MIB_SDR15_TX_MPDU_SUCCESS_CNT_MASK, cnt); + + cnt = mt76_rr(dev, MT_MIB_SDR22(ext_phy)); + mib->rx_ampdu_cnt += cnt; + + cnt = mt76_rr(dev, MT_MIB_SDR23(ext_phy)); + mib->rx_ampdu_bytes_cnt += cnt; + + cnt = mt76_rr(dev, MT_MIB_SDR24(ext_phy)); + mib->rx_ampdu_valid_subframe_cnt += FIELD_GET(MT_MIB_SDR24_RX_AMPDU_SF_CNT_MASK, cnt); + + cnt = mt76_rr(dev, MT_MIB_SDR25(ext_phy)); + mib->rx_ampdu_valid_subframe_bytes_cnt += cnt; + + cnt = mt76_rr(dev, MT_MIB_SDR27(ext_phy)); + mib->tx_rwp_fail_cnt += FIELD_GET(MT_MIB_SDR27_TX_RWP_FAIL_CNT_MASK, cnt); + + cnt = mt76_rr(dev, MT_MIB_SDR28(ext_phy)); + mib->tx_rwp_need_cnt += FIELD_GET(MT_MIB_SDR28_TX_RWP_NEED_CNT_MASK, cnt); + + cnt = mt76_rr(dev, MT_MIB_SDR29(ext_phy)); + mib->rx_pfdrop_cnt += FIELD_GET(MT_MIB_SDR29_RX_PFDROP_CNT_MASK, cnt); + + cnt = mt76_rr(dev, MT_MIB_SDR30(ext_phy)); + mib->rx_vec_queue_overflow_drop_cnt += + FIELD_GET(MT_MIB_SDR30_RX_VEC_QUEUE_OVERFLOW_DROP_CNT_MASK, cnt); + + cnt = mt76_rr(dev, MT_MIB_SDR31(ext_phy)); + mib->rx_ba_cnt += cnt; + + cnt = mt76_rr(dev, MT_MIB_SDR32(ext_phy)); + mib->tx_pkt_ebf_cnt += FIELD_GET(MT_MIB_SDR32_TX_PKT_EBF_CNT_MASK, cnt); + + cnt = mt76_rr(dev, MT_MIB_SDR33(ext_phy)); + mib->tx_pkt_ibf_cnt += FIELD_GET(MT_MIB_SDR33_TX_PKT_IBF_CNT_MASK, cnt); + cnt = mt76_rr(dev, MT_MIB_SDR34(ext_phy)); mib->tx_bf_cnt += FIELD_GET(MT_MIB_MU_BF_TX_CNT, cnt); diff --git a/drivers/net/wireless/mediatek/mt76/mt7915/mt7915.h b/drivers/net/wireless/mediatek/mt76/mt7915/mt7915.h index 565766debb5e..8c494be272c5 100644 --- a/drivers/net/wireless/mediatek/mt76/mt7915/mt7915.h +++ b/drivers/net/wireless/mediatek/mt76/mt7915/mt7915.h @@ -135,7 +135,30 @@ struct mib_stats { u32 tx_bf_fb_cpl_cnt; u32 tx_bf_fb_trig_cnt; - /* Add more stats here, updated from mac_update_stats */ + u32 tx_ampdu_cnt; + u32 tx_stop_q_empty_cnt; + u32 tx_mpdu_attempts_cnt; + u32 tx_mpdu_success_cnt; + u32 tx_pkt_ebf_cnt; + u32 tx_pkt_ibf_cnt; + + u32 tx_rwp_fail_cnt; + u32 tx_rwp_need_cnt; + + /* rx stats */ + u32 rx_fifo_full_cnt; + u32 channel_idle_cnt; + u32 rx_vector_mismatch_cnt; + u32 rx_delimiter_fail_cnt; + u32 rx_len_mismatch_cnt; + u32 rx_mpdu_cnt; + u32 rx_ampdu_cnt; + u32 rx_ampdu_bytes_cnt; + u32 rx_ampdu_valid_subframe_cnt; + u32 rx_ampdu_valid_subframe_bytes_cnt; + u32 rx_pfdrop_cnt; + u32 rx_vec_queue_overflow_drop_cnt; + u32 rx_ba_cnt; }; struct mt7915_hif { diff --git a/drivers/net/wireless/mediatek/mt76/mt7915/regs.h b/drivers/net/wireless/mediatek/mt76/mt7915/regs.h index a213b5cb82f8..62cc32a098fc 100644 --- a/drivers/net/wireless/mediatek/mt76/mt7915/regs.h +++ b/drivers/net/wireless/mediatek/mt76/mt7915/regs.h @@ -128,15 +128,120 @@ #define MT_LPON_TCR_SW_READ GENMASK(1, 0) /* MIB: band 0(0x24800), band 1(0xa4800) */ +/* These counters are (mostly?) clear-on-read. So, some should not + * be read at all in case firmware is already reading them. These + * are commented with 'DNR' below. The DNR stats will be read by querying + * the firmware API for the appropriate message. For counters the driver + * does read, the driver should accumulate the counters. + */ #define MT_WF_MIB_BASE(_band) ((_band) ? 0xa4800 : 0x24800) #define MT_WF_MIB(_band, ofs) (MT_WF_MIB_BASE(_band) + (ofs)) +#define MT_MIB_SDR0(_band) MT_WF_MIB(_band, 0x010) +#define MT_MIB_SDR0_BERACON_TX_CNT_MASK GENMASK(15, 0) + #define MT_MIB_SDR3(_band) MT_WF_MIB(_band, 0x014) #define MT_MIB_SDR3_FCS_ERR_MASK GENMASK(15, 0) +#define MT_MIB_SDR4(_band) MT_WF_MIB(_band, 0x018) +#define MT_MIB_SDR4_RX_FIFO_FULL_MASK GENMASK(15, 0) + +/* rx mpdu counter, full 32 bits */ +#define MT_MIB_SDR5(_band) MT_WF_MIB(_band, 0x01c) + +#define MT_MIB_SDR6(_band) MT_WF_MIB(_band, 0x020) +#define MT_MIB_SDR6_CHANNEL_IDL_CNT_MASK GENMASK(15, 0) + +#define MT_MIB_SDR7(_band) MT_WF_MIB(_band, 0x024) +#define MT_MIB_SDR7_RX_VECTOR_MISMATCH_CNT_MASK GENMASK(15, 0) + +#define MT_MIB_SDR8(_band) MT_WF_MIB(_band, 0x028) +#define MT_MIB_SDR8_RX_DELIMITER_FAIL_CNT_MASK GENMASK(15, 0) + +/* aka CCA_NAV_TX_TIME */ +#define MT_MIB_SDR9_DNR(_band) MT_WF_MIB(_band, 0x02c) +#define MT_MIB_SDR9_CCA_BUSY_TIME_MASK GENMASK(23, 0) + +#define MT_MIB_SDR10_DNR(_band) MT_WF_MIB(_band, 0x030) +#define MT_MIB_SDR10_MRDY_COUNT_MASK GENMASK(25, 0) + +#define MT_MIB_SDR11(_band) MT_WF_MIB(_band, 0x034) +#define MT_MIB_SDR11_RX_LEN_MISMATCH_CNT_MASK GENMASK(15, 0) + +/* tx ampdu cnt, full 32 bits */ +#define MT_MIB_SDR12(_band) MT_WF_MIB(_band, 0x038) + +#define MT_MIB_SDR13(_band) MT_WF_MIB(_band, 0x03c) +#define MT_MIB_SDR13_TX_STOP_Q_EMPTY_CNT_MASK GENMASK(15, 0) + +/* counts all mpdus in ampdu, regardless of success */ +#define MT_MIB_SDR14(_band) MT_WF_MIB(_band, 0x040) +#define MT_MIB_SDR14_TX_MPDU_ATTEMPTS_CNT_MASK GENMASK(23, 0) + +/* counts all successfully tx'd mpdus in ampdu */ +#define MT_MIB_SDR15(_band) MT_WF_MIB(_band, 0x044) +#define MT_MIB_SDR15_TX_MPDU_SUCCESS_CNT_MASK GENMASK(23, 0) + +/* in units of 'us' */ +#define MT_MIB_SDR16_DNR(_band) MT_WF_MIB(_band, 0x048) +#define MT_MIB_SDR16_PRIMARY_CCA_BUSY_TIME_MASK GENMASK(23, 0) + +#define MT_MIB_SDR17_DNR(_band) MT_WF_MIB(_band, 0x04c) +#define MT_MIB_SDR17_SECONDARY_CCA_BUSY_TIME_MASK GENMASK(23, 0) + +#define MT_MIB_SDR18(_band) MT_WF_MIB(_band, 0x050) +#define MT_MIB_SDR18_PRIMARY_ENERGY_DETECT_TIME_MASK GENMASK(23, 0) + +/* units are us */ +#define MT_MIB_SDR19_DNR(_band) MT_WF_MIB(_band, 0x054) +#define MT_MIB_SDR19_CCK_MDRDY_TIME_MASK GENMASK(23, 0) + +#define MT_MIB_SDR20_DNR(_band) MT_WF_MIB(_band, 0x058) +#define MT_MIB_SDR20_OFDM_VHT_MDRDY_TIME_MASK GENMASK(23, 0) + +#define MT_MIB_SDR21_DNR(_band) MT_WF_MIB(_band, 0x05c) +#define MT_MIB_SDR20_GREEN_MDRDY_TIME_MASK GENMASK(23, 0) + +/* rx ampdu count, 32-bit */ +#define MT_MIB_SDR22(_band) MT_WF_MIB(_band, 0x060) + +/* rx ampdu bytes count, 32-bit */ +#define MT_MIB_SDR23(_band) MT_WF_MIB(_band, 0x064) + +/* rx ampdu valid subframe count */ +#define MT_MIB_SDR24(_band) MT_WF_MIB(_band, 0x068) +#define MT_MIB_SDR24_RX_AMPDU_SF_CNT_MASK GENMASK(23, 0) + +/* rx ampdu valid subframe bytes count, 32bits */ +#define MT_MIB_SDR25(_band) MT_WF_MIB(_band, 0x06c) + +/* remaining windows protected stats */ +#define MT_MIB_SDR27(_band) MT_WF_MIB(_band, 0x074) +#define MT_MIB_SDR27_TX_RWP_FAIL_CNT_MASK GENMASK(15, 0) + +#define MT_MIB_SDR28(_band) MT_WF_MIB(_band, 0x078) +#define MT_MIB_SDR28_TX_RWP_NEED_CNT_MASK GENMASK(15, 0) + +#define MT_MIB_SDR29(_band) MT_WF_MIB(_band, 0x07c) +#define MT_MIB_SDR29_RX_PFDROP_CNT_MASK GENMASK(7, 0) + +#define MT_MIB_SDR30(_band) MT_WF_MIB(_band, 0x080) +#define MT_MIB_SDR30_RX_VEC_QUEUE_OVERFLOW_DROP_CNT_MASK GENMASK(15, 0) + +/* rx blockack count, 32 bits */ +#define MT_MIB_SDR31(_band) MT_WF_MIB(_band, 0x084) + +#define MT_MIB_SDR32(_band) MT_WF_MIB(_band, 0x088) +#define MT_MIB_SDR32_TX_PKT_EBF_CNT_MASK GENMASK(15, 0) + +#define MT_MIB_SDR33(_band) MT_WF_MIB(_band, 0x08c) +#define MT_MIB_SDR33_TX_PKT_IBF_CNT_MASK GENMASK(15, 0) + #define MT_MIB_SDR34(_band) MT_WF_MIB(_band, 0x090) #define MT_MIB_MU_BF_TX_CNT GENMASK(15, 0) +/* 36, 37 both DNR */ + #define MT_MIB_DR8(_band) MT_WF_MIB(_band, 0x0c0) #define MT_MIB_DR9(_band) MT_WF_MIB(_band, 0x0c4) #define MT_MIB_DR11(_band) MT_WF_MIB(_band, 0x0cc)