From patchwork Thu Jul 22 02:42:23 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bjorn Andersson X-Patchwork-Id: 483984 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1E105C63793 for ; Thu, 22 Jul 2021 02:44:17 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 0818961264 for ; Thu, 22 Jul 2021 02:44:17 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230442AbhGVCDi (ORCPT ); Wed, 21 Jul 2021 22:03:38 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:54690 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230438AbhGVCDh (ORCPT ); Wed, 21 Jul 2021 22:03:37 -0400 Received: from mail-ot1-x32a.google.com (mail-ot1-x32a.google.com [IPv6:2607:f8b0:4864:20::32a]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 89EEFC061575 for ; Wed, 21 Jul 2021 19:44:12 -0700 (PDT) Received: by mail-ot1-x32a.google.com with SMTP id f12-20020a056830204cb029048bcf4c6bd9so3994307otp.8 for ; Wed, 21 Jul 2021 19:44:12 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=MS6mraKNigkKOXB/hgjulPSCM2yRlqN2uoBBxxKVwTA=; b=z5cEQ5HwZy9cTyIhfxc5PZgxuUQae88VaPXcolle0LA4mxwW5kYraR3GpN/EW8J8Eh IOBlIeS4wRe3w+fTRbu14xlJ38Jo9YmjMYy+tZgMisWvQ/PfPsJjCwBaxTL+aaq3xUou h5680hBeio40Oms+w7uNvWOmD7RaNtBVnRMfdlp/tWgjsmEUDDTafy9bytnngOF+Yxja gjw6vax6X2GZqox1hP0bffCa6tt2FTU/2ZvG+nYhrjpIdUGL2HKfUdmZoAl9gI7fOXiu fbXgs6WyE8lr+COg/7PCUV7ZMYKJtrlnWdPYm+ygMbBzGyXQwicPRjzNHeoKODRLNJWw MyDQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=MS6mraKNigkKOXB/hgjulPSCM2yRlqN2uoBBxxKVwTA=; b=EFZd64jOlJEPZMWZbn4k6VJAg+YqcJFXgtSuwZYgEyPXmJ2jE820YAZbzrIOe6Z560 bz5gZRwOrtRKAoPHKTtJvi9I9thzKZtTDZqHIvWHYngQZtRrgMdu9ZVbgvTJqg23OQ+i 67HA20nCtXu8PfRJN9yZ+aVoTfub7khMqnx3NdQ2hkVEq/qZPA0uop18auruwEUSZrsd G4at6Ro6JkZhAximgv6U1Tn48nbv/jeCKD447ZPSXcT/L3eOX+eTWM9shez52m4bqQtZ MA2k/UF/LuJQFJDIDI0TEv6fiH2UiKHfzHc05t6/EsBgq+rgaEvuAxEGTX/Y2Inf/759 msvA== X-Gm-Message-State: AOAM5331YeXnGPtjNTxoZtvZNjs3ISPtPTRsKIoZ23NGv96ENvEhXf0a uQMUhUwc5InjklnLbSEiznOA9A== X-Google-Smtp-Source: ABdhPJwxJKJoRHACBlCRhC1wTHOjaagQ66oQDTdk/KvD7hHQHiuM5LOfacjgqpVgp2acBRiGESoHAQ== X-Received: by 2002:a9d:7dcf:: with SMTP id k15mr21901596otn.201.1626921851922; Wed, 21 Jul 2021 19:44:11 -0700 (PDT) Received: from localhost.localdomain (104-57-184-186.lightspeed.austtx.sbcglobal.net. [104.57.184.186]) by smtp.gmail.com with ESMTPSA id u18sm5346519oif.9.2021.07.21.19.44.11 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 21 Jul 2021 19:44:11 -0700 (PDT) From: Bjorn Andersson To: Rob Clark , Sean Paul , David Airlie , Daniel Vetter , Rob Herring , Stephen Boyd , Abhinav Kumar Cc: Kuogee Hsieh , Tanmay Shah , Chandan Uddaraju , linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 1/5] dt-bindings: msm/dp: Change reg definition Date: Wed, 21 Jul 2021 19:42:23 -0700 Message-Id: <20210722024227.3313096-2-bjorn.andersson@linaro.org> X-Mailer: git-send-email 2.29.2 In-Reply-To: <20210722024227.3313096-1-bjorn.andersson@linaro.org> References: <20210722024227.3313096-1-bjorn.andersson@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org reg was defined as one region covering the entire DP block, but the memory map is actually split in 4 regions and obviously the size of these regions differs between platforms. Switch the reg to require that all four regions are specified instead. It is expected that the implementation will handle existing DTBs, even though the schema defines the new layout. Signed-off-by: Bjorn Andersson --- .../bindings/display/msm/dp-controller.yaml | 11 +++++++++-- 1 file changed, 9 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/display/msm/dp-controller.yaml b/Documentation/devicetree/bindings/display/msm/dp-controller.yaml index 64d8d9e5e47a..a6e41be038fc 100644 --- a/Documentation/devicetree/bindings/display/msm/dp-controller.yaml +++ b/Documentation/devicetree/bindings/display/msm/dp-controller.yaml @@ -19,7 +19,11 @@ properties: - qcom,sc7180-dp reg: - maxItems: 1 + items: + - description: ahb register block + - description: aux register block + - description: link register block + - description: p0 register block interrupts: maxItems: 1 @@ -100,7 +104,10 @@ examples: displayport-controller@ae90000 { compatible = "qcom,sc7180-dp"; - reg = <0xae90000 0x1400>; + reg = <0xae90000 0x200>, + <0xae90200 0x200>, + <0xae90400 0xc00>, + <0xae91000 0x400>; interrupt-parent = <&mdss>; interrupts = <12>; clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>, From patchwork Thu Jul 22 02:42:24 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bjorn Andersson X-Patchwork-Id: 484722 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 166F8C6377C for ; Thu, 22 Jul 2021 02:44:18 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 02E0061283 for ; Thu, 22 Jul 2021 02:44:17 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230445AbhGVCDl (ORCPT ); Wed, 21 Jul 2021 22:03:41 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:54700 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230439AbhGVCDh (ORCPT ); Wed, 21 Jul 2021 22:03:37 -0400 Received: from mail-ot1-x331.google.com (mail-ot1-x331.google.com [IPv6:2607:f8b0:4864:20::331]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 7EF43C061575 for ; Wed, 21 Jul 2021 19:44:13 -0700 (PDT) Received: by mail-ot1-x331.google.com with SMTP id f93-20020a9d03e60000b02904b1f1d7c5f4so451362otf.9 for ; Wed, 21 Jul 2021 19:44:13 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=xKV8hlv55ixpHr/xWlsCOYWKdqHbAXYcZUW9Pc8iaEA=; b=IzorDbfi4J0yK4IdHULCR9qAHRjagqRlo6FFdpjHS7e93tP4y2cMxhtOq10k2Q6UeG iKYKYCdOeywdHLcHZxMvShzyMfyfyQqGP3Sbz+p9+G9DdXGxhbaU/HrLQTx96yIkSv3J FCyf3M+5Pz9QjvPfcF1ty/BbOKehfRG5cqA4/8KISGEr1xVXTNUIt+1lAskvVEvH9rx/ A83k/59flfuGg7xGbZtupKhEiYBu298i9zP6i/xhN1JDUpqh7F7tQ2kPuQlc9I6uaV9I i4lfLaUL5LRwClSPU52CW4ZfwQ5bVw9IMwbzfa7UG9rMyHbSw81rWdYbByjVixj7oq4D s4QQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=xKV8hlv55ixpHr/xWlsCOYWKdqHbAXYcZUW9Pc8iaEA=; b=Ef1JA7WXkbVdv9y01IKR2OFmo+0rcGO6IdEjbZX19vZV28Hv7NKINqYJBC3CgCZF0p RNawZpV8Tb59sUoNS71+hxUdnC3d3aOavDc1TdkK/mgqyTrHo7WMse2AE/5NnDMo1deL cqKm9Rq4tKsIuQdEgmnxwh15UlYLldOuMSWIAPqFR2aovW0H3Ep9Yn3+zzI5lYHbBi6R pwVcG/UGP1tWeNH5qJ+XUOogG/A9oqG9I3YrDh5R/wSzKAXFw1YPf5kt63QeFqSWLJh3 xZ8duLWvKaceYAJg70h0j2lRTibJ81/mflK+e5d6GIYgiBCxhexM0IauGB9a2r6Nwh6a D58A== X-Gm-Message-State: AOAM530tRnj7VIN/9/uappaq/GkTyjqdyIzZ7qcC6s1czSyYW9EIujVc aWOik+shwjxJcQ9Q41a3gyr6UQ== X-Google-Smtp-Source: ABdhPJzh1eqPt0fNok4t32PlvpdYBH5n9ebj7NHDBm2wEIBcrsZWeWlQRl5XwMN6ofEKXljlzL1Afw== X-Received: by 2002:a05:6830:2786:: with SMTP id x6mr25286903otu.359.1626921852888; Wed, 21 Jul 2021 19:44:12 -0700 (PDT) Received: from localhost.localdomain (104-57-184-186.lightspeed.austtx.sbcglobal.net. [104.57.184.186]) by smtp.gmail.com with ESMTPSA id u18sm5346519oif.9.2021.07.21.19.44.12 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 21 Jul 2021 19:44:12 -0700 (PDT) From: Bjorn Andersson To: Rob Clark , Sean Paul , David Airlie , Daniel Vetter , Rob Herring , Stephen Boyd , Abhinav Kumar Cc: Kuogee Hsieh , Tanmay Shah , Chandan Uddaraju , linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 2/5] drm/msm/dp: Use devres for ioremap() Date: Wed, 21 Jul 2021 19:42:24 -0700 Message-Id: <20210722024227.3313096-3-bjorn.andersson@linaro.org> X-Mailer: git-send-email 2.29.2 In-Reply-To: <20210722024227.3313096-1-bjorn.andersson@linaro.org> References: <20210722024227.3313096-1-bjorn.andersson@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org The non-devres version of ioremap is used, which requires manual cleanup. But the code paths leading here is mixed with other devres users, so rely on this for ioremap as well to simplify the code. Signed-off-by: Bjorn Andersson --- drivers/gpu/drm/msm/dp/dp_parser.c | 29 ++++------------------------- 1 file changed, 4 insertions(+), 25 deletions(-) diff --git a/drivers/gpu/drm/msm/dp/dp_parser.c b/drivers/gpu/drm/msm/dp/dp_parser.c index 0519dd3ac3c3..c064ced78278 100644 --- a/drivers/gpu/drm/msm/dp/dp_parser.c +++ b/drivers/gpu/drm/msm/dp/dp_parser.c @@ -32,7 +32,7 @@ static int msm_dss_ioremap(struct platform_device *pdev, } io_data->len = (u32)resource_size(res); - io_data->base = ioremap(res->start, io_data->len); + io_data->base = devm_ioremap(&pdev->dev, res->start, io_data->len); if (!io_data->base) { DRM_ERROR("%pS->%s: ioremap failed\n", __builtin_return_address(0), __func__); @@ -42,22 +42,6 @@ static int msm_dss_ioremap(struct platform_device *pdev, return 0; } -static void msm_dss_iounmap(struct dss_io_data *io_data) -{ - if (io_data->base) { - iounmap(io_data->base); - io_data->base = NULL; - } - io_data->len = 0; -} - -static void dp_parser_unmap_io_resources(struct dp_parser *parser) -{ - struct dp_io *io = &parser->io; - - msm_dss_iounmap(&io->dp_controller); -} - static int dp_parser_ctrl_res(struct dp_parser *parser) { int rc = 0; @@ -67,19 +51,14 @@ static int dp_parser_ctrl_res(struct dp_parser *parser) rc = msm_dss_ioremap(pdev, &io->dp_controller); if (rc) { DRM_ERROR("unable to remap dp io resources, rc=%d\n", rc); - goto err; + return rc; } io->phy = devm_phy_get(&pdev->dev, "dp"); - if (IS_ERR(io->phy)) { - rc = PTR_ERR(io->phy); - goto err; - } + if (IS_ERR(io->phy)) + return PTR_ERR(io->phy); return 0; -err: - dp_parser_unmap_io_resources(parser); - return rc; } static int dp_parser_misc(struct dp_parser *parser) From patchwork Thu Jul 22 02:42:25 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bjorn Andersson X-Patchwork-Id: 483983 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 326FEC6377C for ; Thu, 22 Jul 2021 02:44:23 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 1CC916127C for ; Thu, 22 Jul 2021 02:44:22 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230519AbhGVCDp (ORCPT ); Wed, 21 Jul 2021 22:03:45 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:54710 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230467AbhGVCDj (ORCPT ); Wed, 21 Jul 2021 22:03:39 -0400 Received: from mail-oi1-x231.google.com (mail-oi1-x231.google.com [IPv6:2607:f8b0:4864:20::231]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id A8ACFC061757 for ; Wed, 21 Jul 2021 19:44:14 -0700 (PDT) Received: by mail-oi1-x231.google.com with SMTP id w194so5103065oie.5 for ; Wed, 21 Jul 2021 19:44:14 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=jLfCGQhZ9sWWK6V+miB0xsO475S4ojkH6KbRA6dRnQ4=; b=enHglQkCfAeXdX2XT+ADILAHKBjtUZAqEoRhEBxzapVPkQhqIWS4apVqPKtTnx1joi DUSrlS4z6vYBIliupHyaFkUYPcxR+vNP+ZTXKQGHizjl1Za4cj0ULDNdh/4QJ6mb04R2 pWEduzwKUx6sLfFmqgaATyOIG0mu6tz6Q3xLkfRSaJc5YtrouH65Gx5tcTnUxe9HaSoR 6ZV5KKvwbTZ7Gyl1p9XR70JT+nDqO+JwqJi/XLILzYdQgKS+XsKPhgcb6caDZu/5kcOD 9/fg43z7lKyi7sw/geLrThpfA9raDy0MbPgbweomzYD4vNs7x6OIMlw8Rw/qJhvsr0h+ 5VVw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=jLfCGQhZ9sWWK6V+miB0xsO475S4ojkH6KbRA6dRnQ4=; b=oW4Mu2HGQtRY+sPCc7yGVl4T82WtRl21oHJGcnj1OjIF5xsEtoaqIO225oguZi+gPr Tn00gKpXxMfnlF/NnaFt2J6otIVy8z1JBb4g2wo4aU4FbgfBXd6yKlSus82jQE0HwYHx Zq+tkNO8KNLwHt0k+gFxPqL9lenuAZkHY6Okg4EGDb8r8Qkb5oKBZ7cmLr7hAQnM4djC Pp6fQRrs9KArmOo/nYBhwLShqY2sv+1BadR4cY/jEBHCzkwDcBjqH5n0fp/lLzABtTxS GGu247r/JeYILB9/ZMTGRxo3D7exaYF+M2nO4q1l24QjL7Y3yNNn/6/r7i2KVKoK1112 dhBg== X-Gm-Message-State: AOAM531sfWyFwawV27PjXxTnAj2+NzEki7YCTPqOMtvxvNbSzZoNQlV2 jP3JvlvfxhTEqHUQBVvdJ8mCBg== X-Google-Smtp-Source: ABdhPJxv5tX28bUZMIQ2i4FRhBPM5G8KFvgAH21RAfpzAtTS4CaoeIjq0CgLpSyBZVsVug8cKsefIQ== X-Received: by 2002:aca:1e11:: with SMTP id m17mr4309603oic.104.1626921854077; Wed, 21 Jul 2021 19:44:14 -0700 (PDT) Received: from localhost.localdomain (104-57-184-186.lightspeed.austtx.sbcglobal.net. [104.57.184.186]) by smtp.gmail.com with ESMTPSA id u18sm5346519oif.9.2021.07.21.19.44.12 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 21 Jul 2021 19:44:13 -0700 (PDT) From: Bjorn Andersson To: Rob Clark , Sean Paul , David Airlie , Daniel Vetter , Rob Herring , Stephen Boyd , Abhinav Kumar Cc: Kuogee Hsieh , Tanmay Shah , Chandan Uddaraju , linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 3/5] drm/msm/dp: Refactor ioremap wrapper Date: Wed, 21 Jul 2021 19:42:25 -0700 Message-Id: <20210722024227.3313096-4-bjorn.andersson@linaro.org> X-Mailer: git-send-email 2.29.2 In-Reply-To: <20210722024227.3313096-1-bjorn.andersson@linaro.org> References: <20210722024227.3313096-1-bjorn.andersson@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org In order to deal with multiple memory ranges in the following commit change the ioremap wrapper to not poke directly into the dss_io_data struct. Signed-off-by: Bjorn Andersson --- drivers/gpu/drm/msm/dp/dp_parser.c | 28 ++++++++++++++-------------- drivers/gpu/drm/msm/dp/dp_parser.h | 2 +- 2 files changed, 15 insertions(+), 15 deletions(-) diff --git a/drivers/gpu/drm/msm/dp/dp_parser.c b/drivers/gpu/drm/msm/dp/dp_parser.c index c064ced78278..e68dacef547c 100644 --- a/drivers/gpu/drm/msm/dp/dp_parser.c +++ b/drivers/gpu/drm/msm/dp/dp_parser.c @@ -19,39 +19,39 @@ static const struct dp_regulator_cfg sdm845_dp_reg_cfg = { }, }; -static int msm_dss_ioremap(struct platform_device *pdev, - struct dss_io_data *io_data) +static void __iomem *dp_ioremap(struct platform_device *pdev, int idx, size_t *len) { struct resource *res = NULL; + void __iomem *base; - res = platform_get_resource(pdev, IORESOURCE_MEM, 0); + res = platform_get_resource(pdev, IORESOURCE_MEM, idx); if (!res) { DRM_ERROR("%pS->%s: msm_dss_get_res failed\n", __builtin_return_address(0), __func__); - return -ENODEV; + return ERR_PTR(-ENODEV); } - io_data->len = (u32)resource_size(res); - io_data->base = devm_ioremap(&pdev->dev, res->start, io_data->len); - if (!io_data->base) { + base = devm_ioremap_resource(&pdev->dev, res); + if (!base) { DRM_ERROR("%pS->%s: ioremap failed\n", __builtin_return_address(0), __func__); - return -EIO; + return ERR_PTR(-EIO); } - return 0; + *len = resource_size(res); + return base; } static int dp_parser_ctrl_res(struct dp_parser *parser) { - int rc = 0; struct platform_device *pdev = parser->pdev; struct dp_io *io = &parser->io; + struct dss_io_data *dss = &io->dp_controller; - rc = msm_dss_ioremap(pdev, &io->dp_controller); - if (rc) { - DRM_ERROR("unable to remap dp io resources, rc=%d\n", rc); - return rc; + dss->base = dp_ioremap(pdev, 0, &dss->len); + if (IS_ERR(dss->base)) { + DRM_ERROR("unable to remap dp io region: %pe\n", dss->base); + return PTR_ERR(dss->base); } io->phy = devm_phy_get(&pdev->dev, "dp"); diff --git a/drivers/gpu/drm/msm/dp/dp_parser.h b/drivers/gpu/drm/msm/dp/dp_parser.h index 34b49628bbaf..dc62e70b1640 100644 --- a/drivers/gpu/drm/msm/dp/dp_parser.h +++ b/drivers/gpu/drm/msm/dp/dp_parser.h @@ -26,7 +26,7 @@ enum dp_pm_type { }; struct dss_io_data { - u32 len; + size_t len; void __iomem *base; }; From patchwork Thu Jul 22 02:42:26 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bjorn Andersson X-Patchwork-Id: 483854 Delivered-To: patch@linaro.org Received: by 2002:a02:c94a:0:0:0:0:0 with SMTP id u10csp6762877jao; Wed, 21 Jul 2021 19:44:23 -0700 (PDT) X-Google-Smtp-Source: ABdhPJzpNBAwvzTr32FeXHVBnO+/R+QnQAH7TPOgU1WDEFX660+KOnBzT2vgulhbwshai6PN/Rts X-Received: by 2002:a5d:9648:: with SMTP id d8mr28369759ios.171.1626921863078; Wed, 21 Jul 2021 19:44:23 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1626921863; cv=none; d=google.com; s=arc-20160816; b=h3u9ut++RerSgi1vLG8mMHeLhOv/4a+krv4A4glsP/y1pt+PVuxmeZTd/wEEkA8SWN GBlPJPvcld0+O9GNWvKNkhH0Y1vKrxoisjInhPct8CCXgHkbN8ju3fqaPzGg5Xs5U1aj Um8I848cfyB5okrzNV2x8s6/EyjlPdwY9rUQT026aah36Ke+nRkaKEH3LZMe5EGNVDkZ fVx49lele1fKkzh01gakn7XH2uSrJ7/1wf8re6Aw5ys4VJo7V9EiqKgK/L54IZ1Xf/Yq OW6Z8nR5JQHGHC6zjy6ewhQCNeN2S98QwIZe1L9XVT/xaOPNDxjyvO42AZLu7204ot8N Pk7g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=bo1WH90B2Q6BpI8Vp15t4ugWjGrNTTsDZhz3C9CMTkc=; b=uuo6XQJaykVMuOEIQe7HYI2z1Nemw3r/PaJb1Te4sc6tvvdYOmjz4oNvojAGLanwKZ digCdB37ClMX6j4P2alwRbExvNYV+oteF+jLtoyqCjoMrL0iBerev+VRZVujP8xoWqRh EnO7Fqyq/5vYQQ8ii28IrxVM1im0ElFx1NhDRxGcve0JBekltu71EOQW6W8geUH01/Qm pOQ7WDa0scXUGX/Gt4BxBNzaKHhYxUOEzK8k45JZbg7vhCu3fOoxw+XM8sFftYURyqI0 qlYVY8eKWmExIT/7bW69xbu/3zyZ/FCrp85vC9LT0pKkqWFITxssCz76qm1osJ2vIeW9 U6rw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=EM1kT5yb; spf=pass (google.com: domain of linux-arm-msm-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id z7si1358727ilq.32.2021.07.21.19.44.22; Wed, 21 Jul 2021 19:44:23 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-arm-msm-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=EM1kT5yb; spf=pass (google.com: domain of linux-arm-msm-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231128AbhGVCDp (ORCPT + 17 others); Wed, 21 Jul 2021 22:03:45 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:54746 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230506AbhGVCDo (ORCPT ); Wed, 21 Jul 2021 22:03:44 -0400 Received: from mail-ot1-x330.google.com (mail-ot1-x330.google.com [IPv6:2607:f8b0:4864:20::330]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id DC466C061799 for ; Wed, 21 Jul 2021 19:44:15 -0700 (PDT) Received: by mail-ot1-x330.google.com with SMTP id b18-20020a0568303112b02904cf73f54f4bso1020818ots.2 for ; Wed, 21 Jul 2021 19:44:15 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=bo1WH90B2Q6BpI8Vp15t4ugWjGrNTTsDZhz3C9CMTkc=; b=EM1kT5ybuQduKHIs+KTxthW8o24JaLpX36RVLazTaIPkm1XaeZ/O8x8O22//Jlmydt fdgef1G69braOKl4B6enqe4hvkNuy1tnBVJd13g1DQNz3TDC+lQEy5LHxbfMmgbiNoYn 8DuBs8vtFhiSN1JAC+/tCPEKCIaiMo/mYOrI9elkGbIg1vy6wBKS1JvugJD1nUemzo3o 6GzkiLRvrEKRdjB4QEv2nZDvEfXyeRy5TobfcejNfduQJrcvCRcnUKKroFCnpB61w9gZ //x4Y6sv+oZMMFhN4VAyk9WRvayUo57NvV8tnfHpxYfhz3t1s/LYUeSpuGyxXwPC5eWX hRYg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=bo1WH90B2Q6BpI8Vp15t4ugWjGrNTTsDZhz3C9CMTkc=; b=mp+MlIHrj7rw0ZosCiWe7MJ5ZfuUhzZO5MsuRuNxnp+wEYmBPR/KcB2G908hjloqzy txnR/6ny2910XlJAkxGCLR3+BnYuLmo+wiOd7iys83Tq/1KAHiNOCgjDdYnWdoRjw6BU J3i0yGUbKMeTfgrTtuFh5Cse+w6AKkGf2AHw3YILDIvMOFKJdX29f3hjrIoOjQjfbqns sMzrl7m8Vy2sC0VswahXEVcuE8VQQ1lJyQeohk3b/aivWvPQR3VxT/5udWMiLAWxOCnX 1S+3sZd1dZ1jt0b93zksX54oJep9BcUP0kl4VUSJYtTbj8bCxTLHYeww26b+ynCY3CJr LLXw== X-Gm-Message-State: AOAM531UX0GFqnE+BD32jQdPrl2oD3MZRkMwwjpkjQRhpZ+vgBo1dI8K ara01PxQPN3F0BRFt6G/nEYIog== X-Received: by 2002:a9d:63c6:: with SMTP id e6mr27408331otl.295.1626921855164; Wed, 21 Jul 2021 19:44:15 -0700 (PDT) Received: from localhost.localdomain (104-57-184-186.lightspeed.austtx.sbcglobal.net. [104.57.184.186]) by smtp.gmail.com with ESMTPSA id u18sm5346519oif.9.2021.07.21.19.44.14 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 21 Jul 2021 19:44:14 -0700 (PDT) From: Bjorn Andersson To: Rob Clark , Sean Paul , David Airlie , Daniel Vetter , Rob Herring , Stephen Boyd , Abhinav Kumar Cc: Kuogee Hsieh , Tanmay Shah , Chandan Uddaraju , linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 4/5] drm/msm/dp: Store each subblock in the io region Date: Wed, 21 Jul 2021 19:42:26 -0700 Message-Id: <20210722024227.3313096-5-bjorn.andersson@linaro.org> X-Mailer: git-send-email 2.29.2 In-Reply-To: <20210722024227.3313096-1-bjorn.andersson@linaro.org> References: <20210722024227.3313096-1-bjorn.andersson@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Not all platforms has DP_P0 at offset 0x1000 from the beginning of the DP block. So dss_io_data into representing each of the sub-regions, to make it possible in the next patch to specify each of the sub-regions individually. Signed-off-by: Bjorn Andersson --- drivers/gpu/drm/msm/dp/dp_catalog.c | 64 +++++++++-------------------- drivers/gpu/drm/msm/dp/dp_parser.c | 30 ++++++++++++-- drivers/gpu/drm/msm/dp/dp_parser.h | 10 ++++- 3 files changed, 54 insertions(+), 50 deletions(-) -- 2.29.2 diff --git a/drivers/gpu/drm/msm/dp/dp_catalog.c b/drivers/gpu/drm/msm/dp/dp_catalog.c index ca96e3514790..23458b0ddc37 100644 --- a/drivers/gpu/drm/msm/dp/dp_catalog.c +++ b/drivers/gpu/drm/msm/dp/dp_catalog.c @@ -24,15 +24,6 @@ #define DP_INTERRUPT_STATUS_ACK_SHIFT 1 #define DP_INTERRUPT_STATUS_MASK_SHIFT 2 -#define MSM_DP_CONTROLLER_AHB_OFFSET 0x0000 -#define MSM_DP_CONTROLLER_AHB_SIZE 0x0200 -#define MSM_DP_CONTROLLER_AUX_OFFSET 0x0200 -#define MSM_DP_CONTROLLER_AUX_SIZE 0x0200 -#define MSM_DP_CONTROLLER_LINK_OFFSET 0x0400 -#define MSM_DP_CONTROLLER_LINK_SIZE 0x0C00 -#define MSM_DP_CONTROLLER_P0_OFFSET 0x1000 -#define MSM_DP_CONTROLLER_P0_SIZE 0x0400 - #define DP_INTERRUPT_STATUS1 \ (DP_INTR_AUX_I2C_DONE| \ DP_INTR_WRONG_ADDR | DP_INTR_TIMEOUT | \ @@ -66,82 +57,77 @@ void dp_catalog_snapshot(struct dp_catalog *dp_catalog, struct msm_disp_state *d { struct dp_catalog_private *catalog = container_of(dp_catalog, struct dp_catalog_private, dp_catalog); + struct dss_io_data *dss = &catalog->io->dp_controller; - msm_disp_snapshot_add_block(disp_state, catalog->io->dp_controller.len, - catalog->io->dp_controller.base, "dp_ctrl"); + msm_disp_snapshot_add_block(disp_state, dss->ahb_len, dss->ahb, "dp_ahb"); + msm_disp_snapshot_add_block(disp_state, dss->aux_len, dss->aux, "dp_aux"); + msm_disp_snapshot_add_block(disp_state, dss->link_len, dss->link, "dp_link"); + msm_disp_snapshot_add_block(disp_state, dss->p0_len, dss->p0, "dp_p0"); } static inline u32 dp_read_aux(struct dp_catalog_private *catalog, u32 offset) { - offset += MSM_DP_CONTROLLER_AUX_OFFSET; - return readl_relaxed(catalog->io->dp_controller.base + offset); + return readl_relaxed(catalog->io->dp_controller.aux + offset); } static inline void dp_write_aux(struct dp_catalog_private *catalog, u32 offset, u32 data) { - offset += MSM_DP_CONTROLLER_AUX_OFFSET; /* * To make sure aux reg writes happens before any other operation, * this function uses writel() instread of writel_relaxed() */ - writel(data, catalog->io->dp_controller.base + offset); + writel(data, catalog->io->dp_controller.aux + offset); } static inline u32 dp_read_ahb(struct dp_catalog_private *catalog, u32 offset) { - offset += MSM_DP_CONTROLLER_AHB_OFFSET; - return readl_relaxed(catalog->io->dp_controller.base + offset); + return readl_relaxed(catalog->io->dp_controller.ahb + offset); } static inline void dp_write_ahb(struct dp_catalog_private *catalog, u32 offset, u32 data) { - offset += MSM_DP_CONTROLLER_AHB_OFFSET; /* * To make sure phy reg writes happens before any other operation, * this function uses writel() instread of writel_relaxed() */ - writel(data, catalog->io->dp_controller.base + offset); + writel(data, catalog->io->dp_controller.ahb + offset); } static inline void dp_write_p0(struct dp_catalog_private *catalog, u32 offset, u32 data) { - offset += MSM_DP_CONTROLLER_P0_OFFSET; /* * To make sure interface reg writes happens before any other operation, * this function uses writel() instread of writel_relaxed() */ - writel(data, catalog->io->dp_controller.base + offset); + writel(data, catalog->io->dp_controller.p0 + offset); } static inline u32 dp_read_p0(struct dp_catalog_private *catalog, u32 offset) { - offset += MSM_DP_CONTROLLER_P0_OFFSET; /* * To make sure interface reg writes happens before any other operation, * this function uses writel() instread of writel_relaxed() */ - return readl_relaxed(catalog->io->dp_controller.base + offset); + return readl_relaxed(catalog->io->dp_controller.p0 + offset); } static inline u32 dp_read_link(struct dp_catalog_private *catalog, u32 offset) { - offset += MSM_DP_CONTROLLER_LINK_OFFSET; - return readl_relaxed(catalog->io->dp_controller.base + offset); + return readl_relaxed(catalog->io->dp_controller.link + offset); } static inline void dp_write_link(struct dp_catalog_private *catalog, u32 offset, u32 data) { - offset += MSM_DP_CONTROLLER_LINK_OFFSET; /* * To make sure link reg writes happens before any other operation, * this function uses writel() instread of writel_relaxed() */ - writel(data, catalog->io->dp_controller.base + offset); + writel(data, catalog->io->dp_controller.link + offset); } /* aux related catalog functions */ @@ -276,29 +262,21 @@ static void dump_regs(void __iomem *base, int len) void dp_catalog_dump_regs(struct dp_catalog *dp_catalog) { - u32 offset, len; struct dp_catalog_private *catalog = container_of(dp_catalog, struct dp_catalog_private, dp_catalog); + struct dss_io_data *io = &catalog->io->dp_controller; pr_info("AHB regs\n"); - offset = MSM_DP_CONTROLLER_AHB_OFFSET; - len = MSM_DP_CONTROLLER_AHB_SIZE; - dump_regs(catalog->io->dp_controller.base + offset, len); + dump_regs(io->ahb, io->ahb_len); pr_info("AUXCLK regs\n"); - offset = MSM_DP_CONTROLLER_AUX_OFFSET; - len = MSM_DP_CONTROLLER_AUX_SIZE; - dump_regs(catalog->io->dp_controller.base + offset, len); + dump_regs(io->aux, io->aux_len); pr_info("LCLK regs\n"); - offset = MSM_DP_CONTROLLER_LINK_OFFSET; - len = MSM_DP_CONTROLLER_LINK_SIZE; - dump_regs(catalog->io->dp_controller.base + offset, len); + dump_regs(io->link, io->link_len); pr_info("P0CLK regs\n"); - offset = MSM_DP_CONTROLLER_P0_OFFSET; - len = MSM_DP_CONTROLLER_P0_SIZE; - dump_regs(catalog->io->dp_controller.base + offset, len); + dump_regs(io->p0, io->p0_len); } u32 dp_catalog_aux_get_irq(struct dp_catalog *dp_catalog) @@ -492,8 +470,7 @@ int dp_catalog_ctrl_set_pattern(struct dp_catalog *dp_catalog, bit = BIT(pattern - 1) << DP_MAINLINK_READY_LINK_TRAINING_SHIFT; /* Poll for mainlink ready status */ - ret = readx_poll_timeout(readl, catalog->io->dp_controller.base + - MSM_DP_CONTROLLER_LINK_OFFSET + + ret = readx_poll_timeout(readl, catalog->io->dp_controller.link + REG_DP_MAINLINK_READY, data, data & bit, POLLING_SLEEP_US, POLLING_TIMEOUT_US); @@ -540,8 +517,7 @@ bool dp_catalog_ctrl_mainlink_ready(struct dp_catalog *dp_catalog) struct dp_catalog_private, dp_catalog); /* Poll for mainlink ready status */ - ret = readl_poll_timeout(catalog->io->dp_controller.base + - MSM_DP_CONTROLLER_LINK_OFFSET + + ret = readl_poll_timeout(catalog->io->dp_controller.link + REG_DP_MAINLINK_READY, data, data & DP_MAINLINK_READY_FOR_VIDEO, POLLING_SLEEP_US, POLLING_TIMEOUT_US); diff --git a/drivers/gpu/drm/msm/dp/dp_parser.c b/drivers/gpu/drm/msm/dp/dp_parser.c index e68dacef547c..1a10901ae574 100644 --- a/drivers/gpu/drm/msm/dp/dp_parser.c +++ b/drivers/gpu/drm/msm/dp/dp_parser.c @@ -11,6 +11,15 @@ #include "dp_parser.h" #include "dp_reg.h" +#define DP_DEFAULT_AHB_OFFSET 0x0000 +#define DP_DEFAULT_AHB_SIZE 0x0200 +#define DP_DEFAULT_AUX_OFFSET 0x0200 +#define DP_DEFAULT_AUX_SIZE 0x0200 +#define DP_DEFAULT_LINK_OFFSET 0x0400 +#define DP_DEFAULT_LINK_SIZE 0x0C00 +#define DP_DEFAULT_P0_OFFSET 0x1000 +#define DP_DEFAULT_P0_SIZE 0x0400 + static const struct dp_regulator_cfg sdm845_dp_reg_cfg = { .num = 2, .regs = { @@ -48,12 +57,25 @@ static int dp_parser_ctrl_res(struct dp_parser *parser) struct dp_io *io = &parser->io; struct dss_io_data *dss = &io->dp_controller; - dss->base = dp_ioremap(pdev, 0, &dss->len); - if (IS_ERR(dss->base)) { - DRM_ERROR("unable to remap dp io region: %pe\n", dss->base); - return PTR_ERR(dss->base); + dss->ahb = dp_ioremap(pdev, 0, &dss->ahb_len); + if (IS_ERR(dss->ahb)) { + DRM_ERROR("unable to remap ahb region: %pe\n", dss->ahb); + return PTR_ERR(dss->ahb); } + if (dss->ahb_len < DP_DEFAULT_P0_OFFSET + DP_DEFAULT_P0_SIZE) { + DRM_ERROR("legacy memory region not large enough\n"); + return -EINVAL; + } + + dss->ahb_len = DP_DEFAULT_AHB_SIZE; + dss->aux = dss->ahb + DP_DEFAULT_AUX_OFFSET; + dss->aux_len = DP_DEFAULT_AUX_SIZE; + dss->link = dss->ahb + DP_DEFAULT_LINK_OFFSET; + dss->link_len = DP_DEFAULT_LINK_SIZE; + dss->p0 = dss->ahb + DP_DEFAULT_P0_OFFSET; + dss->p0_len = DP_DEFAULT_P0_SIZE; + io->phy = devm_phy_get(&pdev->dev, "dp"); if (IS_ERR(io->phy)) return PTR_ERR(io->phy); diff --git a/drivers/gpu/drm/msm/dp/dp_parser.h b/drivers/gpu/drm/msm/dp/dp_parser.h index dc62e70b1640..3266b529c090 100644 --- a/drivers/gpu/drm/msm/dp/dp_parser.h +++ b/drivers/gpu/drm/msm/dp/dp_parser.h @@ -26,8 +26,14 @@ enum dp_pm_type { }; struct dss_io_data { - size_t len; - void __iomem *base; + void __iomem *ahb; + size_t ahb_len; + void __iomem *aux; + size_t aux_len; + void __iomem *link; + size_t link_len; + void __iomem *p0; + size_t p0_len; }; static inline const char *dp_parser_pm_name(enum dp_pm_type module) From patchwork Thu Jul 22 02:42:27 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bjorn Andersson X-Patchwork-Id: 483982 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3DF5FC6377C for ; Thu, 22 Jul 2021 02:44:29 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 2857B61287 for ; Thu, 22 Jul 2021 02:44:29 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230458AbhGVCDw (ORCPT ); Wed, 21 Jul 2021 22:03:52 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:54758 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230500AbhGVCDs (ORCPT ); Wed, 21 Jul 2021 22:03:48 -0400 Received: from mail-oi1-x230.google.com (mail-oi1-x230.google.com [IPv6:2607:f8b0:4864:20::230]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E1E70C0617A2 for ; Wed, 21 Jul 2021 19:44:16 -0700 (PDT) Received: by mail-oi1-x230.google.com with SMTP id a132so5087912oib.6 for ; Wed, 21 Jul 2021 19:44:16 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=uhoriXxwuf3F+ep/Ax/y3D7yAyI4y+wKU+diem5MpTA=; b=ZdBi2xPCD1R0VnJO6SavUR7GyC1Qambh3gp4KeO0sbhvIYnOo6MPCsLJ6v1Cl5f4VA Anr4nQvC+6tFNE6CeRot/cI4AVIUFN2aHccBkHRvZ+JibvKCbHl2rH90fyEhMjZxegBq Q+S4kxj6APRr8EgUnH4xDmSNZXsIIT3w1SlYuTfeOvepP6A448tE5GTgO+Shk8sCkCyv HUZJeQhlMw3ByhEnOq/HHR84wSmAUArNiu55uIkyvPxtQVcMQ425L2jhoTc3hnfNvB7L hmmCCUij94G13agr+DrhgA7fq9PgnQ96VRlFlkAF5gXxg92nBKobk77Usgv+7rBUxLuP BeJg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=uhoriXxwuf3F+ep/Ax/y3D7yAyI4y+wKU+diem5MpTA=; b=r4sTPPxe9cBTcoVDPzUD8jA2o/TcFoQ2A4gVpSvwIW6MxwkVAJ2/MuSDVaQT647+aw k2Zy6GJLPL96pWqE+/GVz21EwbJVdSXQCs5j8z5QW709VcAxk8xiiAqlNdK//UBqggCh Tt8+ge3MMo8vCgvReSV4wEXPLdpyhISIacofWJuVbcueExf6ucVJ7L9j0LYal1tZ6cA3 1uIAQ6MeNLQwhVxipazXgIrlQQ/0XJXzfrz3bB5awmXm7925qKnCfW+wdQaYwwfamSAy DAXg8VgAEWIQWQmkwYPJXe9PgewI85dHOx2PqJfPRTruLWteDsZhh4Y8BcB7YX182Zmd pydA== X-Gm-Message-State: AOAM533hLrMsHg7/Yxxgk/qMcM0BeYlsi89KuP7l+1nWocpaoVKNtk2C 0F4W3mwYKF1u3FQJw1TsGctWUA== X-Google-Smtp-Source: ABdhPJyGElkKfHDf6jyZwFqec1oLyl/N/ypeSqKhVHIH8x4MMGHzo5HPp19meT7huH/WVt7TtNbxRw== X-Received: by 2002:a54:4102:: with SMTP id l2mr27057626oic.126.1626921856181; Wed, 21 Jul 2021 19:44:16 -0700 (PDT) Received: from localhost.localdomain (104-57-184-186.lightspeed.austtx.sbcglobal.net. [104.57.184.186]) by smtp.gmail.com with ESMTPSA id u18sm5346519oif.9.2021.07.21.19.44.15 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 21 Jul 2021 19:44:15 -0700 (PDT) From: Bjorn Andersson To: Rob Clark , Sean Paul , David Airlie , Daniel Vetter , Rob Herring , Stephen Boyd , Abhinav Kumar Cc: Kuogee Hsieh , Tanmay Shah , Chandan Uddaraju , linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 5/5] drm/msm/dp: Allow sub-regions to be specified in DT Date: Wed, 21 Jul 2021 19:42:27 -0700 Message-Id: <20210722024227.3313096-6-bjorn.andersson@linaro.org> X-Mailer: git-send-email 2.29.2 In-Reply-To: <20210722024227.3313096-1-bjorn.andersson@linaro.org> References: <20210722024227.3313096-1-bjorn.andersson@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Not all platforms has P0 at an offset of 0x1000 from the base address, so add support for specifying each sub-region in DT. The code falls back to the predefined offsets in the case that only a single reg is specified, in order to support existing DT. Signed-off-by: Bjorn Andersson Reviewed-by: Abhinav Kumar --- drivers/gpu/drm/msm/dp/dp_parser.c | 49 +++++++++++++++++++++++------- 1 file changed, 38 insertions(+), 11 deletions(-) diff --git a/drivers/gpu/drm/msm/dp/dp_parser.c b/drivers/gpu/drm/msm/dp/dp_parser.c index 1a10901ae574..fc8a6452f641 100644 --- a/drivers/gpu/drm/msm/dp/dp_parser.c +++ b/drivers/gpu/drm/msm/dp/dp_parser.c @@ -63,18 +63,45 @@ static int dp_parser_ctrl_res(struct dp_parser *parser) return PTR_ERR(dss->ahb); } - if (dss->ahb_len < DP_DEFAULT_P0_OFFSET + DP_DEFAULT_P0_SIZE) { - DRM_ERROR("legacy memory region not large enough\n"); - return -EINVAL; - } + dss->aux = dp_ioremap(pdev, 1, &dss->aux_len); + if (IS_ERR(dss->aux)) { + /* + * The initial binding had a single reg, but in order to + * support variation in the sub-region sizes this was split. + * dp_ioremap() will fail with -ENODEV here if only a single + * reg is specified, so fill in the sub-region offsets and + * lengths based on this single region. + */ + if (PTR_ERR(dss->aux) == -ENODEV) { + if (dss->ahb_len < DP_DEFAULT_P0_OFFSET + DP_DEFAULT_P0_SIZE) { + DRM_ERROR("legacy memory region not large enough\n"); + return -EINVAL; + } + + dss->ahb_len = DP_DEFAULT_AHB_SIZE; + dss->aux = dss->ahb + DP_DEFAULT_AUX_OFFSET; + dss->aux_len = DP_DEFAULT_AUX_SIZE; + dss->link = dss->ahb + DP_DEFAULT_LINK_OFFSET; + dss->link_len = DP_DEFAULT_LINK_SIZE; + dss->p0 = dss->ahb + DP_DEFAULT_P0_OFFSET; + dss->p0_len = DP_DEFAULT_P0_SIZE; + } else { + DRM_ERROR("unable to remap aux region: %pe\n", dss->aux); + return PTR_ERR(dss->aux); + } + } else { + dss->link = dp_ioremap(pdev, 2, &dss->link_len); + if (IS_ERR(dss->link)) { + DRM_ERROR("unable to remap link region: %pe\n", dss->link); + return PTR_ERR(dss->link); + } - dss->ahb_len = DP_DEFAULT_AHB_SIZE; - dss->aux = dss->ahb + DP_DEFAULT_AUX_OFFSET; - dss->aux_len = DP_DEFAULT_AUX_SIZE; - dss->link = dss->ahb + DP_DEFAULT_LINK_OFFSET; - dss->link_len = DP_DEFAULT_LINK_SIZE; - dss->p0 = dss->ahb + DP_DEFAULT_P0_OFFSET; - dss->p0_len = DP_DEFAULT_P0_SIZE; + dss->p0 = dp_ioremap(pdev, 3, &dss->p0_len); + if (IS_ERR(dss->p0)) { + DRM_ERROR("unable to remap p0 region: %pe\n", dss->p0); + return PTR_ERR(dss->p0); + } + } io->phy = devm_phy_get(&pdev->dev, "dp"); if (IS_ERR(io->phy))