From patchwork Mon Sep 10 03:58:32 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Masahiro Yamada X-Patchwork-Id: 146266 Delivered-To: patch@linaro.org Received: by 2002:a2e:1648:0:0:0:0:0 with SMTP id 8-v6csp2040421ljw; Sun, 9 Sep 2018 21:01:15 -0700 (PDT) X-Google-Smtp-Source: ANB0VdYF/uNlG8wh0a6oCdjqU0TZqycEgsm5hM4QbXxm7EEc2WsQlXb1AR2aJgTY4F/yH/JESDv6 X-Received: by 2002:a50:a8e4:: with SMTP id k91-v6mr21060527edc.4.1536552075586; Sun, 09 Sep 2018 21:01:15 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1536552075; cv=none; d=google.com; s=arc-20160816; b=T8s1G0vQJXhpzv5t15Q2AdR4mefBZpsY//S5F3E6CnDrja4t+bDd17dEtui62uEOo8 qZWOiAuUhV+PwjIMF2ywgpCqgQe8q/mkcCbkokxdJv7XpMMgZo6zuFgW/CnQzOUZkPGC v5/9XHrHZH2a5hwl362SaguFqTniRGTF+GLLIJaEzXcL0uVNcktPu7H5GKjatYRc489/ ipPVZZkdtPMlY5QnYjgL3uCD6YbKkUjdoPMt31XT5/KQzJuSflgxo9v7me7sLtGlgWgE n/1VGkZAWU45N3WyboUHHbOBwZFWhjQM4L+07Kf7fd0h9tR5oHi0LC0IRjLvvYToxr7E Rhfg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:content-transfer-encoding:mime-version :list-subscribe:list-help:list-post:list-archive:list-unsubscribe :list-id:precedence:subject:cc:references:in-reply-to:message-id :date:to:from:dkim-signature:dkim-filter; bh=uWHa3yMTruSOKYZ0sLv8kayC6V4trKz2UyHZgMXtaac=; b=QDPl3d7iD5qKnzDsAVm/h8/iH63bLMZZBuyg3LBe9I9tB+82tTylNXAJZUzWRZJj7V EcHFpOimHnuDdmdhYzg9mwkCFdRowNMErRjhoxzXlvG12XmHX7QfJ1/G9wLDeFQGFbo4 uPmP4k/usYlL+d0VPfpWrt8mlad8wV4Rf5bwToJmJ4e+9aiX+SG02nV3iNoXeBi4JEwx tYZfTC6vwlCBdbVihkheFc4SfmvjNoX2sPBR4GH68AyUgJzlOiK+dUWJmktGErt7y1an pukCP9n2h57s+CfDArqeatP8qHqBksGZDv+wW2klZKL2r7Ao3s9n83A7+B7bqpuznbVl 4P2A== ARC-Authentication-Results: i=1; mx.google.com; dkim=neutral (body hash did not verify) header.i=@nifty.com header.s=dec2015msa header.b=QXWy+i5Y; spf=pass (google.com: best guess record for domain of u-boot-bounces@lists.denx.de designates 81.169.180.215 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de Return-Path: Received: from lists.denx.de (dione.denx.de. [81.169.180.215]) by mx.google.com with ESMTP id o18-v6si1351922edf.177.2018.09.09.21.01.15; Sun, 09 Sep 2018 21:01:15 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of u-boot-bounces@lists.denx.de designates 81.169.180.215 as permitted sender) client-ip=81.169.180.215; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@nifty.com header.s=dec2015msa header.b=QXWy+i5Y; spf=pass (google.com: best guess record for domain of u-boot-bounces@lists.denx.de designates 81.169.180.215 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de Received: by lists.denx.de (Postfix, from userid 105) id 38833C21DD9; Mon, 10 Sep 2018 04:00:12 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=T_DKIM_INVALID autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id CB8B5C21E0D; Mon, 10 Sep 2018 03:59:19 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id F3A52C21DFA; Mon, 10 Sep 2018 03:59:15 +0000 (UTC) Received: from conuserg-12.nifty.com (conuserg-12.nifty.com [210.131.2.79]) by lists.denx.de (Postfix) with ESMTPS id 905D0C21E47 for ; Mon, 10 Sep 2018 03:59:09 +0000 (UTC) Received: from pug.e01.socionext.com (p14092-ipngnfx01kyoto.kyoto.ocn.ne.jp [153.142.97.92]) (authenticated) by conuserg-12.nifty.com with ESMTP id w8A3wifV006634; Mon, 10 Sep 2018 12:58:45 +0900 DKIM-Filter: OpenDKIM Filter v2.10.3 conuserg-12.nifty.com w8A3wifV006634 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nifty.com; s=dec2015msa; t=1536551925; bh=N/4Q6oDkvlZSGE4+XKWEytbRHa/WXDBxoIm1huzlIxQ=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=QXWy+i5YLB7K1o0TbVQAufklzGDq+wMW09xQI4++/tk2XIXS6FTtgMxBrzUtrr/mu 1dAW/3CM2jeXjWvTm77lg+XrE9qx/g1T++fSe5l17owSiocl5OsqPwytPBo0T1ejpU oIT05sBiw2ai4D1BJvkkzpi4SlM2k5RBEVsJJ3i5ZtTxW+1i6nPjyXMJVm3UwwKeoI qfyM0G87Uv9EgPP5UwhOHAhhDW56L3YzbAqrXY8IHqHj5RQqI68NIsDGpQQdJc20Rm qBbMp/FQIKuNQqHtHBPa5iT4iiOBRX5cDvea0/FkTcRx5hP7ukvGemLGsrRMnX39Ta hzkxiev+545ng== X-Nifty-SrcIP: [153.142.97.92] From: Masahiro Yamada To: u-boot@lists.denx.de Date: Mon, 10 Sep 2018 12:58:32 +0900 Message-Id: <1536551916-21187-2-git-send-email-yamada.masahiro@socionext.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1536551916-21187-1-git-send-email-yamada.masahiro@socionext.com> References: <1536551916-21187-1-git-send-email-yamada.masahiro@socionext.com> Cc: Tom Rini Subject: [U-Boot] [PATCH 1/5] ARM: dts: uniphier: sync DT with Linux 4.19-rc1 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Signed-off-by: Masahiro Yamada --- arch/arm/dts/uniphier-ld11-global.dts | 3 ++- arch/arm/dts/uniphier-ld11.dtsi | 2 +- arch/arm/dts/uniphier-ld20-global.dts | 3 ++- arch/arm/dts/uniphier-ld20.dtsi | 4 +++- arch/arm/dts/uniphier-ld4.dtsi | 3 +-- arch/arm/dts/uniphier-pinctrl.dtsi | 5 ----- arch/arm/dts/uniphier-pro4.dtsi | 3 +-- arch/arm/dts/uniphier-pxs2.dtsi | 3 +++ arch/arm/dts/uniphier-pxs3.dtsi | 2 +- arch/arm/dts/uniphier-sld8.dtsi | 3 +-- 10 files changed, 15 insertions(+), 16 deletions(-) diff --git a/arch/arm/dts/uniphier-ld11-global.dts b/arch/arm/dts/uniphier-ld11-global.dts index 11be2aa..744b36e 100644 --- a/arch/arm/dts/uniphier-ld11-global.dts +++ b/arch/arm/dts/uniphier-ld11-global.dts @@ -54,12 +54,13 @@ sound { compatible = "audio-graph-card"; label = "UniPhier LD11"; - widgets = "Headphone", "Headphone Jack"; + widgets = "Headphone", "Headphones"; dais = <&i2s_port2 &i2s_port3 &i2s_port4 &spdif_port0 &comp_spdif_port0>; + hp-det-gpio = <&gpio UNIPHIER_GPIO_IRQ(0) GPIO_ACTIVE_LOW>; }; spdif-out { diff --git a/arch/arm/dts/uniphier-ld11.dtsi b/arch/arm/dts/uniphier-ld11.dtsi index 3f9237c..d63b56e 100644 --- a/arch/arm/dts/uniphier-ld11.dtsi +++ b/arch/arm/dts/uniphier-ld11.dtsi @@ -407,7 +407,7 @@ reg = <0x5a000000 0x400>; interrupts = <0 78 4>; pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_emmc_1v8>; + pinctrl-0 = <&pinctrl_emmc>; clocks = <&sys_clk 4>; resets = <&sys_rst 4>; bus-width = <8>; diff --git a/arch/arm/dts/uniphier-ld20-global.dts b/arch/arm/dts/uniphier-ld20-global.dts index fe6608e..1a5e7c2 100644 --- a/arch/arm/dts/uniphier-ld20-global.dts +++ b/arch/arm/dts/uniphier-ld20-global.dts @@ -54,12 +54,13 @@ sound { compatible = "audio-graph-card"; label = "UniPhier LD20"; - widgets = "Headphone", "Headphone Jack"; + widgets = "Headphone", "Headphones"; dais = <&i2s_port2 &i2s_port3 &i2s_port4 &spdif_port0 &comp_spdif_port0>; + hp-det-gpio = <&gpio UNIPHIER_GPIO_IRQ(0) GPIO_ACTIVE_LOW>; }; spdif-out { diff --git a/arch/arm/dts/uniphier-ld20.dtsi b/arch/arm/dts/uniphier-ld20.dtsi index 6ffbf18..35867ab 100644 --- a/arch/arm/dts/uniphier-ld20.dtsi +++ b/arch/arm/dts/uniphier-ld20.dtsi @@ -58,6 +58,7 @@ clocks = <&sys_clk 32>; enable-method = "psci"; operating-points-v2 = <&cluster0_opp>; + #cooling-cells = <2>; }; cpu2: cpu@100 { @@ -77,6 +78,7 @@ clocks = <&sys_clk 33>; enable-method = "psci"; operating-points-v2 = <&cluster1_opp>; + #cooling-cells = <2>; }; }; @@ -512,7 +514,7 @@ reg = <0x5a000000 0x400>; interrupts = <0 78 4>; pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_emmc_1v8>; + pinctrl-0 = <&pinctrl_emmc>; clocks = <&sys_clk 4>; resets = <&sys_rst 4>; bus-width = <8>; diff --git a/arch/arm/dts/uniphier-ld4.dtsi b/arch/arm/dts/uniphier-ld4.dtsi index 4545056..e3d3138 100644 --- a/arch/arm/dts/uniphier-ld4.dtsi +++ b/arch/arm/dts/uniphier-ld4.dtsi @@ -247,9 +247,8 @@ status = "disabled"; reg = <0x5a500000 0x200>; interrupts = <0 78 4>; - pinctrl-names = "default", "1.8v"; + pinctrl-names = "default"; pinctrl-0 = <&pinctrl_emmc>; - pinctrl-1 = <&pinctrl_emmc_1v8>; clocks = <&mio_clk 1>; reset-names = "host", "bridge"; resets = <&mio_rst 1>, <&mio_rst 4>; diff --git a/arch/arm/dts/uniphier-pinctrl.dtsi b/arch/arm/dts/uniphier-pinctrl.dtsi index 9dd9d49..2dc86d2 100644 --- a/arch/arm/dts/uniphier-pinctrl.dtsi +++ b/arch/arm/dts/uniphier-pinctrl.dtsi @@ -56,11 +56,6 @@ function = "emmc"; }; - pinctrl_emmc_1v8: emmc-1v8 { - groups = "emmc", "emmc_dat8"; - function = "emmc"; - }; - pinctrl_ether_mii: ether-mii { groups = "ether_mii"; function = "ether_mii"; diff --git a/arch/arm/dts/uniphier-pro4.dtsi b/arch/arm/dts/uniphier-pro4.dtsi index 8185b54..3cd9b72 100644 --- a/arch/arm/dts/uniphier-pro4.dtsi +++ b/arch/arm/dts/uniphier-pro4.dtsi @@ -281,9 +281,8 @@ status = "disabled"; reg = <0x5a500000 0x200>; interrupts = <0 78 4>; - pinctrl-names = "default", "1.8v"; + pinctrl-names = "default"; pinctrl-0 = <&pinctrl_emmc>; - pinctrl-1 = <&pinctrl_emmc_1v8>; clocks = <&mio_clk 1>; reset-names = "host", "bridge"; resets = <&mio_rst 1>, <&mio_rst 4>; diff --git a/arch/arm/dts/uniphier-pxs2.dtsi b/arch/arm/dts/uniphier-pxs2.dtsi index f4101c0..48782a5 100644 --- a/arch/arm/dts/uniphier-pxs2.dtsi +++ b/arch/arm/dts/uniphier-pxs2.dtsi @@ -36,6 +36,7 @@ enable-method = "psci"; next-level-cache = <&l2>; operating-points-v2 = <&cpu_opp>; + #cooling-cells = <2>; }; cpu2: cpu@2 { @@ -46,6 +47,7 @@ enable-method = "psci"; next-level-cache = <&l2>; operating-points-v2 = <&cpu_opp>; + #cooling-cells = <2>; }; cpu3: cpu@3 { @@ -56,6 +58,7 @@ enable-method = "psci"; next-level-cache = <&l2>; operating-points-v2 = <&cpu_opp>; + #cooling-cells = <2>; }; }; diff --git a/arch/arm/dts/uniphier-pxs3.dtsi b/arch/arm/dts/uniphier-pxs3.dtsi index cfeeecd..c6ec63c 100644 --- a/arch/arm/dts/uniphier-pxs3.dtsi +++ b/arch/arm/dts/uniphier-pxs3.dtsi @@ -327,7 +327,7 @@ reg = <0x5a000000 0x400>; interrupts = <0 78 4>; pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_emmc_1v8>; + pinctrl-0 = <&pinctrl_emmc>; clocks = <&sys_clk 4>; resets = <&sys_rst 4>; bus-width = <8>; diff --git a/arch/arm/dts/uniphier-sld8.dtsi b/arch/arm/dts/uniphier-sld8.dtsi index f20926e..35c2f85 100644 --- a/arch/arm/dts/uniphier-sld8.dtsi +++ b/arch/arm/dts/uniphier-sld8.dtsi @@ -251,9 +251,8 @@ status = "disabled"; reg = <0x5a500000 0x200>; interrupts = <0 78 4>; - pinctrl-names = "default", "1.8v"; + pinctrl-names = "default"; pinctrl-0 = <&pinctrl_emmc>; - pinctrl-1 = <&pinctrl_emmc_1v8>; clocks = <&mio_clk 1>; reset-names = "host", "bridge"; resets = <&mio_rst 1>, <&mio_rst 4>; From patchwork Mon Sep 10 03:58:33 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Masahiro Yamada X-Patchwork-Id: 146267 Delivered-To: patch@linaro.org Received: by 2002:a2e:1648:0:0:0:0:0 with SMTP id 8-v6csp2040629ljw; Sun, 9 Sep 2018 21:01:30 -0700 (PDT) X-Google-Smtp-Source: ANB0VdblzNLv2jqowTTfcQWPoCnj9RPU2LQPS4koXM0Lr0v5G7r1JukpXqqfXZ/EiLURSCqaHXGc X-Received: by 2002:a50:8b65:: with SMTP id l92-v6mr21070183edl.44.1536552090888; Sun, 09 Sep 2018 21:01:30 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1536552090; cv=none; d=google.com; s=arc-20160816; b=nLfvqGvDnlmx5lxyIm3SLLkdjaZwqJQ0UOfJuBpHwMzzinFwdtawXaTxYV3R5h0Z9P YoL5WGBUjJ6cKUFsVWydB5rTjkm3+ZQDeALNo5TjmZIlQc9iRDk4yrISjmA6axjH79v7 wOgHNV5WhXhurgIZjfPugpwtiGEY7qzwVUR5rIu08RslUGT/ZmWJm5a7UYb89zN4dDQI ur31Vp+S30MBqRkyFlseLguxiNBoeb589Yt3Y7i8eIzCpv2WtDbMLh0B6aK1cyGzcPO4 mdrO9yr8Zt4DhHqmkiEp3d3ejsNHNh/nR0ydHOPgssgEi8BcTUYfCce+E1zHvfhslSFw pyHQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:content-transfer-encoding:mime-version :list-subscribe:list-help:list-post:list-archive:list-unsubscribe :list-id:precedence:subject:cc:references:in-reply-to:message-id :date:to:from:dkim-signature:dkim-filter; bh=wtus//PtiASYLf06/ayPHvYX+AA703MiSvwRH/EXVqI=; b=HufZs1BF1Yfncpwe0C8QtSlu+TI+uBfkZGpQuLq3xNL/wUORvUC8p4XdIkr0rlndrN MdG/aV5IeiqqG3NbHg2CFGs0sUEinV3In0Dm2y2jUOqJ4tqdKovGkaQNgJ8eTmn8cyS+ 7vwEwattRxSGWNUKKojsYwtNMCzaaba8R7ER+ElzIndJXmax2sHOkih+9raIg0mIg15W ceLqJVJtVvNOegaalkeDROgOtA+MJt+k114lZUYcJaTYI9InbaazC7ka/YLG5lzAPa6Z jhAxKHs3efvcx4VL9RR6IRj4JqHqf56v6ArOzCV9+swPoD3A6vEsg5WTsYGxap6YC5WL dAgg== ARC-Authentication-Results: i=1; mx.google.com; dkim=neutral (body hash did not verify) header.i=@nifty.com header.s=dec2015msa header.b=jjN6Lr2K; spf=pass (google.com: best guess record for domain of u-boot-bounces@lists.denx.de designates 81.169.180.215 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de Return-Path: Received: from lists.denx.de (dione.denx.de. [81.169.180.215]) by mx.google.com with ESMTP id y39-v6si1741022edb.120.2018.09.09.21.01.30; Sun, 09 Sep 2018 21:01:30 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of u-boot-bounces@lists.denx.de designates 81.169.180.215 as permitted sender) client-ip=81.169.180.215; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@nifty.com header.s=dec2015msa header.b=jjN6Lr2K; spf=pass (google.com: best guess record for domain of u-boot-bounces@lists.denx.de designates 81.169.180.215 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de Received: by lists.denx.de (Postfix, from userid 105) id 6975BC21DEC; Mon, 10 Sep 2018 04:00:49 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=T_DKIM_INVALID autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id A1593C21E4F; Mon, 10 Sep 2018 03:59:22 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 636FAC21DF3; Mon, 10 Sep 2018 03:59:15 +0000 (UTC) Received: from conuserg-12.nifty.com (conuserg-12.nifty.com [210.131.2.79]) by lists.denx.de (Postfix) with ESMTPS id 7C6F3C21E3E for ; Mon, 10 Sep 2018 03:59:09 +0000 (UTC) Received: from pug.e01.socionext.com (p14092-ipngnfx01kyoto.kyoto.ocn.ne.jp [153.142.97.92]) (authenticated) by conuserg-12.nifty.com with ESMTP id w8A3wifW006634; Mon, 10 Sep 2018 12:58:45 +0900 DKIM-Filter: OpenDKIM Filter v2.10.3 conuserg-12.nifty.com w8A3wifW006634 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nifty.com; s=dec2015msa; t=1536551925; bh=bIi+Lc1+7lAQ2qMbE04j8FYtdOQ7O5O3zYDitCCjjiw=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=jjN6Lr2KOgUbrRW47jdhVZIk39DnjtHmB+hlw1swFGsM/7WQbQfNWWKNrsviNbAp7 oZhJft5mxZrJOPYMBDtZ7KhEeKgRgR1s4D7W0P2Lh4XdurTsai1JpR78S5QarcDall NDvjxTC+C9Buh++YWmw389YFWcRqCmkg6lK+AqtJszJfHIawwgbSSQg3uD6KVlF2Aa 0ztftNL/nadH9iJrPS4p0VyG2wkOgvNrp5BTcbCfcnpxRLyYHMTtOU2xRSYpEnegh8 TrC6ueQDdiFBBIqcELDIEufU2NNy8vhFP3fjiKF+XXXc3fiIMRxFxbjD1IZEx8T+Kd lLFoLI457KdoQ== X-Nifty-SrcIP: [153.142.97.92] From: Masahiro Yamada To: u-boot@lists.denx.de Date: Mon, 10 Sep 2018 12:58:33 +0900 Message-Id: <1536551916-21187-3-git-send-email-yamada.masahiro@socionext.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1536551916-21187-1-git-send-email-yamada.masahiro@socionext.com> References: <1536551916-21187-1-git-send-email-yamada.masahiro@socionext.com> Cc: Tom Rini Subject: [U-Boot] [PATCH 2/5] ARM: uniphier: increase CONFIG_SYS_MONITOR_LEN again X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" With the migration to distro-boot, the size of the U-Boot proper image for uniphier_v7_defconfig exceeded the current limit, 576KB. Increase it to 832KB. CONFIG_SYS_UBOOT_BASE must be moved as well to avoid the image over-wrap because the boot ROM of Pro4, Pro5, PXs2/LD6b loads the SPL to the physical address 0x100000. Signed-off-by: Masahiro Yamada --- include/configs/uniphier.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/include/configs/uniphier.h b/include/configs/uniphier.h index 21ed1d3..ff44749 100644 --- a/include/configs/uniphier.h +++ b/include/configs/uniphier.h @@ -60,7 +60,7 @@ #define CONFIG_SYS_MAX_FLASH_SECT 256 #define CONFIG_SYS_MONITOR_BASE 0 -#define CONFIG_SYS_MONITOR_LEN 0x00090000 /* 576KB */ +#define CONFIG_SYS_MONITOR_LEN 0x000d0000 /* 832KB */ #define CONFIG_SYS_FLASH_BASE 0 /* @@ -218,7 +218,7 @@ #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x20000 /* subtract sizeof(struct image_header) */ -#define CONFIG_SYS_UBOOT_BASE (0x70000 - 0x40) +#define CONFIG_SYS_UBOOT_BASE (0x130000 - 0x40) #define CONFIG_SPL_TARGET "u-boot-with-spl.bin" #define CONFIG_SPL_MAX_FOOTPRINT 0x10000 From patchwork Mon Sep 10 03:58:34 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Masahiro Yamada X-Patchwork-Id: 146265 Delivered-To: patch@linaro.org Received: by 2002:a2e:1648:0:0:0:0:0 with SMTP id 8-v6csp2040105ljw; Sun, 9 Sep 2018 21:00:43 -0700 (PDT) X-Google-Smtp-Source: ANB0VdZR4bI08V+hHQjg23kt04jI1GLVoobrLY6Jr3hlpnt6unlGG7qzmA2UPAfjFWQjUAWw0xdE X-Received: by 2002:a50:bc03:: with SMTP id j3-v6mr20989836edh.34.1536552043904; Sun, 09 Sep 2018 21:00:43 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1536552043; cv=none; d=google.com; s=arc-20160816; b=LnL4FFvS8+8iTkWKj+C8HiJ3a4+sdf3CilGQaxOqBjBuC/Zl2jfrSRhuMvzdrD6SFx 1cPCvza87uFPtSxTERMcM3za3ThUmEr8IF/esddVrQwyGExV8/XLAQYjRjQbc4JBv+KA s9rdxViRORMIMMMjt8hueJqwn7RuQHtWOJSJ2wVzRQvknif3xCWl2cHbl4En+YVUXc45 LyhrjohoVWJ1MQPCGyFnZtOX5drl5/8f0OJeyV00S/aA9GYE3DDP/lMvW87nJ/z2acSb RHVBUSzW0X+LwYGr7hIknm7fHkbtv9S/0F1slaM6ZnJFPGdE2WGUF1fZMp24u7wtZow5 jyGg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:content-transfer-encoding:mime-version :list-subscribe:list-help:list-post:list-archive:list-unsubscribe :list-id:precedence:subject:cc:references:in-reply-to:message-id :date:to:from:dkim-signature:dkim-filter; bh=4fokkE6sKFEnxQULtg9EoxDhATOXq1AmYNJClRzdtso=; b=BvKEn13eiwmztbYlpl/izB6HfL82jaADkweeFCZvgSCj26/O5QrGBIPtljNJOkKS7S sgJwiYQ6wix88kKA+HBaVV5z18asoTsvlf4CEPcZrxTPo98NYiSelmzJ7zU0tPOOVUSm eVEyHkKtp8FmE9rJcy2rlcYOgZsKgozRMcviTYtU806yVyflMYt92i1PKOt/4XysYRv9 Ps97y9fcTcJGOVGokkhr4M7geNTtJ15oDdot8ypnX3C7XuRiJ9s/ahr7IMp5N/tUNu3G nB5vr6wjdOSRcBVxY/hd3JOvW2y81WLFtlFblMr7+4RBAou8sCajY4u+hFb3Qg+wVVrN hScQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=neutral (body hash did not verify) header.i=@nifty.com header.s=dec2015msa header.b=mv+NRhWf; spf=pass (google.com: best guess record for domain of u-boot-bounces@lists.denx.de designates 81.169.180.215 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de Return-Path: Received: from lists.denx.de (dione.denx.de. [81.169.180.215]) by mx.google.com with ESMTP id w46-v6si2131149edm.238.2018.09.09.21.00.43; Sun, 09 Sep 2018 21:00:43 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of u-boot-bounces@lists.denx.de designates 81.169.180.215 as permitted sender) client-ip=81.169.180.215; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@nifty.com header.s=dec2015msa header.b=mv+NRhWf; spf=pass (google.com: best guess record for domain of u-boot-bounces@lists.denx.de designates 81.169.180.215 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de Received: by lists.denx.de (Postfix, from userid 105) id 6AC71C21C50; Mon, 10 Sep 2018 03:59:49 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=T_DKIM_INVALID autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 27121C21E2F; Mon, 10 Sep 2018 03:59:19 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 4CBCBC21E16; Mon, 10 Sep 2018 03:59:15 +0000 (UTC) Received: from conuserg-12.nifty.com (conuserg-12.nifty.com [210.131.2.79]) by lists.denx.de (Postfix) with ESMTPS id 824FDC21E44 for ; Mon, 10 Sep 2018 03:59:09 +0000 (UTC) Received: from pug.e01.socionext.com (p14092-ipngnfx01kyoto.kyoto.ocn.ne.jp [153.142.97.92]) (authenticated) by conuserg-12.nifty.com with ESMTP id w8A3wifX006634; Mon, 10 Sep 2018 12:58:46 +0900 DKIM-Filter: OpenDKIM Filter v2.10.3 conuserg-12.nifty.com w8A3wifX006634 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nifty.com; s=dec2015msa; t=1536551926; bh=31LwK+es9VfgT1ngGzzWv05vsqvnQG2uIW//xfslNkM=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=mv+NRhWfvUP0y7JnCMpKWKLtNHq2DzHy0OhgicJeG0Quvgy2k1ucZ6vIR/38UAbGb j8p7VaGHGB2rQPD860E5K4NjlH/Jn2oOqrV3h0cR23y8C/JaM8k+tbWwYBF5x/v+Cr spZGXhMI+wWY3V+ZShN/q/wBU5EjZTzAQKFqLB5eFX5u9qmkRtX9owWwcVrMpRFFkF 3bhjDxA7ve+HZt7dBmqnp6VJvM2jq9mFRCJA47tHlazZhVuw6G6dEft6h0ha51btyl Hb/QeW4cvz9DIzZO45fs8s0kMdOdpShrZTREaVX+b+FLIM9oFOeNHJ3VsVyBo5RsFg AxNdfKTN+aRjQ== X-Nifty-SrcIP: [153.142.97.92] From: Masahiro Yamada To: u-boot@lists.denx.de Date: Mon, 10 Sep 2018 12:58:34 +0900 Message-Id: <1536551916-21187-4-git-send-email-yamada.masahiro@socionext.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1536551916-21187-1-git-send-email-yamada.masahiro@socionext.com> References: <1536551916-21187-1-git-send-email-yamada.masahiro@socionext.com> Cc: Tom Rini Subject: [U-Boot] [PATCH 3/5] ARM: uniphier: enable CONFIG_CMD_UBI X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Now that CONFIG_SYS_MONITOR_LEN increased, we have room for enabling more options again. Signed-off-by: Masahiro Yamada --- configs/uniphier_ld4_sld8_defconfig | 1 + configs/uniphier_v7_defconfig | 1 + 2 files changed, 2 insertions(+) diff --git a/configs/uniphier_ld4_sld8_defconfig b/configs/uniphier_ld4_sld8_defconfig index a06e791..7afdd7c 100644 --- a/configs/uniphier_ld4_sld8_defconfig +++ b/configs/uniphier_ld4_sld8_defconfig @@ -27,6 +27,7 @@ CONFIG_CMD_TIME=y CONFIG_CMD_MTDPARTS=y CONFIG_MTDIDS_DEFAULT="nand0=uniphier-nand.0" CONFIG_MTDPARTS_DEFAULT="mtdparts=uniphier-nand.0:1m(firmware),-(UBI)" +CONFIG_CMD_UBI=y # CONFIG_SPL_DOS_PARTITION is not set # CONFIG_SPL_EFI_PARTITION is not set CONFIG_DEFAULT_DEVICE_TREE="uniphier-ld4-ref" diff --git a/configs/uniphier_v7_defconfig b/configs/uniphier_v7_defconfig index fc33b72..1b7bd5b 100644 --- a/configs/uniphier_v7_defconfig +++ b/configs/uniphier_v7_defconfig @@ -26,6 +26,7 @@ CONFIG_CMD_TIME=y CONFIG_CMD_MTDPARTS=y CONFIG_MTDIDS_DEFAULT="nand0=uniphier-nand.0" CONFIG_MTDPARTS_DEFAULT="mtdparts=uniphier-nand.0:1m(firmware),-(UBI)" +CONFIG_CMD_UBI=y # CONFIG_SPL_DOS_PARTITION is not set # CONFIG_SPL_EFI_PARTITION is not set CONFIG_DEFAULT_DEVICE_TREE="uniphier-pxs2-vodka" From patchwork Mon Sep 10 03:58:35 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Masahiro Yamada X-Patchwork-Id: 146263 Delivered-To: patch@linaro.org Received: by 2002:a2e:1648:0:0:0:0:0 with SMTP id 8-v6csp2039132ljw; Sun, 9 Sep 2018 20:59:05 -0700 (PDT) X-Google-Smtp-Source: ANB0VdbaeMbSGn1xCpBnWDWuq0fmmmE23wv1ops1Qs4Q/vAwuWdn6K2sPDQVF9L3UxcWppjfCEfs X-Received: by 2002:a50:b6e3:: with SMTP id f32-v6mr20948586ede.147.1536551945761; Sun, 09 Sep 2018 20:59:05 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1536551945; cv=none; d=google.com; s=arc-20160816; b=vqAykIApeSbPuYCkTiM4mctOVtCQEM4y3lTOQSeYS78UXxwTK91TDPn3jzk2oAx084 C+/+4zCZIXvwOAhDXWGnIffPel4x7qi42tjUOA0g+o+RETXQIkJ/QqKWIspMzQdhvioW y+B2YQ4ZZ+Cx/w2StZPoPzbsNrEl/3R73teZfdZJHd3qPB2UhqJqhQpjI2jn7VxgMhGO oK+7rzQPzuX4uyHkncZfMtMRT5F1xCelJYuMz/F5zvxiIcH/YmFQk8EMg68ij721CLjl fsz/qE/Y0tI/En7OWnubFSAW3LNV10ZmGj1eZcmjPNDWjVWYWSBhX154ykrdVQ5Ui1WS jFng== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:content-transfer-encoding:mime-version :list-subscribe:list-help:list-post:list-archive:list-unsubscribe :list-id:precedence:subject:references:in-reply-to:message-id:date :to:from:dkim-signature:dkim-filter; bh=CcqwNGcVXLo0AoWpIc30o4GWYviiFQbQ8wA12Fwib4I=; b=a9ycNC4XGTcXSt/Aq+7PKd64CukIKc36EyphIF8RV1VE6jUkc39WvrQfxzg8Ofs5/Y +SBtjN+futICzoZ8bv6aey8j6fTu/No2Ora+jYI7y7yinPehYeTCbO93uzNBfIchY4t7 ZXD1SyF4kKNLyQpHe64awISms51EdVFPcS5R4dfkOJ7Slmk6zdWP4zJS1tQwU5RpkWlo 5a3ox6fXMCRZjv9Q1i9SL/W2fQOkvspykp49bhqCRSwuum5Dd+1MF7JUCs2xfBdhGyCK Yod6dCCka+J1n4DlqiIss2BqJ3ZFFiLZeKR4yFwyb3DJlxt6De1t0SR0pwYcP0fqBdsR beHQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=neutral (body hash did not verify) header.i=@nifty.com header.s=dec2015msa header.b="jx/vCco5"; spf=pass (google.com: best guess record for domain of u-boot-bounces@lists.denx.de designates 81.169.180.215 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de Return-Path: Received: from lists.denx.de (dione.denx.de. [81.169.180.215]) by mx.google.com with ESMTP id a5-v6si1788386ede.255.2018.09.09.20.59.05; Sun, 09 Sep 2018 20:59:05 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of u-boot-bounces@lists.denx.de designates 81.169.180.215 as permitted sender) client-ip=81.169.180.215; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@nifty.com header.s=dec2015msa header.b="jx/vCco5"; spf=pass (google.com: best guess record for domain of u-boot-bounces@lists.denx.de designates 81.169.180.215 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de Received: by lists.denx.de (Postfix, from userid 105) id F36ECC21E16; Mon, 10 Sep 2018 03:59:04 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=T_DKIM_INVALID autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id AA8C0C21C50; Mon, 10 Sep 2018 03:59:00 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id B7F78C21C50; Mon, 10 Sep 2018 03:58:59 +0000 (UTC) Received: from conuserg-12.nifty.com (conuserg-12.nifty.com [210.131.2.79]) by lists.denx.de (Postfix) with ESMTPS id 96EBFC21C4A for ; Mon, 10 Sep 2018 03:58:58 +0000 (UTC) Received: from pug.e01.socionext.com (p14092-ipngnfx01kyoto.kyoto.ocn.ne.jp [153.142.97.92]) (authenticated) by conuserg-12.nifty.com with ESMTP id w8A3wifY006634; Mon, 10 Sep 2018 12:58:46 +0900 DKIM-Filter: OpenDKIM Filter v2.10.3 conuserg-12.nifty.com w8A3wifY006634 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nifty.com; s=dec2015msa; t=1536551926; bh=skaiUafdz/AXJvCXJ5lA1Ss00D/Yq+QHyK398dMnwEk=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=jx/vCco50JwnvEJMgKdDj8TciMxGrXpg3RYoN/hASM8bFBEwK3lECL8YDP3NvRgfG K3OIGZlPmh/6/NEZUOgRW3VYztwcR7Gzu7L2w7BLIAivGLvmT8tZbFUN+dmPoHXJM/ EwKmxFzmsMxYlj85lnbDUN/8/axBE7wO5z6SQUd5IsJHa8G9dhRwu2zZ1jI74K7tXL 4w9JOv2Tw83pI5FfAjlD7+7qKoJQ42PuketV4f84rXww3lZxwrWZyot4fnnhOeCXfe 3g4LdZY1oHn0+jDfmIujnee2eZtuQVyZpbYlCQKtWQHc447eNOKs13ii6Z4WDXpP4y dalb2pvfVhnXg== X-Nifty-SrcIP: [153.142.97.92] From: Masahiro Yamada To: u-boot@lists.denx.de Date: Mon, 10 Sep 2018 12:58:35 +0900 Message-Id: <1536551916-21187-5-git-send-email-yamada.masahiro@socionext.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1536551916-21187-1-git-send-email-yamada.masahiro@socionext.com> References: <1536551916-21187-1-git-send-email-yamada.masahiro@socionext.com> Subject: [U-Boot] [PATCH 4/5] mmc: uniphier-sd: sync with Linux X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Sync with the driver code and the binding recently merged in Linux. Signed-off-by: Masahiro Yamada --- arch/arm/dts/uniphier-ld20.dtsi | 2 +- arch/arm/dts/uniphier-ld4.dtsi | 14 +++++++------- arch/arm/dts/uniphier-pinctrl.dtsi | 7 +------ arch/arm/dts/uniphier-pro4-ref.dts | 4 ---- arch/arm/dts/uniphier-pro4.dtsi | 23 ++++++++++------------- arch/arm/dts/uniphier-pro5.dtsi | 15 +++++++-------- arch/arm/dts/uniphier-pxs2.dtsi | 15 +++++++-------- arch/arm/dts/uniphier-pxs3.dtsi | 8 ++++++-- arch/arm/dts/uniphier-sld8.dtsi | 14 +++++++------- drivers/mmc/uniphier-sd.c | 4 +++- 10 files changed, 49 insertions(+), 57 deletions(-) diff --git a/arch/arm/dts/uniphier-ld20.dtsi b/arch/arm/dts/uniphier-ld20.dtsi index 35867ab..9970497 100644 --- a/arch/arm/dts/uniphier-ld20.dtsi +++ b/arch/arm/dts/uniphier-ld20.dtsi @@ -529,7 +529,7 @@ }; sd: sdhc@5a400000 { - compatible = "socionext,uniphier-sdhc"; + compatible = "socionext,uniphier-sd-v3.1.1"; status = "disabled"; reg = <0x5a400000 0x800>; interrupts = <0 76 4>; diff --git a/arch/arm/dts/uniphier-ld4.dtsi b/arch/arm/dts/uniphier-ld4.dtsi index e3d3138..f505f64 100644 --- a/arch/arm/dts/uniphier-ld4.dtsi +++ b/arch/arm/dts/uniphier-ld4.dtsi @@ -225,13 +225,13 @@ }; sd: sdhc@5a400000 { - compatible = "socionext,uniphier-sdhc"; + compatible = "socionext,uniphier-sd-v2.91"; status = "disabled"; reg = <0x5a400000 0x200>; interrupts = <0 76 4>; - pinctrl-names = "default", "1.8v"; + pinctrl-names = "default", "uhs"; pinctrl-0 = <&pinctrl_sd>; - pinctrl-1 = <&pinctrl_sd_1v8>; + pinctrl-1 = <&pinctrl_sd_uhs>; clocks = <&mio_clk 0>; reset-names = "host", "bridge"; resets = <&mio_rst 0>, <&mio_rst 3>; @@ -243,19 +243,19 @@ }; emmc: sdhc@5a500000 { - compatible = "socionext,uniphier-sdhc"; + compatible = "socionext,uniphier-sd-v2.91"; status = "disabled"; reg = <0x5a500000 0x200>; interrupts = <0 78 4>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_emmc>; clocks = <&mio_clk 1>; - reset-names = "host", "bridge"; - resets = <&mio_rst 1>, <&mio_rst 4>; + reset-names = "host", "bridge", "hw"; + resets = <&mio_rst 1>, <&mio_rst 4>, <&mio_rst 6>; bus-width = <8>; - non-removable; cap-mmc-highspeed; cap-mmc-hw-reset; + non-removable; }; usb0: usb@5a800100 { diff --git a/arch/arm/dts/uniphier-pinctrl.dtsi b/arch/arm/dts/uniphier-pinctrl.dtsi index 2dc86d2..aeb47b0 100644 --- a/arch/arm/dts/uniphier-pinctrl.dtsi +++ b/arch/arm/dts/uniphier-pinctrl.dtsi @@ -121,7 +121,7 @@ function = "sd"; }; - pinctrl_sd_1v8: sd-1v8 { + pinctrl_sd_uhs: sd-uhs { groups = "sd"; function = "sd"; }; @@ -131,11 +131,6 @@ function = "sd1"; }; - pinctrl_sd1_1v8: sd1-1v8 { - groups = "sd1"; - function = "sd1"; - }; - pinctrl_system_bus: system-bus { groups = "system_bus", "system_bus_cs1"; function = "system_bus"; diff --git a/arch/arm/dts/uniphier-pro4-ref.dts b/arch/arm/dts/uniphier-pro4-ref.dts index 198add3..06065eb 100644 --- a/arch/arm/dts/uniphier-pro4-ref.dts +++ b/arch/arm/dts/uniphier-pro4-ref.dts @@ -70,10 +70,6 @@ status = "okay"; }; -&sd1 { - status = "okay"; -}; - &usb2 { status = "okay"; }; diff --git a/arch/arm/dts/uniphier-pro4.dtsi b/arch/arm/dts/uniphier-pro4.dtsi index 3cd9b72..8974844 100644 --- a/arch/arm/dts/uniphier-pro4.dtsi +++ b/arch/arm/dts/uniphier-pro4.dtsi @@ -259,13 +259,13 @@ }; sd: sdhc@5a400000 { - compatible = "socionext,uniphier-sdhc"; + compatible = "socionext,uniphier-sd-v2.91"; status = "disabled"; reg = <0x5a400000 0x200>; interrupts = <0 76 4>; - pinctrl-names = "default", "1.8v"; + pinctrl-names = "default", "uhs"; pinctrl-0 = <&pinctrl_sd>; - pinctrl-1 = <&pinctrl_sd_1v8>; + pinctrl-1 = <&pinctrl_sd_uhs>; clocks = <&mio_clk 0>; reset-names = "host", "bridge"; resets = <&mio_rst 0>, <&mio_rst 3>; @@ -277,36 +277,33 @@ }; emmc: sdhc@5a500000 { - compatible = "socionext,uniphier-sdhc"; + compatible = "socionext,uniphier-sd-v2.91"; status = "disabled"; reg = <0x5a500000 0x200>; interrupts = <0 78 4>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_emmc>; clocks = <&mio_clk 1>; - reset-names = "host", "bridge"; - resets = <&mio_rst 1>, <&mio_rst 4>; + reset-names = "host", "bridge", "hw"; + resets = <&mio_rst 1>, <&mio_rst 4>, <&mio_rst 6>; bus-width = <8>; - non-removable; cap-mmc-highspeed; cap-mmc-hw-reset; + non-removable; }; sd1: sdhc@5a600000 { - compatible = "socionext,uniphier-sdhc"; + compatible = "socionext,uniphier-sd-v2.91"; status = "disabled"; reg = <0x5a600000 0x200>; interrupts = <0 85 4>; - pinctrl-names = "default", "1.8v"; + pinctrl-names = "default"; pinctrl-0 = <&pinctrl_sd1>; - pinctrl-1 = <&pinctrl_sd1_1v8>; clocks = <&mio_clk 2>; + reset-names = "host", "bridge"; resets = <&mio_rst 2>, <&mio_rst 5>; bus-width = <4>; cap-sd-highspeed; - sd-uhs-sdr12; - sd-uhs-sdr25; - sd-uhs-sdr50; }; usb2: usb@5a800100 { diff --git a/arch/arm/dts/uniphier-pro5.dtsi b/arch/arm/dts/uniphier-pro5.dtsi index 6aea9af..6e0ea79 100644 --- a/arch/arm/dts/uniphier-pro5.dtsi +++ b/arch/arm/dts/uniphier-pro5.dtsi @@ -480,30 +480,29 @@ }; emmc: sdhc@68400000 { - compatible = "socionext,uniphier-sdhc"; + compatible = "socionext,uniphier-sd-v3.1"; status = "disabled"; reg = <0x68400000 0x800>; interrupts = <0 78 4>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_emmc>; clocks = <&sd_clk 1>; - reset-names = "host"; - resets = <&sd_rst 1>; + reset-names = "host", "hw"; + resets = <&sd_rst 1>, <&sd_rst 6>; bus-width = <8>; - non-removable; cap-mmc-highspeed; cap-mmc-hw-reset; - no-3-3-v; + non-removable; }; sd: sdhc@68800000 { - compatible = "socionext,uniphier-sdhc"; + compatible = "socionext,uniphier-sd-v3.1"; status = "disabled"; reg = <0x68800000 0x800>; interrupts = <0 76 4>; - pinctrl-names = "default", "1.8v"; + pinctrl-names = "default", "uhs"; pinctrl-0 = <&pinctrl_sd>; - pinctrl-1 = <&pinctrl_sd_1v8>; + pinctrl-1 = <&pinctrl_sd_uhs>; clocks = <&sd_clk 0>; reset-names = "host"; resets = <&sd_rst 0>; diff --git a/arch/arm/dts/uniphier-pxs2.dtsi b/arch/arm/dts/uniphier-pxs2.dtsi index 48782a5..63c1c2c 100644 --- a/arch/arm/dts/uniphier-pxs2.dtsi +++ b/arch/arm/dts/uniphier-pxs2.dtsi @@ -423,30 +423,29 @@ }; emmc: sdhc@5a000000 { - compatible = "socionext,uniphier-sdhc"; + compatible = "socionext,uniphier-sd-v3.1.1"; status = "disabled"; reg = <0x5a000000 0x800>; interrupts = <0 78 4>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_emmc>; clocks = <&sd_clk 1>; - reset-names = "host"; - resets = <&sd_rst 1>; + reset-names = "host", "hw"; + resets = <&sd_rst 1>, <&sd_rst 6>; bus-width = <8>; - non-removable; cap-mmc-highspeed; cap-mmc-hw-reset; - no-3-3-v; + non-removable; }; sd: sdhc@5a400000 { - compatible = "socionext,uniphier-sdhc"; + compatible = "socionext,uniphier-sd-v3.1.1"; status = "disabled"; reg = <0x5a400000 0x800>; interrupts = <0 76 4>; - pinctrl-names = "default", "1.8v"; + pinctrl-names = "default", "uhs"; pinctrl-0 = <&pinctrl_sd>; - pinctrl-1 = <&pinctrl_sd_1v8>; + pinctrl-1 = <&pinctrl_sd_uhs>; clocks = <&sd_clk 0>; reset-names = "host"; resets = <&sd_rst 0>; diff --git a/arch/arm/dts/uniphier-pxs3.dtsi b/arch/arm/dts/uniphier-pxs3.dtsi index c6ec63c..daf7453 100644 --- a/arch/arm/dts/uniphier-pxs3.dtsi +++ b/arch/arm/dts/uniphier-pxs3.dtsi @@ -342,17 +342,21 @@ }; sd: sdhc@5a400000 { - compatible = "socionext,uniphier-sdhc"; + compatible = "socionext,uniphier-sd-v3.1.1"; status = "disabled"; reg = <0x5a400000 0x800>; interrupts = <0 76 4>; - pinctrl-names = "default"; + pinctrl-names = "default", "uhs"; pinctrl-0 = <&pinctrl_sd>; + pinctrl-1 = <&pinctrl_sd_uhs>; clocks = <&sd_clk 0>; reset-names = "host"; resets = <&sd_rst 0>; bus-width = <4>; cap-sd-highspeed; + sd-uhs-sdr12; + sd-uhs-sdr25; + sd-uhs-sdr50; }; soc_glue: soc-glue@5f800000 { diff --git a/arch/arm/dts/uniphier-sld8.dtsi b/arch/arm/dts/uniphier-sld8.dtsi index 35c2f85..437265b 100644 --- a/arch/arm/dts/uniphier-sld8.dtsi +++ b/arch/arm/dts/uniphier-sld8.dtsi @@ -229,13 +229,13 @@ }; sd: sdhc@5a400000 { - compatible = "socionext,uniphier-sdhc"; + compatible = "socionext,uniphier-sd-v2.91"; status = "disabled"; reg = <0x5a400000 0x200>; interrupts = <0 76 4>; - pinctrl-names = "default", "1.8v"; + pinctrl-names = "default", "uhs"; pinctrl-0 = <&pinctrl_sd>; - pinctrl-1 = <&pinctrl_sd_1v8>; + pinctrl-1 = <&pinctrl_sd_uhs>; clocks = <&mio_clk 0>; reset-names = "host", "bridge"; resets = <&mio_rst 0>, <&mio_rst 3>; @@ -247,19 +247,19 @@ }; emmc: sdhc@5a500000 { - compatible = "socionext,uniphier-sdhc"; + compatible = "socionext,uniphier-sd-v2.91"; status = "disabled"; reg = <0x5a500000 0x200>; interrupts = <0 78 4>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_emmc>; clocks = <&mio_clk 1>; - reset-names = "host", "bridge"; - resets = <&mio_rst 1>, <&mio_rst 4>; + reset-names = "host", "bridge", "hw"; + resets = <&mio_rst 1>, <&mio_rst 4>, <&mio_rst 6>; bus-width = <8>; - non-removable; cap-mmc-highspeed; cap-mmc-hw-reset; + non-removable; }; usb0: usb@5a800100 { diff --git a/drivers/mmc/uniphier-sd.c b/drivers/mmc/uniphier-sd.c index ad5dbb3..813c284 100644 --- a/drivers/mmc/uniphier-sd.c +++ b/drivers/mmc/uniphier-sd.c @@ -25,7 +25,9 @@ static const struct dm_mmc_ops uniphier_sd_ops = { }; static const struct udevice_id uniphier_sd_match[] = { - { .compatible = "socionext,uniphier-sdhc", .data = 0 }, + { .compatible = "socionext,uniphier-sd-v2.91" }, + { .compatible = "socionext,uniphier-sd-v3.1" }, + { .compatible = "socionext,uniphier-sd-v3.1.1" }, { /* sentinel */ } }; From patchwork Mon Sep 10 03:58:36 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Masahiro Yamada X-Patchwork-Id: 146264 Delivered-To: patch@linaro.org Received: by 2002:a2e:1648:0:0:0:0:0 with SMTP id 8-v6csp2039492ljw; Sun, 9 Sep 2018 20:59:51 -0700 (PDT) X-Google-Smtp-Source: ANB0VdZYeCn/PqvzOfzLbKysP0mLi32NonjPv6CuuNxJrJjOakhkXOAIGaYWza+2yawdFU3u5305 X-Received: by 2002:a50:ac1b:: with SMTP id v27-v6mr21569008edc.260.1536551991464; Sun, 09 Sep 2018 20:59:51 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1536551991; cv=none; d=google.com; s=arc-20160816; b=m/LWBxSLzGYm1vigcHljDpg9aAQKbNpTRaEWxxYt48baiC+MTgqLVDlokPwGRyPnu2 lmSX+Esgn6HhHHAYfr0xkPlOXHC6uvC4m9LqXN8js5VgJa4uhDWOMPUuN4rjXd9I4KeQ YEFFbVNAM5cgDPARtSkHb2h3t+ZzFRU/SkoIczGh4rxMuEUkWpF1fOGDJbq1TFghjkj5 Aw92PUFDWn7yg0hVWl1148n9YfjHi/xbJ2ldI+VpXuhAK8wh88rZ4XxNuJCgtJc3sB/G 9PYi4aHAjNxjvLVzG+YwtJab0KhLrYfoJKgMeMoCPtuCj1kO2dOmtystPlnjIefhfqlX WHqQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:content-transfer-encoding:mime-version :list-subscribe:list-help:list-post:list-archive:list-unsubscribe :list-id:precedence:subject:cc:references:in-reply-to:message-id :date:to:from:dkim-signature:dkim-filter; bh=XBM8Jp6jviHTtqS4gYn7RDfWEDjKiXMWFh5hi96N7NM=; b=Rufik6WY4zdwxH9WSm6qwu9STfomXk6guri3PxYYNY1UKQGgqcVf3PRMxbuaN27l1P XTOnAMDLFKKVX4hZxHdBOADB2j1HgRxsanbtlkoECMfWO9di9BU14dJjemVRq6HgaAV1 YxUxnzNpbicZovyEekUR8O5j4N74r4rxzvslBThIiAja80ggALW0qIEOZYe4VF3KfvSD E+t1WUS5NV5rHoiAwcnzeZZFMtfMPHwOc7C1DkSECwYwlAaz/IOxpruati+ROMgzwzE1 MeSCj/hemEC8JmhjJ0h3Q67ftVHm9M9KACHmBMwlGIK/0lPHOXYBf8lEGiUkt23/xybs M87g== ARC-Authentication-Results: i=1; mx.google.com; dkim=neutral (body hash did not verify) header.i=@nifty.com header.s=dec2015msa header.b=nte4788W; spf=pass (google.com: best guess record for domain of u-boot-bounces@lists.denx.de designates 81.169.180.215 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de Return-Path: Received: from lists.denx.de (dione.denx.de. [81.169.180.215]) by mx.google.com with ESMTP id r17-v6si2064239edd.405.2018.09.09.20.59.51; Sun, 09 Sep 2018 20:59:51 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of u-boot-bounces@lists.denx.de designates 81.169.180.215 as permitted sender) client-ip=81.169.180.215; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@nifty.com header.s=dec2015msa header.b=nte4788W; spf=pass (google.com: best guess record for domain of u-boot-bounces@lists.denx.de designates 81.169.180.215 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de Received: by lists.denx.de (Postfix, from userid 105) id 1A49CC21E1D; Mon, 10 Sep 2018 03:59:31 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=T_DKIM_INVALID autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 6027AC21DFA; Mon, 10 Sep 2018 03:59:18 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id B3269C21E1E; Mon, 10 Sep 2018 03:59:15 +0000 (UTC) Received: from conuserg-12.nifty.com (conuserg-12.nifty.com [210.131.2.79]) by lists.denx.de (Postfix) with ESMTPS id 69EAFC21DCA for ; Mon, 10 Sep 2018 03:59:09 +0000 (UTC) Received: from pug.e01.socionext.com (p14092-ipngnfx01kyoto.kyoto.ocn.ne.jp [153.142.97.92]) (authenticated) by conuserg-12.nifty.com with ESMTP id w8A3wifZ006634; Mon, 10 Sep 2018 12:58:47 +0900 DKIM-Filter: OpenDKIM Filter v2.10.3 conuserg-12.nifty.com w8A3wifZ006634 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nifty.com; s=dec2015msa; t=1536551927; bh=Les2PnRctCo66cRjtPxO3XDAL7rSPFV68CFoO92bExY=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=nte4788WMaZpjp2E0cGOAHSLT1agB7481GOjPu9KgaJYGE3jij1Wvw6X8y2HocIc3 79pWNKhKsUDktD6ddQRCerqvgT5T3JQHJX5tvWrC0RI5JV56HVJ3ML+X72etvhlgCZ mmOGRhU7WngZKjChr7SR78lxCxZvUC+ZPBWhTuK8tCclW0TSpbuDOSYORGupRF1dt7 lWRpXkfAzDU9ZyHRDh9wb6wq44ZNAviOCEWzGkGyj4tsvbXphdFVpcg/eEOpN8sj40 a7ZrK8A/VKf0BxX/89WybcALlzuZWeH0VbDF1/lmELhmmmJ5KD2r8r6iSZlvy7MQIy 0sQ7dh8Lt08lw== X-Nifty-SrcIP: [153.142.97.92] From: Masahiro Yamada To: u-boot@lists.denx.de Date: Mon, 10 Sep 2018 12:58:36 +0900 Message-Id: <1536551916-21187-6-git-send-email-yamada.masahiro@socionext.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1536551916-21187-1-git-send-email-yamada.masahiro@socionext.com> References: <1536551916-21187-1-git-send-email-yamada.masahiro@socionext.com> Cc: Tom Rini Subject: [U-Boot] [PATCH 5/5] ARM: uniphier: remove ad-hoc clock enabling for EHCI X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" The MIO clock is enabled by default, and the STDMAC clock is enabled by the clk driver. The ad-hoc way to enable the clock is no longer needed. Signed-off-by: Masahiro Yamada --- arch/arm/mach-uniphier/clk/clk-ld11.c | 6 ------ arch/arm/mach-uniphier/clk/clk-ld4.c | 3 --- arch/arm/mach-uniphier/clk/clk-pro4.c | 3 --- arch/arm/mach-uniphier/sc-regs.h | 3 --- 4 files changed, 15 deletions(-) diff --git a/arch/arm/mach-uniphier/clk/clk-ld11.c b/arch/arm/mach-uniphier/clk/clk-ld11.c index ec5fa7b..e997acf 100644 --- a/arch/arm/mach-uniphier/clk/clk-ld11.c +++ b/arch/arm/mach-uniphier/clk/clk-ld11.c @@ -34,14 +34,8 @@ void uniphier_ld11_clk_init(void) #ifdef CONFIG_USB_EHCI_HCD { - /* FIXME: the current clk driver can not handle parents */ - u32 tmp; int ch; - tmp = readl(SC_CLKCTRL4); - tmp |= BIT(10) | BIT(8); /* MIO, STDMAC */ - writel(tmp, SC_CLKCTRL4); - for (ch = 0; ch < 3; ch++) { void __iomem *phyctrl = (void __iomem *)SG_USBPHYCTRL; diff --git a/arch/arm/mach-uniphier/clk/clk-ld4.c b/arch/arm/mach-uniphier/clk/clk-ld4.c index d90fef0..9c88cde 100644 --- a/arch/arm/mach-uniphier/clk/clk-ld4.c +++ b/arch/arm/mach-uniphier/clk/clk-ld4.c @@ -24,9 +24,6 @@ void uniphier_ld4_clk_init(void) /* provide clocks */ tmp = readl(SC_CLKCTRL); -#ifdef CONFIG_USB_EHCI_HCD - tmp |= SC_CLKCTRL_CEN_MIO | SC_CLKCTRL_CEN_STDMAC; -#endif #ifdef CONFIG_NAND_DENALI tmp |= SC_CLKCTRL_CEN_NAND; #endif diff --git a/arch/arm/mach-uniphier/clk/clk-pro4.c b/arch/arm/mach-uniphier/clk/clk-pro4.c index e73bf38..32d44c0 100644 --- a/arch/arm/mach-uniphier/clk/clk-pro4.c +++ b/arch/arm/mach-uniphier/clk/clk-pro4.c @@ -39,9 +39,6 @@ void uniphier_pro4_clk_init(void) tmp |= SC_CLKCTRL_CEN_USB31 | SC_CLKCTRL_CEN_USB30 | SC_CLKCTRL_CEN_GIO; #endif -#ifdef CONFIG_USB_EHCI_HCD - tmp |= SC_CLKCTRL_CEN_MIO | SC_CLKCTRL_CEN_STDMAC; -#endif #ifdef CONFIG_NAND_DENALI tmp |= SC_CLKCTRL_CEN_NAND; #endif diff --git a/arch/arm/mach-uniphier/sc-regs.h b/arch/arm/mach-uniphier/sc-regs.h index c5c054e..b105335 100644 --- a/arch/arm/mach-uniphier/sc-regs.h +++ b/arch/arm/mach-uniphier/sc-regs.h @@ -42,7 +42,6 @@ #define SC_RSTCTRL_NRST_USB3B0 (0x1 << 17) /* USB3 #0 bus */ #define SC_RSTCTRL_NRST_USB3C0 (0x1 << 16) /* USB3 #0 core */ #define SC_RSTCTRL_NRST_ETHER (0x1 << 12) -#define SC_RSTCTRL_NRST_STDMAC (0x1 << 10) #define SC_RSTCTRL_NRST_GIO (0x1 << 6) /* Pro4 or older */ #define SC_RSTCTRL_NRST_UMC1 (0x1 << 5) @@ -73,8 +72,6 @@ #define SC_CLKCTRL_CEN_USB31 (0x1 << 17) /* USB3 #1 */ #define SC_CLKCTRL_CEN_USB30 (0x1 << 16) /* USB3 #0 */ #define SC_CLKCTRL_CEN_ETHER (0x1 << 12) -#define SC_CLKCTRL_CEN_MIO (0x1 << 11) -#define SC_CLKCTRL_CEN_STDMAC (0x1 << 10) #define SC_CLKCTRL_CEN_GIO (0x1 << 6) /* Pro4 or older */ #define SC_CLKCTRL_CEN_UMC (0x1 << 4)